Method for improving sampling precision and related device

Abstract

The invention discloses a method for improving sampling precision and a related device. The method comprises the following steps: determining a first error of first sampling data according to a sampled first analog signal and a sampled second analog signal; detecting that a first reference voltage of the analog-to-digital converter is different from a second reference voltage of the digital-to-analog converter, and determining a plurality of first adjustment parameters according to the first reference voltage and the second reference voltage; adjusting the first sampling data according to a plurality of first adjustment parameters to obtain first output data of the digital-to-analog converter; determining a plurality of second adjustment parameters according to the plurality of first adjustment parameters, the first reference voltage and the second reference voltage; adjusting the first output data according to a plurality of second adjustment parameters to obtain a second error; and determining a sampling result according to the first error, the second error and the first sampling data. The sampling precision can be improved.

Description

Technical Field

[0001] The present application relates to the technical field of circuit signal acquisition, and in particular to a method for improving sampling accuracy and a related device. Background Art

[0002] With the continuous advancement of semiconductor technology, the switching power supply industry is also developing, and more and more high-voltage and high-current products are appearing on the market. However, if the sampling amount of the current switching power supply control chip increases while the resolution remains unchanged, the sampling error will increase, which will lead to lower sampling accuracy. Summary of the invention

[0003] The embodiments of the present application provide a method and a related device for improving sampling accuracy, thereby reducing sampling errors and improving sampling accuracy.

[0004] In a first aspect, an embodiment of the present application provides a method for improving sampling accuracy, which is applied to a processor of a sampling system, wherein the sampling system further includes an analog-to-digital converter and a digital-to-analog converter, including: Determine a first error of first sampled data according to a sampled first analog signal and a second analog signal, wherein the first sampled data is data obtained by the analog-to-digital converter sampling the first analog signal, and the second analog signal is data output by the digital-to-analog converter after quantizing the first sampled data; detecting that a first reference voltage of the analog-to-digital converter and a second reference voltage of the digital-to-analog converter are different, and determining a plurality of first adjustment parameters according to the first reference voltage and the second reference voltage; Adjust the first sampling data according to the plurality of first adjustment parameters to obtain first output data of the digital-to-analog converter; determining a plurality of second adjustment parameters according to the plurality of first adjustment parameters, the first reference voltage and the second reference voltage; Adjust the first output data according to the plurality of second adjustment parameters to obtain a second error; A sampling result is determined according to the first error, the second error and the first sampling data.

[0005] The determining of a plurality of first adjustment parameters according to the first reference voltage and the second reference voltage includes: determining a plurality of voltage adjustment parameters according to the first reference voltage and the second reference voltage; Determining a third analog signal output by the digital-to-analog converter according to first preset input data of the digital-to-analog converter; and determining a fourth analog signal output by the digital-to-analog converter according to second preset input data of the digital-to-analog converter; Determine, according to the plurality of voltage adjustment parameters, second sampling data of the analog-to-digital converter under the third analog signal and third sampling data of the analog-to-digital converter under the fourth analog signal; The plurality of first adjustment parameters are determined according to the first preset input data, the second preset input data, the second sampling data and the third sampling data.

[0006] Among them, the multiple first adjustment parameters include adjustment parameters M1 and adjustment parameters M2, and the adjustment parameter M1 satisfies the following formula: M1=(X2-X1) / (Y2-Y1); the adjustment parameter M2 satisfies the following formula: (X2Y1-X1Y2) / (Y2-Y1), wherein X1 is the first preset input data, X2 is the second preset input data, Y1 is the second sampling data, and Y2 is the third sampling data.

[0007] The step of determining a plurality of second adjustment parameters according to the plurality of first adjustment parameters, the first reference voltage and the second reference voltage comprises: Acquire a fifth analog signal input to the analog-to-digital converter and fourth sampled data output from the analog-to-digital converter; and, acquire a sixth analog signal input to the analog-to-digital converter and fifth sampled data output from the analog-to-digital converter; Adjusting the fourth sampled data according to the plurality of first adjustment parameters to obtain second output data of the digital-to-analog converter; and adjusting the fifth sampled data according to the plurality of first adjustment parameters to obtain third output data of the digital-to-analog converter; determining a seventh analog signal of the digital-to-analog converter according to the second output data and the second reference voltage; and determining an eighth analog signal of the digital-to-analog converter according to the third output data and the second reference voltage; determining a third error of the fourth sampling data according to the fifth analog signal, the seventh analog signal and the first reference voltage; and determining a fourth error of the fifth sampling data according to the sixth analog signal, the eighth analog signal and the first reference voltage; The plurality of second adjustment parameters are determined according to the third error, the fourth error, the second output data, and the third output data.

[0008] Among them, the multiple second adjustment parameters include adjustment parameter N1 and adjustment parameter N2, the adjustment parameter N1 satisfies the following formula: N1=(Y3-Y4) / (X4-X3); the adjustment parameter N2 satisfies the following formula: (X3Y4-X4Y3) / (X3-X4), wherein X3 is the second output data, X4 is the third output data, Y3 is the third error, and Y4 is the fourth error.

[0009] The sampling system further includes a differential amplifier circuit, and the determining of a first error of the first sampling data according to the sampled first analog signal and the second analog signal includes: performing a difference determination operation and an amplification operation on the first analog signal and the second analog signal through the differential amplifier circuit to obtain a fifth error; The first error is obtained by performing a quantization operation on the fifth error through the analog-to-digital converter.

[0010] The multiple voltage adjustment parameters include a first voltage adjustment parameter and a second voltage adjustment parameter, and the determining of the multiple voltage adjustment parameters according to the first reference voltage and the second reference voltage includes: determining a first voltage adjustment parameter according to the first reference voltage and the second reference voltage; A second voltage adjustment parameter is determined according to the first reference voltage.

[0011] In a second aspect, an embodiment of the present application provides a method for improving sampling accuracy, which is applied to a processor of a sampling system, wherein the sampling system further includes an analog-to-digital converter, a pulse width modulation and a low-pass filter circuit, wherein the pulse width modulation is connected to the low-pass filter circuit, and includes: Determine a first error of first sampled data according to a sampled first analog signal and a second analog signal, wherein the first sampled data is data obtained by sampling the first analog signal by the analog-to-digital converter, and the second analog signal is data output after quantizing the first sampled data through the pulse width modulation and the low-pass filter circuit; detecting that a first reference voltage of the analog-to-digital converter and a second reference voltage of the pulse width modulation are different, and determining a plurality of first adjustment parameters according to the first reference voltage and the second reference voltage; Adjust the first sampling data according to the plurality of first adjustment parameters to obtain first output data of the digital-to-analog converter; determining a plurality of second adjustment parameters according to the plurality of first adjustment parameters, the first reference voltage and the second reference voltage; Adjust the first output data according to the plurality of second adjustment parameters to obtain a second error; A sampling result is determined according to the first error, the second error and the first sampling data.

[0012] In a third aspect, an embodiment of the present application provides a sampling system, including: a processor, an analog-to-digital converter, and a digital-to-analog converter; The analog-to-digital converter is used to acquire a sampled first analog signal and perform analog-to-digital conversion on the first analog signal to obtain first sampled data; The digital-to-analog converter is used to perform digital-to-analog conversion on the first sampling data and output a second analog signal; The processor is used to determine a first error of the first sampling data based on the first analog signal and the second analog signal; and the processor is also used to detect that the first reference voltage of the analog-to-digital converter and the second reference voltage of the digital-to-analog converter are different, and determine multiple first adjustment parameters based on the first reference voltage and the second reference voltage; and the processor is also used to adjust the first sampling data according to the multiple first adjustment parameters to obtain the first output data of the digital-to-analog converter; and the processor is also used to determine multiple second adjustment parameters based on the multiple first adjustment parameters, the first reference voltage and the second reference voltage; and the processor is also used to adjust the first output data according to the multiple second adjustment parameters to obtain a second error; and the processor is also used to determine a sampling result based on the first error, the second error and the first sampling data.

[0013] In a fourth aspect, an embodiment of the present application provides a sampling system, including: a processor, an analog-to-digital converter, a pulse width modulation and a low-pass filter circuit; The analog-to-digital converter is used to acquire a sampled first analog signal and perform analog-to-digital conversion on the first analog signal to obtain first sampled data; The pulse width modulation is used to perform digital-to-analog conversion on the first sampling data and output a reference analog signal; The low-pass filter circuit is used to smooth the reference analog signal and output a second analog signal; The processor is used to determine a first error of the first sampling data according to the first analog signal and the second analog signal; and the processor is also used to detect that the first reference voltage of the analog-to-digital converter and the second reference voltage of the pulse width modulation are different, and determine multiple first adjustment parameters according to the first reference voltage and the second reference voltage; and the processor is also used to adjust the first sampling data according to the multiple first adjustment parameters to obtain the first output data of the digital-to-analog converter; and the processor is also used to determine multiple second adjustment parameters according to the multiple first adjustment parameters, the first reference voltage and the second reference voltage; and the processor is also used to adjust the first output data according to the multiple second adjustment parameters to obtain a second error; and the processor is also used to determine a sampling result according to the first error, the second error and the first sampling data.

[0014] In a fifth aspect, an embodiment of the present application provides an electronic device, comprising a memory, a processor, and an executable program code stored in the memory and executable on the processor, wherein the processor executes the steps of the method described in the first aspect and the second aspect when executing the executable program code.

[0015] In a sixth aspect, an embodiment of the present application provides a computer-readable storage medium having executable program code stored thereon, wherein the executable program code includes execution instructions, and the execution instructions are used to execute the steps of the method described in the first aspect and the second aspect.

[0016] In a seventh aspect, an embodiment of the present application provides a computer program product, wherein the computer program product includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to cause a computer to execute some or all of the steps described in the first and second aspects of the embodiments of the present application. The computer program product may be a software installation package.

[0017] It can be seen that in an embodiment of the present application, first, a first error of first sampling data is determined according to the sampled first analog signal and the second analog signal, the first sampling data is data obtained by the analog-to-digital converter sampling the first analog signal, and the second analog signal is data output by the digital-to-analog converter after quantizing the first sampling data; then, it is detected that the first reference voltage of the analog-to-digital converter and the second reference voltage of the digital-to-analog converter are different, and a plurality of first adjustment parameters are determined according to the first reference voltage and the second reference voltage; then, the first sampling data is adjusted according to the plurality of first adjustment parameters to obtain the first output data of the digital-to-analog converter; then, a plurality of second adjustment parameters are determined according to the plurality of first adjustment parameters, the first reference voltage and the second reference voltage; then, the first output data is adjusted according to the plurality of second adjustment parameters to obtain a second error; finally, a sampling result is determined according to the first error, the second error and the first sampling data.

[0018] The present application converts the numerical value sampled by the analog-to-digital converter into an analog signal, and compares it with the actual sampled analog signal to obtain a first sampling error. Since there is a conversion error in the process from sampling from the analog-to-digital converter to the output of the digital-to-analog converter, a hierarchical adjustment is performed in combination with different influencing factors. First, the conversion of the analog-to-digital converter sampling value to the corresponding output value of the digital-to-analog converter is adjusted, and then the second sampling error of the analog-to-digital converter is determined based on the data after the preliminary adjustment. Then, the final sampling result is determined by combining the original sampling value, the first sampling error and the second sampling error. This can solve the problem of reduced sampling accuracy and obtain a high-precision sampling result. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0020] Figure 1 is a system architecture diagram of a sampling system provided in an embodiment of the present application; Figure 2 is a system architecture diagram of another sampling system provided in an embodiment of the present application; Figure 3 It is a flowchart of a method for improving sampling accuracy provided by an embodiment of the present application; Figure 4 This is a working schematic diagram of an EPWM module and a low-pass filter circuit provided in an embodiment of the present application; Figure 5 It is a schematic diagram of a sampling adjustment process provided by an embodiment of the present application; Figure 6 is a schematic diagram of another sampling adjustment process provided by an embodiment of the present application; Figure 7 This is a block diagram of the functional units of a device for improving sampling accuracy provided by an embodiment of the present application; Figure 8 This is a block diagram of functional units of another device for improving sampling accuracy provided by an embodiment of the present application; Fig. 9 It is a structural schematic diagram of an electronic device proposed in an embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0022] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.

[0023] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0024] Currently, there is a problem that the sampling accuracy decreases as the sampling volume increases.

[0025] In view of the above problems, the embodiments of the present application provide a method for improving sampling accuracy and a related device. The embodiments of the present application are described in detail below in conjunction with the accompanying drawings.

[0026] See also Figure 1 , Figure 1 is a system architecture diagram of a sampling system provided in an embodiment of the present application. Figure 1 As shown, the sampling system 10 is a functional subsystem in a control chip, and the sampling system 10 includes a microcontroller 11 and a differential amplifier circuit 12. The microcontroller 11 includes a first processor 111, an analog-to-digital converter (ADC) 112, and a digital-to-analog converter (DAC) 113. The first processor 111 is connected to the analog-to-digital converter 112, and the first processor 111 is connected to the digital-to-analog converter 113. Among them, the blue line is the sampled analog signal, the orange line is the analog signal output by the digital-to-analog converter, and the green line is the amplified sampling error value, which is the difference between the sampled analog signal and the analog signal output by the digital-to-analog converter 113.

[0027] Among them, the first processor 111 is the control core of the sampling system 10, which is used to obtain the input and output data of the analog-to-digital converter 112, obtain the input and output data of the digital-to-analog converter 113, and perform data processing operations on the obtained input and output data; the analog-to-digital converter 112 is used to obtain the sampled analog signal, and convert the analog signal into an analog-to-digital signal to obtain a digital signal; the digital-to-analog converter 113 is used to convert the digital signal into a digital-to-analog signal and output an analog signal; the differential amplifier circuit 12 is used to calculate the difference between the sampled analog signal and the analog signal output by the digital-to-analog converter 113, and amplify it by a preset multiple, and finally transmit it to the analog-to-digital converter 112 and the first processor 111.

[0028] Specifically, when there is no digital-to-analog converter in the microcontroller 11, the function of the digital-to-analog converter can be realized by pulse width modulation (PWM) plus a low-pass filter circuit. Figure 2 , Figure 2 is a system architecture diagram of another sampling system provided in an embodiment of the present application, such as Figure 2 As shown, the microcontroller 11 in the sampling system 10 may further include a PWM module 114, and the sampling system 10 further includes a low-pass filter circuit 13, the low-pass filter circuit 13 is composed of a capacitor C1 and a resistor R1, wherein the output of the PWM module 114 is externally connected to the low-pass filter circuit, the first processor 111 is connected to the analog-to-digital converter 112, and the first processor 111 is connected to the PWM module 114. Among them, the blue line is the sampled analog signal, the black solid line is the discrete analog signal output by the PWM module 114, the black dotted line is the continuous analog signal output by the low-pass filter circuit 13, and the green line is the amplified sampling error value, and the sampling error value is the difference between the sampled analog signal and the analog signal output by the low-pass filter circuit 13.

[0029] Among them, the first processor 111 is the control core of the sampling system 10, which is used to obtain the input and output data of the analog-to-digital converter 112, obtain the input and output data of the PWM module 114, and obtain the input and output of the low-pass filter circuit 13, and perform data processing operations on the obtained input and output data; the analog-to-digital converter 112 is used to obtain the sampled analog signal, and convert the analog signal into an analog-to-digital signal to obtain a digital signal; the PWM module 114 is used to convert the digital signal into a digital-to-analog signal and output a discrete analog signal; the low-pass filter circuit 13 is used to smooth the discrete analog signal and output a continuous analog signal; the differential amplifier circuit 12 is used to calculate the difference between the sampled analog signal and the analog signal output by the low-pass filter circuit 13, and amplify it by a preset multiple, and finally transmit it to the analog-to-digital converter 112 and the first processor 111.

[0030] Furthermore, when there is no digital-to-analog converter in the microcontroller 11 , the function of the digital-to-analog converter can be realized by using enhanced pulse width modulation (EPWM) plus a low-pass filter circuit.

[0031] Based on this, the present application provides a method and related device for improving sampling accuracy, and the present application is described in detail below in conjunction with the accompanying drawings.

[0032] See also Figure 3 , Figure 3 is a flow chart of a method for improving sampling accuracy provided by an embodiment of the present application, such as Figure 3 As shown, the method comprises the following steps: S210 , determining a first error of first sampled data according to the sampled first analog signal and the second analog signal.

[0033] The first sampling data is data obtained by the analog-to-digital converter sampling the first analog signal, and the second analog signal is data output by the digital-to-analog converter after quantizing the first sampling data.

[0034] Among them, the working process of ADC mainly includes four steps: sampling, holding, quantization and encoding. First, for the sampling step, the analog signal is taken at a certain time interval to discretize the continuous analog signal in time. For the holding step, since the sampling time is usually very short, in order to provide a stable input signal for the subsequent quantization and encoding process, the sampled value needs to be held at the sampling moment so that it remains unchanged during quantization and encoding. For the quantization step, the amplitude of the analog signal obtained by sampling is divided according to a certain quantization level and converted into a discrete quantization value. The quantization process will introduce a certain error, which is called quantization error. For the encoding step, the quantized value is represented by a binary code to form a digital signal.

[0035] Among them, ADC performance indicators include resolution, conversion accuracy and conversion speed. Among them, resolution refers to the minimum analog signal change that the ADC can distinguish, usually expressed in binary bits. The higher the resolution, the smaller the analog signal change that the ADC can distinguish, and the higher the conversion accuracy. Conversion accuracy indicates the degree of closeness between the digital signal output by the ADC and the actual analog signal, usually measured by errors, including quantization error, gain error, offset error, etc. Conversion speed is the time required for the ADC to complete an analog signal to digital signal conversion, usually expressed in sampling frequency, in Hertz (Hz). The faster the conversion speed, the higher the analog signal frequency that the ADC can process.

[0036] The first analog signal sampled by the external input is sampled and converted by the ADC to obtain the first sampled data. For example, if the resolution of the ADC in the control chip is 12 bits, the first analog signal will be converted and divided into the range of 0-4095, a total of 4096 points, so the first sampled data The calculation formula (1) is: , Wherein, i is the quantization number of the first analog signal, which may be 4096 in this embodiment. is the first analog signal, It is the reference voltage corresponding to ADC.

[0037] The basic working principle of DAC is to generate the corresponding analog voltage or current output by weighted summation according to the input digital code. Common DAC circuit structures include R-2R ladder resistor network, weighted resistor network, etc. Taking the R-2R ladder resistor network as an example, it converts the input binary digital code into the corresponding current or voltage output through the combination of different resistors.

[0038] Among them, the main types of DAC include voltage output DAC and current output DAC. The output of voltage output DAC is an analog voltage signal. Different circuit structures and component parameters can be selected according to the range and accuracy requirements of the output voltage. The output of current output DAC is an analog current signal, which is more commonly used in some applications that need to drive load current, such as driving light-emitting diodes (LEDs).

[0039] In this embodiment of the present application, the DAC is a voltage output type DAC.

[0040] The first sampled data is converted into an analog signal by DAC, and the second analog signal The calculation formula (2) is: .

[0041] Specifically, the sampling system also includes a differential amplifier circuit, and the determination of the first error of the first sampling data based on the sampled first analog signal and the second analog signal includes: performing a difference determination operation and an amplification operation on the first analog signal and the second analog signal by the differential amplifier circuit to obtain a fifth error; and performing a quantization operation on the fifth error by the analog-to-digital converter to obtain the first error.

[0042] The differential amplifier circuit has two input terminals and one or two output terminals. The two input terminals are usually called the in-phase input terminal and the inverting input terminal. It can amplify the difference between the two input signals and suppress the same part of the two input signals, that is, the common-mode signal. This feature enables the differential amplifier circuit to effectively extract and amplify useful signals in an environment with interference and noise.

[0043] The differential amplifier circuit includes differential mode signal amplification and common mode signal suppression.

[0044] The differential signal refers to the difference between two input signals. When the differential signal is input to the differential amplifier circuit, the circuit will amplify it. In an ideal differential amplifier circuit, the two input signals act on two symmetrical amplification branches respectively. Due to the symmetry of the circuit, the differential signal will cause the outputs of the two branches to change in opposite directions, thereby obtaining an amplified differential signal at the output end.

[0045] The common-mode signal refers to the same part of the two input signals. In practical applications, the common-mode signal is usually caused by interference or noise. The differential amplifier circuit uses its symmetrical structure and characteristics to make the common-mode signal produce the same response in the two amplification branches, cancel each other out or be greatly attenuated at the output, thereby suppressing the common-mode signal.

[0046] When a DAC is included in the sampling system, one input end of the differential amplifier circuit is connected to the input end of the sampled first analog signal, and the other input end of the differential amplifier circuit is connected to the output end of the digital-to-analog converter for inputting the sampled first analog signal and the second analog signal, and the output end of the differential amplifier circuit is connected to the ADC for sending the error amplified by a preset multiple to the ADC.

[0047] When the sampling system does not include a DAC, illustratively, the function of the DAC can be realized by an EPWM module plus a low-pass filter circuit, an input end of the differential amplifier circuit is connected to the input end of the sampled first analog signal, and the other input end of the differential amplifier circuit is connected to the output end of the low-pass filter circuit, for inputting the sampled first analog signal and the second analog signal, and the output end of the differential amplifier circuit is connected to the ADC, for sending the error amplified by a preset multiple to the ADC.

[0048] Among them, PWM is a method of digitally encoding the analog signal level. By controlling the pulse width of the fixed-cycle signal, that is, the duration of the high level, the required analog signal is equivalently obtained. Among them, the PWM signal consists of a series of periodic pulses, and each cycle contains a high level and a low level stage. The output signal is controlled by changing the proportion of the high level in a cycle, that is, the duty cycle. For example, in a PWM signal with a period of T, the high level duration is t, and the duty cycle D=t / T. The larger the duty cycle, the higher the average level of the equivalent output analog signal; the smaller the duty cycle, the lower the average level.

[0049] Among them, EPWM is a pulse width modulation technology that expands and enhances the functions of traditional PWM. It exists as a peripheral module in many microcontrollers and digital signal processors (DSPs). The basic working principle of EPWM is similar to PWM, and it also realizes signal modulation by controlling the duty cycle of the pulse. However, EPWM adds more control functions and features, such as the ability to accurately control the frequency, duty cycle, and phase of the pulse, and can also achieve more complex waveform generation and synchronous operation.

[0050] Specifically, see Figure 4 , Figure 4 is a working schematic diagram of an EPWM module and a low-pass filter circuit provided in an embodiment of the present application, such as Figure 4 As shown, the sampling value is the ADC sampling value, and the output is the filtered voltage Among them, the EPWM module is configured to count up mode, zero crossing is set high, the comparison value point is set low, the EPWM cycle value is 4095, and the EPWM comparison value is the ADC sampling value. The output of the EPWM module is connected to the low-pass filter circuit composed of C1 and R1. At this time, the filtered voltage It is equivalent to the analog value output by DAC ,Right now: , Among them, 3.3V is the reference voltage of the EPWM module.

[0051] Specifically, Figure 4 As shown, in the up-counting mode of the EPWM module, the counter starts counting up from 0. When the count value reaches the set comparison value, it reaches the ADC sampling value ( ), the output signal changes from high level to low level; when the count value reaches the period value 4095, the counter is cleared and starts counting again, and the output signal changes from low level to high level.

[0052] The ADC sampling value is used as the comparison value to achieve dynamic adjustment of the duty cycle. The period value of EPWM is an example value and can be modified and adjusted according to actual needs.

[0053] Among them, the first error The calculation formula (3) is: , Wherein, K is a preset multiple amplified by the differential amplifier circuit, and an exemplary K may be 100. is the first analog signal, is the second analog signal, is the quantization number of the first analog signal, which is determined by the resolution. If the resolution is 8 bits, it corresponds to the interval of 0-255, a total of 256 points, and the quantization number is 256. is the reference voltage of ADC.

[0054] The difference determination operation is used to perform a subtraction operation on the first analog signal and the second analog signal, and then perform an amplification operation to amplify the difference between the first analog signal and the second analog signal by K times, and then output a fifth error, corresponding to , is an analog signal, and then is input into the ADC to perform a quantization operation. First, the fifth error is quantized and converted into a digital signal, and then the error converted into the digital signal is rounded. For example, if the error converted into the digital signal is 23.3456, the first error obtained after rounding is 23.

[0055] Among them, since the sampling value cannot be a decimal, it can only slide on the scale in units of 1 within the interval determined by the resolution. Therefore, when the sampled analog signal falls between the scales, the accuracy will be reduced. The existing sampling error value The calculation formula (4) is: , Then and Add together to get the final sampling result.

[0056] In one possible embodiment, in order to obtain a higher precision sampling value, the embodiment of the present application converts the numerical value obtained by ADC sampling into an analog signal, compares it with the actual sampled signal, takes the actual error value for amplification and performs another sampling, so that the sampling result plus the sampling error value constitutes a high precision sampling result.

[0057] Specifically, the error value after amplification is , that is, the first error, high-precision sampling result The calculation formula (5) is: , Furthermore, according to the calculation formula (5), the new error value is obtained: , and its calculation formula (6) is: .

[0058] For example, if the analog signal being sampled is =1.6V, ADC reference voltage =3.3V, resolution is 12 bits, magnification K=10, then according to calculation formula (4) and calculation formula (6), we can get and ,Right now:

[0059]

[0060] in, is 0.939, The actual sampling error obtained by sampling using the method of the prior art is 0.039. If the maximum sampling value is 1000A, the actual sampling error obtained by sampling using the method of the present embodiment is 1000A×0.939 / 4096=0.2292A. The actual sampling error obtained by sampling using the method of the present embodiment is 1000A×0.039 / 4096=0.0095A. It can be seen that the sampling accuracy is greatly improved.

[0061] It can be seen that in the embodiment of the present application, the analog signal output by the DAC module or the low-pass filter circuit , and the real sampled signal A comparison is made, the error is taken and amplified, and then the sampling value is determined according to the error, thereby reducing the sampling error and improving the sampling accuracy without replacing the control chip.

[0062] S220, detecting that a first reference voltage of the analog-to-digital converter and a second reference voltage of the digital-to-analog converter are different, and determining a plurality of first adjustment parameters according to the first reference voltage and the second reference voltage.

[0063] Among them, in actual use, there are cases where the reference voltages of ADC and DAC are different, or there are cases where the reference voltages between ADC and EPWM functional modules are different. For example, ADC uses an external reference voltage of 3.2V, DAC uses the digital signal voltage of the microcontroller 3.3V, or EPWM uses the digital signal voltage of the microcontroller 3.3V, so additional adjustments are required.

[0064] Specifically, the determining of multiple first adjustment parameters based on the first reference voltage and the second reference voltage includes: determining multiple voltage adjustment parameters based on the first reference voltage and the second reference voltage; determining a third analog signal output by the digital-to-analog converter based on the first preset input data of the digital-to-analog converter; and determining a fourth analog signal output by the digital-to-analog converter based on the second preset input data of the digital-to-analog converter; determining the second sampling data of the analog-to-digital converter under the third analog signal and the third sampling data of the analog-to-digital converter under the fourth analog signal based on the multiple voltage adjustment parameters; and determining the multiple first adjustment parameters based on the first preset input data, the second preset input data, the second sampling data and the third sampling data.

[0065] Specifically, the multiple voltage adjustment parameters include a first voltage adjustment parameter and a second voltage adjustment parameter, and determining the multiple voltage adjustment parameters based on the first reference voltage and the second reference voltage includes: determining the first voltage adjustment parameter based on the first reference voltage and the second reference voltage; determining the second voltage adjustment parameter based on the first reference voltage.

[0066] Among them, different reference voltages will cause errors in the ADC sampling value and the DAC output value, so the DAC output value needs to be calibrated. Since the ADC sampling value cannot be a decimal, the exemplary ADC sampling value can only slide on the scale of 1 in the range of 0~4095. Therefore, when the sampled analog signal falls between the scales, the accuracy will be reduced, so the error ADC sampling value needs to be calibrated.

[0067] Among them, when the control chip includes DAC, the second reference voltage is the reference voltage of DAC, when the control chip does not include DAC, the second reference voltage is the reference voltage of PMW, or the second reference voltage is the reference voltage of EPMW, or other reference voltage that replaces the DAC function.

[0068] The DAC output value is first calibrated, wherein in the embodiment of the present application, the DAC output value corresponds to the DAC setting value, that is, the input data of the DAC. Specifically, the ADC and DAC functional modules are configured to obtain any two DAC setting values ​​X1 and DAC setting values ​​X2, control the DAC output value X1, obtain the ADC sampling value Y1 of the DAC output voltage at this time, and control the DAC output value X2 to obtain the ADC sampling value Y2 of the DAC output voltage at this time.

[0069] The DAC setting value is used as the input digital signal, which will be converted by the DAC into the corresponding analog voltage or current output. Specifically, the DAC setting value is a digital quantity, and the processor receives user instructions to control the DAC output. The DAC will convert this setting value into the corresponding analog voltage or current output based on its own working principle and reference voltage and other parameters.

[0070] Among them, there is a mapping relationship between X1 and Y1, and the mapping relationship is reflected by multiple voltage adjustment parameters. Specifically, the ratio of the second reference voltage to the first reference voltage is the first voltage adjustment parameter, and the second voltage adjustment parameter is determined with reference to the first reference voltage. The second voltage adjustment parameter can be an ADC sampling bias, and its mapping relationship is: ADC sampling value = INT (DAC setting value × second reference voltage / first reference voltage + ADC sampling bias).

[0071] Exemplarily, the first reference voltage is 3.2V, the second reference voltage is 3.3V, the ADC sampling bias is 3, X1 is 1000, X2 is 3000, and according to the mapping relationship between the ADC sampling value and the DAC setting value, 1034.25 and 3096.75 are obtained, and rounded to obtain Y1=1034, Y2=3096.

[0072] Among them, X1 is the first preset input data, X2 is the second preset input data, the third analog signal is the DAC output voltage when the DAC outputs the value X1, the fourth analog signal is the DAC output voltage when the DAC outputs the value X2, Y1 is the second sampling data, and Y2 is the third sampling data.

[0073] Among them, ADC sampling bias refers to a fixed deviation between the actual sampling value and the ideal sampling value during the ADC sampling process. Ideally, when the input analog signal is a certain value, the digital value output by the ADC should be an accurate corresponding value. However, due to various factors, the digital value actually output by the ADC will deviate from this ideal value. This fixed amount of deviation is the sampling bias.

[0074] Among them, ADC sampling bias is used to improve the dynamic range and signal-to-noise ratio of the signal, solve the distortion or noise problem caused by too small a signal, so as to improve the signal quality, reduce the quantization error, and improve the measurement accuracy of the ADC.

[0075] Specifically, the multiple first adjustment parameters include an adjustment parameter M1 and an adjustment parameter M2, the adjustment parameter M1 satisfies the following formula: M1=(X2-X1) / (Y2-Y1); the adjustment parameter M2 satisfies the following formula: (X2Y1-X1Y2) / (Y2-Y1), wherein X1 is the first preset input data, X2 is the second preset input data, Y1 is the second sampling data, and Y2 is the third sampling data.

[0076] Among them, M1 and M2 are used to calibrate the DAC output value. The conversion formula (7) from the ADC sampling value to the corresponding DAC output value is: DAC output value = ADC sampling value × M1 + M2.

[0077] In this embodiment, the DAC output value is a set value of the DAC, that is, the DAC output is controlled corresponding to the input of the set value.

[0078] Among them, see Figure 5 , Figure 5 is a schematic diagram of a sampling adjustment process provided by an embodiment of the present application, such as Figure 5 As shown, the blue line is the flow direction of the sampled analog signal, the orange line is the flow direction of the input and output data of the DAC, and the green line is the flow direction of the sampling error. This adjustment refers to the corresponding adjustment 1. The sampled analog signal is input into the analog-to-digital converter to obtain the ADC sampling value, and before inputting the digital-to-analog converter, it is adjusted by multiple first adjustment parameters and then input into the DAC to obtain the DAC output value, thereby reducing the error caused by the conversion and making the DAC output value equal to the ADC sampling value.

[0079] Exemplarily, assuming that the first reference voltage is 3.2V and the second reference voltage is 3.3V, the first voltage adjustment parameter is determined to be 3.3V / 3.2V, the second voltage adjustment parameter is 3, and the first setting value of the DAC is 1000. According to the above first voltage adjustment parameter and the second adjustment parameter, the actual value corresponding to the ADC is 1034.25, and the output value corresponding to the ADC is 1034; the second setting value of the DAC is 3000. According to the above first voltage adjustment parameter and the second adjustment parameter, the actual value corresponding to the ADC is 3096.75, and the output value corresponding to the ADC is 3096. According to the formulas of the adjustment parameters M1 and M2, M1 is calculated to be 0.969932105 and M2 is -2.909796314. Then, calibration is performed according to M1 and M2, so that the value of the ADC after calibration is equal to the DAC setting value.

[0080] It can be seen that in the embodiment of the present application, before the ADC sampling value is input into the DAC, the ADC sampling value is adjusted to reduce the error caused by the conversion between the DAC and the ADC, thereby improving the sampling accuracy of the analog signal.

[0081] S230: Adjust the first sampling data according to the plurality of first adjustment parameters to obtain first output data of the digital-to-analog converter.

[0082] After the adjustment parameters M1 and M2 are calculated, the first sampling data is adjusted. Specifically, the first sampling data is used as an ADC sampling value and is substituted into the conversion formula (7) to obtain the first output data.

[0083] S240: Determine a plurality of second adjustment parameters according to the plurality of first adjustment parameters, the first reference voltage, and the second reference voltage.

[0084] Specifically, a fifth analog signal input to the analog-to-digital converter and a fourth sampling data output from the analog-to-digital converter are obtained; and a sixth analog signal input to the analog-to-digital converter and a fifth sampling data output from the analog-to-digital converter are obtained; the fourth sampling data is adjusted according to the multiple first adjustment parameters to obtain the second output data of the digital-to-analog converter; and the fifth sampling data is adjusted according to the multiple first adjustment parameters to obtain the third output data of the digital-to-analog converter; a seventh analog signal of the digital-to-analog converter is determined according to the second output data and the second reference voltage; and an eighth analog signal of the digital-to-analog converter is determined according to the third output data and the second reference voltage; a third error of the fourth sampling data is determined according to the fifth analog signal, the seventh analog signal and the first reference voltage; and a fourth error of the fifth sampling data is determined according to the sixth analog signal, the eighth analog signal and the first reference voltage; and the multiple second adjustment parameters are determined according to the third error, the fourth error, the second output data and the third output data.

[0085] The plurality of second adjustment parameters are used to determine the error ADC sampling value. Specifically, any two ADC sampling integer values ​​are obtained, for example, the fourth sampling data is 1000 and the fifth sampling data is 3000, and a voltage 1 corresponding to one of the ADC sampling integer values ​​is input, that is, a fifth analog signal. For example, the voltage 1 corresponding to the fourth sampling data 1000 is 0.77890625. The output value of the DAC is determined according to the fourth sampling data and the conversion formula (7), that is, the second output data of the digital-to-analog converter is 967.0223084. The voltage 2 corresponding to the other ADC sampling integer value is input, that is, the sixth analog signal. For example, the voltage 2 corresponding to the fifth sampling data 3000 is 2.34140625. The output value of the DAC is determined according to the fifth sampling data and the conversion formula (7), that is, the third output data of the digital-to-analog converter is 2906.886518.

[0086] Furthermore, the second output data and the third output data are quantized respectively to obtain an output voltage corresponding to each output data, that is, a corresponding analog signal. Specifically, each output data is quantized according to the resolution of the control chip and the reference voltage of the DAC, that is: output voltage = output data / quantization number × DAC reference voltage, wherein the quantization number is determined according to the resolution of the control chip. Exemplarily, the resolution is 12 bits and the quantization number is 4096. If the DAC reference voltage is 3.3V, according to the above quantization formula, the seventh analog signal is determined to be 0.779095122 and the eighth analog signal is 2.341974001.

[0087] The fifth analog signal and the seventh analog signal are input into the differential amplifier circuit to obtain a third error, and the sixth analog signal and the eighth analog signal are input into the differential amplifier circuit to obtain a fourth error. Specifically, the seventh analog signal is subtracted from the fifth analog signal to obtain a first difference, and the first difference is amplified by a preset multiple and then converted into a digital signal through the ADC; and the eighth analog signal is subtracted from the sixth analog signal to obtain a second difference, and the second difference is amplified by a preset multiple and then converted into a digital signal through the ADC. Exemplarily, the reference voltage of the ADC is 3.2V, the quantization number is 4096, the amplification factor is 100, the third error = (0.77890625-0.779095122) / 3.2×100×4096=-24.175616, and the fourth error = (2.34140625-2.341974001) / 3.2×100×4096=-72.67213312.

[0088] Furthermore, in actual use, considering the impact of the differential circuit's inability to sample negative values, 1 can be subtracted before the conversion when converting the ADC value to the DAC value. Specifically, the DAC output value = (ADC sampling value - 1) × M1 + M2.

[0089] Specifically, the multiple second adjustment parameters include adjustment parameter N1 and adjustment parameter N2, the adjustment parameter N1 satisfies the following formula: N1=(Y3-Y4) / (X4-X3); the adjustment parameter N2 satisfies the following formula: (X3Y4-X4Y3) / (X3-X4), wherein X3 is the second output data, X4 is the third output data, Y3 is the third error, and Y4 is the fourth error.

[0090] Exemplarily, according to the calculation formulas of the adjustment parameter N1 and the adjustment parameter N2, the adjustment parameter N1 is 0.025, and the adjustment parameter N2 is 0.

[0091] Among them, Figure 5As shown, this adjustment refers to the corresponding adjustment 2, adjusts the ADC rounding and truncated part, inputs the amplified error into the analog-to-digital converter, obtains the error converted into a digital signal, and realizes the correction of the ADC rounding and truncated part.

[0092] Further, when the DAC function is realized by using an EPWM module and a low-pass filter circuit in the sampling system, please refer to Figure 6 , Figure 6 is a schematic diagram of another sampling adjustment process provided by an embodiment of the present application, such as Figure 6 As shown, the blue line is the flow of the sampled analog signal, the purple line is the flow of the input and output data of the EPWM module and the low-pass filter circuit, and the green line is the flow of the sampling error. Specifically, Figure 6 The sampling adjustment method and Figure 5 The sampling adjustment method is the same. Figure 6 The adjustment method of adjustment 2 shown in Figure 5 The method of adjustment 2 shown in corresponds to, Figure 6 The adjustment method of adjustment 3 shown in is the same as the method of adjustment 1 described above.

[0093] S250: Adjust the first output data according to the plurality of second adjustment parameters to obtain a second error.

[0094] Furthermore, the error ADC sampling value adjustment amount follows the conversion formula (8) of the corresponding DAC output value: N1×DAC output value+N2, that is, the second error=N1×DAC output value+N2.

[0095] Specifically, the first output data is used as the DAC output value and substituted into the conversion formula (8) to obtain the second error.

[0096] S260: Determine a sampling result according to the first error, the second error, and the first sampling data.

[0097] Among them, the final sampling result is: original sampling value + (first error + DAC output value × N1 + N2) / K, where K is the amplification factor of the differential amplifier circuit, and the original sampling value is the sampling data obtained after the sampled analog signal is input into the ADC. Among them, the numerical value obtained by ADC sampling is first converted into an analog signal through the DAC, and is input into the differential amplifier circuit and ADC in turn with the actual sampled analog signal. The final data obtained is the first error, and the second error is (DAC output value × N1 + N2).

[0098] It can be seen that in the embodiment of the present application, the numerical value sampled by the analog-to-digital converter is converted into an analog signal and compared with the actual sampled analog signal to obtain a first sampling error. Since there is a conversion error in the process from sampling from the analog-to-digital converter to the output of the digital-to-analog converter, a hierarchical adjustment is performed in combination with different influencing factors. First, the conversion of the analog-to-digital converter sampling value to the corresponding output value of the digital-to-analog converter is adjusted, and then the second sampling error of the analog-to-digital converter is determined based on the data after the preliminary adjustment. Then, the final sampling result is determined by combining the original sampling value, the first sampling error and the second sampling error. This can solve the problem of reduced sampling accuracy and obtain a high-precision sampling result.

[0099] At the same time, the application is user-friendly and can achieve high-precision sampling results without replacing the control chip. It has a wide range of applications and can be achieved with any control chip. In addition, the peripheral circuits of the control chip can be easily modified. When the control chip has a DAC function, only a differential amplifier circuit needs to be added. If the control chip has a differential signal sampling function, no external circuit is required. When the control chip does not have a DAC function, only a differential amplifier circuit and a low-pass filter circuit need to be added.

[0100] For the above embodiments, please refer to Figure 7 , Figure 7 is a block diagram of functional units of a device for improving sampling accuracy provided by an embodiment of the present application, such as Figure 7 As shown, the device 70 for improving sampling accuracy includes: a first determining unit 71, used to determine a first error of first sampling data according to a sampled first analog signal and a second analog signal, wherein the first sampling data is data obtained by the analog-to-digital converter sampling the first analog signal, and the second analog signal is data output after the digital-to-analog converter quantizes the first sampling data; a second determining unit 72, used to detect that the first reference voltage of the analog-to-digital converter and the second reference voltage of the digital-to-analog converter are different, and determine a plurality of first adjustment parameters according to the first reference voltage and the second reference voltage; a first adjustment unit 73, used to adjust the first sampling data according to the plurality of first adjustment parameters to obtain first output data of the digital-to-analog converter; a third determining unit 74, used to determine a plurality of second adjustment parameters according to the plurality of first adjustment parameters, the first reference voltage and the second reference voltage; a second adjustment unit 75, used to adjust the first output data according to the plurality of second adjustment parameters to obtain a second error; and a fourth determining unit 76, used to determine a sampling result according to the first error, the second error and the first sampling data.

[0101] In a possible embodiment, in terms of determining multiple first adjustment parameters based on the first reference voltage and the second reference voltage, the second determination unit 72 is specifically used to: determine multiple voltage adjustment parameters based on the first reference voltage and the second reference voltage; determine the third analog signal output by the digital-to-analog converter based on the first preset input data of the digital-to-analog converter; and determine the fourth analog signal output by the digital-to-analog converter based on the second preset input data of the digital-to-analog converter; determine the second sampling data of the analog-to-digital converter under the third analog signal and the third sampling data of the analog-to-digital converter under the fourth analog signal based on the multiple voltage adjustment parameters; determine the multiple first adjustment parameters based on the first preset input data, the second preset input data, the second sampling data and the third sampling data.

[0102] In a possible embodiment, the multiple first adjustment parameters include an adjustment parameter M1 and an adjustment parameter M2, and the adjustment parameter M1 satisfies the following formula: M1=(X2-X1) / (Y2-Y1); the adjustment parameter M2 satisfies the following formula: (X2Y1-X1Y2) / (Y2-Y1), wherein X1 is the first preset input data, X2 is the second preset input data, Y1 is the second sampling data, and Y2 is the third sampling data.

[0103] In a possible embodiment, in terms of determining a plurality of second adjustment parameters according to the plurality of first adjustment parameters, the first reference voltage and the second reference voltage, the third determination unit 74 is specifically used to: obtain a fifth analog signal input to the analog-to-digital converter and a fourth sampling data output from the analog-to-digital converter; and, obtain a sixth analog signal input to the analog-to-digital converter and a fifth sampling data output from the analog-to-digital converter; adjust the fourth sampling data according to the plurality of first adjustment parameters to obtain second output data of the digital-to-analog converter; and, adjust the fifth sampling data according to the plurality of first adjustment parameters to obtain third output data of the digital-to-analog converter; determine a seventh analog signal of the digital-to-analog converter according to the second output data and the second reference voltage; and, determine an eighth analog signal of the digital-to-analog converter according to the third output data and the second reference voltage; determine a third error of the fourth sampling data according to the fifth analog signal, the seventh analog signal and the first reference voltage; and, determine a fourth error of the fifth sampling data according to the sixth analog signal, the eighth analog signal and the first reference voltage; and determine the plurality of second adjustment parameters according to the third error, the fourth error, the second output data and the third output data.

[0104] In a possible embodiment, the multiple second adjustment parameters include an adjustment parameter N1 and an adjustment parameter N2, and the adjustment parameter N1 satisfies the following formula: N1=(Y3-Y4) / (X4-X3); the adjustment parameter N2 satisfies the following formula: (X3Y4-X4Y3) / (X3-X4), wherein X3 is the second output data, X4 is the third output data, Y3 is the third error, and Y4 is the fourth error.

[0105] In a possible embodiment, the sampling system also includes a differential amplifier circuit. In determining the first error of the first sampling data based on the sampled first analog signal and the second analog signal, the first determination unit 71 is specifically used to: perform a difference determination operation and an amplification operation on the first analog signal and the second analog signal through the differential amplifier circuit to obtain a fifth error; and perform a quantization operation on the fifth error through the analog-to-digital converter to obtain the first error.

[0106] In a possible embodiment, the multiple voltage adjustment parameters include a first voltage adjustment parameter and a second voltage adjustment parameter. In determining the multiple voltage adjustment parameters based on the first reference voltage and the second reference voltage, the second determination unit 72 is specifically used to: determine the first voltage adjustment parameter based on the first reference voltage and the second reference voltage; determine the second voltage adjustment parameter based on the first reference voltage.

[0107] It can be understood that since the method embodiment and the device embodiment are different presentation forms of the same technical concept, the content of the method embodiment part in this application should be synchronously adapted to the device embodiment part and will not be repeated here.

[0108] In the case of integrated units, see Figure 8 , Figure 8 is a block diagram of functional units of another device for improving sampling accuracy provided by an embodiment of the present application, such as Figure 8 As shown, the apparatus 70 for improving sampling accuracy includes: a processing module 702 and a communication module 701. The processing module 702 is used to control and manage the actions of the apparatus 70 for improving sampling accuracy, for example, to execute the steps of the first determination unit 71, the second determination unit 72, the first adjustment unit 73, the third determination unit 74, the second adjustment unit 75 and the fourth determination unit 76, and / or to execute other processes of the technology described herein. The communication module 701 is used for the interaction between the apparatus 70 for improving sampling accuracy and other devices. Figure 8 As shown, the device 70 for improving sampling accuracy may further include a storage module 703, and the storage module 703 is used to store program codes and data of the device 70 for improving sampling accuracy.

[0109] Among them, the processing module 702 can be a processor or a controller, for example, a central processing unit (CPU), a general processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It can implement or execute various exemplary logic boxes, modules and circuits described in conjunction with the disclosure of this application. The processor can also be a combination that implements a computing function, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like. The communication module 701 can be a transceiver, an RF circuit or a communication interface, etc. The storage module 703 can be a memory.

[0110] Among them, all relevant contents of each scenario involved in the above method embodiment can be referred to the functional description of the corresponding functional module, and will not be repeated here. The above-mentioned device 70 for improving sampling accuracy can execute the above-mentioned Figure 3 The method shown in Figure 2 improves sampling accuracy.

[0111] See also Fig. 9 , Fig. 9 is a schematic diagram of the structure of an electronic device proposed in an embodiment of the present application, such as Fig. 9 As shown, the electronic device 900 includes a second processor 910, a memory 920, a communication interface 930 and one or more programs 921. The one or more programs 921 are stored in the memory and are configured to be executed by the processor. When the program is executed, it includes part or all of the steps of any method for improving sampling accuracy recorded in the method embodiment. The processor, memory and communication interface are interconnected and complete communication with each other.

[0112] The memory may be a volatile memory such as a dynamic random access memory (DRAM), or a non-volatile memory such as a mechanical hard disk. The memory is used to store a set of executable program codes, and the processor is used to call the executable program codes stored in the memory, and may execute part or all of the steps of any method for improving sampling accuracy as described in the above-mentioned embodiment of the method for improving sampling accuracy.

[0113] It can be seen that the electronic device 900 described in the embodiment of the present application first determines a first error of first sampling data according to the sampled first analog signal and the second analog signal, wherein the first sampling data is data obtained by the analog-to-digital converter sampling the first analog signal, and the second analog signal is data output after the digital-to-analog converter quantizes the first sampling data; then it is detected that the first reference voltage of the analog-to-digital converter and the second reference voltage of the digital-to-analog converter are different, and a plurality of first adjustment parameters are determined according to the first reference voltage and the second reference voltage; then the first sampling data is adjusted according to the plurality of first adjustment parameters to obtain the first output data of the digital-to-analog converter; then a plurality of second adjustment parameters are determined according to the plurality of first adjustment parameters, the first reference voltage and the second reference voltage; then the first output data is adjusted according to the plurality of second adjustment parameters to obtain a second error; finally, a sampling result is determined according to the first error, the second error and the first sampling data. The present application converts the numerical value sampled by the analog-to-digital converter into an analog signal, and compares it with the actual sampled analog signal to obtain a first sampling error. Since there is a conversion error in the process from sampling from the analog-to-digital converter to the output of the digital-to-analog converter, a hierarchical adjustment is performed in combination with different influencing factors. First, the conversion of the analog-to-digital converter sampling value to the corresponding output value of the digital-to-analog converter is adjusted, and then the second sampling error of the analog-to-digital converter is determined based on the data after the preliminary adjustment. Then, the final sampling result is determined by combining the original sampling value, the first sampling error and the second sampling error. This can solve the problem of reduced sampling accuracy and obtain a high-precision sampling result.

[0114] An embodiment of the present application also provides a computer storage medium, wherein the computer storage medium stores a computer program for electronic data exchange, wherein the computer program enables a computer to execute part or all of the steps of any method described in the above method embodiments, and the above computer includes an electronic device.

[0115] The embodiment of the present application also provides a computer program product, the computer program product includes a non-transitory computer-readable storage medium storing a computer program, the computer program is operable to cause a computer to execute some or all of the steps of any method described in the method embodiment. The computer program product may be a software installation package, and the computer includes an electronic device.

[0116] It should be noted that, for the sake of simplicity, the aforementioned method implementations are all described as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described order of actions, because according to the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the implementations described in the specification are all optional implementations, and the actions and modules involved are not necessarily required by the present application.

[0117] In the above-mentioned embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0118] In the several embodiments provided in this application, it should be understood that the disclosed device can be implemented in other ways. For example, the device implementation described above is only schematic, such as the division of the units, which is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the device or unit can be electrical or other forms.

[0119] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0120] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above integrated unit may be implemented in the form of hardware or in the form of a software program module.

[0121] If the integrated unit is implemented in the form of a software program module and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a memory, including a number of instructions to enable a computer device (which can be a personal computer, server or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned memory includes: U disk, read-only memory (ROM), random access memory (RAM), mobile hard disk, disk or optical disk and other media that can store program codes.

[0122] A person of ordinary skill in the art can understand that all or part of the steps in the various methods of the above-mentioned embodiments can be completed by instructing the relevant hardware through a program, and the program can be stored in a computer-readable memory, which can include: a flash drive, a read-only memory, a random access memory, a magnetic disk or an optical disk, etc.

[0123] The above is a detailed introduction to the implementation methods of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above implementation methods is only used to help understand the method and core idea of ​​the present application. At the same time, for general technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A method for improving sampling accuracy, characterized in that: A processor for use in a sampling system, the sampling system also comprising an analog-to-digital converter and a digital-to-analog converter, comprising: Determine a first error of first sampled data according to a sampled first analog signal and a second analog signal, wherein the first sampled data is data obtained by the analog-to-digital converter sampling the first analog signal, and the second analog signal is data output by the digital-to-analog converter after quantizing the first sampled data; detecting that a first reference voltage of the analog-to-digital converter and a second reference voltage of the digital-to-analog converter are different, and determining a plurality of first adjustment parameters according to the first reference voltage and the second reference voltage; Adjust the first sampling data according to the plurality of first adjustment parameters to obtain first output data of the digital-to-analog converter; determining a plurality of second adjustment parameters according to the plurality of first adjustment parameters, the first reference voltage and the second reference voltage; Adjust the first output data according to the plurality of second adjustment parameters to obtain a second error; A sampling result is determined according to the first error, the second error and the first sampling data.

2. The method according to claim 1, characterized in that The determining a plurality of first adjustment parameters according to the first reference voltage and the second reference voltage comprises: determining a plurality of voltage adjustment parameters according to the first reference voltage and the second reference voltage; Determining a third analog signal output by the digital-to-analog converter according to first preset input data of the digital-to-analog converter; and determining a fourth analog signal output by the digital-to-analog converter according to second preset input data of the digital-to-analog converter; Determine, according to the plurality of voltage adjustment parameters, second sampling data of the analog-to-digital converter under the third analog signal and third sampling data of the analog-to-digital converter under the fourth analog signal; The plurality of first adjustment parameters are determined according to the first preset input data, the second preset input data, the second sampling data and the third sampling data.

3. The method according to claim 2, characterized in that The multiple first adjustment parameters include an adjustment parameter M1 and an adjustment parameter M2, the adjustment parameter M1 satisfies the following formula: M1=(X2-X1) / (Y2-Y1); the adjustment parameter M2 satisfies the following formula: (X2Y1-X1Y2) / (Y2-Y1), wherein X1 is the first preset input data, X2 is the second preset input data, Y1 is the second sampling data, and Y2 is the third sampling data.

4. The method according to claim 1, characterized in that The determining a plurality of second adjustment parameters according to the plurality of first adjustment parameters, the first reference voltage and the second reference voltage comprises: Acquire a fifth analog signal input to the analog-to-digital converter and fourth sampled data output from the analog-to-digital converter; and, acquire a sixth analog signal input to the analog-to-digital converter and fifth sampled data output from the analog-to-digital converter; Adjusting the fourth sampled data according to the plurality of first adjustment parameters to obtain second output data of the digital-to-analog converter; and adjusting the fifth sampled data according to the plurality of first adjustment parameters to obtain third output data of the digital-to-analog converter; determining a seventh analog signal of the digital-to-analog converter according to the second output data and the second reference voltage; and determining an eighth analog signal of the digital-to-analog converter according to the third output data and the second reference voltage; determining a third error of the fourth sampling data according to the fifth analog signal, the seventh analog signal and the first reference voltage; and determining a fourth error of the fifth sampling data according to the sixth analog signal, the eighth analog signal and the first reference voltage; The plurality of second adjustment parameters are determined according to the third error, the fourth error, the second output data, and the third output data.

5. The method according to claim 4, characterized in that The multiple second adjustment parameters include adjustment parameter N1 and adjustment parameter N2, the adjustment parameter N1 satisfies the following formula: N1=(Y3-Y4) / (X4-X3); the adjustment parameter N2 satisfies the following formula: (X3Y4-X4Y3) / (X3-X4), wherein X3 is the second output data, X4 is the third output data, Y3 is the third error, and Y4 is the fourth error.

6. The method according to any one of claims 1 to 5, characterized in that: The sampling system further includes a differential amplifier circuit, and the determining of a first error of the first sampling data according to the sampled first analog signal and the second analog signal includes: performing a difference determination operation and an amplification operation on the first analog signal and the second analog signal through the differential amplifier circuit to obtain a fifth error; The first error is obtained by performing a quantization operation on the fifth error through the analog-to-digital converter.

7. The method according to claim 2, characterized in that The multiple voltage adjustment parameters include a first voltage adjustment parameter and a second voltage adjustment parameter, and determining the multiple voltage adjustment parameters according to the first reference voltage and the second reference voltage includes: determining a first voltage adjustment parameter according to the first reference voltage and the second reference voltage; A second voltage adjustment parameter is determined according to the first reference voltage.

8. A method for improving sampling accuracy, characterized in that: A processor applied to a sampling system, wherein the sampling system further comprises an analog-to-digital converter, a digital-to-analog converter, a pulse width modulation and a low-pass filter circuit, wherein the pulse width modulation is connected to the low-pass filter circuit, and comprises: Determine a first error of first sampled data according to a sampled first analog signal and a second analog signal, wherein the first sampled data is data obtained by sampling the first analog signal by the analog-to-digital converter, and the second analog signal is data output after quantizing the first sampled data through the pulse width modulation and the low-pass filter circuit; detecting that a first reference voltage of the analog-to-digital converter and a second reference voltage of the pulse width modulation are different, and determining a plurality of first adjustment parameters according to the first reference voltage and the second reference voltage; Adjust the first sampling data according to the plurality of first adjustment parameters to obtain first output data of the digital-to-analog converter; determining a plurality of second adjustment parameters according to the plurality of first adjustment parameters, the first reference voltage and the second reference voltage; Adjust the first output data according to the plurality of second adjustment parameters to obtain a second error; A sampling result is determined according to the first error, the second error and the first sampling data.

9. A sampling system, characterized in that: include: processors, analog-to-digital converters, and digital-to-analog converters; The analog-to-digital converter is used to acquire a sampled first analog signal and perform analog-to-digital conversion on the first analog signal to obtain first sampled data; The digital-to-analog converter is used to perform digital-to-analog conversion on the first sampling data and output a second analog signal; The processor is used to determine a first error of the first sampling data based on the first analog signal and the second analog signal; and the processor is also used to detect that the first reference voltage of the analog-to-digital converter and the second reference voltage of the digital-to-analog converter are different, and determine multiple first adjustment parameters based on the first reference voltage and the second reference voltage; and the processor is also used to adjust the first sampling data according to the multiple first adjustment parameters to obtain the first output data of the digital-to-analog converter; and the processor is also used to determine multiple second adjustment parameters based on the multiple first adjustment parameters, the first reference voltage and the second reference voltage; and the processor is also used to adjust the first output data according to the multiple second adjustment parameters to obtain a second error; and the processor is also used to determine a sampling result based on the first error, the second error and the first sampling data.

10. A sampling system, characterized in that: include: processors, analog-to-digital converters, digital-to-analog converters, pulse width modulation, and low-pass filtering circuits; The analog-to-digital converter is used to acquire a sampled first analog signal and perform analog-to-digital conversion on the first analog signal to obtain first sampled data; The pulse width modulation is used to perform digital-to-analog conversion on the first sampling data and output a reference analog signal; The low-pass filter circuit is used to smooth the reference analog signal and output a second analog signal; The processor is used to determine a first error of the first sampling data according to the first analog signal and the second analog signal; and the processor is also used to detect that the first reference voltage of the analog-to-digital converter and the second reference voltage of the pulse width modulation are different, and determine multiple first adjustment parameters according to the first reference voltage and the second reference voltage; and the processor is also used to adjust the first sampling data according to the multiple first adjustment parameters to obtain the first output data of the digital-to-analog converter; and the processor is also used to determine multiple second adjustment parameters according to the multiple first adjustment parameters, the first reference voltage and the second reference voltage; and the processor is also used to adjust the first output data according to the multiple second adjustment parameters to obtain a second error; and the processor is also used to determine a sampling result according to the first error, the second error and the first sampling data.

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