A low turn-on voltage gallium oxide power diode and a manufacturing method thereof

Abstract

The application discloses a low-onset-voltage gallium oxide power diode, and mainly solves the problems of high-onset-voltage and low-breakdown-voltage of the existing gallium oxide power diode. The gallium oxide power diode comprises a cathode (4), a substrate (1), a beta-Ga2O3 drift layer (2) and an anode (5) from bottom to top, and is characterized in that: a ferroelectric material PZT dielectric layer (3) formed by an outer circular ring and an inner circular ring is arranged between the beta-Ga2O3 drift layer and the anode, so that when a positive voltage is applied above the PZT, positive charges are generated at the anode interface, electrons are attracted and accumulated to reduce the onset voltage; when a negative voltage is applied above the PZT, negative charges are generated at the anode interface to form a high-resistance area, and the breakdown voltage of the device is improved. The ferroelectric material PZT dielectric layer (3) is a ferroelectric material PZT field ring formed by pulse laser deposition, photolithography and dry etching. The application can effectively reduce the onset voltage of the device, improve the breakdown voltage of the device, and can be used for rectifiers and direct current converters of power electronic systems.

Description

Technical Field

[0001] This invention belongs to the field of microelectronics technology, and specifically relates to a gallium oxide power diode and its fabrication method, which can be used as a power device for rectifiers and DC-DC converters in power electronic systems. Background Technology

[0002] Power diodes, as important semiconductor power components, are widely used in rectifiers and DC-DC converters in power electronic systems. Gallium oxide (Ga2O3), a wide-bandgap semiconductor material, possesses the potential to fabricate high-voltage, high-power, and low-loss power diodes due to its ultra-wide bandgap, high breakdown field strength, tunable n-type doping concentration, and low-cost single-crystal growth technology. In recent years, many scholars have begun to study β-Ga2O3 crystal materials and power devices; however, the main research focus remains on improving breakdown voltage and reducing on-resistance, with relatively little research on the crucial diode turn-on voltage. Because of gallium oxide's low affinity, gallium oxide diodes exhibit high turn-on voltages, typically above 0.8V, resulting in high conduction losses. Therefore, it is essential to optimize device design to achieve gallium oxide power diodes with low forward turn-on voltages.

[0003] Patent document CN113964182A discloses a heterojunction PN junction power diode with low turn-on voltage and its fabrication method. It controls the device's turn-off by forming a heterojunction structure through a P-type NiO dielectric layer and a Ga2O3 drift layer. An ohmic contact is formed between Ti / Au metal and the Ga2O3 drift layer to reduce the turn-on voltage, thus achieving a low turn-on voltage power diode. However, the contact resistance between the NiO dielectric layer and the Ti / Au metal and Ga2O3 may lead to energy loss, affecting the device's conduction efficiency. Summary of the Invention

[0004] The purpose of this invention is to address the shortcomings of the prior art by providing a low turn-on voltage gallium oxide power diode and its manufacturing method, thereby reducing the turn-on voltage, decreasing conduction losses, and improving conduction efficiency.

[0005] This invention is implemented as follows:

[0006] 1. A low turn-on voltage gallium oxide power diode, comprising a substrate 1, a β-Ga₂O₃ drift layer 2, a cathode 4, and an anode 5, characterized in that:

[0007] Between the β-Ga2O3 drift layer 2 and the anode 5, there is a ferroelectric material PZT dielectric layer 3 composed of an outer ring and an inner ring. When a positive voltage is applied above the PZT, a positive charge is generated at the anode interface, attracting electrons to accumulate and reducing the turn-on voltage. When a negative voltage is applied above the PZT, a negative charge is generated at the anode interface, forming a high-resistivity region and increasing the breakdown voltage of the device.

[0008] Preferably, the inner circle of the ferroelectric material PZT dielectric layer 3 has a radius of 5μm to 15μm, an inner diameter of 30 to 50μm, an outer diameter of 55 to 65μm, and a thickness of 50 to 150nm.

[0009] Preferably, the substrate 1 is a heavily Sn-doped (001) β-Ga2O3 substrate.

[0010] Preferably, the β-Ga2O3 drift layer 2 is located above the substrate, has a thickness of 2–20 μm, and a doping concentration of 1 × 10⁻⁶. 15 cm -3 ~1×10 17 cm -3 .

[0011] Preferably, the cathode 4 is made of Ti / Au, and the anode 5 is made of Ni / Au.

[0012] 2. A method for fabricating a low turn-on voltage gallium oxide power diode, characterized by comprising the following steps:

[0013] 1) On a heavily Sn-doped (001) oriented β-Ga2O3 substrate 1, a layer with a thickness of 2–20 μm and a doping concentration of 1 × 10⁻⁶ is grown using HVPE or MOCVD processes. 15 cm -3 ~1×10 17 cm -3 Lightly doped β-Ga2O3 drift layer 2;

[0014] 2) Fabrication of the ferroelectric material PZT dielectric layer 3:

[0015] 2a) Using pulsed laser deposition (PLD) technology, a ferroelectric material PZT with a thickness of 50–150 nm was deposited on the front surface of the sample in an oxygen-filled chamber.

[0016] 2b) The PZT layer is selectively removed by photolithography and dry etching to leave an inner circle with a radius of 5 to 15 μm and an annulus with an inner diameter of 30 to 50 μm and an outer diameter of 55 to 65 μm above the lightly doped β-Ga2O3 drift layer 2, forming a ferroelectric PZT dielectric layer 3.

[0017] 3) A Ti / Au metal stack is deposited at the bottom of a Sn-doped (001) oriented β-Ga2O3 substrate 1 using an E-beam evaporation process, and a cathode is formed by annealing. Then, a Ni / Au stack is deposited on the top of the β-Ga2O3 drift layer 2 and the top of the ferroelectric PZT dielectric layer 3 using an E-beam evaporation process to serve as the anode, thus completing the device fabrication.

[0018] Compared with the prior art, the present invention has the following advantages:

[0019] This invention uses ferroelectric material PZT as the dielectric and leverages the polarization properties of PZT to cause a transfer of positive and negative charge centers in the PZT crystal lattice structure, resulting in the following beneficial effects:

[0020] Firstly, when a positive voltage is applied over PZT, a positive charge is generated at the anode interface, attracting electrons to accumulate, which can effectively reduce the turn-on voltage of the device.

[0021] Secondly, when a negative voltage is applied over the PZT, a negative charge is generated at the anode interface, forming a high-resistivity region, thereby increasing the breakdown voltage of the device.

[0022] Third, the present invention does not cause degradation of breakdown voltage when the turn-on voltage is reduced; that is, it can maintain the original breakdown voltage or even increase the original breakdown voltage. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the overall device structure of the present invention;

[0024] Figure 2 yes Figure 1 Top view;

[0025] Figure 3 This is a schematic diagram of the fabrication process of the device of the present invention. Detailed Implementation

[0026] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0027] Reference Figure 1 and Figure 2 The device of this invention includes a Sn-doped (001)β-Ga2O3 substrate 1, a lightly doped β-Ga2O3 drift layer 2, a ferroelectric PZT dielectric layer 3, a Ti / Au cathode 4, and a Ni / Au anode 5. Wherein:

[0028] The substrate 1 is a heavily Sn-doped (001) β-Ga2O3 substrate;

[0029] The β-Ga2O3 drift layer 2 is located above the substrate 1, has a thickness of 2–20 μm, and a doping concentration of 1 × 10⁻⁶. 15cm -3 ~1×10 17 cm -3 ;

[0030] The ferroelectric material PZT dielectric layer 3 is located above the β-Ga2O3 drift layer 2 and is composed of an outer ring and an inner ring nested within each other. The radius of the inner ring is 5μm to 15μm, and the inner diameter of the outer ring is 30 to 50μm and the outer diameter is 55 to 65μm.

[0031] The Ti / Au cathode 4 is located below the substrate 1;

[0032] The Ni / Au anode 5 is located above the β-Ga2O3 drift layer 2 and above the ferroelectric material PZT dielectric layer 3, and between the inner circle and the outer ring of the ferroelectric material PZT dielectric layer 3.

[0033] Reference Figure 3 The following three embodiments are provided for the fabrication of the device of the present invention.

[0034] Example 1: Fabrication of a ferroelectric PZT dielectric layer with a thickness of 50 nm, an inner radius of 5 μm, an inner diameter of 30 μm, and an outer diameter of 55 μm, and a drift layer with a thickness of 2 μm and a doping concentration of 1 × 10⁻⁶. 15 cm -3 Gallium oxide power diodes.

[0035] Step 1. Grow gallium oxide epitaxial material.

[0036] Using the HVPE process on a heavily Sn-doped (001)β-Ga2O3 substrate, GaCl and O2 were used as source gases, and high-purity nitrogen was used as carrier gas. High-purity Ga metal and chlorine were reacted at 800°C to generate GaCl, and GaCl and O2 were introduced into the gallium oxide substrate of the reactor respectively.

[0037] The growth region on the gallium oxide substrate was heated to 800℃, and a 2O₂ / GaCl gas with a fixed input ratio of 8 was used for growth at a total gas flow rate of 1400 sccm for 1 h, resulting in a 2 μm thick layer with a doping concentration of 1×10⁻⁶. 15 cm -3 Lightly doped β-Ga2O3 drift layer.

[0038] Step 2. Fabricate the PZT ferroelectric field ring.

[0039] Using pulsed laser deposition (PLD) technology, a 50 nm thick layer of ferroelectric material PZT was deposited on top of the drift layer in an oxygen-atmospheric cavity, and then cleaned.

[0040] Use a mask to determine the inner and outer circular areas on the cleaned sample, and use photoresist to mask these two areas;

[0041] The masked sample was placed in an ICP etching machine, and the etching process conditions were set to 200W upper power, 50W lower power, and 10mTorr pressure. The PZT material outside the inner and outer circular areas was etched away by the ICP etching process, removing 50nm.

[0042] The etched sample was sequentially immersed in acetone solution and ethanol solution until the photoresist was completely removed. Then it was rinsed with deionized water for 3 minutes and finally dried with a nitrogen gun, leaving an inner circle with a radius of 5 μm and a ring with an inner diameter of 30 μm and an outer diameter of 55 μm, which constitutes the PZT field ring of the ferroelectric material, i.e., the PZT dielectric layer.

[0043] Step 3. Fabricate the metal electrode.

[0044] Set vacuum level to 10. -6 The process conditions were as follows: the metal to be evaporated was Ti / Au, the temperature was 25℃, and the deposition rate was 1 angstrom / second. Under the Sn heavily doped (001)β-Ga2O3 substrate, Ti / Au metal stacks with thicknesses of 20nm and 400nm were deposited sequentially by electron beam evaporation. The samples after the Ti / Au metal stacks were deposited were then placed in an annealing furnace and rapidly annealed for 1 minute in a N2 atmosphere at 470℃ to obtain the cathode electrode.

[0045] Set vacuum level to 10. -6 The process involves evaporating Ni / Au metal at 25°C and a deposition rate of 1 angstrom / second. Ni / Au metal stacks with thicknesses of 20 nm and 400 nm are deposited on top of the drift layer and PZT material using an electron beam evaporation stage. The metal stacks are then stripped to form the anode, thus completing the fabrication of the device.

[0046] Example 2: Fabrication of a ferroelectric PZT dielectric layer with a thickness of 100 nm, an inner radius of 10 μm, an inner diameter of 40 μm, and an outer diameter of 60 μm, and a drift layer with a thickness of 10 μm and a doping concentration of 1 × 10⁻⁶. 16 cm -3 Gallium oxide power diodes.

[0047] Step 1. Grow a β-Ga2O3 drift layer on the substrate.

[0048] A heavily Sn-doped (001)β-Ga2O3 gallium oxide substrate was placed in the MOCVD chamber, and the chamber was pumped in and out using a mechanical pump to reduce environmental pollution.

[0049] The reaction chamber temperature was set at 850℃, the pressure at 100 mbar, and high-purity oxygen was used as the oxygen source, TEGa as the gallium source, silane as the dopant source, and argon as the carrier gas. The MOCVD process conditions, with a TEGa to O2 molar flow ratio of 1:1000, were used to grow a 10 μm thick substrate with a doping concentration of 1×10⁻⁶. 16 cm -3 β-Ga2O3 drift layer.

[0050] Step 2. Fabricate a ferroelectric PZT field ring on the upper part of the drift layer.

[0051] 2.1) The sample with the epitaxially grown drift layer was placed in a cavity with an oxygen atmosphere, and a ferroelectric material PZT with a thickness of 100 nm was deposited on top of the drift layer using pulsed laser deposition (PLD) technology, and then cleaned.

[0052] 2.2) Use a mask to determine the inner and outer circular areas on the cleaned sample, and use photoresist to mask these two areas;

[0053] 2.3) The masked sample was placed in an ICP etching machine. Under the etching process conditions of 350W upper power, 100W lower power, and 15mTorr pressure, 100nm of PZT material outside the inner and outer circular areas was etched away by the ICP etching process.

[0054] 2.4) The etched sample is immersed in acetone solution and ethanol solution in sequence until the photoresist is completely removed. Then it is rinsed with deionized water for 4 minutes and finally dried with a nitrogen gun, leaving an inner circle with a radius of 10 μm and a ring with an inner diameter of 40 μm and an outer diameter of 60 μm, which constitutes the PZT field ring of the ferroelectric material, i.e., the PZT dielectric layer.

[0055] Step 3. Fabricate the metal electrode.

[0056] 3.1) At a vacuum degree of 10 -6 Under the process conditions of Ti / Au metal deposition at 55℃ and deposition rate of 2 Å / s, Ti / Au metal stacks with thicknesses of 30nm and 500nm were deposited sequentially using an electron beam evaporation stage on a heavily Sn-doped (001)β-Ga2O3 substrate. The samples with deposited Ti / Au metal stacks were then placed in an annealing furnace and rapidly annealed for 30s in a N2 atmosphere at 500℃ to obtain the cathode electrode.

[0057] 3.2) At a vacuum degree of 10 -6Under the process conditions of Ni / Au evaporation at 55°C and a deposition rate of 2 Å / s, Ni / Au metal stacks with thicknesses of 30 nm and 500 nm are deposited on top of the drift layer and PZT material using an electron beam evaporation stage. The metal stacks are then stripped to form the anode, thus completing the fabrication of the device.

[0058] Example 3: Fabrication of a ferroelectric PZT dielectric layer with a thickness of 150 nm, an inner radius of 15 μm, an inner diameter of 50 μm, and an outer diameter of 65 μm, and a drift layer with a thickness of 20 μm and a doping concentration of 1 × 10⁻⁶. 17 cm -3 Gallium oxide power diodes.

[0059] Step A. Grow gallium oxide epitaxial material.

[0060] An epitaxial growth with a thickness of 20 μm and a doping concentration of 1 × 10⁻⁶ was performed on a heavily Sn-doped (001)β-Ga₂O₃ substrate using the HVPE process. 17 cm -3 Lightly doped β-Ga2O3 drift layer. The process conditions are as follows:

[0061] Using GaCl and O2 as source gases and high-purity nitrogen as carrier gas, GaCl is generated by reacting high-purity Ga metal and chlorine at 1000℃, and GaCl and O2 are introduced into the gallium oxide substrate of the reactor respectively.

[0062] The growth region on the gallium oxide substrate was heated to 1050℃, and a 2O2 / GaCl gas with a fixed input ratio of 12 was used for growth at a total gas flow rate of 1800 sccm for 5 hours.

[0063] Step B. Fabricate a PZT ferroelectric field ring.

[0064] B1) In an oxygen-atmospheric cavity, a ferroelectric material PZT with a thickness of 150 nm was deposited on top of the drift layer using pulsed laser deposition (PLD) technology, and then the material was cleaned.

[0065] B2) Use a mask to determine the inner and outer circular areas on the cleaned sample, and use photoresist to mask these two areas;

[0066] B3) Place the masked sample in an ICP etching machine and etch away 150nm of PZT material outside the inner and outer circular areas using the ICP etching process. The etching process conditions are: upper power of 500W, lower power of 150W, and pressure of 20mTorr.

[0067] B4) The etched sample is sequentially immersed in acetone solution and ethanol solution until the photoresist is completely removed. Then it is rinsed with deionized water for 5 minutes and finally dried with a nitrogen gun, leaving an inner circle with a radius of 15 μm and a ring with an inner diameter of 50 μm and an outer diameter of 65 μm, which constitute the PZT field ring of the ferroelectric material as the PZT dielectric layer of the device.

[0068] Step C. Fabricate the metal electrode.

[0069] C1) Fabrication of the cathode electrode:

[0070] Beneath a heavily Sn-doped (001)β-Ga2O3 substrate, Ti / Au metal stacks with thicknesses of 40 nm and 600 nm were sequentially deposited using an electron beam evaporation stage. The evaporation process conditions were: vacuum degree 10 -7 torr, the evaporated metal is Ti / Au, the temperature is 90℃, and the plating rate is 2 angstroms / second;

[0071] The sample with the deposited Ti / Au metal stack was then placed in an annealing furnace and subjected to rapid thermal annealing for 40 seconds in a N2 atmosphere at 600°C to obtain the cathode electrode.

[0072] C2) Fabrication of the anode electrode:

[0073] Ni / Au metal stacks with thicknesses of 40 nm and 600 nm were deposited on top of the drift layer and PZT material using an electron beam evaporation stage. The deposition process conditions were: vacuum degree 10 -7 torr, the evaporated metal is Ni / Au, the temperature is 90℃, and the plating rate is 2 angstroms / second;

[0074] The vapor-deposited Ni / Au metal stack is stripped to form the anode, thus completing the device fabrication.

[0075] The above descriptions are merely three specific examples of the present invention and do not constitute any limitation on the present invention. Obviously, those skilled in the art, after understanding the content and principles of the present invention, may make various modifications and changes in form and detail without departing from the principles and structure of the present invention. For example, in addition to using a Ti / Au metal stack, the cathode electrode can also be a Ti / Al / Ni / Au metal stack; in addition to using a Ni / Au metal stack, the anode electrode can also be a Pt / Au metal stack. However, these modifications and changes based on the concept of the present invention are still within the scope of protection of the claims of the present invention.

Claims

1. A method for fabricating a low turn-on voltage gallium oxide power diode, characterized in that, Includes the following steps: 1) On a heavily Sn-doped (001) oriented β-Ga2O3 substrate (1), a layer with a thickness of 2μm~20μm and a doping concentration of 1×10⁻⁶ is grown using HVPE or MOCVD processes. 15 cm -3 ~1×10 17 cm -3 A lightly doped β-Ga2O3 drift layer (2) is formed, and the upper surface of the drift layer (2) is planar; 2) Fabrication of the PZT dielectric layer for ferroelectric materials (3): 2a) Using pulsed laser deposition (PLD) technology, a ferroelectric material PZT with a thickness of 50 nm to 150 nm was deposited on the front surface of the sample in an oxygen-filled chamber. 2b) The PZT layer is selectively removed by photolithography and dry etching to leave an inner circle with a radius of 5~15 μm and an outer ring with an inner diameter of 30~50 μm and an outer diameter of 55~65 μm above the lightly doped β-Ga2O3 drift layer (2), forming a ferroelectric material PZT dielectric layer (3). 3) A Ti / Au metal stack is deposited at the bottom of a heavily Sn-doped (001) crystal orientation β-Ga2O3 substrate (1) using an E-beam evaporation process, and a cathode is formed by annealing. Then, a Ni / Au stack is deposited on the top of the β-Ga2O3 drift layer (2) and the top of the ferroelectric material PZT dielectric layer (3) using an E-beam evaporation process as an anode to complete the device fabrication. When a positive voltage is applied above the PZT, a positive charge will be generated at the anode interface, attracting electrons to accumulate and reducing the turn-on voltage. When a negative voltage is applied above the PZT, a negative charge will be generated at the anode interface to form a high-resistance region, increasing the breakdown voltage of the device.

2. The method according to claim 1, characterized in that, The MOCVD process parameters in step 1) are as follows: The reaction chamber temperature is 700~900℃; The pressure ranges from 40 MPa to 200 MPa. High-purity oxygen was used as the oxygen source, TEGa as the gallium source, silane as the doping source, and argon as the carrier gas. The molar flow ratio of TEGa to O2 is 1:5000~1:

200.

3. The method according to claim 1, characterized in that, The HVPE process in step 1) is as follows: Using GaCl and O2 as source gases and high-purity nitrogen as carrier gas, GaCl is generated by reacting high-purity Ga metal and chlorine at 800~1000 °C, and GaCl and O2 are introduced into the gallium oxide substrate of the reactor respectively. The growth region on the gallium oxide substrate was heated to 800~1050 °C, and a 2O2 / GaCl gas with a fixed input ratio of 8~12 was used for growth time of 1~5 h at a total gas flow rate of 1400~1800 sccm.

4. The method according to claim 1, characterized in that, Step 2) involves the selective removal of the PZT layer using photolithography and dry etching. The implementation steps include the following: Use a mask to determine the inner and outer circular areas on the cleaned sample, and use photoresist to mask these two areas; The masked sample was placed in an ICP etching machine, and the etching process conditions were set with an upper power of 200~500W, a lower power of 50~150W, and a pressure of 10~20mTorr. The PZT material outside the inner and outer circular ring areas was etched away by the ICP etching process, removing 50~150 nm of material. The etched sample is then immersed in acetone solution and ethanol solution in sequence until the photoresist is completely removed. It is then rinsed with deionized water for 3-5 minutes and finally dried with a nitrogen gun.

5. The method according to claim 1, characterized in that, Step 3) involves depositing a Ti / Au metal stack at the bottom of the substrate using an E-beam evaporation process. The steps for achieving this are as follows: Set vacuum level to 10. -6 ~10 -7 The metal torr is Ti / Au, the temperature is 25~90℃, the deposition rate is 1~2 angstroms / second, and Ti / Au metal stacks with thicknesses of 20~40nm / 400~600nm are deposited in the cathode region. The Ti / Au metal stack sample after vapor deposition was placed in an annealing furnace and annealed under the following conditions: atmosphere of N2, temperature of 400~600℃, and time of 20~40s, to form a cathode electrode.

6. The method according to claim 1, characterized in that, The process conditions for fabricating the anode in step 3) are as follows: Set vacuum level to 10. -6 ~10 -7 The metal evaporated is Ni / Au, the temperature is 25~90℃, and the deposition rate is 1~2 Å / s. Ni / Au metal stacks with thicknesses of 20~40nm and 400~600nm are deposited on the drift layer and PZT material to form the anode electrode.

7. A low turn-on voltage gallium oxide power diode prepared by the method according to any one of claims 1-6, comprising a substrate (1), a β-Ga2O3 drift layer (2), a cathode (4), and an anode (5), characterized in that: Between the β-Ga2O3 drift layer (2) and the anode (5), there is a ferroelectric material PZT dielectric layer (3) composed of an outer ring and an inner ring. When a positive voltage is applied above the PZT, a positive charge will be generated at the anode interface, attracting electrons to accumulate and reducing the turn-on voltage. When a negative voltage is applied above the PZT, a negative charge will be generated at the anode interface to form a high-resistance region, thereby increasing the breakdown voltage of the device.

8. The diode according to claim 7, characterized in that: The inner circle of the ferroelectric material PZT dielectric layer (3) has a radius of 5μm~15μm, an inner diameter of 30μm~50μm, an outer diameter of 55μm~65μm, and a thickness of 50nm~150nm.

9. The diode according to claim 7, characterized in that: The substrate (1) is a β-Ga2O3 substrate with a heavily Sn-doped (001) crystal orientation; The β-Ga2O3 drift layer (2) is located above the substrate, with a thickness of 2μm~20μm and a doping concentration of 1×10⁻⁶. 15 cm -3 ~1×10 17 cm -3 .

10. The diode according to claim 7, characterized in that: The cathode (4) is made of Ti / Au; The anode (5) is made of Ni / Au.

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