Monolithic vertical integrated sensor and preparation method thereof

Abstract

The invention relates to the technical field of sensors, in particular to a monolithic vertical integrated sensor and a preparation method thereof.The monolithic vertical integrated sensor comprises a first substrate, a second substrate, a pressure unit, a humidity unit and a temperature unit, the humidity unit is arranged on the top of the second substrate, and the temperature unit is arranged on the top of the second substrate; the pressure unit and the temperature unit are respectively arranged at the top of the first substrate, and the pressure unit, the temperature unit and the humidity unit are electrically connected; the first substrate is arranged at the bottom of the second substrate, the bottom of the first substrate is provided with a first cavity, the bottom of the second substrate is provided with a second cavity matched with the first cavity, and the first substrate and the second substrate are subjected to thermocompression bonding to form a vacuum cavity. The invention aims to solve the technical problem that a monolithic integrated sensor is large in size and improve the performance of the integrated sensor.

Description

Technical Field

[0001] The present invention relates to the field of sensor technology, and in particular to a monolithic vertically integrated sensor and a preparation method thereof. Background Art

[0002] With the rapid development of digitalization and intelligence, micro-electromechanical system (MEMS) technology has shown significant advantages in the field of sensors. With its small size, low power consumption, fast response speed and high integration, it plays a vital role in the measurement of multiple parameters such as temperature, pressure and humidity. At present, in order to achieve multi-functional comprehensive monitoring, integrated sensors mainly adopt chip-level stacking and monolithic integration. Among them, silicon-based integrated sensors based on MEMS technology are widely used in defense, military industry, aerospace, smart cities and other fields due to their excellent reliability and adaptability.

[0003] However, current integrated sensors still face some challenges. The primary problem is the precise decoupling between the temperature sensing unit and other sensing units. In order to ensure that the temperature measurement value can accurately reflect the overall environmental conditions and avoid interference from mechanical deformation or thermal effects, the temperature sensing element needs to provide a reliable temperature reference while avoiding interference. In order to solve the problem that a single temperature sensing point is difficult to take into account all areas, the existing technology needs to arrange temperature sensing units at multiple locations to obtain more comprehensive temperature information, which increases the complexity and size of the sensor. In addition, when the operating temperature exceeds 125°C, the performance of traditional silicon-based pressure sensors will decrease or even fail due to the increase in reverse leakage current of the PN junction, which limits its application range in high temperature environments. On the other hand, for humidity sensing, in order to improve sensitivity, it is usually necessary to increase the area of ​​the capacitor plate or the number of electrode pairs, which further increases the size design of the sensor. If the humidity unit is directly placed on the pressure sensitive film, it may cause the two to affect each other, thereby reducing their respective working efficiency. Therefore, whether it is a chip-level stacking or a monolithic integration solution, it is inevitable to face the technical problems of large manufacturing process size, independence between each sensor unit and insufficient collaborative working ability, which restricts the miniaturization and performance optimization process of integrated sensors. Summary of the invention

[0004] In order to solve the technical problem of large size of monolithic integrated sensors and improve the performance of integrated sensors, the object of the present invention is to provide a monolithic vertical integrated sensor and a preparation method thereof. The technical solutions adopted are as follows:

[0005] The technical solution of the first aspect of the present invention provides a monolithic vertically integrated sensor, which includes a first substrate, a second substrate, a pressure unit, a humidity unit and a temperature unit, wherein the humidity unit is arranged on the top of the second substrate, the pressure unit and the temperature unit are respectively arranged on the top of the first substrate, and the pressure unit, the temperature unit and the humidity unit are electrically connected; the first substrate is arranged on the bottom of the second substrate, a first cavity is arranged at the bottom of the first substrate, a second cavity matching the first cavity is arranged at the bottom of the second substrate, and the first substrate and the second substrate are thermally pressed and bonded to form a vacuum cavity.

[0006] Furthermore, a first insulating layer, a first metal film layer, a second insulating layer and a first conductive layer are sequentially provided on the top of the first substrate, the temperature unit and the pressure unit are provided on the first metal film layer, and the first conductive layer is electrically connected to the temperature unit and the pressure unit respectively.

[0007] Furthermore, the pressure unit includes four zigzag-shaped varistors patterned around the first metal film layer, the four varistors are electrically connected, and the shapes of two relatively large varistors among the four varistors match each other. The temperature unit includes a temperature resistor patterned on the outside of the pressure unit.

[0008] Furthermore, a first metal pad and a first metal connecting line are provided on the first conductive layer, and the first metal pad is electrically connected to the varistor and the temperature resistor through the first metal connecting line.

[0009] Furthermore, a third insulating layer, a second metal film layer, a fourth insulating layer and a second conductive layer are sequentially provided on the top of the second substrate, a humidity unit is formed on the second metal film layer through a humidity-sensitive interdigitated electrode structure, a second metal pad and a second metal connecting line are provided on the second conductive layer, and the second metal pad is electrically connected to the humidity unit through the second metal connecting line.

[0010] Furthermore, the second substrate is provided with a plurality of through silicon vias, which penetrate the second substrate and are aligned with the first metal pad and the second metal pad, and the plurality of through silicon vias are filled with central conductors, which are electrically connected to the first conductive layer and the second conductive layer respectively, and solder balls are respectively provided on the tops of the plurality of through silicon vias.

[0011] Furthermore, a fifth insulating layer is provided between the central conductor and the inner wall of the second substrate; and a blocking layer is also provided between the central conductor and the fifth insulating layer to prevent the central conductor from leaking to the second substrate.

[0012] Furthermore, the first substrate and the second substrate both include a bulk silicon layer, a buried oxide layer and a device layer which are arranged in sequence. The silicon layer thickness of the first substrate is 300-500um, the buried oxide layer thickness is 2-5um, and the device layer thickness is 20-50um; the silicon layer thickness of the second substrate is 200-300um, the buried oxide layer thickness is 2-5um, and the device layer thickness is 20-50um.

[0013] The technical solution of the second aspect of the present invention provides a method for preparing a monolithic vertically integrated sensor, which is used for the monolithic vertically integrated sensor provided by the technical solution of the first aspect of the present invention, and the preparation method comprises:

[0014] preparing a first substrate and cleaning it with a mixture of sulfuric acid and hydrogen peroxide;

[0015] Depositing a first insulating layer, a first metal film layer and a silicon dioxide film in sequence on a first substrate by plasma enhanced chemical vapor deposition;

[0016] The pressure unit and the temperature unit are transferred to the second insulating layer by photolithography, and the second insulating layer is etched by reactive ion etching; the etched second insulating layer serves as a mask layer and the first metal film layer is etched by deep reactive ion etching to form a varistor and a temperature resistor;

[0017] Depositing a second insulating layer on the first metal film layer by plasma enhanced chemical vapor deposition, and forming a conductive through hole on the second insulating layer by photolithography;

[0018] Depositing a first conductive layer on the second insulating layer by physical vapor deposition, and etching to form a first metal pad and a first metal connecting line by deep reactive ion etching;

[0019] A back alignment technique is adopted to form a first cavity by etching the silicon layer of the first substrate through a deep reactive ion etching method;

[0020] Prepare a second substrate and repeat the above steps;

[0021] preparing through silicon vias on the second substrate;

[0022] The first substrate and the second substrate are aligned and sealed by thermocompression bonding, and solder balls are placed on top of the second substrate after cooling.

[0023] Further, preparing a through silicon via on the second substrate includes:

[0024] A deep reactive ion etching method is used to etch a through silicon via on the second substrate, and the through silicon via has a depth-to-width ratio of 10:1;

[0025] Depositing a fifth insulating layer on both sides of the silicon wafer and in the circular hole by plasma enhanced chemical vapor deposition;

[0026] Depositing a seed layer on the upper part of the through silicon via by using an organic metal chemical vapor deposition method, electroplating a central conductor to fill the upper part of the through silicon via, and treating the surface of the second substrate by using chemical mechanical polishing;

[0027] Thinning the bottom of the second substrate until the through silicon via is exposed;

[0028] A seed layer is deposited on the lower half of the through silicon via by using an organic metal chemical vapor deposition method; a central conductor is electroplated to fill the lower half of the through silicon via, and a surface of the second substrate is processed by using chemical mechanical polishing.

[0029] The present invention has the following beneficial effects:

[0030] The present invention provides a method for preparing a monolithic vertically integrated sensor. The first substrate and the second substrate are used to organically combine the three units of temperature, pressure and humidity in a vertically integrated manner. The pressure unit and the temperature unit are respectively arranged on the top of the first substrate, and the humidity unit is arranged on the top of the second substrate. The first substrate and the second substrate are thermally pressed and bonded to form a vacuum cavity. This reduces the mutual interference between the three units of temperature, pressure and humidity, saves plane space, reduces the size of the device, and improves the performance of the sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions and advantages in the embodiments of the present invention or the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0032] Figure 1 A schematic diagram of the structure of a monolithic vertically integrated sensor provided by an embodiment of the present invention;

[0033] Figure 2 A schematic structural diagram of a first substrate provided by an embodiment of the present invention;

[0034] Figure 3 A schematic diagram of the cross-sectional structure of a vertically integrated sensor provided by one embodiment of the present invention;

[0035] Figure 4 A method flow chart of a method for preparing a monolithic vertically integrated sensor provided by one embodiment of the present invention;

[0036] Figure 5 A flow chart of a method for preparing a through silicon via on a second substrate provided by one embodiment of the present invention;

[0037] Icons: 100-first substrate, 110-temperature unit, 111-temperature resistor, 120-pressure unit, 121-varistor, 130-first cavity, 140-first metal film layer, 150-first conductive layer, 200-second substrate, 210-humidity unit, 220-second metal film layer, 230-second conductive layer; 240-through silicon via, 241-center conductor, 242-solder ball; 250-fifth insulating layer, 260-second cavity. DETAILED DESCRIPTION

[0038] In order to further explain the technical means and effects adopted by the present invention to achieve the predetermined invention purpose, the following is a detailed description of a monolithic vertically integrated sensor and its preparation method according to the present invention, its specific implementation, structure, features and effects, in combination with the accompanying drawings and preferred embodiments. In the following description, different "one embodiment" or "another embodiment" does not necessarily refer to the same embodiment. In addition, specific features, structures or characteristics in one or more embodiments may be combined in any suitable form.

[0039] Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.

[0040] A specific scheme of a monolithic vertically integrated sensor and a method for preparing the same provided by the present invention will be described in detail below in conjunction with the accompanying drawings.

[0041] See also Figures 1 to 3As shown, it shows a structural schematic diagram of a monolithic vertically integrated sensor provided by an embodiment of the present invention, wherein the monolithic vertically integrated sensor comprises a first substrate 100, a second substrate 200, a pressure unit 120, a humidity unit 210 and a temperature unit 110, wherein the humidity unit 210 is arranged on the top of the second substrate 200, the pressure unit 120 and the temperature unit 110 are respectively arranged on the top of the first substrate 100, and the pressure unit 120, the temperature unit 110 and the humidity unit 210 are electrically connected; the first substrate 100 is arranged on the bottom of the second substrate 200, a first cavity 130 is arranged on the bottom of the first substrate 100, a second cavity 260 matching the first cavity 130 is arranged on the bottom of the second substrate 200, and the first substrate The first substrate 100 and the second substrate 200 are thermally pressed and bonded to form a vacuum cavity; specifically, the vacuum cavity formed by the thermally pressed bonding of the first substrate 100 and the second substrate 200 is used to provide space for the deformation of the pressure-sensitive film, so that the film is deformed under the action of air pressure; in this embodiment, in order to realize the miniaturization of the integrated sensor, reduce the lateral area of ​​the device, and effectively integrate the electrical signals of the three units, the first substrate 100 and the second substrate 200 are spatially stacked in the vertical direction by thermally pressing and bonding, which, on the one hand, reduces the mutual interference between the three units of temperature, pressure, and humidity, and on the other hand, saves plane space and effectively reduces the lateral area of ​​the device, thereby realizing the miniaturization of the integrated sensor and improving the performance of the sensor in terms of integration, stability, and other aspects;

[0042] Preferably, a first insulating layer (not shown in the figure), a first metal film layer 140, a second insulating layer (not shown in the figure) and a first conductive layer 150 are sequentially provided on the top of the first substrate 100, the temperature unit 110 and the pressure unit 120 are provided on the first metal film layer 140, and the first conductive layer 150 is electrically connected to the temperature unit 110 and the pressure unit 120 respectively; wherein, the first insulating layer is SiO2 or AlN, with a thickness of 0.5 to 1.0 um, and has an isolation resistor function to prevent leakage, and the second insulating layer SiO2 has a thickness of 0.5 to 1.0 um, and serves as a protective resistor to prevent oxidation and isolate the first conductive layer 150; the first metal film layer 140 is made of metal Mo or metal Al or Ni-Cu alloy, with a thickness of 0.1 to 0.5 um; in this embodiment, metal Mo is used as the first metal film The film layer 140 ensures process compatibility while facilitating the monolithic integration of the device. Since the melting point of metal Mo is 262°C, it has good stability and reliability at high temperatures, ensuring that the operating temperature of the pressure unit 120 can be as high as 550°C or above. The setting of the temperature unit 110 enables the integrated sensor to accurately and quickly measure the temperature of the pressure unit 120, providing a basis for the decoupling of each unit. By obtaining the temperature information of the pressure unit 120 in real time, corresponding compensation measures can be taken to reduce the temperature drift of the pressure unit 120, thereby improving the accuracy of pressure measurement, allowing the entire sensor to work stably and reliably under different temperature environments, and improving the overall measurement performance and stability of the sensor. At the same time, a second insulating layer is covered on the first metal film layer 140 to improve the oxidation resistance of the first metal film layer 140.

[0043] Preferably, the pressure unit 120 includes four zigzag varistors 121 patterned around the first metal film layer 140, the four varistors 121 are electrically connected, and the shapes of two relatively two varistors 121 among the four varistors 121 match each other, and the temperature unit 110 includes a temperature resistor 111 patterned outside the pressure unit 120; specifically, as Figure 2As shown, the four varistors 121 of the pressure unit 120 adopt a serpentine structure to achieve high sensitivity and large resistance. When the pressure-sensitive film is deformed by force, the stress is transmitted to the upper varistor 121, so that the shape of the varistor 121 changes, thereby changing the resistance. The change in pressure can be sensed by measuring the bridge voltage. In this embodiment, the pressure unit 120 and the temperature unit 110 are located in the same plane of the first substrate 100 and are distributed on the first insulating layer. The pressure unit 120 realizes sensing based on the strain resistance effect. The pressure unit 120 is placed in the center of the chip. The four varistors 121 have the same initial resistance value, the two opposite resistors have the same shape, and the two adjacent resistors have different shapes. They are placed at the center of the four edges of the first metal film layer 140. When the film is deformed, the shape of the two opposite resistors is consistent, and the shape of the two adjacent resistors is different. They are placed at the center of the four edges of the first metal film layer 140. When deformed, the resistor is placed here to obtain the maximum strain, thereby improving the sensitivity of the sensor and enhancing the signal change. The four piezoresistors 121 are connected through a Wheatstone bridge to achieve linear output and amplify the output signal. The first substrate 100 forms a square piezoresistance film through deep reactive ion etching (DRIE) to achieve the conversion from mechanical to electrical. At the same time, the temperature unit 110 measures the resistance change based on the thermal effect of the resistor and realizes the temperature sensing by using the four-resistance method. The temperature unit 110 is placed at the edge of the first metal film layer 140. On the one hand, it can be free from the disturbance of the pressure unit 120 film to achieve linear temperature output. On the other hand, it can also accurately and quickly measure the temperature of the pressure unit 120, providing a basis for the decoupling of each unit and reducing temperature drift. When external pressure acts on the sensor, the pressure-sensitive film will deform, and the stress generated by the deformation will be transmitted to the four zigzag (snake-shaped) piezoresistors 121 on the upper layer, causing the shape of the piezoresistors 121 to change accordingly. According to the piezoresistive effect, its resistance value also changes accordingly. At this time, by forming a measuring bridge with these four piezoresistors 121 and utilizing the balance principle of the bridge to measure the voltage change at both ends of the bridge, the change in the magnitude of the external pressure can be calculated, and the temperature resistor 111 monitors the surrounding temperature in real time, providing a basis for correction work such as temperature compensation of the pressure measurement results, thereby ensuring the accuracy of pressure measurement in different temperature environments.

[0044] Preferably, a first metal pad (not shown in the figure) and a first metal connecting wire (not shown in the figure) are provided on the first conductive layer 150, and the first metal pad is electrically connected to the varistor 121 and the temperature resistor 111 through the first metal connecting wire; specifically, the first metal connecting wire connects the varistor 121 to form a Wheatstone bridge structure; the varistor 121 is composed of a zigzag structure resistance wire, with a length of 40 to 180 um, a width of 1 to 5 um, and a thickness of 0.1 to 0.5 um, and the resistance of each varistor 121 is 2 to 4 kilo-ohms; the temperature resistor 111 is also composed of a zigzag structure resistance wire, with a length of 40 to 90 um, width 1-5um, thickness 0.2-0.5um, the resistance of each temperature resistor 111 is 1-2 kilo-ohms; the Wheatstone bridge structure constructed by the first metal connecting wire is used to connect the varistor 121, which greatly improves the accuracy of pressure measurement; because the Wheatstone bridge can convert the slight change of the resistance value of the varistor 121 into a voltage change that can be accurately measured through the bridge imbalance, compared with the simple direct measurement of the resistance change, this method has a higher resolution for the pressure change, can more delicately reflect the different degrees of external pressure, so that the pressure value finally measured is more accurate, and the measurement error is effectively reduced;

[0045] Preferably, a third insulating layer (not shown in the figure), a second metal film layer 220, a fourth insulating layer (not shown in the figure) and a second conductive layer 230 are sequentially provided on the top of the second substrate 200, a humidity unit 210 is formed on the second metal film layer 220 through a humidity-sensitive interdigital electrode structure, a second metal pad (not shown in the figure) and a second metal connecting line (not shown in the figure) are provided on the second conductive layer 230, and the second metal pad is electrically connected to the humidity unit 210 through the second metal connecting line; wherein the third insulating layer and the fourth insulating layer of the second substrate 200 are made of SiO 2 or AlN, with a thickness of 0.1 to 1 um, isolating the resistor; the second metal film layer 220 is made of metal Mo or metal Al or metal Pt or metal Ag material, and the thickness is preferably 2 to 5 um; in this embodiment, modified polyvinylidene fluoride (PVDF) or polyimide (PI) is selected to form a humidity sensitive film, which can quickly adsorb / desorb water molecules, improve response speed, reduce hysteresis, and improve stability; in order to meet the requirements that the humidity unit 210 can have high sensitivity and large capacitance value, while avoiding cross sensitivity and erroneous output caused by other units, the influence of stress transfer is minimized; this In the embodiment, the humidity unit 210 is designed on the third insulating layer of the second substrate 200, and multiple pairs of interdigital electrode structures are connected in parallel. The humidity unit 210 uses the interdigital electrode parallel form to increase the capacitance, so that the entire humidity unit 210 fills the surface of the second substrate 200 as much as possible to obtain a large capacitance, improve the sensitivity of the humidity unit 210 and increase the capacitance value; the humidity sensitive film of modified polyvinylidene fluoride (PVDF) or polyimide (PI) can improve the stability and response speed of the humidity unit 210, and reduce the hysteresis and recovery time; wherein the first conductive layer 150 and the second conductive layer 230 are both made of Cu Or made of Al or Al-Cu alloy, the thickness is preferably 0.5-1um; the spacing of the humidity-sensitive interdigital electrode structure is 2-3um, the line width is 2-3um, the length is 60-500um, and the adjacent interdigital fingers are offset by 3-10um; the humidity unit 210 is designed on the third insulating layer 220 of the second substrate 200 in this embodiment, and through reasonable structure and insulating layer settings, as well as specific electrode structure layout, the cross-sensitivity effects of other units (such as pressure and temperature units) on stress transmission, electrical signals, etc. on the humidity unit 210 are effectively reduced, and the occurrence of erroneous output is avoided. At the same time, the characteristic of the humidity-sensitive film material itself to improve stability, coupled with the isolation protection of the insulating layer and the overall reasonable structural design, enables the humidity unit 210 to maintain stable performance during long-term use, reduces measurement errors caused by environmental factors, mutual interference between units, etc., can work reliably in complex and changeable practical application scenarios, extends the service life of the sensor, and reduces maintenance costs;

[0046] Preferably, a plurality of through silicon vias 240 are provided on the second substrate 200, and the plurality of through silicon vias 240 penetrate the second substrate 200 and are aligned with the first metal pad and the second metal pad, and a plurality of the through silicon vias 240 are filled with a central conductor 241, and the central conductor 241 is electrically connected to the first conductive layer 150 and the second conductive layer 230 respectively, and a solder ball 242 is provided on the top of the plurality of through silicon vias 240 respectively; the plurality of through silicon vias 240 are used to vertically lead the electrical signals on the first metal pad and the second metal pad to the same plane, thereby reducing the lateral area of ​​the sensor; the central conductor 241 serves as a medium for conducting electrical signals, and the through silicon vias 240 are cylindrical, 300um long, 30um in diameter, and preferably have a depth-to-width ratio of 10:1; in this embodiment, a three-dimensional interconnection technology of through silicon vias 240 is used to form a vertical structure for interlayer connection to realize signal transmission; the through silicon vias 240 penetrate the entire second substrate 200, and their positions are precisely aligned with the first metal pad and the second metal pad. This alignment is designed to enable the electrical signals on the first metal pad and the second metal pad to be smoothly and accurately transmitted through the silicon via 240. For example, when the sensor is working, the electrical signals on the first metal pad corresponding to the pressure unit 120 and the temperature unit 110 and the electrical signals on the second metal pad corresponding to the humidity unit 210 can find the corresponding transmission path with the help of the silicon via 240 structure, ensuring that the signals generated by each unit can be transmitted outward in an orderly manner; at the same time, the three-dimensional interconnection technology of the silicon via 240 and the internal center conductor 241 are used for signal transmission, which reduces the length and complexity of the signal transmission path compared to the traditional planar connection method, and avoids the problems of signal attenuation and interference that may be caused by long-distance and complex wiring.

[0047] Preferably, a fifth insulating layer 250 is provided between the central conductor 241 and the inner wall of the second substrate 200; a barrier layer (not shown in the figure) is also provided between the central conductor 241 and the fifth insulating layer 250, which is used to prevent the central conductor 241 from leaking to the second substrate 200; specifically, the fifth insulating layer 250 is located as a dielectric layer between the central conductor 241 and the silicon substrate of the second substrate 200. The central conductor 241 made of metallic copper diffuses quickly in the silicon dioxide medium, which easily causes serious degradation of the dielectric properties of the insulating layer. The diffusion of copper into the silicon material will seriously affect the performance of the device. The purpose of providing the fifth insulating layer 250 is to isolate the central conductor 241 from the silicon substrate to prevent the signal from leaking to the silicon substrate, causing signal crosstalk and loss; the barrier layer (not shown in the figure) is located between the central conductor 241 layer and the fifth insulating layer 250, and its function is also to prevent copper from leaking to the silicon substrate and to improve the adhesion and copper plating of the seed layer (the seed layer is used to grow and form the central conductor layer). The success rate of the process; the barrier layer is made of Ti or TiN or Ta or TaN material, which can be used to prevent copper atoms from diffusing into the silicon through hole 240 during the annealing process at a temperature of 400°C; the barrier layer also serves as an adhesive layer between the fifth insulating layer 250 and the central conductor 241; the central conductor 241 leads the electrical signal of the first substrate 100 to the second substrate 200; the fifth insulating layer 250 is SiO2 or Si3N4, and the thickness is preferably 1 to 2um to reduce the signal leakage from the central conductor 241 layer to the fifth insulating layer 250; for example, in the actual operation of the sensor, the electrical signals generated by each functional unit (pressure, temperature, humidity, etc.) are converged to the central conductor 241 through the conductive layer for vertical transmission. If there is no effective isolation between the fifth insulating layer 250 and the barrier layer, the electrical signal may "run around" and leak to the silicon substrate, interfering with other normal signal transmission paths, and affecting the signal quality of the final sensor output to the outside;

[0048] Preferably, the first substrate 100 and the second substrate 200 both include a bulk silicon layer, a buried oxide layer and a device layer arranged in sequence, the silicon layer thickness of the first substrate 100 is 300-500um, the buried oxide layer thickness is 2-5um, and the device layer thickness is 20-50um; the silicon layer thickness of the second substrate 200 is 200-300um, the buried oxide layer thickness is 2-5um, and the device layer thickness is 20-50um.

[0049] In summary, the integrated sensor adopts a vertical integration structure, which greatly reduces the lateral area and integrates the signal output on the device surface to achieve unified signal output; in actual operation, the three units of the sensor temperature, pressure, and humidity work independently to achieve the measurement of the three parameters.

[0050] See also Figure 4As shown, the technical solution of the second aspect of the present invention provides a method for preparing a monolithic vertically integrated sensor, which is used for the monolithic vertically integrated sensor provided by the technical solution of the first aspect of the present invention, and the preparation method comprises:

[0051] Step S100: preparing a first substrate 100 and cleaning it with a mixture of sulfuric acid and hydrogen peroxide; this cleaning method can effectively remove impurities, organic matter and some metal contaminants that may exist on the surface of the substrate, and prevent the impurities from having an adverse effect on the quality of the subsequently deposited thin film and the performance of each functional unit;

[0052] Step S200: using plasma enhanced chemical vapor deposition to sequentially deposit a first insulating layer, a first metal film layer 140 and a silicon dioxide film on the first substrate 100; specifically, depositing the first insulating layer 140 by this method can provide good insulation performance for subsequent structures and avoid problems such as leakage; depositing the first metal film layer 150 is the basis for subsequently forming functional structures such as the varistor 121 and the temperature resistor 111;

[0053] Step S300: the pressure unit 120 and the temperature unit 110 are transferred to the second insulating layer by photolithography, and the second insulating layer is etched by a reactive ion etching method; the etched second insulating layer acts as a mask layer and the first metal film layer 140 is etched by a deep reactive ion etching method to form a varistor 121 and a temperature resistor 111; specifically, step S300 adopts a multi-layer etching process, taking advantage of the advantages of different etching methods, firstly accurately removing the corresponding part of the second insulating layer by reactive ion etching, and then performing deep processing on the first metal film layer 150 by deep reactive ion etching, and finally accurately manufacturing the varistor 121 and the temperature resistor 111 with specific shape and performance requirements;

[0054] Step S400: a second insulating layer is deposited on the first metal film layer 140 by plasma enhanced chemical vapor deposition, and a conductive through hole is formed on the second insulating layer by photolithography; the second insulating layer can further enhance the insulation protection effect and avoid problems such as short circuits between different conductive structures; the conductive through hole creates conditions for the subsequent conductive layer to be electrically connected to the resistor and other structures below, ensuring that the electrical signal can be smoothly transmitted between different layers;

[0055] Step S500: depositing the first conductive layer 150 on the second insulating layer by physical vapor deposition, and etching by deep reactive ion etching to form a first metal pad and a first metal connecting line;

[0056] Step S600: using a back alignment technique, a first cavity 130 is formed by etching the silicon layer of the first substrate 100 through a deep reactive ion etching method;

[0057] Step S700: prepare a second substrate 200 and repeat the above steps; specifically, a corresponding structure similar to the first substrate 100 but with different functions (such as for the humidity unit 210, etc.) is constructed on the second substrate 200, and the structural manufacturing accuracy and process consistency on the two substrates are ensured through the same process steps, thereby improving the final integration and the stability of the overall sensor performance;

[0058] Step S800: preparing a through silicon via 240 on the second substrate 200; the through silicon via 240 is mainly used to realize vertical electrical connection between different substrate layers, and can integrate and vertically lead out the electrical signals generated by each functional unit on the first substrate 100 and the second substrate 200, which is beneficial to the miniaturization of the sensor and the overall integrated design;

[0059] Step S900: aligning the first substrate 100 and the second substrate 200 and sealingly connecting them by thermocompression bonding, and placing solder balls 242 on the top of the second substrate 200 after cooling; thermocompression bonding can tightly combine the two substrates to form a whole, and can ensure the sealing between the two;

[0060] This preparation method realizes the precise manufacturing of each functional unit of a monolithic vertically integrated sensor and the effective integration of the whole through the orderly combination of multiple advanced and sophisticated process steps; on the one hand, it can ensure the high-precision and high-quality molding of each structure inside the sensor, such as accurately manufacturing key functional structures such as the varistor 121, the temperature resistor 111, and the humidity unit 210, thereby improving the performance of the sensor; on the other hand, it is conducive to the miniaturization and integration of the sensor, and through silicon vias 240, thermal compression bonding and other process methods, the lateral space occupation is reduced, and the collaborative working ability between different functional units is enhanced. At the same time, the preparation method has good process controllability and repeatability, which is convenient for large-scale production and manufacturing, reduces costs, and promotes the widespread application of this high-performance sensor in multiple fields.

[0061] Preferably, see Figure 5 As shown, step S800 includes:

[0062] Step S810: Use deep reactive ion etching to etch TSV 240 on the second substrate 200, with a depth-to-width ratio of 10:1. Deep reactive ion etching is a high-precision etching technology that can achieve relatively fine and depth-controlled etching operations on substrate materials. The depth-to-width ratio of 10:1 is the result of comprehensive consideration of multiple factors such as subsequent filling, signal transmission, and overall structural stability. This depth-to-width ratio can not only ensure that the TSV 240 has sufficient depth to penetrate the substrate and realize the connection function between different layers, but also achieve a good balance between process operability and structural stability, creating suitable spatial conditions for the subsequent arrangement of the insulating layer, barrier layer, and center conductor 241.

[0063] Step S820: Plasma enhanced chemical vapor deposition is used to deposit a fifth insulating layer 250 on both sides of the silicon wafer and in the circular hole; the PECVD technology can uniformly deposit an insulating layer on the through silicon via 240 and the surrounding area. This method is selected because it can achieve high-quality thin film deposition under relatively low temperature conditions to avoid adverse effects of high temperature on the substrate and the formed structure; the fifth insulating layer 250 is located between the silicon substrate and the central conductor 241 to be filled later. Through its own insulation properties, it can effectively reduce the loss of signals in the direction of the silicon substrate during transmission, avoid crosstalk caused by signal leakage, and lay a foundation for ensuring high-quality signal transmission;

[0064] Step S830: depositing a seed layer on the upper part of the through silicon via 240 by using an organic metal chemical vapor deposition method, electroplating the central conductor 241 to fill the upper part of the through silicon via 240, and using chemical mechanical polishing to process the surface of the second substrate 200; specifically, the seed layer and the precursor of the central conductor 241 are equivalent to nuclei for growing and forming the central conductor 241 layer; the purpose of depositing the barrier layer (such as using Ti and other materials) is to prevent the metal atoms (such as copper atoms) in the central conductor 241 from diffusing into the silicon substrate during subsequent processes and actual use, so as to prevent the degradation of the insulation layer performance and damage to the device performance caused by metal diffusion; and the seed layer is equivalent to forming The core provides a starting growth foundation for the subsequent electroplating of the central conductor 241, which helps to form a high-quality and uniform central conductor 241 layer; then the upper half of the through silicon via 240 is filled by electroplating. The electroplating can make the central conductor 241 material (such as Cu) fill the corresponding position of the through silicon via 240 according to the set shape and requirements, ensuring its good conductivity; finally, the surface of the second substrate 200 is processed by chemical mechanical polishing. The chemical mechanical polishing can remove excess material on the surface and make the surface flat and smooth, which is convenient for subsequent process operations and ensures the flatness of the overall structure, avoiding problems such as poor connection caused by uneven surface;

[0065] Step S840: thinning the bottom of the second substrate 200 until the through silicon via 240 is exposed; by precisely controlling the degree of thinning, an appropriate portion of the through silicon via 240 is exposed at the bottom, ensuring that during subsequent assembly operations with the first substrate 100, electrical signals can be smoothly transmitted between the two substrates through the through silicon via 240, thereby achieving signal interaction between functional units on different substrates and creating conditions for the integrated operation of the entire monolithic vertically integrated sensor;

[0066] Step S850: deposit a seed layer on the lower half of the TSV 240 by metal organic chemical vapor deposition; electroplate the central conductor 241 to fill the lower half of the TSV 240, and use chemical mechanical polishing to process the surface of the second substrate 200; its principle and function are similar to the deposition on the upper half of the TSV 240 in step S830, both of which are to build a stable barrier structure and provide a good nucleation foundation to ensure that the central conductor 241 can also be filled with high quality in the lower half of the TSV 240. Then, fill the lower half of the TSV 240 by electroplating the central conductor 241 again, and use chemical mechanical polishing to process the surface of the second substrate 200, further improve the filling of the central conductor 241 in the TSV 240 and maintain the flatness of the surface, ensure that the entire TSV 240 structure is complete and has good electrical properties, thereby achieving reliable and efficient signal transmission function;

[0067] On the one hand, step S800 effectively reduces signal loss by depositing the fifth insulating layer 250, and uses the barrier layer to prevent metal diffusion to ensure device performance, thereby improving the reliability and quality of signal transmission, so that the sensor can output accurate and stable measurement signals; on the other hand, vertical interlayer connection is achieved by using silicon through vias 240, which not only improves signal transmission efficiency and reduces transmission loss compared to traditional methods, but also achieves electronic connection through flip-chip welding, improves connection reliability, shortens transmission distance, and reduces the space required for connection. At the same time, hot compression bonding realizes spatial stacking and precise control of the substrate, which helps to realize the miniaturization and integration of sensors as a whole, enhances their performance in practical applications, and is more conducive to their wide application in multiple fields and adapts to the needs of high-performance, miniaturized sensors.

[0068] In summary, the preparation method of the monolithic vertically integrated sensor stacks multiple functional units in the vertical direction through a monolithic vertical integration method, avoiding the lateral space waste caused by the traditional planar layout, effectively reducing the lateral size of the sensor, and making it better adapted to various application scenarios with strict volume requirements. With the help of through silicon vias (TSV), the constructed conductive layer and the connection structure, the stability of the electrical signal transmission path is guaranteed. Combined with flip-chip welding and other methods, the reliability of the sensor's electrical connection is greatly improved, and the signal anomalies caused by connection problems are reduced. At the same time, the functional units are tightly integrated, the integration is improved, and it is convenient for it to be integrated into complex electronic systems to play a multi-parameter monitoring role; at the same time, in terms of process, multiple processes cooperate with each other, adapt to the manufacture of different materials and functional units, achieve compatibility and effectively decouple each unit, and ensure that each unit works independently and accurately; the optimized design of units such as pressure and humidity improves the sensitivity of the sensor, which can keenly capture subtle changes in environmental parameters. In addition, the use of TSV technology to change the wiring method makes the wiring on the chip simple and orderly, greatly reduces the transmission distance, effectively avoids hidden dangers such as lead interconnection crossing and short circuit, and comprehensively improves the signal transmission efficiency and stability, so that the overall performance of the sensor can be significantly enhanced, and the application prospects are broader.

[0069] It should be noted that the sequence of the above embodiments of the present invention is only for description and does not represent the advantages and disadvantages of the embodiments. The processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0070] The various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referenced to each other, and each embodiment focuses on the differences from other embodiments.

Claims

1. A monolithic vertically integrated sensor, characterized in that: The monolithic vertically integrated sensor includes a first substrate, a second substrate, a pressure unit, a humidity unit and a temperature unit. The humidity unit is arranged on the top of the second substrate, and the pressure unit and the temperature unit are respectively arranged on the top of the first substrate. The pressure unit, the temperature unit and the humidity unit are electrically connected. The first substrate is arranged on the bottom of the second substrate, and a first cavity is arranged on the bottom of the first substrate. A second cavity matching the first cavity is arranged on the bottom of the second substrate. The first substrate and the second substrate are thermally pressed and bonded to form a vacuum cavity.

2. The monolithic vertically integrated sensor according to claim 1, characterized in that: A first insulating layer, a first metal film layer, a second insulating layer and a first conductive layer are sequentially arranged on the top of the first substrate. The temperature unit and the pressure unit are arranged on the first metal film layer. The first conductive layer is electrically connected to the temperature unit and the pressure unit respectively.

3. The monolithic vertically integrated sensor according to claim 2, characterized in that: The pressure unit includes four zigzag-shaped varistors patterned around the first metal film layer, the four varistors are electrically connected, and the shapes of two relatively opposite varistors among the four varistors match. The temperature unit includes a temperature resistor patterned on the outside of the pressure unit.

4. The monolithic vertically integrated sensor according to claim 3, characterized in that: A first metal pad and a first metal connecting line are provided on the first conductive layer, and the first metal pad is electrically connected to the varistor and the temperature resistor through the first metal connecting line.

5. The monolithic vertically integrated sensor according to claim 4, characterized in that: A third insulating layer, a second metal film layer, a fourth insulating layer and a second conductive layer are sequentially provided on the top of the second substrate; a humidity unit is formed on the second metal film layer through a humidity-sensitive interdigitated electrode structure; a second metal pad and a second metal connecting line are provided on the second conductive layer; and the second metal pad is electrically connected to the humidity unit through the second metal connecting line.

6. The monolithic vertically integrated sensor according to claim 5, characterized in that: The second substrate is provided with a plurality of through silicon vias, which penetrate the second substrate and are aligned with the first metal pad and the second metal pad. The through silicon vias are filled with central conductors, which are electrically connected to the first conductive layer and the second conductive layer respectively. Solder balls are respectively provided on the tops of the through silicon vias.

7. The monolithic vertically integrated sensor according to claim 6, characterized in that: A fifth insulating layer is provided between the central conductor and the inner wall of the second substrate; and a blocking layer is also provided between the central conductor and the fifth insulating layer to prevent the central conductor from leaking toward the second substrate.

8. The monolithic vertically integrated sensor according to any one of claims 1 to 7, characterized in that: The first substrate and the second substrate both include a bulk silicon layer, a buried oxide layer and a device layer which are arranged in sequence. The silicon layer thickness of the first substrate is 300-500um, the buried oxide layer thickness is 2-5um, and the device layer thickness is 20-50um; the silicon layer thickness of the second substrate is 200-300um, the buried oxide layer thickness is 2-5um, and the device layer thickness is 20-50um.

9. A method for preparing a monolithic vertically integrated sensor, characterized in that: For the monolithic vertically integrated sensor according to any one of claims 1 to 8, the preparation method comprises: preparing a first substrate and cleaning it with a mixture of sulfuric acid and hydrogen peroxide; Depositing a first insulating layer, a first metal film layer and a silicon dioxide film in sequence on a first substrate by plasma enhanced chemical vapor deposition; The pressure unit and the temperature unit are transferred to the second insulating layer by photolithography, and the second insulating layer is etched by reactive ion etching; the etched second insulating layer serves as a mask layer and the first metal film layer is etched by deep reactive ion etching to form a varistor and a temperature resistor; Depositing a second insulating layer on the first metal film layer by plasma enhanced chemical vapor deposition, and forming a conductive through hole on the second insulating layer by photolithography; Depositing a first conductive layer on the second insulating layer by physical vapor deposition, and etching to form a first metal pad and a first metal connecting line by deep reactive ion etching; A back alignment technique is adopted to form a first cavity by etching the silicon layer of the first substrate through a deep reactive ion etching method; Prepare a second substrate and repeat the above steps; preparing through silicon vias on the second substrate; The first substrate and the second substrate are aligned and sealed by thermocompression bonding, and solder balls are placed on top of the second substrate after cooling.

10. The method for preparing a monolithic vertically integrated sensor according to claim 9, characterized in that: Preparing a through silicon via on the second substrate includes: A deep reactive ion etching method is used to etch a through silicon via on the second substrate, and the through silicon via has a depth-to-width ratio of 10:1; Depositing a fifth insulating layer on both sides of the silicon wafer and in the circular hole by plasma enhanced chemical vapor deposition; Depositing a seed layer on the upper part of the through silicon via by using an organic metal chemical vapor deposition method, electroplating a central conductor to fill the upper part of the through silicon via, and treating the surface of the second substrate by using chemical mechanical polishing; Thinning the bottom of the second substrate until the through silicon via is exposed; A seed layer is deposited on the lower half of the through silicon via by using an organic metal chemical vapor deposition method; a central conductor is electroplated to fill the lower half of the through silicon via, and a surface of the second substrate is processed by using chemical mechanical polishing.

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