GPU server test device and test system

Abstract

The embodiment of the invention provides a GPU (Graphics Processing Unit) server testing device and a GPU server testing system. The testing device comprises a plurality of high-speed backboard connectors used for being connected with a backboard of a target system; a plurality of re-timers, wherein one end of each re-timer is connected to the high-speed backboard connector; one end of the retimer is connected with one end of the high-speed backboard connector, the Switch module comprises a plurality of ports PORT, the other end of the retimer is connected with the PORT of the Switch module, the high-speed backboard connector, the retimer and the Switch module are sequentially connected, and a plurality of first high-speed PCIE signal links of a GPU server are simulated; wherein the Switch module is configured to verify whether a first high-speed PCIE (Peripheral Component Interconnect Express) signal link connected with the GPU server is normal or not. According to the GPU server testing device provided by the embodiment of the invention, the verification and testing cost of the GPU server can be reduced.

Description

Technical Field

[0001] The present application relates to the field of server technology, and in particular to a GPU server testing device and testing system. Background Art

[0002] As the development and deployment of GPU server projects have increased significantly, the cost of signal link testing and verification based on GPU modules has also increased. Therefore, the industry has begun to use Dummy GPU (test GPU board) as a test tool to simulate the interface and signal of the actual GPU, replace the actual GPU module for system testing and verification, and reduce the cost of R&D and production testing.

[0003] In the related technology of using Dummy GPU as a test tool, multiple EXMAX connectors, 8 Retimer chips, 1 CPLD chip, 2 clock expansion chips, 2 temperature sensors, 1 EEPROM chip, 3 I2C expansion chips, 8 PCIE SLOT connectors (SLOT0~SLOT7), 1 M.2 connector, 1 USB interface connector, and multiple sets of power supply chips are usually set on the board to simulate the 8GGPU module. Among them, the EXMAX connector is plugged into the backplane of the whole machine to realize the signal connection with other modules of the server machine. The 8 PCIe SLOT connectors connect 8 network cards CX7, the M.2 connector connects the M.2 device, the USB interface connector connects the USB device, and the network card CX7, M.2 device and USB device simulate the signal link terminal device.

[0004] For example, the system's high-speed PCIE signal is connected to the Dummy GPU board through the EXMAX connector. The Dummy GPU board connects the PCIE signal on the EXMAX connector to the SLOT slot through PCB routing to form a PCIE link path. Eight PCIE network cards are assembled on the board to connect eight PCIE GEN5 X16 links, simulating eight GPU modules.

[0005] The system's high-speed PCIE signal is connected to the Dummy GPU board through the EXMAX connector. The Dummy GPU board connects the PCIE signal on the EXMAX connector to the M.2 connector through PCB routing to form a PCIE X2 link path, and uses the M.2 hard drive plugged into the M.2 connector to simulate the PCIE GEN4 X2 link.

[0006] The system's USB signal is connected to the Dummy GPU board through the EXMAX connector. The Dummy GPU board connects the USB signal on the EXMAX connector to the USB connector through PCB routing to form a USB link path. The USB connector is connected to USB 2.0 to realize the simulation of the USB link.

[0007] Then, the network card CX7, M.2 device and USB device are identified through software and their bandwidth rates are verified to be normal, so as to determine whether other modules of the server are normal and realize signal link testing and verification.

[0008] Although using Dummy GPU to replace the real GPU module can reduce the cost of the GPU module, the cost of the test spare parts of the Dummy GPU is still relatively high. Summary of the invention

[0009] The embodiments of the present application provide a GPU server testing device and a testing system to reduce the cost of test spare parts for Dummy GPUs.

[0010] In a first aspect, an embodiment of the present application provides a GPU server testing device, comprising:

[0011] Multiple high-speed backplane connectors for connecting to the backplane of the target system;

[0012] a plurality of retimers, one end of each of the retimers being connected to the high-speed backplane connector;

[0013] A Switch module, wherein the Switch module includes a plurality of ports PORT, the other end of the retimer is connected to the PORT of the Switch module, and the high-speed backplane connector, the retimer and the Switch module are connected in sequence to simulate a plurality of first high-speed PCIE signal links of the GPU server;

[0014] The Switch module is configured to verify whether the first high-speed PCIE signal link connected to the GPU server is normal.

[0015] As an example, the Switch module includes 8 first PORTs, the number of the retimers is 8, and one retimer is connected to one of the first PORTs to simulate 8 first high-speed PCIE signal links of the GPU server.

[0016] As an example, the Switch module also includes a second PORT, which is connected to the high-speed backplane connector to simulate a second high-speed PCIE signal link of the GPU server, wherein the network configuration information of the first high-speed PCIE signal link and the second high-speed PCIE signal link is different.

[0017] As an example, the test device further includes a USB to UART module, and the USB to UART module is connected to the high-speed backplane connector to simulate a USB link of the GPU server;

[0018] The USB to UART module is configured to verify whether the USB link connected to the GPU server is normal.

[0019] As an example, the USB to UART module uses a CP2108 chip.

[0020] As an example, the testing device further includes a CPLD module, and the CPLD module is respectively connected to the USB to UART module and the Switch module, so that the baseboard management controller can obtain log information of the Switch module and perform status monitoring on the Switch module.

[0021] As an example, the testing device further includes at least one matching port, and the matching port is used to match a power consumption simulation module to simulate a power consumption scenario of a GPU.

[0022] As an example, the power consumption simulation module includes a heat block that simulates a GPU server power supply.

[0023] As an example, the testing device further includes a weight balancing module, and the weight balancing module is used to simulate the state of the GPU server.

[0024] As an example, the high-speed backplane connector, the retimer and the Switch module on the test device are connected through PCB traces.

[0025] The present application also provides a GPU server testing system, including:

[0026] A target system, the target system comprising a backplane;

[0027] The GPU server testing device as described above, wherein the high-speed backplane connector of the testing device is connected to the backplane;

[0028] The testing device is configured to simulate a GPU server and verify a signal link of the GPU server when the GPU server communicates with a target system.

[0029] The GPU server testing device and testing system provided in the embodiments of the present application adopt a Switch module as a test spare part of the signal link on a Dummy GPU board (i.e., the testing device). The Switch module is installed on the Dummy GPU board and connected to the retimer and the high-speed backplane connector in sequence to simulate the high-speed PCIE signal link of the GUP server. The high-speed PCIE signal chain is verified to be normal through the Switch module, thereby verifying the link connectivity of the GUP server. Among them, multiple PORTs of the Switch module can simulate multiple high-speed PCIE signal links with the retimer, without setting a PCIE SLOT connector on the Dummy GPU board, and even more without plugging a network card into the PCIE SLOT connector. One Switch module replaces multiple PCIE SLOT connectors and multiple network cards, thereby reducing test spare parts and reducing the cost of the testing device. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0031] Figure 1 A signal link diagram of a test device provided for related technologies;

[0032] Figure 2 A signal link diagram of a test device provided in this application.

[0033] Reference numerals:

[0034] 101: PCIE SLOT connector; 102: M.2 connector; 103: retimer; 104: EXMAX connector; 105: USB interface connector; 106: CPLD chip;

[0035] 201: Switch module; 202: High-speed backplane connector; 203: Retimer; 204: USB to UART module; 205: CPLD module.

[0036] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0037] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0038] First, the terms involved in this application are explained:

[0039] GPU server: refers to equipment that uses GPU (graphics processing unit) to provide powerful computing capabilities, especially in parallel processing and large-scale data operations.

[0040] Dummy GPU: refers to a test GPU board used to simulate the interface and signal link of a GPU server.

[0041] Before using the GPU server, it is necessary to verify the interface and signal link of the GPU to verify whether the interface and signal link of the GPU server are normal, and verify whether other modules of the target system connected to the GPU server are normal, so as to ensure the compatibility of the GPU with the target system, thereby providing support for efficient computing tasks.

[0042] With the launch of modules such as H20, MGX, NVL16, the future B20, and overseas H200, B200A, B200, Gaudi2, and Gaudi3, GPU server projects have been launched in large numbers. However, due to the high cost of GPU modules, a single set of tests requires a large number of GPUs (8 cards per set), and long-term verification tests require plugging and unplugging, which also causes a lot of loss costs for GPU modules; in addition, the system design must support some restricted module models, which also limits the verification tests related to GPU servers. Therefore, the industry began to use Dummy GPUs (test GPU boards) as test devices to simulate the interfaces and signals of actual GPUs, replace actual GPU modules for system testing and verification, and reduce R&D and test generation costs.

[0043] In the related technology of using Dummy GPU as a test device, to verify high-speed PCIE and clock signals, low-speed I2C and USB signals, 8 PCIE SLOT connectors, 1 M.2 connector, and 1 USB interface connector are often used on the board. The network card CX7, M.2, and USB device are connected as the terminal device of the link. The software is used to identify the network card CX7, M.2 disk, USB device, and the bandwidth rate is normal to determine that other modules of the current server are normal. Figure 1As shown, multiple EXMAX connectors 104, 8 Retimer chips 103, 1 CPLD chip 106, 2 clock expansion chips, 2 temperature sensors, 1 EEPROM chip, 3 I2C expansion chips, 8 PCIE SLOT connectors (SLOT0~SLOT7) 101, 1 M.2 connector 102, 1 USB interface connector 105, and multiple sets of power supply chips are usually set on the board to simulate the 8GGPU module. Among them, the EXMAX connector 104 is plugged into the backplane of the whole machine to realize the signal connection with other modules of the server machine. The 8 PCIe SLOT connectors 101 also need to connect to 8 network cards CX7, the M.2 connector 102 also needs to connect to the M.2 device, and the USB interface connector 105 also needs to connect to the USB device. Based on the network card CX7, the M.2 device and the USB device, the signal link terminal device is simulated to test the signal link.

[0044] The high-speed PCIE signal of the target system is connected to the Dummy GPU board through the EXMAX connector 104. The DummyGPU board connects the PCIE signal on the EXMAX connector 104 to the SLOT101 slot through PCB routing to form a PCIE link path. Eight PCIE network cards are assembled on the board to connect eight PCIE GEN5 X16 links to simulate eight GPU modules.

[0045] The high-speed PCIE signal of the target system is connected to the Dummy GPU board through the EXMAX connector 104. The DummyGPU board connects the PCIE signal on the EXMAX connector 104 to the M.2 connector 102 through PCB routing to form a PCIE X2 link path, and uses the M.2 hard disk plugged into the M.2 connector 102 to realize the simulation of the PCIE GEN4 X2 link.

[0046] The USB signal of the target system is connected to the Dummy GPU board through the EXMAX connector 104. The Dummy GPU board connects the USB signal on the EXMAX connector 104 to the USB connector 105 through PCB routing to form a USB link path. The USB 2.0 on the USB connector 105 is used to realize the simulation of the USB link.

[0047] Based on the above-mentioned Dummy GPU test device, the network card CX7, M.2 device and USB device are identified through software and their bandwidth rates are verified to be normal, so as to determine whether other modules of the server are normal and realize signal link testing and verification.

[0048] Although using Dummy GPU to replace the real GPU module can reduce the cost of GPU module, the cost of DummyGPU test spare parts is still relatively high. For example, each server needs to prepare 8 network cards CX7, 1 M.2 disk, and 1 USB device as test spare parts for the whole machine verification test. When the business volume is large, the required spare parts are large and the cost is extremely high; the use of 8 PCIE SLOT connectors, 1 M.2 connector, and 1 USB interface connector on the Dummy GPU board is costly, and the connectors are limited in the number of plug-in and unplug times and have a limited service life; there are two options for whole machine testing. One is to use a drawer form to make the device on the DummyGPU board. New structural parts need to be developed for fixation, which increases the cost; the other does not use the drawer form. After the test, when you need to open the chassis to take out the board, plug and unplug the network card CX7, M.2 disk, and USB device, there will be risks such as new problems caused by manual plug-in and unplugging, resulting in test failure.

[0049] Based on this, an embodiment of the present application provides a GPU server testing device, which is a Dummy GPU board that simulates a GPU server. The testing device requires few test spare parts, has a low testing device cost, and is easy to detect.

[0050] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0051] Figure 2 A schematic diagram of a GPU server testing device provided in an embodiment of the present application; Figure 2 As shown, the test device includes: a Switch module 201, a plurality of high-speed backplane connectors 202 and a plurality of retimers 203; wherein:

[0052] Multiple high-speed backplane connectors EXMAX202 are used to connect to the backplane of the target system. The target system refers to a system that communicates with the GPU server, such as a host system (such as a CPU), a server, etc. The high-speed backplane connector 202 is used to connect the test device and the target system, so that signals can be exchanged between the target system and the test device, for example, the signal of the target system is transmitted to the test device, or the signal of the test device is transmitted to the target system.

[0053] As an example, the high-speed backplane connector 202 may be an EXMAX connector, or the retimer may be a Retimer chip.

[0054] Optionally, one end of the retimer 203 is connected to the high-speed backplane connector 202, and the other end of the retimer 203 is connected to the Switch module 201. It should be noted that the Switch module 201 includes multiple ports PORT, and multiple retimers 203 are correspondingly connected to each PORT of the Switch module 201. In this way, the high-speed backplane connector 202, the retimer 203 and the Switch module 201 are sequentially connected to form a first high-speed PCIE signal link of the GPU server. Multiple high-speed backplane connectors 202 and multiple retimers 203 correspond to multiple first high-speed PCIE signal links of the simulated GPU server.

[0055] The Switch module 201 is configured to verify whether the first high-speed PCIE signal link with the GPU server is normal, so as to implement verification and testing of the high-speed PCIE signal link of the GPU server.

[0056] For example, there are 8 first high-speed PCIE signal links between the GPU server and the target system. The Dummy GPU board is equipped with 8 high-speed backplane connectors 202, and the 8 high-speed backplane connectors 202 are respectively plugged into the 8 ports on the backplane. The Dummy GPU board is equipped with 8 retimers 203 (such as Figure 2 ), 8 retimers 203 and 8 high-speed backplane connectors 202, and the 8 retimers 203 are all connected to the Switch module 201. In this way, 8 first high-speed PCIE signal links are formed, for example, the first high-speed PCIE signal is transmitted to the 8 retimers 203 through the 8 high-speed backplane connectors 202, and the 8 retimers 203 then transmit the first high-speed PCIE signal to the Switch module 201, thereby obtaining 8 first high-speed PCIE signal links.

[0057] Optionally, the scheme for the testing device in the embodiment of the present application to verify the link connectivity is:

[0058] The high-speed PCIE signal of the target system is connected to the Dummy GPU board through the high-speed backplane connector 202. The Dummy GPU board connects the PCIE signal on the high-speed backplane connector 202 to the Switch module 201 through PCB routing to form a first high-speed PCIE signal link path. The verification software verifies whether the first high-speed PCIE signal link is normal by identifying the PORT (status information) of the Switch module 201.

[0059] In this embodiment, on the Dummy GPU board (i.e., the test device), a Switch module 201 is used as a test spare part for the signal link. The Switch module 201 is installed on the Dummy GPU board and is connected to the retimer 203 and the high-speed backplane connector 202 in sequence to simulate the high-speed PCIE signal link of the GUP server. The high-speed PCIE signal chain is verified to be normal through the Switch module 201, thereby verifying the link connectivity of the GUP server. Among them, the multiple PORTs of the Switch module 201 can simulate multiple high-speed PCIE signal links with the retimer 203, without setting a PCIE SLOT connector on the Dummy GPU board ( Figure 1 101 in the figure), and there is no need to plug a network card on the PCIE SLOT connector. One Switch module 201 replaces multiple PCIE SLOT connectors and multiple network cards, reducing test spare parts and reducing the cost of the test device. In addition, there is no need to plug and unplug the network card on the PCIE SLOT connector, and the operation is simple and convenient, which can avoid new problems introduced during the network card plugging and unplugging process, and thus avoid the risk of test failure caused by new problems.

[0060] This solution uses 1 Switch module 201 soldered on the board and uses 8 ports of the Switch module 201 to simulate 8 PCIE GEN5 X16 links and 1 port to simulate a PCIE GEN4 X2 link;

[0061] As an example, if there are multiple types of interfaces for connecting the GPU to the target system, such as the scenario where the interface types include PCIE GEN5 X16 and PCIE GEN4 X2, then the test device can also simulate the simulated links formed by multiple interface types. For example, 8 high-speed backplane connectors 202 are connected to 8 PCIE GEN5 X16 interfaces on the backplane, and 8 high-speed backplane connectors 202, 8 retimers 203 and Switch module 201 are connected in sequence to form 8 PCIE GEN5 X16 link paths (first high-speed PCIE signal links); 1 high-speed backplane connector 202 (or one of the 8 high-speed backplane connectors 202 includes multiple interfaces, and one interface of the high-speed backplane connector 202) is connected to the PCIE GEN4 X2 interface on the backplane, and the high-speed backplane connector 202 is directly connected to the Switch module 201 to form 1 PCIE GEN4 X2 link path (second high-speed PCIE signal link). Through the first high-speed PCIE signal link and the second high-speed PCIE signal link, the two types of signal links of the GPU server are verified.

[0062] In this embodiment, other ports of the Switch module 201 can be configured to simulate the second high-speed PCIE signal link of the GPU. For example, the Switch module 201 includes a first port and a second port, wherein there are 8 first ports and 1 second port, the first port is used to connect to the retimer 203 to simulate the first high-speed PCIE signal link of the GPU server; the second port is used to simulate the second high-speed PCIE signal link of the GPU server.

[0063] The network configuration information of the second high-speed PCIE signal link is different from the network configuration information of the first high-speed PCIE signal link. Specifically, the network configuration information of the second high-speed PCIE signal link is lower than the network configuration information of the first high-speed PCIE signal link. In this case, on the test device, the high-speed backplane connector 202 may not be connected to the retimer 203, but directly connected to the second PORT of the Switch module 201 to simulate the second high-speed PCIE signal link. For example, the second PORT is connected to the high-speed backplane connector 202 to form the second high-speed PCIE signal link.

[0064] In some examples, a high-speed backplane connector 202 may be installed on the test device to directly connect to the second PORT of the retimer 203 to form a second high-speed PCIE signal link. Alternatively, in some examples, in order to further reduce the test spare parts of the test device and reduce the cost of the test device, one of the eight high-speed backplane connectors 202 supports multiple configuration interfaces, including supporting a first high-speed PCIE signal interface, a second high-speed PCIE signal interface, and a USB interface, wherein the first high-speed PCIE signal interface is connected to the retimer 203, and the retimer 203 is further connected to the first PORT of the Switch module 201 to simulate the first high-speed PCIE signal link; the second high-speed PCIE signal interface is connected to the second PORT of the Switch module 201 to simulate the second high-speed PCIE signal link, thereby simulating two network configuration high-speed PCIE signal links through one high-speed backplane connector 202 and one Switch module 201.

[0065] It should be noted that the network configuration information includes one or more of data transmission rate and bandwidth.

[0066] As an example, continue to refer to Figure 2 The test device further includes a USB to UART module 204, which is connected to the high-speed backplane connector 202 to simulate the USB link of the GPU server. The USB to UART module 204 is configured to verify whether the USB link connected to the GPU server is normal.

[0067] Based on the above example, at least one of the high-speed backplane connectors 202 includes a USB interface, and the USB to UART module 204 is connected to the USB interface of the high-speed backplane connector 202, then the following link connectivity is achieved: the USB signal of the target system is connected to the Dummy GPU board through the high-speed backplane connector 202, and the Dummy GPU board connects the USB signal on the high-speed backplane connector 202 to the CP2108 chip through PCB routing to form a USB link path, that is, in this example, using one USB to UART module 204 and soldering the USB to UART module 204 on the board can realize the verification of the USB link of the GPU server.

[0068] Optionally, in this embodiment, the USB to UART module 204 uses a CP2108 chip.

[0069] In this example, by replacing the M.2 connector and M.2 disk in the related technology with a USB to UART module 204 chip, the USB link of the GPU server can be verified, further reducing the test parts of the test device and reducing the test cost.

[0070] As an example, the test device further includes a CPLD module 205 , which is respectively connected to the USB to UART module 204 and the Switch module 201 , so that the baseboard management controller can obtain log information of the Switch module 201 and monitor the status of the Switch module 201 .

[0071] In this example, since the USB link verification is verified by the USB to UART module 204, the USB to UART module 204 can convert the USB signal into a UART signal, and the UART signal is a way to transmit LOG information (log information), especially in situations where serial communication is required. Through the UART interface, the LOG information inside the device can be output to the external system for monitoring, debugging and analysis. Based on this, in this embodiment, the USB to UART module 204 is connected to the Switch module 201 through the CPLD module 205 to achieve the function of increasing the monitoring of the status of the Switch module 201. For example, by converting the USB signal to a UART signal through the USB to UART module 204 on the Dummy GPU board, and the UART signal is connected to the Switch module 201 through the CPLD, the baseboard management controller BMC can obtain the LOG information of the Switch and monitor the status of the Switch.

[0072] Furthermore, the power consumption information can also be monitored through the LOG information. For example, the CPLD module 205 is connected to the power module, and the CPLD module 205 is connected to the Switch module 201. The LOG information of the power supply is transmitted to the Switch module 201. The baseboard management controller BMC can obtain the LOG information of the Switch, monitor the power consumption information, and quickly locate the machine problem, thereby simplifying the location of the machine problem.

[0073] As an example, in the embodiment of the present application, the test device also includes at least one matching port, which is used to match the power consumption simulation module to simulate the power consumption scenario of the GPU. During the signal transmission process, the power consumption and heat generation of the GPU have a certain impact on the stability of the signal. The embodiment of the present application can select some power consumption simulation modules to simulate the power consumption scenario of the GPU through the matching port, so that the GPU server simulated by the test device is closer to the state of the real GPU server. In this state, the GPU server is tested with higher accuracy.

[0074] Optionally, as an example, the power consumption simulation module includes a heating block that simulates the GPU server power supply. The heating block can be configured according to the device parameters of each GPU server, etc., and can be easily disassembled, assembled and replaced by matching ports.

[0075] As an example, in an embodiment of the present application, the testing device also includes a counterweight module, which is used to simulate the state of the GPU server, so that the GPU server simulated by the testing device is closer to the state of the real GPU server, and realizes vibration, impact, and packaging research and development reliability verification testing.

[0076] As an example, the test device also includes 1 clock expansion module, 2 temperature sensors, 1 EEPROM module, 3 I2C expansion modules, multiple groups of power supply modules and 8 power supply connectors. Based on 8 retimers 203, 1 CPLD module 205, 2 clock expansion chips, 2 temperature sensors, 1 EEPROM module, 3 I2C expansion modules, 1 Switch module 201, 1 USB to UART module 204, multiple groups of power supply modules, and 8 power supply connectors, a GUP server is simulated to obtain a test device.

[0077] Based on the above test device, one Switch module 201 is used to achieve 8 GPU replacement, and 8 PCIe network cards, M.2 hard disks and other test spare parts are no longer needed. A single Dummy GPU board can achieve the high-speed link / low-speed signal link connectivity verification of production testing. And one USB to UART module 204 is used to implement the connectivity verification of the USB link, and the USB to UART module 204 is connected to the Switch module 201 through the CPLD module 205, which adds the function that the whole machine can obtain the Switch module 201 and CPLD LOG information on the Dummy GPU board. Therefore, the above test device, on the one hand, reduces the cost of the test device, and on the other hand, increases the log acquisition function, which can realize the status monitoring of the test device, making the problems of the test device easier to locate and determine.

[0078] The present application embodiment also provides a GPU server testing system, including:

[0079] A target system, the target system includes a backplane;

[0080] A GPU server testing device, wherein a high-speed backplane connector 202 of the testing device is connected to a backplane;

[0081] The test device is configured to simulate a GPU server and verify a signal link of the GPU server when the GPU server communicates with a target system.

[0082] In this embodiment, the specific structure of the GPU server testing device is as described in the above embodiments, and specific reference can be made to the above embodiments. Therefore, the testing system in the embodiment of the present application includes the effects of the testing devices mentioned in the above embodiments, which will not be repeated here.

[0083] Finally, it should be noted that those skilled in the art will readily conceive of other embodiments of the present invention after considering the specification and practicing the invention disclosed herein. The present invention is intended to cover any variations, uses or adaptations of the present invention, which follow the general principles of the present invention and include common knowledge or customary technical means in the art not disclosed by the present invention, are not limited to the precise structure described above and shown in the drawings, and may be modified and changed in various ways without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.

Claims

1. A GPU server testing device, characterized in that: include: Multiple high-speed backplane connectors for connecting to the backplane of the target system; a plurality of retimers, one end of each of the retimers being connected to the high-speed backplane connector; A Switch module, comprising a plurality of ports PORT, the other end of the retimer is connected to the PORT of the Switch module, the high-speed backplane connector, the retimer and the Switch module are connected in sequence, simulating a plurality of first high-speed PCIE signal links of the GPU server; The Switch module is configured to verify whether the first high-speed PCIE signal link connected to the GPU server is normal.

2. The testing device according to claim 1, characterized in that: The Switch module includes 8 first PORTs, and the number of the retimers is 8. One retimer is connected to one of the first PORTs to simulate 8 first high-speed PCIE signal links of the GPU server.

3. The testing device according to claim 2, characterized in that: The Switch module also includes a second PORT, which is connected to the high-speed backplane connector to simulate a second high-speed PCIE signal link of the GPU server, wherein the network configuration information of the first high-speed PCIE signal link is different from that of the second high-speed PCIE signal link.

4. The testing device according to claim 1, characterized in that: The test device further comprises a USB to UART module, wherein the USB to UART module is connected to the high-speed backplane connector to simulate a USB link of a GPU server; The USB to UART module is configured to verify whether the USB link connected to the GPU server is normal.

5. The testing device according to claim 4, characterized in that: The testing device also includes a CPLD module, which is respectively connected to the USB to UART module and the Switch module, so that the baseboard management controller can obtain the log information of the Switch module and perform status monitoring on the Switch module.

6. The testing device according to any one of claims 1 to 5, characterized in that: The testing device further includes at least one matching port, and the matching port is used to match a power consumption simulation module to simulate a power consumption scenario of a GPU.

7. The testing device according to claim 6, characterized in that: The power consumption simulation module includes a heating block that simulates the GPU server power supply.

8. The testing device according to any one of claims 1 to 5, characterized in that: The testing device further comprises a weight balancing module, and the weight balancing module is used to simulate the state of the GPU server.

9. The testing device according to any one of claims 1 to 5, characterized in that: The high-speed backplane connector, the retimer and the Switch module on the test device are connected through PCB traces.

10. A GPU server testing system, characterized in that: include: A target system, the target system comprising a backplane; The GPU server testing device according to any one of claims 1 to 9, wherein the high-speed backplane connector of the testing device is connected to the backplane; The testing device is configured to simulate a GPU server and verify a signal link of the GPU server when the GPU server communicates with a target system.

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