Chip unit detection method and device, electronic equipment and storage medium

Abstract

The invention discloses a chip unit detection method and apparatus, an electronic device and a storage medium. The detection method comprises the steps of determining a preset pixel coordinate of each chip unit and a preset pixel coordinate of each positioning hole on a substrate; determining a first image of the substrate; determining a pixel coordinate of each positioning hole in the first image; determining an image mapping relation according to the pixel coordinate of each positioning hole and a preset pixel coordinate; determining a pixel coordinate of each chip unit; determining a second image; determining a horizontal coordinate and a vertical coordinate of a mark point of each chip unit according to the second image; acquiring a preset abscissa and a preset ordinate of the preset physical coordinates of the mark point of each chip unit; and detecting all the chip units at the same time, and determining that the product is a good product under the condition that the difference value between the abscissa and the preset abscissa is smaller than a first difference value and the difference value between the ordinate and the preset ordinate is smaller than a second difference value. According to the invention, the substrate can be automatically detected, and the detection efficiency and accuracy are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of substrate detection, and in particular to a chip unit detection method, device, electronic equipment and storage medium. Background Art

[0002] Due to various factors in the manufacturing and printing process of the chip on the substrate, the actual position of the mark point printed on the chip may deviate from the ideal position. At the same time, the marking point printing may not be clear, resulting in a series of problems such as reduced reliability during chip mounting and difficulty in chip identification and traceability.

[0003] The current detection method is to make an acrylic template according to the mechanical size and position of the chip, put each substrate into the template, and use a tool microscope to measure the position deviation. The measurement accuracy is high, but this manual method has the following shortcomings. First, the efficiency is low. There are more than 50 chips on a substrate, and more than 2,000 chips. It takes about 20 seconds to test a chip with a tool microscope, and it takes 11 hours to measure a substrate with 2,000 chips. Second, there are thousands of sizes and specifications of substrates. Each specification of substrate needs to make an acrylic template separately. The template production is troublesome and requires high-precision machining. It is impossible to realize the automation and batching of the detection process. Third, during the manual detection process, due to the large number of substrate types, the workload of finding a suitable substrate is also very large. Manual operation is prone to errors and it is impossible to achieve full inspection. Summary of the invention

[0004] The present invention provides a chip unit detection method, device, electronic equipment and storage medium, which can automatically detect a substrate and improve detection efficiency and accuracy.

[0005] According to one aspect of the present invention, a chip unit detection method is provided, comprising:

[0006] Determine the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole on the substrate; the substrate includes a central area and an edge area, the edge area surrounds the central area, the central area is provided with a plurality of chip units, and the edge area is provided with a plurality of positioning holes;

[0007] determining a first image of a substrate;

[0008] Determining the pixel coordinates of each positioning hole in the first image;

[0009] Determine an image mapping relationship according to the pixel coordinates of each positioning hole in the first image and the preset pixel coordinates of each positioning hole;

[0010] Determine the pixel coordinates of each chip unit according to the image mapping relationship and the preset pixel coordinates of each chip unit;

[0011] Determine a second image according to the pixel coordinates of each chip unit and the pixel coordinates of each positioning hole;

[0012] Determine the abscissa and ordinate of the physical coordinates of the marking point of each chip unit according to the second image;

[0013] Obtaining a preset horizontal coordinate and a preset vertical coordinate of a preset physical coordinate of a mark point of each chip unit;

[0014] All chip units are tested at the same time, and when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is less than the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is less than the second difference, the chip unit is determined to be a good product; wherein the first difference is the absolute value of the error range between the horizontal coordinate and the preset horizontal coordinate, and the second difference is the absolute value of the error range between the vertical coordinate and the preset vertical coordinate.

[0015] Optionally, determining a first image of the substrate includes:

[0016] Acquire a scanned image of the substrate; the scanned image includes a substrate image and a background image, and the background image surrounds the substrate image;

[0017] The scanned image is subjected to a first processing of binarization, corrosion and expansion to determine the graphic area of ​​the substrate image;

[0018] determining a position of a graphic region of the substrate image;

[0019] The graphic area of ​​the substrate image after the position is determined is subjected to a second processing of binarization, corrosion and expansion to determine the first image of the substrate.

[0020] Optionally, obtaining a scanned image of the substrate includes:

[0021] The scanning image of the substrate is acquired by a line scan camera.

[0022] Optionally, determining the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole on the substrate includes:

[0023] Acquire the preset physical coordinates of each chip unit and each positioning hole on the substrate according to the preset information of the substrate;

[0024] The preset pixel coordinates of each chip unit on the substrate and the preset pixel coordinates of each positioning hole are determined according to the preset physical coordinates of each chip unit on the substrate and the preset physical coordinates of each positioning hole.

[0025] Optionally, determining the preset pixel coordinates of each chip unit on the substrate and the preset pixel coordinates of each positioning hole according to the preset physical coordinates of each chip unit on the substrate and the preset physical coordinates of each positioning hole includes:

[0026] The preset pixel coordinates of each chip unit on the substrate and the preset pixel coordinates of each positioning hole are determined according to the preset physical coordinates of each chip unit on the substrate and the preset physical coordinates of each positioning hole through the calibration data table.

[0027] Optionally, determining the abscissa and ordinate of the physical coordinates of the marker point of each chip unit according to the second image includes:

[0028] Determine a regional image of each chip unit according to the second image;

[0029] Performing enhancement and sharpening processing on the regional image of each chip unit to determine the landmark point area of ​​each chip unit;

[0030] According to the marker area of ​​each chip unit, the corner coordinates of the marker point of each chip unit are determined; the abscissa and ordinate of the corner coordinates of the marker point of each chip unit are the abscissa and ordinate of the physical coordinates of the marker point of each chip unit.

[0031] Optionally, after obtaining the horizontal coordinate and the vertical coordinate of the preset physical coordinate of the mark point of each chip unit, the method further includes:

[0032] All chip units are tested simultaneously, and when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is greater than or equal to the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is greater than or equal to the second difference, the chip unit is determined to be a defective product.

[0033] According to another aspect of the present invention, there is provided a detection device for a chip unit, comprising:

[0034] A first coordinate determination module is used to determine the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole on the substrate; the substrate includes a central area and an edge area, the edge area surrounds the central area, the central area is provided with a plurality of chip units, and the edge area is provided with a plurality of positioning holes;

[0035] A first image determining module, used to determine a first image of the substrate;

[0036] A second coordinate determination module, used to determine the pixel coordinates of each positioning hole in the first image;

[0037] A mapping relationship determination module, used to determine the image mapping relationship according to the pixel coordinates of each positioning hole in the first image and the preset pixel coordinates of each positioning hole;

[0038] A third coordinate determination module, used to determine the pixel coordinates of each chip unit according to the image mapping relationship and the preset pixel coordinates of each chip unit;

[0039] A second image determination module, used to determine a second image according to the pixel coordinates of each chip unit and the pixel coordinates of each positioning hole;

[0040] a fourth coordinate determination module, which determines the abscissa and ordinate of the physical coordinates of the marking point of each chip unit according to the second image;

[0041] A coordinate acquisition module, used to acquire a preset horizontal coordinate and a preset vertical coordinate of a preset physical coordinate of a mark point of each chip unit;

[0042] The good product determination module is used to detect all chip units at the same time, and determine that the chip unit is a good product when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is less than the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is less than the second difference; wherein the first difference is the absolute value of the error range between the horizontal coordinate and the preset horizontal coordinate, and the second difference is the absolute value of the error range between the vertical coordinate and the preset vertical coordinate.

[0043] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0044] at least one processor; and

[0045] a memory communicatively connected to at least one processor; wherein,

[0046] The memory stores a computer program that can be executed by at least one processor. The computer program is executed by the at least one processor so that the at least one processor can execute the chip unit detection method described in any embodiment of the present invention.

[0047] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the chip unit detection method described in any embodiment of the present invention when executed.

[0048] The chip unit detection method provided by the technical solution of the embodiment of the present invention includes: determining the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole on the substrate; the substrate includes a central area and an edge area, the edge area surrounds the central area, the central area is provided with a plurality of chip units, and the edge area is provided with a plurality of positioning holes; determining a first image of the substrate; determining the pixel coordinates of each positioning hole in the first image; determining an image mapping relationship according to the pixel coordinates of each positioning hole in the first image and the preset pixel coordinates of each positioning hole; determining the pixel coordinates of each chip unit according to the image mapping relationship and the preset pixel coordinates of each chip unit; determining the pixel coordinates of each chip unit according to ... The pixel coordinates of the chip unit and the pixel coordinates of each positioning hole are used to determine the second image; the horizontal coordinates and vertical coordinates of the physical coordinates of the mark point of each chip unit are determined according to the second image; the preset horizontal coordinates and preset vertical coordinates of the preset physical coordinates of the mark point of each chip unit are obtained; all chip units are tested at the same time, and the chip unit is determined to be a good product when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is less than the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is less than the second difference; wherein the first difference is the absolute value of the error range between the horizontal coordinate and the preset horizontal coordinate, and the second difference is the absolute value of the error range between the vertical coordinate and the preset vertical coordinate. The embodiment of the present invention can automatically detect multiple chip units on the substrate at the same time, which can improve the detection efficiency, and the positions of multiple chip units on the substrate can be adjusted by positioning holes, which can improve the accuracy of image detection.

[0049] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0051] Figure 1 It is a flow chart of a chip unit detection method provided by an embodiment of the present invention.

[0052] Figure 2 It is a schematic diagram of a substrate provided by an embodiment of the present invention.

[0053] Figure 3 yes Figure 1 A detailed flow chart included in S120.

[0054] Figure 4 yes Figure 1 A detailed flow chart included in S110.

[0055] Figure 5 yes Figure 1 A detailed flow chart included in S170.

[0056] Figure 6 It is a schematic diagram of a substrate measurement result provided by an embodiment of the present invention.

[0057] Figure 7 It is a schematic diagram of a chip unit detection device provided by an embodiment of the present invention.

[0058] Figure 8 It is a structural schematic diagram of an electronic device for implementing a chip unit detection method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0059] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0060] It should be noted that the terms "first", "second", etc. in the present invention are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.

[0061] The embodiment of the present invention provides a substrate detection method. Figure 1 is a flow chart of a chip unit detection method provided by an embodiment of the present invention, with reference to Figure 1 , the detection method of the chip unit includes:

[0062] S110, determining the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole on the substrate; the substrate includes a central area and an edge area, the edge area surrounds the central area, the central area is provided with a plurality of chip units, and the edge area is provided with a plurality of positioning holes.

[0063] in, Figure 2 is a schematic diagram of a substrate provided by an embodiment of the present invention, with reference to Figure 2 , the chip units 01 in the central area of ​​the substrate are arranged in an array of n rows and m columns, and each chip unit 01 includes a marking point 02; a plurality of positioning holes are provided in the edge area of ​​the substrate, and the positioning holes are used to determine the position of the substrate during the detection process; the substrate preset information includes the size information, model, parameters, preset physical coordinates of each chip unit and the preset physical coordinates of each positioning hole of the substrate; the preset physical coordinates of each chip unit and the preset physical coordinates of each positioning hole on the substrate can be obtained according to the substrate preset information; the calibration data table includes the pixel coordinates corresponding to the physical coordinates, so that the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole are determined according to the preset physical coordinates of each chip unit and the preset physical coordinates of each positioning hole; if there is a first physical coordinate that does not have a corresponding pixel coordinate in the calibration data table, the pixel coordinate corresponding to the first physical coordinate can be determined by interpolation; illustratively, the first physical coordinate is between the second physical coordinate and the third physical coordinate, and the second physical coordinate and the third physical coordinate are located in the calibration data table, and the pixel coordinate corresponding to the first physical coordinate can be determined by interpolating the pixel coordinate corresponding to the second physical coordinate and the pixel coordinate of the third physical coordinate.

[0064] S120 , determining a first image of the substrate.

[0065] Among them, a scanned image of the substrate is obtained; the scanned image includes a substrate image and a background image, and the background image surrounds the substrate image; the scanned image is subjected to a first processing of binarization, corrosion and expansion to determine the graphic area of ​​the substrate image; the position of the graphic area of ​​the substrate image is determined; the graphic area of ​​the substrate image after the position is determined is subjected to a second processing of binarization, corrosion and expansion to determine the first image of the substrate; the first image is the substrate image.

[0066] S130: Determine the pixel coordinates of each positioning hole in the first image.

[0067] The pixel coordinates of each positioning hole in the first image may be determined using drawing software or the like.

[0068] S140: Determine an image mapping relationship according to the pixel coordinates of each positioning hole in the first image and the preset pixel coordinates of each positioning hole.

[0069] The image mapping relationship is a corresponding relationship between the pixel coordinates of the positioning holes in the first image and the preset pixel coordinates of the corresponding positioning holes.

[0070] S150 , determining the pixel coordinates of each chip unit according to the image mapping relationship and the preset pixel coordinates of each chip unit.

[0071] Among them, according to the image mapping relationship and the preset pixel coordinates of each chip unit, the pixel coordinates of each chip unit are determined, and the position of the positioning hole is determined to determine the position of each chip unit. The position of each chip unit can be determined more accurately, and the chip unit on the substrate can be accurately aligned.

[0072] S160 , determining a second image according to the pixel coordinates of each chip unit and the pixel coordinates of each positioning hole.

[0073] Among them, the second image is determined according to the pixel coordinates of each chip unit and the pixel coordinates of each positioning hole. The second image is a rectified image determined according to the accurate position of the positioning hole, which makes the position of the second image more accurate and can achieve precise alignment, further improving the accuracy of detection.

[0074] S170 , determining the horizontal coordinate and the vertical coordinate of the physical coordinate of the marking point of each chip unit according to the second image.

[0075] Among them, the marker point of each chip unit can be used to determine whether the position of the chip unit is offset. According to the second image, the regional image of each chip unit is determined; the regional image of each chip unit is enhanced and sharpened to determine the marker point area of ​​each chip unit; according to the marker point area of ​​each chip unit, the corner point coordinates of the marker point of each chip unit are determined; the horizontal and vertical coordinates of the corner point coordinates of the marker point of each chip unit are the horizontal and vertical coordinates of the physical coordinates of the marker point of each chip unit.

[0076] S180, obtaining a preset horizontal coordinate and a preset vertical coordinate of the preset physical coordinates of the mark point of each chip unit.

[0077] The preset horizontal coordinate and the preset vertical coordinate of the preset physical coordinate of the mark point of each chip unit can be obtained according to the preset information of the substrate.

[0078] S190. Detect all chip units simultaneously, and determine that the chip unit is a good product when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is less than the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is less than the second difference; wherein the first difference is the absolute value of the error range between the horizontal coordinate and the preset horizontal coordinate, and the second difference is the absolute value of the error range between the vertical coordinate and the preset vertical coordinate.

[0079] The first difference and the second difference can be set according to the requirements. The smaller the error range, the more accurate the result. For example, when the first difference and the second difference are 0, the horizontal coordinate is the same as the preset horizontal coordinate, and the vertical coordinate is the same as the preset vertical coordinate. The result is the most accurate, and it can be determined that each chip unit on the substrate has no offset. When the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is less than the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is less than the second difference, it is determined that each chip unit is a good product and the substrate is qualified.

[0080] Illustratively, by using the chip unit detection method provided in an embodiment of the present invention to scan and detect a substrate having 2,000 chip units, the detection result can be automatically generated within 5 seconds, which is 8,000 times faster than the manual detection method, greatly improving the detection efficiency.

[0081] The chip unit detection method provided by the technical solution of the embodiment of the present invention includes: determining the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole on the substrate; the substrate includes a central area and an edge area, the edge area surrounds the central area, the central area is provided with a plurality of chip units, and the edge area is provided with a plurality of positioning holes; determining a first image of the substrate; determining the pixel coordinates of each positioning hole in the first image; determining an image mapping relationship according to the pixel coordinates of each positioning hole in the first image and the preset pixel coordinates of each positioning hole; determining the pixel coordinates of each chip unit according to the image mapping relationship and the preset pixel coordinates of each chip unit; determining the pixel coordinates of each chip unit according to ... The pixel coordinates of the chip unit and the pixel coordinates of each positioning hole are used to determine the second image; the horizontal coordinates and vertical coordinates of the physical coordinates of the mark point of each chip unit are determined according to the second image; the preset horizontal coordinates and preset vertical coordinates of the preset physical coordinates of the mark point of each chip unit are obtained; all chip units are tested at the same time, and the chip unit is determined to be a good product when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is less than the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is less than the second difference; wherein the first difference is the absolute value of the error range between the horizontal coordinate and the preset horizontal coordinate, and the second difference is the absolute value of the error range between the vertical coordinate and the preset vertical coordinate. The embodiment of the present invention can automatically detect multiple chip units on the substrate at the same time, which can improve the detection efficiency, and the positions of multiple chip units on the substrate can be adjusted by positioning holes, which can improve the accuracy of image detection.

[0082] Optionally, based on the above embodiment, S120 is refined, S120, determining the first image of the substrate, specifically including: S121, acquiring a scanned image of the substrate; the scanned image includes a substrate image and a background image, and the background image surrounds the substrate image; S122, binarizing, corroding and dilating the scanned image for a first time to determine the graphic area of ​​the substrate image; S123, determining the position of the graphic area of ​​the substrate image; S124, binarizing, corroding and dilating the graphic area of ​​the substrate image after the position is determined for a second time to determine the first image of the substrate.

[0083] The embodiment of the present invention provides a flow chart of a chip unit detection method based on the above embodiment, which specifically includes:

[0084] S110, determining the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole on the substrate; the substrate includes a central area and an edge area, the edge area surrounds the central area, the central area is provided with a plurality of chip units, and the edge area is provided with a plurality of positioning holes.

[0085] S121, obtaining a scanned image of the substrate; the scanned image includes a substrate image and a background image, and the background image surrounds the substrate image.

[0086] The scanning image of the substrate is acquired by a line array camera, and the scanning image of the substrate is generated by scanning the substrate with the line array camera; the substrate is generally placed on a white background for scanning, so the scanning image includes the scanned substrate image and part of the background image.

[0087] S122, performing a first processing of binarization, corrosion and expansion on the scanned image to determine the graphic area of ​​the substrate image.

[0088] Among them, after the scanned image is binarized, eroded and expanded for the first time, the background image will be a completely black image, and the substrate image is a highlighted area, so that the image area in the binary image of the scanned image can be determined, and the highlighted area with the largest area shows the outline of the substrate, thereby determining the graphic area of ​​the substrate image.

[0089] S123, determining the position of the graphic area of ​​the substrate image.

[0090] Among them, since the position of the scanned image may be offset, the position of the positioning hole cannot be determined, and the offset of the scanned image position leads to inaccurate measurement. Therefore, the position of the graphic area of ​​the substrate image needs to be determined. The position of the graphic area of ​​the substrate image can be determined by straight line detection. The border of the substrate image is detected by straight line. If there is a certain angle between the straight line detected by the straight line and the border of the substrate image, it means that the position of the graphic area of ​​the substrate image is offset. The position of the graphic area of ​​the substrate image needs to be adjusted so that there is no angle between the straight line detected by the straight line and the border of the substrate image. This makes the position of the graphic area of ​​the substrate image more accurate after determination, thereby improving the accuracy of the measurement.

[0091] S124, performing a second processing of binarization, corrosion and expansion on the graphic area of ​​the substrate image after the position is determined, to determine the first image of the substrate.

[0092] Among them, after the graphic area of ​​the substrate image after the position is determined is binarized, eroded and expanded for the second time, the background image will be a completely black image, and the substrate image is a highlighted area. At this time, the graphic area of ​​the substrate image is cut out from the scanned image to determine the first image of the substrate. The first image of the substrate is the cut-out substrate image.

[0093] S130: Determine the pixel coordinates of each positioning hole in the first image.

[0094] S140: Determine an image mapping relationship according to the pixel coordinates of each positioning hole in the first image and the preset pixel coordinates of each positioning hole.

[0095] S150 , determining the pixel coordinates of each chip unit according to the image mapping relationship and the preset pixel coordinates of each chip unit.

[0096] S160 , determining a second image according to the pixel coordinates of each chip unit and the pixel coordinates of each positioning hole.

[0097] S170 , determining the horizontal coordinate and the vertical coordinate of the physical coordinate of the marking point of each chip unit according to the second image.

[0098] S180, obtaining a preset horizontal coordinate and a preset vertical coordinate of the preset physical coordinates of the mark point of each chip unit.

[0099] S190. Detect all chip units simultaneously, and determine that the chip unit is a good product when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is less than the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is less than the second difference; wherein the first difference is the absolute value of the error range between the horizontal coordinate and the preset horizontal coordinate, and the second difference is the absolute value of the error range between the vertical coordinate and the preset vertical coordinate.

[0100] In an embodiment of the present invention, a linear array camera is used to scan a substrate to generate a scanned image of the substrate, and an algorithm analysis is performed on the scanned image of the substrate to calculate the coordinates of the chip marking points on each chip unit on the substrate. The calculated position coordinates are compared with the theoretical position coordinates to determine whether they are within the tolerance range to obtain a measurement result.

[0101] Optionally, based on the above embodiment, S110 is refined. Figure 4 yes Figure 1 A detailed flow chart included in S110, refer to Figure 4 , S110, determining the preset pixel coordinates of each chip unit on the substrate and the preset pixel coordinates of each positioning hole, specifically including: S111, obtaining the preset physical coordinates of each chip unit on the substrate and the preset physical coordinates of each positioning hole according to the preset information of the substrate; S112, determining the preset pixel coordinates of each chip unit on the substrate and the preset pixel coordinates of each positioning hole according to the preset physical coordinates of each chip unit on the substrate and the preset physical coordinates of each positioning hole.

[0102] Based on the above embodiments, an embodiment of the present invention provides a flow chart of a chip unit detection method, which specifically includes:

[0103] S111, obtaining preset physical coordinates of each chip unit and each positioning hole on the substrate according to preset information of the substrate.

[0104] Among them, the substrate preset information includes the size information, model, parameters, preset physical coordinates of each chip unit and the preset physical coordinates of each positioning hole of the substrate, and the preset physical coordinates are all ideal theoretical values; the preset physical coordinates of each chip unit and the preset physical coordinates of each positioning hole on the substrate can be obtained according to the substrate preset information.

[0105] S112, determining the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole on the substrate according to the preset physical coordinates of each chip unit and the preset physical coordinates of each positioning hole on the substrate.

[0106] Among them, the preset pixel coordinates of each chip unit on the substrate and the preset pixel coordinates of each positioning hole are determined according to the preset physical coordinates of each chip unit on the substrate and the preset physical coordinates of each positioning hole through the calibration data table; the calibration data table includes the pixel coordinates corresponding to the physical coordinates.

[0107] S120 , determining a first image of the substrate.

[0108] S130: Determine the pixel coordinates of each positioning hole in the first image.

[0109] S140: Determine an image mapping relationship according to the pixel coordinates of each positioning hole in the first image and the preset pixel coordinates of each positioning hole.

[0110] S150 , determining the pixel coordinates of each chip unit according to the image mapping relationship and the preset pixel coordinates of each chip unit.

[0111] S160 , determining a second image according to the pixel coordinates of each chip unit and the pixel coordinates of each positioning hole.

[0112] S170 , determining the horizontal coordinate and the vertical coordinate of the physical coordinate of the marking point of each chip unit according to the second image.

[0113] S180, obtaining a preset horizontal coordinate and a preset vertical coordinate of the preset physical coordinates of the mark point of each chip unit.

[0114] S190. Detect all chip units simultaneously, and determine that the chip unit is a good product when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is less than the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is less than the second difference; wherein the first difference is the absolute value of the error range between the horizontal coordinate and the preset horizontal coordinate, and the second difference is the absolute value of the error range between the vertical coordinate and the preset vertical coordinate.

[0115] Optionally, based on the above embodiment, S170 is refined. Figure 5 yes Figure 1 A detailed flow chart included in S170, refer to Figure 5 , S170, determine the horizontal and vertical coordinates of the physical coordinates of the mark point of each chip unit according to the second image, specifically including: S171, determine the regional image of each chip unit according to the second image; S172, enhance and sharpen the regional image of each chip unit to determine the mark point area of ​​each chip unit; S173, determine the corner point coordinates of the mark point of each chip unit according to the mark point area of ​​each chip unit; the corner point coordinates of the mark point of each chip unit are the physical coordinates of the mark point of each chip unit.

[0116] Based on the above embodiments, an embodiment of the present invention provides a flow chart of a chip unit detection method, which specifically includes:

[0117] S110, determining the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole on the substrate; the substrate includes a central area and an edge area, the edge area surrounds the central area, the central area is provided with a plurality of chip units, and the edge area is provided with a plurality of positioning holes.

[0118] S120 , determining a first image of the substrate.

[0119] S130: Determine the pixel coordinates of each positioning hole in the first image.

[0120] S140: Determine an image mapping relationship according to the pixel coordinates of each positioning hole in the first image and the preset pixel coordinates of each positioning hole.

[0121] S150 , determining the pixel coordinates of each chip unit according to the image mapping relationship and the preset pixel coordinates of each chip unit.

[0122] S160 , determining a second image according to the pixel coordinates of each chip unit and the pixel coordinates of each positioning hole.

[0123] S171 . Determine a region image of each chip unit according to the second image.

[0124] The regional image of each chip unit may be extracted according to the pixel coordinates of the chip unit in the second image.

[0125] S172, performing enhancement and sharpening processing on the regional image of each chip unit to determine the marker point region of each chip unit.

[0126] Among them, the regional image of each chip unit is enhanced and sharpened to improve the clarity of the regional image of the chip unit, so as to determine the landmark area of ​​each chip unit. Figure 2 , the area marked with point 11 is a circular area.

[0127] S173. Determine the corner coordinates of the marker point of each chip unit according to the marker point area of ​​each chip unit; the corner coordinates of the marker point of each chip unit are the physical coordinates of the marker point of each chip unit.

[0128] Among them, the corner point coordinates are the center coordinates of the identification point area; the corner point coordinates of the identification point of each chip unit can be determined according to the identification point area of ​​each chip unit, and the corner point coordinates of the identification point of each chip unit are the physical coordinates of the identification point of each chip unit, thereby obtaining the physical coordinates of the identification point of each chip unit.

[0129] S180, obtaining a preset horizontal coordinate and a preset vertical coordinate of the preset physical coordinates of the mark point of each chip unit.

[0130] S190. Detect all chip units simultaneously, and determine that the chip unit is a good product when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is less than the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is less than the second difference; wherein the first difference is the absolute value of the error range between the horizontal coordinate and the preset horizontal coordinate, and the second difference is the absolute value of the error range between the vertical coordinate and the preset vertical coordinate.

[0131] On the basis of the above embodiments, the embodiment of the present invention further provides a flow chart of a chip unit detection method, which specifically includes:

[0132] S110, determining the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole on the substrate; the substrate includes a central area and an edge area, the edge area surrounds the central area, the central area is provided with a plurality of chip units, and the edge area is provided with a plurality of positioning holes.

[0133] S120 , determining a first image of the substrate.

[0134] S130: Determine the pixel coordinates of each positioning hole in the first image.

[0135] S140: Determine an image mapping relationship according to the pixel coordinates of each positioning hole in the first image and the preset pixel coordinates of each positioning hole.

[0136] S150 , determining the pixel coordinates of each chip unit according to the image mapping relationship and the preset pixel coordinates of each chip unit.

[0137] S160 , determining a second image according to the pixel coordinates of each chip unit and the pixel coordinates of each positioning hole.

[0138] S170 , determining the horizontal coordinate and the vertical coordinate of the physical coordinate of the marking point of each chip unit according to the second image.

[0139] S180, obtaining a preset horizontal coordinate and a preset vertical coordinate of the preset physical coordinates of the mark point of each chip unit.

[0140] S200, simultaneously inspecting all chip units, and determining that the chip unit is defective when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is greater than or equal to the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is greater than or equal to the second difference.

[0141] Among them, when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is greater than or equal to the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is greater than or equal to the second difference, the chip unit is determined to be a defective product. It can detect whether the position of each chip unit on the substrate is offset, avoiding a series of problems such as reduced reliability during chip mounting and difficulty in chip identification and tracing.

[0142] S190. Detect all chip units simultaneously, and determine that the chip unit is a good product when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is less than the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is less than the second difference; wherein the first difference is the absolute value of the error range between the horizontal coordinate and the preset horizontal coordinate, and the second difference is the absolute value of the error range between the vertical coordinate and the preset vertical coordinate.

[0143] In an embodiment of the present invention, a linear array camera is used to scan a substrate to generate a scanned image of the substrate, and an algorithm analysis is performed on the scanned image of the substrate to calculate the coordinates of the chip marking points on each chip unit on the substrate. The calculated position coordinates are compared with the theoretical position coordinates to determine whether they are within the tolerance range to obtain a measurement result.

[0144] The embodiment of the present invention also provides an application with an interface. The user only needs to configure the product specification information of the substrate to be measured on the software interface in advance and click the "Start" button. The algorithm will then control the machine carrying the substrate and the linear array camera to move relative to each other to scan the image of the substrate. The algorithm will then automatically perform algorithm analysis on the substrate image, identify the regional images of each chip unit arranged in an array on the substrate, perform marker point recognition on each chip unit, select the marker points in a graphical form, automatically calculate the position coordinates of the corner points of the marker points, and finally generate the detection results. The measurement results can be graphically displayed and a result report can be generated, thereby realizing the automation of the measurement process. Figure 6 is a schematic diagram of a substrate measurement result provided by an embodiment of the present invention, Figure 6 For graphical display of measurement results, Figure 6 The coordinates of the marker point 02 of each chip unit 01 are shown; Table 1 is the report measurement result of the substrate, as shown in the following table:

[0145] Table 1

[0146] Substrate serial number X direction(mm) Y direction(mm) 0 Specification 0.000±0.3 0.000±0.3 0 Maximum measurement value 0.525 0.525 0 Minimum measurement value 0.252 0.273 0 Measurement average 0.324 0.336 0 Number of tests 224 244 0 Defective product data 28 8 0 Measurement results Fail Fail

[0147] Table 1 includes the maximum measurement value, minimum measurement value, average measurement value, number of chip units detected, chip unit defective product data and the final measurement result of the substrate of the horizontal and vertical coordinates of the identification points of the chip unit in the substrate, so as to intuitively display the measurement result of the substrate.

[0148] The embodiment of the present invention provides a detection device for a chip unit based on the above embodiment. Figure 7 is a schematic diagram of a chip unit detection device provided by an embodiment of the present invention, the detection device comprising:

[0149] The first coordinate determination module 210 is used to determine the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole on the substrate; the substrate includes a central area and an edge area, the edge area surrounds the central area, the central area is provided with a plurality of chip units, and the edge area is provided with a plurality of positioning holes;

[0150] A first image determination module 220, configured to determine a first image of a substrate;

[0151] A second coordinate determination module 230, for determining the pixel coordinates of each positioning hole in the first image;

[0152] A mapping relationship determination module 240, configured to determine an image mapping relationship according to the pixel coordinates of each positioning hole in the first image and the preset pixel coordinates of each positioning hole;

[0153] A third coordinate determination module 250, for determining the pixel coordinates of each chip unit according to the image mapping relationship and the preset pixel coordinates of each chip unit;

[0154] A second image determination module 260, configured to determine a second image according to the pixel coordinates of each chip unit and the pixel coordinates of each positioning hole;

[0155] A fourth coordinate determination module 270 determines the horizontal coordinate and the vertical coordinate of the physical coordinate of the marking point of each chip unit according to the second image;

[0156] A coordinate acquisition module 280, used to acquire a preset horizontal coordinate and a preset vertical coordinate of a preset physical coordinate of a marker point of each chip unit;

[0157] The good product determination module 290 is used to simultaneously detect all chip units, and determine that the substrate is a good product when the difference between the horizontal coordinate and the preset horizontal coordinate is less than the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is less than the second difference; wherein the first difference is the absolute value of the error range between the horizontal coordinate and the preset horizontal coordinate, and the second difference is the absolute value of the error range between the vertical coordinate and the preset vertical coordinate.

[0158] Optionally, the first image determination module 220 includes:

[0159] An image acquisition unit, used to acquire a scanned image of the substrate; the scanned image includes a substrate image and a background image, and the background image surrounds the substrate image;

[0160] A graphic determination unit, used for performing a first processing of binarization, corrosion and expansion on the scanned image to determine a graphic area of ​​the substrate image;

[0161] A position determination unit, used to determine the position of the graphic area of ​​the substrate image;

[0162] The image determination unit is used to perform a second processing of binarization, corrosion and expansion on the graphic area of ​​the substrate image after the position is determined, so as to determine the first image of the substrate.

[0163] Optionally, the image acquisition unit includes: acquiring a scanned image of the substrate through a line array camera.

[0164] Optionally, the first coordinate determining module 210 includes:

[0165] A physical coordinate determination unit, used to obtain the preset physical coordinates of each chip unit and each positioning hole on the substrate according to the preset information of the substrate;

[0166] The pixel coordinate determining unit is used to determine the preset pixel coordinates of each chip unit on the substrate and the preset pixel coordinates of each positioning hole according to the preset physical coordinates of each chip unit on the substrate and the preset physical coordinates of each positioning hole.

[0167] Optionally, the pixel coordinate determining unit includes: determining preset pixel coordinates of each chip unit on the substrate and preset pixel coordinates of each positioning hole according to preset physical coordinates of each chip unit on the substrate and preset physical coordinates of each positioning hole through a calibration data table.

[0168] Optionally, the fourth coordinate determination module 270 includes:

[0169] A region image determining unit, used for determining a region image of each chip unit according to the second image;

[0170] A marker point region determination unit, used to perform enhancement and sharpening processing on the region image of each chip unit to determine the marker point region of each chip unit;

[0171] The corner point coordinate determination unit is used to determine the corner point coordinates of the marker point of each chip unit according to the marker point area of ​​each chip unit; the horizontal coordinate and vertical coordinate of the corner point coordinate of the marker point of each chip unit are the horizontal coordinate and vertical coordinate of the physical coordinate of the marker point of each chip unit.

[0172] Optionally, the detection device also includes: a defective product determination module, which is used to detect all chip units at the same time after obtaining the horizontal coordinate and vertical coordinate of the preset physical coordinates of the mark point of each chip unit, and determine that the chip unit is a defective product when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is greater than or equal to the first difference, and the difference between the vertical coordinate and the preset vertical coordinate is greater than or equal to the second difference.

[0173] Figure 8 A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0174] like Figure 8As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0175] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0176] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as the detection method of the chip unit.

[0177] In some embodiments, the detection method of the chip unit may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the detection method of the chip unit described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to execute the detection method of the chip unit in any other appropriate manner (e.g., by means of firmware).

[0178] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0179] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0180] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0181] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0182] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0183] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0184] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0185] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A chip unit detection method, characterized in that: include: Determine the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole on the substrate; the substrate includes a central area and an edge area, the edge area surrounds the central area, the central area is provided with a plurality of chip units, and the edge area is provided with a plurality of positioning holes; determining a first image of the substrate; Determining the pixel coordinates of each positioning hole in the first image; Determining an image mapping relationship according to the pixel coordinates of each positioning hole in the first image and the preset pixel coordinates of each positioning hole; Determine the pixel coordinates of each chip unit according to the image mapping relationship and the preset pixel coordinates of each chip unit; Determine a second image according to the pixel coordinates of each chip unit and the pixel coordinates of each positioning hole; Determine the horizontal coordinate and the vertical coordinate of the physical coordinate of the marking point of each chip unit according to the second image; Obtaining a preset horizontal coordinate and a preset vertical coordinate of a preset physical coordinate of a mark point of each chip unit; All chip units are tested at the same time, and when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is less than a first difference, and the difference between the vertical coordinate and the preset vertical coordinate is less than a second difference, the chip unit is determined to be a good product; wherein the first difference is the absolute value of the error range between the horizontal coordinate and the preset horizontal coordinate, and the second difference is the absolute value of the error range between the vertical coordinate and the preset vertical coordinate.

2. The chip unit detection method according to claim 1, characterized in that: Determining a first image of the substrate includes: Acquire a scanned image of the substrate; the scanned image includes a substrate image and a background image, and the background image surrounds the substrate image; Performing a first processing of binarization, corrosion and expansion on the scanned image to determine a graphic area of ​​the substrate image; Determining a position of a graphic region of the substrate image; The graphic area of ​​the substrate image after the position is determined is subjected to a second processing of binarization, corrosion and expansion to determine the first image of the substrate.

3. The chip unit detection method according to claim 2, characterized in that: Acquiring a scanned image of the substrate, comprising: A scanned image of the substrate is acquired by a line array camera.

4. The chip unit detection method according to claim 1, characterized in that: Determining the preset pixel coordinates of each chip unit and each positioning hole on the substrate includes: Acquire the preset physical coordinates of each chip unit and each positioning hole on the substrate according to the preset information of the substrate; The preset pixel coordinates of each chip unit on the substrate and the preset pixel coordinates of each positioning hole are determined according to the preset physical coordinates of each chip unit on the substrate and the preset physical coordinates of each positioning hole.

5. The chip unit detection method according to claim 4, characterized in that: Determining the preset pixel coordinates of each chip unit on the substrate and the preset pixel coordinates of each positioning hole according to the preset physical coordinates of each chip unit on the substrate and the preset physical coordinates of each positioning hole, including: The preset pixel coordinates of each chip unit on the substrate and the preset pixel coordinates of each positioning hole are determined according to the preset physical coordinates of each chip unit on the substrate and the preset physical coordinates of each positioning hole through the calibration data table.

6. The chip unit detection method according to claim 1, characterized in that: Determining the abscissa and ordinate of the physical coordinates of the marking point of each chip unit according to the second image includes: determining a regional image of each chip unit according to the second image; Performing enhancement and sharpening processing on the regional image of each chip unit to determine the landmark point area of ​​each chip unit; According to the marker point area of ​​each chip unit, the corner point coordinates of the marker point of each chip unit are determined; the horizontal coordinate and vertical coordinate of the corner point coordinates of the marker point of each chip unit are the horizontal coordinate and vertical coordinate of the physical coordinates of the marker point of each chip unit.

7. The chip unit detection method according to claim 1, characterized in that: After obtaining the abscissa and ordinate of the preset physical coordinates of the marking point of each chip unit, the method further includes: All chip units are tested simultaneously, and when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is greater than or equal to a first difference, and the difference between the vertical coordinate and the preset vertical coordinate is greater than or equal to a second difference, the chip unit is determined to be a defective product.

8. A chip unit detection device, characterized in that: include: A first coordinate determination module is used to determine the preset pixel coordinates of each chip unit and the preset pixel coordinates of each positioning hole on the substrate; the substrate includes a central area and an edge area, the edge area surrounds the central area, the central area is provided with a plurality of chip units, and the edge area is provided with a plurality of positioning holes; A first image determining module, used to determine a first image of the substrate; A second coordinate determination module, used to determine the pixel coordinates of each positioning hole in the first image; A mapping relationship determination module, used to determine the image mapping relationship according to the pixel coordinates of each positioning hole in the first image and the preset pixel coordinates of each positioning hole; A third coordinate determination module, used to determine the pixel coordinates of each chip unit according to the image mapping relationship and the preset pixel coordinates of each chip unit; A second image determination module, used to determine a second image according to the pixel coordinates of each chip unit and the pixel coordinates of each positioning hole; a fourth coordinate determination module, which determines the abscissa and ordinate of the physical coordinates of the marking point of each chip unit according to the second image; A coordinate acquisition module, used to acquire a preset horizontal coordinate and a preset vertical coordinate of a preset physical coordinate of a mark point of each chip unit; A good product determination module is used to simultaneously detect all chip units, and determine that the chip unit is a good product when the difference between the horizontal coordinate of the chip unit and the preset horizontal coordinate is less than a first difference, and the difference between the vertical coordinate and the preset vertical coordinate is less than a second difference; wherein the first difference is the absolute value of the error range between the horizontal coordinate and the preset horizontal coordinate, and the second difference is the absolute value of the error range between the vertical coordinate and the preset vertical coordinate.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the chip unit detection method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the chip unit detection method according to any one of claims 1 to 7 when executed.

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