Source electrode driving circuit, adjusting method thereof and display panel

Abstract

The invention provides a source electrode driving circuit, an adjusting method thereof and a display panel, and the source electrode driving circuit comprises a digital-to-analog converter which is used for obtaining a gray-scale value and converting the gray-scale value into a gray-scale voltage; the first input end of the differential amplifier is connected to the digital-to-analog converter so as to obtain the gray-scale voltage; the first bias circuit is used for applying a first bias tail current to the differential amplifier; the trigger is connected to the digital-to-analog converter so as to obtain the gray-scale value and the variation range of the gray-scale value; and the second bias circuit is connected to the trigger and applies a second bias tail current to the differential amplifier based on the condition that the variation range of the gray scale numerical value meets a triggering condition. By arranging the trigger and the additional bias circuit, when the variation range of the gray scale value meets the triggering condition, the additional bias tail current is applied to the differential amplifier, and the output conversion rate of the differential amplifier is increased.

Description

Technical Field

[0001] The present invention relates to the technical field of display panels, and in particular to a source driving circuit and an adjustment method thereof, and a display panel. Background Art

[0002] In the field of display driving, such as active matrix organic light emitting diode (AMOLED) panels, source amplifiers are required to drive the entire column of pixel units to emit light. As the resolution and refresh rate of AMOLED panels become higher and higher, the performance requirements for source drive circuits are also getting higher and higher. Higher resolution means more and more source drive channels and a large number of drive circuits. Higher refresh rates mean that the time required for the source amplifier output to change to stability when the grayscale voltage changes. The above two aspects pose challenges to the design of source drive circuits. Summary of the invention

[0003] Based on this, it is necessary to provide a source driving circuit to address the problems in the above background technology, which can at least improve the output conversion rate of the amplifier while avoiding increasing the power consumption of the driving circuit.

[0004] To achieve the above objectives and other related objectives, one aspect of the present application provides a source driver circuit, including:

[0005] A digital-to-analog converter, used for acquiring a grayscale value and converting the grayscale value into a grayscale voltage;

[0006] a differential amplifier, wherein a first input terminal of the differential amplifier is connected to the digital-to-analog converter to obtain the grayscale voltage;

[0007] A first bias circuit, configured to apply a first bias tail current to the differential amplifier;

[0008] A trigger, connected to the digital-to-analog converter, to obtain the grayscale value and the variation range of the grayscale value;

[0009] The second bias circuit is connected to the trigger and applies a second bias tail current to the differential amplifier based on the variation range of the grayscale value satisfying a trigger condition.

[0010] In one embodiment, the trigger includes at least one judgment unit, the judgment unit includes a first branch and a second branch in parallel, the first branch is provided with a delay unit, and the first branch and the second branch are input to a logic unit.

[0011] In one embodiment, the trigger includes a single judgment unit for judging the variation range of the highest bit of the grayscale value; or, the trigger includes two judgment units for judging the variation range of the highest bit and the second highest bit of the grayscale value respectively.

[0012] In one embodiment, the trigger condition includes that the variation range of the grayscale value is greater than or equal to one half of the grayscale voltage range.

[0013] In one embodiment, based on the variation range of the grayscale value satisfying the trigger condition, the output signal of the trigger is converted from a low level to a high level, and when the output signal of the trigger is at a high level, a second bias tail current is applied to the differential amplifier; based on the variation range of the grayscale value not satisfying the trigger condition, the output signal of the trigger is at a low level, and when the output signal of the trigger is at a low level, the second bias tail current is not applied to the differential amplifier.

[0014] In one embodiment, when the high level continues for a preset time period, the output signal of the trigger is converted from a high level to a low level.

[0015] In one embodiment, based on the variation range of the grayscale value satisfying a trigger condition, the trigger outputs a positive pulse having a width equal to the delay duration of the delay unit.

[0016] In one embodiment, a single positive pulse is used to drive the second bias circuit to apply a second bias tail current to the differential amplifier once, and the duration of applying the second bias tail current is the delay duration.

[0017] A second aspect of the present application provides a method for adjusting a source driving circuit, which is applied to the source driving circuit described in any one of the above items, and the method comprises:

[0018] Obtaining a grayscale value and a variation range of the grayscale value;

[0019] An additional bias tail current is applied to the differential amplifier based on the variation range of the grayscale value satisfying a trigger condition.

[0020] A third aspect of the present application is a display panel, comprising any one of the above-mentioned source driving circuits.

[0021] According to the source driving circuit and its adjustment method, and the display panel provided by the present invention, by setting a trigger and an additional bias circuit, when the variation range of the grayscale value meets the trigger condition, an additional bias tail current is applied to the differential amplifier, thereby increasing the bias tail current of the differential amplifier and improving the output conversion rate of the differential amplifier. At the same time, since the increase in the bias tail current is only effective during the preset time, the power consumption of the driving circuit will not be increased additionally, thereby taking into account both the requirements of enhancing the slew rate and reducing the power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to better describe and illustrate the embodiments and / or examples of those applications disclosed herein, reference may be made to one or more drawings. The additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed applications, the embodiments and / or examples currently described, and the best modes of these applications currently understood.

[0023] FIG. 1 is a schematic diagram of a source driving circuit structure of an AMOLED panel in the prior art;

[0024] FIG2 is a circuit diagram of a source amplifier structure in the prior art;

[0025] FIG3 is a schematic diagram of a source driving circuit in the prior art;

[0026] FIG4 is a schematic diagram of a source driving circuit in an embodiment;

[0027] FIG5 is a schematic diagram of the structure of a trigger in an embodiment;

[0028] FIG6 is a schematic diagram of a grayscale voltage range in one embodiment;

[0029] FIG7 is a schematic diagram of the structure of a trigger in an embodiment;

[0030] FIG8 is a schematic diagram of a grayscale voltage range in one embodiment;

[0031] FIG9 is a flow chart of a method for adjusting a polarity driving circuit in one embodiment;

[0032] FIG. 10 is a schematic diagram of the structure of a display panel in an embodiment.

[0033] Description of reference numerals:

[0034] 1. Source driving circuit; 2. Gate driving circuit; 3. Pixel array unit;

[0035] 10. Digital-to-analog converter; 20. Differential amplifier; 30. First bias circuit; 40. Trigger; 41. Delay unit; 42. Logic unit; 50. Second bias circuit. DETAILED DESCRIPTION

[0036] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0038] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present application. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0039] It should be noted that the illustrations provided in this embodiment only illustrate the basic concept of the present application in a schematic manner. Although the illustrations only show components related to the present application and are not drawn according to the number, shape and size of components in actual implementation, the type, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the component layout type may also be more complicated.

[0040] The source drive circuit architecture of the AMOLED panel is as follows Figure 1 As shown in the figure, under the control of the data latch control circuit, the red, green and blue (RGB) image data is latched in the data latch through the register, and under the control of each line beat signal, a line of data is pushed to the digital-to-analog converter (DAC) through level shifting for conversion, converting the digital grayscale value into a nonlinear gamma (GAMMA) voltage value. The GAMMA voltage enters the source amplifier buffer to improve the driving capability of the grayscale voltage, and the output drives the large capacitive load of the panel.

[0041] Source amplifier structure reference Figure 2As shown in the figure, rail-to-rail input allows the amplifier to accept a wider voltage range of input voltage, and the class AB output structure can provide greater driving capability. The structure of the source amplifier can be simplified as Figure 3 As shown, the N-bit grayscale value DATA[n-1:0] is transformed by GAMMA nonlinear transformation to generate a grayscale voltage V+, which is used as the input signal of the "+" input terminal of the differential amplifier. The output voltage Vo of the amplifier is used to drive the panel pixel unit. The output terminal of the amplifier is connected to the "-" input terminal of the amplifier to form a unit gain amplifier to improve the grayscale voltage driving capability.

[0042] Slew rate (SR) is an important parameter that describes the voltage conversion rate in a circuit. It refers to the maximum rate at which the output signal can follow the input signal change in a unit time (usually microseconds). The unit of slew rate is usually V / s (volts per second) or V / μs (volts per microsecond), which indicates the maximum voltage value that the output signal can follow the input signal change per second or per microsecond. In a circuit, slew rate is a very important parameter because it directly affects the performance and stability of the circuit. If the slew rate of the circuit is too low, the output signal will not be able to follow the changes in the input signal in time, resulting in signal distortion and increased errors. Generally speaking, high-speed and high-precision circuits need to have a higher voltage slew rate to ensure the accuracy and reliability of the signal.

[0043] exist Figure 3 In the source amplifier structure shown, several factors related to the slew rate include: bias tail current Ibiasp1 / Ibiasn1, compensation capacitor Cc, and the driving capability of the output stage itself. The larger the bias tail current, the faster the charging and discharging speed of the compensation capacitor Cc, and the higher the slew rate; the smaller the compensation capacitor Cc, the shorter the time it takes for the amplifier to complete the stabilization of the compensation capacitor charging and discharging level, and the higher the slew rate; the stronger the output stage driving capability, the faster the panel capacitor is charged and discharged, and the higher the slew rate. However, the above factors themselves have constraints. The larger the tail current, the greater the power consumption of the amplifier; the smaller the compensation capacitor Cc, the more unstable the amplifier is and the oscillation occurs; the higher the output stage driving capability, the larger the size of the device and the higher the cost. Therefore, under the goal of improving the slew rate, it is necessary to take into account the requirements of power consumption, area, and stability.

[0044] In view of the above problems, the present invention provides a source driving circuit, such as Figure 4 As shown, including:

[0045] A digital-to-analog converter 10, used to obtain a grayscale value and convert the grayscale value into a grayscale voltage;

[0046] A differential amplifier 20, a first input terminal of the differential amplifier is connected to the digital-to-analog converter 10 to obtain the grayscale voltage;

[0047] A first bias circuit 30, configured to apply a first bias tail current to the differential amplifier 20;

[0048] A trigger 40 connected to the digital-to-analog converter 10 to obtain the grayscale value and the variation range of the grayscale value;

[0049] The second bias circuit 50 is connected to the trigger 40 and applies a second bias tail current to the differential amplifier 20 based on the variation range of the grayscale value satisfying a trigger condition.

[0050] In one embodiment, the digital-to-analog converter 10 is used to convert discrete digital quantities into connected and changing analog quantities. Specifically, the digital-to-analog converter 10 is used to generate a grayscale voltage V+ through a GAMMA nonlinear transformation of the N-bit grayscale value DATA[n-1:0], and the grayscale voltage V+ serves as an input signal of the first input terminal (“+” input terminal) of the differential amplifier 20.

[0051] In one embodiment, the differential amplifier 20 is composed of an input stage module and an output stage module, wherein the input stage module includes a first input terminal ("+" input terminal) and a second input terminal ("-" input terminal), and the output stage module is connected to the output stage module, and the output voltage Vo of the output stage module is used to drive the panel pixel unit. The differential amplifier 20 also includes a compensation capacitor Cc, and the compensation capacitor Cc is arranged on a circuit that connects the midpoint between the output stage module and the output stage module to the output terminal of the output stage module. Further, the output terminal of the output stage module is connected to the second input terminal ("-" input terminal) of the input stage module, forming a unit gain negative feedback structure, which can realize that the output signal follows the change of the input signal, and is used to drive a large capacitance load and improve the grayscale voltage driving capability.

[0052] In one embodiment, the first bias circuit 30 is used to apply a first bias tail current, that is, a fixed bias tail current, to the differential amplifier 20. Figure 4 As shown, the first bias circuit 30 always applies a fixed bias tail current to both ends of the input stage module of the differential amplifier 20. That is, when the differential amplifier 20 is powered on, the first bias circuit 30 continuously applies a bias tail current to the differential amplifier 20, and the value of the applied first bias tail current is a fixed value and does not change with the change of the grayscale value or the grayscale voltage.

[0053] In one embodiment, the source driving circuit provided by the present invention further includes a trigger 40, such as a one-shot trigger. Figure 4As shown, the input end of the trigger 40 is used to obtain the grayscale value, which is the same as the data obtained by the input end of the digital-to-analog converter 10, and the output end of the trigger 40 is connected to the second bias circuit 50 to output a low level or a high level to the second bias circuit 50.

[0054] Exemplarily, the trigger 40 includes at least one judgment unit, and the judgment unit includes a first branch and a second branch in parallel. The first branch is provided with a delay unit 41 , and the first branch and the second branch are input to a logic unit 42 .

[0055] Exemplarily, the trigger 40 includes a single judgment unit for judging the variation range of the highest bit of the grayscale value; or, the trigger 40 includes two judgment units for judging the variation range of the highest bit and the second highest bit of the grayscale value respectively.

[0056] Further, based on the variation range of the grayscale value meeting the trigger condition, the output signal of the trigger is converted from a low level to a high level, and when the output signal of the trigger is at a high level, a second bias tail current is applied to the differential amplifier; based on the variation range of the grayscale value not meeting the trigger condition, the output signal of the trigger is at a low level, and when the output signal of the trigger is at a low level, the second bias tail current is not applied to the differential amplifier. Wherein, the trigger condition includes that the variation range of the grayscale value is greater than or equal to one-half of the grayscale voltage range.

[0057] In one embodiment, Figure 5 As shown, the trigger 40 includes a single judgment unit, and the judgment unit includes a first branch and a second branch in parallel. A delay unit 41 is provided on the first branch. The judgment unit also includes a logic unit 42, and the logic unit includes two input terminals, which are respectively used to input the grayscale value of the first branch and the grayscale value of the second branch. Among them, the first branch obtains the first grayscale value D1 at a first time, and the second branch obtains the second grayscale value D2 at a second time. Since the delay unit is provided on the first branch, and the time difference between the first time and the second time is consistent with the delay duration of the delay unit, the logic unit can simultaneously obtain the first grayscale value D1 and the second grayscale value D2 to obtain the variation range of the grayscale value, and then compare the variation range of the grayscale value with the preset range. Specifically, when the trigger 40 includes only a single judgment unit, it is used to judge the highest bit of the grayscale value. The grayscale voltage range includes two parts, such as Figure 6As shown, when the highest bit of the first grayscale value is different from the highest bit of the second grayscale value, for example, the first grayscale value D1 is 1xxxxx and the second grayscale value D2 is 0xxxxx, the grayscale value changes from the second interval of the grayscale voltage range to the first interval, and the grayscale value changes from half of the grayscale voltage range. The trigger condition is met, and the output voltage V_SHOT of the trigger 40 changes from a low level to a high level. When the highest bit of the first grayscale value is the same as the highest bit of the second grayscale value, for example, the first grayscale value D1 and the second grayscale value D2 are both 1xxxxx, the grayscale value changes from half of the grayscale voltage range, and the trigger condition is not met. The output voltage V_SHOT of the trigger 40 remains at a low level.

[0058] In one embodiment, Figure 7 As shown, the trigger 40 includes two parallel judgment units, the first judgment unit is used to judge the highest bit of the grayscale value, and the second judgment unit is used to judge the second highest bit of the grayscale value. Each judgment unit includes a delay unit and a logic unit, and each judgment unit further inputs the total logic unit to obtain the variation range of the highest bit and the second highest bit of the grayscale value, and compares the variation range of the grayscale value with the preset range. Specifically, when the trigger 40 includes two judgment units, it is used to judge the highest two bits (i.e., the highest bit and the second highest bit) of the grayscale value. The grayscale voltage range includes four parts, such as Figure 8As shown, when the highest bit and the second highest bit of the first grayscale value are different from the highest bit and the second highest bit of the second grayscale value, for example, the first grayscale value D1 is 11xxxx and the second grayscale value D2 is 00xxxx, then the grayscale value changes from the fourth interval of the grayscale voltage range to the first interval, and the grayscale value changes from three quarters of the grayscale voltage range, exceeding one half of the grayscale voltage range, and the trigger condition is met, and the output voltage V_SHOT of the trigger 40 changes from a low level to a high level. When the highest bit of the first grayscale value is different from the highest bit of the second grayscale value and the second highest bit of the first grayscale value is the same as the second highest bit of the second grayscale value, for example, the first grayscale value D1 is 10xxxx and the second grayscale value D2 is 00xxxx, then the grayscale value changes from the third interval of the grayscale voltage range to the first interval, and the grayscale value changes from one half of the grayscale voltage range, and the trigger condition is met, and the output voltage V_SHOT of the trigger 40 changes from a low level to a high level. When the highest bit of the first grayscale value is the same as the highest bit of the second grayscale value and the second highest bit of the first grayscale value is different from the second highest bit of the second grayscale value, for example, the first grayscale value D1 is 11xxxx and the second grayscale value D2 is 10xxxx, then the variation range of the grayscale value is from the fourth interval of the grayscale voltage range to the third interval, and the variation range of the grayscale value is equal to one quarter of the grayscale voltage range and is less than one half of the grayscale voltage range. The trigger condition is not met, and the output voltage V_SHOT of the trigger 40 remains at a low level.

[0059] Exemplarily, based on the variation range of the grayscale value satisfying the trigger condition, the trigger outputs a positive pulse with a width equal to the delay time of the delay unit. Further, a single positive pulse is used to drive the second bias circuit to apply a second bias tail current of a preset time to the differential amplifier once.

[0060] In one embodiment, the second bias circuit 50 is used to apply a second bias tail current, ie, an additional bias tail current, to the differential amplifier 20. Figure 4 As shown, the second bias circuit 50 is connected to both ends of the input stage module of the differential amplifier 20 after merging with the first bias circuit 30 to apply the sum of the first bias tail current and the second bias tail current to the differential amplifier 20. Since the first bias tail current is a fixed bias tail current, the total bias tail current applied to the differential amplifier 20 changes with the change of the second bias current.

[0061] In one embodiment, when the variation range of the grayscale value satisfies the trigger condition, for example, when the grayscale voltage changes from the lower half to the upper half, or from the upper half to the lower half, the trigger 40 outputs a voltage V_SHOT as a positive pulse, wherein the width of the positive pulse is the delay time t_delay of the delay unit. The positive pulse can drive the second bias circuit 50 to turn on to apply the second bias tail current to the differential amplifier 20. Each time the trigger 40 outputs a positive pulse, the second bias circuit 50 turns on once to apply the second bias tail current to the differential amplifier 20, and the width of the positive pulse is the delay time of the delay unit, so the time duration for which the second bias circuit 50 applies the second bias tail current to the differential amplifier 20 is the delay time t_delay of the delay unit.

[0062] By applying an additional bias tail current to the differential amplifier 20, the total bias tail current applied to the differential amplifier 20 is increased. The increased bias tail current can drive the compensation capacitor Cc to complete level conversion faster, thereby improving the conversion rate of the differential amplifier.

[0063] Exemplarily, when the high level continues for a preset time period, the output signal of the trigger is converted from a high level to a low level.

[0064] In one embodiment, the width of the forward pulse is the delay time t_delay of the delay unit. The forward pulse can drive the second bias circuit 50 to turn on to apply the second bias tail current to the differential amplifier 20. When the second bias circuit 50 applies the second bias tail current to the differential amplifier 20 for a time period that reaches the delay time t_delay, the second bias circuit 50 is turned off and no longer applies the second bias tail current to the differential amplifier 20. Only the first bias circuit 30 continues to apply the first bias tail current to the differential amplifier 20. In this way, after the enhanced slew rate stage, the low level is restored, and the differential amplifier 20 restores the initial fixed bias tail current to save static power consumption.

[0065] In order to achieve the slew rate enhancement of the source amplifier, the method of increasing the fixed bias current or adding a transient enhancement analog circuit in the amplifier is usually adopted. However, increasing the fixed bias current will increase the power consumption of the amplifier, and the analog circuit is not only complex in structure but also increases the circuit area. The present invention generates an additional bias tail current through the coordinated control of the delay unit and the logic unit to provide a larger charge and discharge current in the grayscale conversion stage, improve the conversion rate, and will not significantly increase the power, thereby achieving a balance between the slew rate and power consumption. The delay unit and the logic unit have a simple structure, which avoids increasing the chip area occupied by the source drive circuit.

[0066] The present invention also provides a source drive circuit adjustment method, which is applied to the above-mentioned source drive circuit, referring to Fig. 9 As shown, the adjustment method comprises the following steps:

[0067] Step S901: obtaining a grayscale value and a variation range of the grayscale value;

[0068] Step S902: applying an additional bias tail current to the differential amplifier based on the variation range of the grayscale value satisfying a trigger condition.

[0069] In one embodiment, when the source driving circuit is powered on, the digital-to-analog converter 10 generates a grayscale voltage V+ from the N-bit grayscale value DATA[n-1:0] through a GAMMA nonlinear transformation, and the grayscale voltage V+ is input to the first input terminal (“+” input terminal) of the differential amplifier 20. The output terminal of the differential amplifier 20 generates an output voltage Vo, and the output voltage Vo of the differential amplifier 20 is input to the second input terminal (“-” input terminal) of the differential amplifier 20. The first bias circuit 30 applies a fixed bias tail current to the differential amplifier 20.

[0070] Next, step S901 is performed to obtain a grayscale value and a variation range of the grayscale value. The grayscale value variation range includes: obtaining a delayed first grayscale value and a non-delayed second grayscale value; and obtaining the grayscale value variation range based on the first grayscale value and the second grayscale value.

[0071] In one embodiment, only the highest bit of the grayscale value is judged, and the grayscale voltage range includes two parts, such as Figure 6 As shown, when the highest bit of the first grayscale value is different from the highest bit of the second grayscale value, for example, the first grayscale value D1 is 1xxxxx and the second grayscale value D2 is 0xxxxx, the variation range of the grayscale value is from the second interval of the grayscale voltage range to the first interval, and the variation range of the grayscale value is equal to half of the grayscale voltage range.

[0072] In one embodiment, the two highest bits (i.e., the highest bit and the second highest bit) of the grayscale value are judged, and the grayscale voltage range includes four parts, such as Figure 8As shown, when the highest bit and the second highest bit of the first grayscale value are different from the highest bit and the second highest bit of the second grayscale value, for example, the first grayscale value D1 is 11xxxx and the second grayscale value D2 is 00xxxx, then the grayscale value changes from the fourth interval of the grayscale voltage range to the first interval, and the grayscale value changes from three quarters of the grayscale voltage range. When the highest bit of the first grayscale value is different from the highest bit of the second grayscale value and the second highest bit of the first grayscale value is the same as the second highest bit of the second grayscale value, for example, the first grayscale value D1 is 10xxxx and the second grayscale value D2 is 00xxxx, then the grayscale value changes from the third interval of the grayscale voltage range to the first interval, and the grayscale value changes from one half of the grayscale voltage range. When the highest bit of the first grayscale value is the same as the highest bit of the second grayscale value and the second highest bit of the first grayscale value is different from the second highest bit of the second grayscale value, for example, the first grayscale value D1 is 11xxxx and the second grayscale value D2 is 10xxxx, then the variation range of the grayscale value is from the fourth interval of the grayscale voltage range to the third interval, and the variation range of the grayscale value is equal to one quarter of the grayscale voltage range.

[0073] Next, step S902 is performed to apply an additional bias tail current to the differential amplifier based on the variation range of the grayscale value satisfying a trigger condition, wherein the trigger condition is that the variation range of the grayscale value is greater than or equal to one half of the grayscale voltage range.

[0074] In one embodiment, when the variation range of the grayscale value is equal to one-half or three-quarters of the grayscale voltage range, the trigger condition is met; when the variation range of the grayscale value is equal to one-quarter of the grayscale voltage range, the trigger condition is not met. When the trigger condition is met, the trigger 40 outputs V_SHOT from a low level to a high level. Specifically, the trigger 40 outputs V_SHOT as a positive pulse, wherein the width of the positive pulse is the delay time t_delay of the delay unit. The positive pulse can drive the second bias circuit 50 to turn on to apply an additional bias tail current to the differential amplifier 20. Each time the trigger 40 outputs a positive pulse, the second bias circuit 50 is turned on once to apply an additional bias tail current to the differential amplifier 20. The width of the positive pulse is the delay time of the delay unit, so the duration of the second bias circuit 50 applying the additional bias tail current to the differential amplifier 20 is the delay time of the delay unit. When the trigger condition is not met, the trigger 40 outputs V_SHOT to maintain a low level, and the second bias circuit 50 is not turned on.

[0075] In one embodiment, when the trigger 40 outputs a high level for a preset time, the output signal of the trigger 40 is converted from a high level to a low level. When the output signal of the trigger 40 is a low level, no additional bias tail current is applied to the differential amplifier 20. Specifically, the width of the positive pulse output by the trigger 40 is the delay time t_delay of the delay unit. The positive pulse can drive the second bias circuit 50 to turn on to apply an additional bias tail current to the differential amplifier 20. When the second bias circuit 50 applies the second bias tail current to the differential amplifier 20 for a time period that reaches the delay time t_delay, the second bias circuit 50 is turned off and no longer applies the second bias tail current to the differential amplifier 20. At this time, only the first bias circuit 30 continues to apply the first bias tail current to the differential amplifier 20. Therefore, after the stage of applying an additional bias tail current to the differential amplifier 20 to enhance the slew rate, the differential amplifier 20 restores the initial fixed bias tail current.

[0076] The present invention also provides a display panel, such as Fig.10 As shown, the display panel includes a source driving circuit 1, a gate driving circuit 2 and a pixel array unit 3; the gate driving circuit 2 provides a scanning signal to the pixel array unit 3; the source driving circuit 1 provides a data signal to the pixel array unit 3; wherein the source driving circuit 1 is the source driving circuit 1 in the above embodiment.

[0077] In one embodiment, the display panel includes a common voltage drive, a gate drive, and a source drive. The common voltage drive is generally a GAMMA drive, which is used to output a common voltage VCOM signal, the gate drive is used to output a scan signal, and the source drive is used to output a data signal. When the display device is powered on to enable the display, the common voltage drive, the gate drive, and the source drive are usually simultaneously connected to the working signal. The display panel generally also includes a scan line and a data line. When the display panel is working, the scan line receives a scan signal from the drive device, and then turns on each sub-pixel row by row. At the same time, the data line receives a data signal from the drive device, and then charges the pixel electrode of each sub-pixel while each row of sub-pixels is turned on.

[0078] In one embodiment, the pixel array unit 3 includes first, second and third pixel units corresponding to the first, second and third colors, and the pixel array unit is provided with first, second and third pixel electrodes correspondingly. Specifically, the pixel array unit usually includes a plurality of sub-pixels of different colors, such as red sub-pixel R, green sub-pixel G, blue sub-pixel B, etc. A plurality of sub-pixels of different colors can form a display unit. The sub-pixels of various colors in a display unit cooperate so that the display unit can display any desired color. At the same time, all sub-pixels of the display panel are orderly arranged into multiple rows, and the number of sub-pixels in each row is multiple.

[0079] Since the display panel has the source driving circuit 1 in the above embodiment, it has all the beneficial effects of the source driving circuit 1 in the above embodiment, which will not be described in detail here.

[0080] According to the source driving circuit and its adjustment method, and the display panel provided by the present invention, by setting a trigger and an additional bias circuit, when the variation range of the grayscale value meets the trigger condition, an additional bias tail current is applied to the differential amplifier, thereby increasing the bias tail current of the differential amplifier and improving the output conversion rate of the differential amplifier. At the same time, since the increase in the bias tail current is only effective during the preset time, the power consumption of the driving circuit will not be increased additionally, thereby taking into account both the requirements of enhancing the slew rate and reducing the power consumption.

[0081] Please note that the above embodiments are for illustrative purposes only and are not intended to limit the present application.

[0082] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0083] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0084] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A source driving circuit, characterized in that: include: A digital-to-analog converter, used for acquiring a grayscale value and converting the grayscale value into a grayscale voltage; a differential amplifier, wherein a first input terminal of the differential amplifier is connected to the digital-to-analog converter to obtain the grayscale voltage; A first bias circuit, configured to apply a first bias tail current to the differential amplifier; A trigger, connected to the digital-to-analog converter, to obtain the grayscale value and the variation range of the grayscale value; The second bias circuit is connected to the trigger and applies a second bias tail current to the differential amplifier based on the variation range of the grayscale value satisfying a trigger condition.

2. The source driving circuit according to claim 1, characterized in that: The trigger includes at least one judgment unit, and the judgment unit includes a first branch and a second branch in parallel. The first branch is provided with a delay unit, and the first branch and the second branch are input to a logic unit.

3. The source driving circuit according to claim 2, characterized in that: The trigger includes a single judgment unit for judging the variation range of the highest bit of the grayscale value; or, The trigger includes two judgment units, which are respectively used to judge the variation range of the highest bit and the second highest bit of the grayscale value.

4. The source driving circuit according to claim 3, characterized in that: The trigger condition includes that the variation range of the grayscale value is greater than or equal to one half of the grayscale voltage range.

5. The source driving circuit according to claim 1, characterized in that: Based on the variation range of the grayscale value satisfying the trigger condition, the output signal of the trigger is converted from a low level to a high level, and when the output signal of the trigger is at a high level, a second bias tail current is applied to the differential amplifier; Based on the fact that the variation range of the grayscale value does not satisfy the trigger condition, the output signal of the trigger is at a low level. When the output signal of the trigger is at a low level, the second bias tail current is not applied to the differential amplifier.

6. The source driving circuit according to claim 5, characterized in that: When the high level continues for a preset time period, the output signal of the trigger is converted from a high level to a low level.

7. The source driving circuit according to claim 2, characterized in that: Based on the variation range of the grayscale value satisfying the trigger condition, the trigger outputs a positive pulse having a width equal to the delay duration of the delay unit.

8. The source driving circuit according to claim 7, characterized in that: The single positive pulse is used to drive the second bias circuit to apply a second bias tail current to the differential amplifier once, and the duration of applying the second bias tail current is the delay duration.

9. A method for adjusting a source driving circuit, applied to the source driving circuit according to any one of claims 1 to 8, the method comprising: Obtaining a grayscale value and a variation range of the grayscale value; An additional bias tail current is applied to the differential amplifier based on the variation range of the grayscale value satisfying a trigger condition.

10. A display panel, characterized in that: A source driving circuit comprising the source driving circuit as claimed in any one of claims 1 to 8.

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