Solid state disk and data processing method

Abstract

The invention discloses a solid-state disk and a data processing method. The solid state disk comprises a controller and a flash memory chip, the flash memory chip comprises a storage array and a feature maintaining device; the controller is used for sending an operation instruction to the flash memory chip; the feature maintaining device is used for obtaining or updating feature parameters of the storage array based on the operation instruction; the characteristic parameters comprise state parameters of the storage array and / or operation parameters of the storage array; the feature maintaining device is used for storing feature parameters or sending the feature parameters to the controller; wherein the feature parameter is used for the feature maintaining device or the controller to manage the storage array. The solid state disk can save resources of the controller and save overall power consumption.

Description

Technical Field

[0001] The present application relates to the field of storage technology, and in particular to a solid state drive and a data processing method. Background Art

[0002] A solid state drive (SSD) includes a controller and a flash memory chip. The flash memory chip is a plurality of NAND flash memories. In order to ensure the storage efficiency and storage reliability of data, it is necessary to maintain the reliability and read latency of the storage array in the flash memory chip, that is, it is necessary to manage the storage array. In this way, it is necessary to obtain characteristic parameters of the storage array, such as the read reference voltage and error number of the page in the power-on stage, to provide a basis for the management of the storage array.

[0003] Currently, the characteristic parameters of the storage array are maintained (obtained, updated, stored, etc.) by the controller, which brings a large overhead to the bandwidth, computing resources, and storage resources of the controller. Summary of the invention

[0004] The embodiments of the present application provide a solid-state hard disk and a data processing method, which can save controller resources and save the overall power consumption of the solid-state hard disk.

[0005] In a first aspect, a solid-state hard disk is provided, comprising: a controller and a flash memory chip; the flash memory chip comprises a storage array and a feature maintaining device; the controller is used to send operation instructions to the flash memory chip; the feature maintaining device is used to obtain or update feature parameters of the storage array based on the operation instructions; the feature parameters include state parameters of the storage array and / or operation parameters of the storage array; the feature maintaining device is used to store the feature parameters or send the feature parameters to the controller; wherein the feature parameters are used by the feature maintaining device or the controller to manage the storage array.

[0006] The solid-state drive does not need a controller to maintain the characteristic parameters of the storage array, thereby saving the bandwidth, computing resources, and storage resources of the solid-state drive controller and improving the reliability and efficiency of storage medium management. The flash memory chip of the solid-state drive maintains the characteristic parameters of the storage array, so that the relevant modules or components of the controller enter a low-power state, saving the energy consumption of the controller in the low-power state of the solid-state drive, and improving the energy-saving effect of the low-power state of the solid-state drive.

[0007] In one possible implementation, the operation instruction includes a first read reference voltage, the feature maintaining device is used to store the first read reference voltage, the first read reference voltage is used by the operation circuit in the flash memory chip to perform a read operation on a first set of storage cells in the storage array, and the first set of storage cells includes at least one storage cell.

[0008] In this implementation, the feature maintaining device can obtain and store the read reference voltage sent by the controller, so that the read instruction sent by the controller does not need to carry the read reference voltage to implement the read operation of the storage unit in the flash memory chip.

[0009] In one possible implementation, the operation instruction includes a voltage obtaining instruction; the feature maintaining device is used to respond to the voltage obtaining instruction, based on a preset second read reference voltage, perform a read operation on a first set of storage cells in the storage array to obtain a first read result, and the first storage cell set includes at least one storage cell; the feature maintaining device is used to obtain a first read reference voltage of the first storage cell set based on the second read reference voltage and the first read result; the feature maintaining device is used to store the first read reference voltage.

[0010] In this implementation, the feature maintaining device can operate the storage cells in the storage array, and based on the operation results, obtain and store the read reference voltage of the storage cells. Therefore, there is no need for the controller to configure the read reference voltage of the storage cells, and the read instructions sent by the controller do not need to carry the read reference voltage, so that the read operation of the storage cells in the flash memory chip can be implemented.

[0011] In one possible implementation, the storage array also includes a second storage cell set, the second storage cell set includes at least one storage cell, and the characteristic maintaining device is used to calculate the average value or maximum value of the read reference voltage of the second storage cell set and the first read reference voltage, and use the average value or maximum value to update the first read reference voltage.

[0012] In one possible implementation, a controller is used to send a read instruction to a flash memory chip, wherein the read instruction includes the addresses of one or more storage cells in a first storage cell set; an operating circuit is used to obtain the addresses of one or more storage cells from the read instruction; a feature maintaining device is used to respond to the read instruction and send a first read reference voltage to the operating circuit; the operating circuit is used to read data stored in one or more storage cells according to the first read reference voltage and the addresses of one or more storage cells; and the operating circuit sends the read data to the controller.

[0013] In this implementation, the feature maintaining device stores the read reference voltage of the storage unit, and the read instruction sent by the controller does not need to carry the read reference voltage, thereby saving the computing resources and bandwidth of the controller.

[0014] In a possible implementation, the first storage unit set includes any of the following: one or more pages in a storage array, one or more blocks in a storage array, and one or more planes in a storage array.

[0015] In this implementation, the feature maintaining device can maintain the feature parameters of the storage array at a page, block or plane granularity, thereby meeting the requirements for the feature parameters of the storage array in different scenarios.

[0016] In one possible implementation, the characteristic parameters include the number of reads; the characteristic maintaining device is used to update the number of reads of the storage unit corresponding to the read instruction when the operation instruction is confirmed to be a read instruction; and / or, the characteristic parameters include the number of erases; the characteristic maintaining device is used to update the number of erases of the storage unit corresponding to the read instruction when the operation instruction is confirmed to be an erase instruction.

[0017] In this implementation, the feature maintaining device can autonomously update the number of reads or erases of the storage unit, saving the computing resources, storage resources and bandwidth of the controller.

[0018] In a second aspect, a data processing method is provided, which is applied to a solid-state hard disk, wherein the solid-state hard disk comprises: a controller and a flash memory chip; the flash memory chip comprises a storage array and a feature maintenance device; the method comprises: the controller sends an operation instruction to the flash memory chip; the feature maintenance device obtains or updates the feature parameters of the storage array based on the operation instruction; the feature parameters comprise the state parameters of the storage array and / or the operation parameters of the storage array; the feature maintenance device stores the feature parameters or sends the feature parameters to the controller; wherein the feature parameters are used by the feature maintenance device or the controller to manage the storage array.

[0019] In one possible implementation, an operation instruction includes a first read reference voltage; a feature maintaining device obtains or updates a feature parameter of a storage array based on the operation instruction, including: the feature maintaining device obtains the first read reference voltage from the operation instruction; the feature maintaining device stores the feature parameter or sends the feature parameter to a controller, including: the feature maintaining device stores the first read reference voltage, the first read reference voltage is used for an operation circuit in a flash memory chip to perform a read operation on a first set of storage cells in the storage array, the first set of storage cells including at least one storage cell.

[0020] In one possible implementation, the operation instruction includes a voltage obtaining instruction; the feature maintaining device obtains or updates the feature parameters of the storage array based on the operation instruction, including: the feature maintaining device responds to the voltage obtaining instruction, and based on a preset second read reference voltage, performs a read operation on a first set of storage cells in the storage array to obtain a first read result, and the first storage cell set includes at least one storage cell; the feature maintaining device obtains a first read reference voltage of the first storage cell set based on the second read reference voltage and the first read result; the feature maintaining device stores the feature parameters or sends the feature parameters to the controller, including: the feature maintaining device stores the first read reference voltage.

[0021] In one possible implementation, the storage array also includes a second storage cell set, the second storage cell set includes at least one storage cell, and the method also includes: calculating the average or maximum value of the read reference voltage of the second storage cell set and the first read reference voltage, and using the average or maximum value to update the first read reference voltage.

[0022] In one possible implementation, the method also includes: the controller sends a read instruction to the flash memory chip, the read instruction includes the address of one or more storage cells in the first storage cell set; the operating circuit obtains the address of the one or more storage cells from the read instruction; the feature maintaining device responds to the read instruction and sends a first read reference voltage to the operating circuit; the operating circuit reads the data stored in the one or more storage cells according to the first read reference voltage and the address of the one or more storage cells; and the operating circuit sends the read data to the controller.

[0023] In a possible implementation, the first storage unit set includes any of the following: one or more pages in a storage array, one or more blocks in a storage array, and one or more planes in a storage array.

[0024] In one possible implementation, the method further includes: the characteristic parameters include a read count; the characteristic maintenance device obtains or updates the characteristic parameters of the storage array based on the operation instruction, including: when the characteristic maintenance device confirms that the operation instruction is a read instruction, the characteristic maintenance device updates the read count of the storage unit corresponding to the read instruction; and / or, the characteristic parameters include an erase count; the characteristic maintenance device obtains or updates the characteristic parameters of the storage array based on the operation instruction, including: when the characteristic maintenance device confirms that the operation instruction is an erase instruction, the characteristic maintenance device updates the erase count of the storage unit corresponding to the read instruction.

[0025] According to a third aspect, a data processing method is provided, which is applied to a flash memory chip in a solid-state hard disk, wherein the solid-state hard disk also includes: a controller; the flash memory chip includes a storage array and a feature maintenance device; the method includes: the feature maintenance device obtains an operation instruction sent by the controller; the feature maintenance device obtains or updates feature parameters of the storage array based on the operation instruction; the feature parameters include state parameters of the storage array and / or operation parameters of the storage array; the feature maintenance device stores the feature parameters or sends the feature parameters to the controller; wherein the feature parameters are used by the feature maintenance device or the controller to manage the storage array.

[0026] In one possible implementation, an operation instruction includes a first read reference voltage; a feature maintaining device obtains or updates a feature parameter of a storage array based on the operation instruction, including: the feature maintaining device obtains the first read reference voltage from the operation instruction; the feature maintaining device stores the feature parameter or sends the feature parameter to a controller, including: the feature maintaining device stores the first read reference voltage, the first read reference voltage is used for an operation circuit in a flash memory chip to perform a read operation on a first set of storage cells in the storage array, the first set of storage cells including at least one storage cell.

[0027] In one possible implementation, the operation instruction includes a voltage obtaining instruction; the feature maintaining device obtains or updates the feature parameters of the storage array based on the operation instruction, including: the feature maintaining device responds to the voltage obtaining instruction, and based on a preset second read reference voltage, performs a read operation on a first set of storage cells in the storage array to obtain a first read result, and the first storage cell set includes at least one storage cell; the feature maintaining device obtains a first read reference voltage of the first storage cell set based on the second read reference voltage and the first read result; the feature maintaining device stores the feature parameters or sends the feature parameters to the controller, including: the feature maintaining device stores the first read reference voltage.

[0028] In one possible implementation, the storage array also includes a second storage cell set, the second storage cell set includes at least one storage cell, and the method also includes: calculating the average or maximum value of the read reference voltage of the second storage cell set and the first read reference voltage, and using the average or maximum value to update the first read reference voltage.

[0029] In one possible implementation, the method also includes: the feature maintaining device obtains a read instruction sent by the controller, the read instruction includes the address of one or more storage cells in the first storage cell set; the operation circuit is used to obtain the address of one or more storage cells from the read instruction; the feature maintaining device responds to the read instruction and sends a first read reference voltage to the operation circuit; the operation circuit is used to read the data stored in the one or more storage cells according to the first read reference voltage and the address of one or more storage cells; the operation circuit is used to send the read data to the controller.

[0030] In a possible implementation, the first storage unit set includes any of the following: one or more pages in a storage array, one or more blocks in a storage array, and one or more planes in a storage array.

[0031] In one possible implementation, the method further includes: the characteristic parameters include a read count; the characteristic maintenance device obtains or updates the characteristic parameters of the storage array based on the operation instruction, including: when the characteristic maintenance device confirms that the operation instruction is a read instruction, the characteristic maintenance device updates the read count of the storage unit corresponding to the read instruction; and / or, the characteristic parameters include an erase count; the characteristic maintenance device obtains or updates the characteristic parameters of the storage array based on the operation instruction, including: when the characteristic maintenance device confirms that the operation instruction is an erase instruction, the characteristic maintenance device updates the erase count of the storage unit corresponding to the read instruction.

[0032] In a fourth aspect, a computing device is provided, comprising a processor and the solid-state drive provided in the first aspect.

[0033] In a fifth aspect, a computer storage medium is provided, the computer storage medium comprising computer instructions, and when the computer instructions are executed on a controller of a storage device, the controller executes the method provided in the third aspect.

[0034] In a sixth aspect, a computer program product is provided, wherein when the program code contained in the computer program product is executed by a controller in a storage device, the method provided in the third aspect is implemented.

[0035] The beneficial effects of the second to sixth aspects can be referred to the above introduction to the beneficial effects of the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 is a structural schematic diagram of a solid state hard disk;

[0037] Figure 2 A flowchart of a data processing method provided in an embodiment of the present application;

[0038] Figure 3 A schematic diagram of sending an operation instruction provided in an embodiment of the present application;

[0039] Figure 4 A flowchart of a data processing method provided in an embodiment of the present application;

[0040] Figure 5 A schematic diagram of sending an operation instruction is provided for the embodiment of the present application;

[0041] Figure 6 A flowchart of a data processing method provided in an embodiment of the present application; DETAILED DESCRIPTION

[0042] The following will describe the solution provided by the embodiment of the present application in conjunction with the accompanying drawings. In the embodiment of the present application, "multiple" refers to two or more than two.

[0043] The characteristic parameters of the storage array are used to provide a basis for the management of the storage array in the flash memory chip, so that the management of the storage array can be realized.

[0044] The state parameters of the storage array may be included. The state parameters of the storage array refer to parameters indicating the state of the storage array, such as parameters indicating the state of one or more storage cells in the storage array. Exemplarily, the state of one or more storage cells may be a read count, an erase count, etc. of the one or more storage cells.

[0045] The characteristic parameters of the memory array may also include the operating parameters of the memory array. The operating parameters of the memory array refer to the parameters related to the memory cells in the operating parameters of the memory array, such as the read reference voltage and write reference voltage of the memory cells.

[0046] Maintaining the characteristic parameters of the storage array refers to obtaining, updating and storing the characteristic parameters of the storage array.

[0047] The characteristic parameters of the storage array are maintained by the controller in the solid-state drive, and the controller needs to constantly interact with the controller flash chip in the solid-state drive to read the characteristic-related data of the storage array. Then, the characteristic-related data is analyzed to obtain and store the characteristic parameters of the storage array. As the number and capacity of flash memory in the flash chip increase, the bandwidth used by the controller to obtain characteristic-related data, the computing resources used to analyze characteristic-related data, and the storage resources used to store characteristic parameters are becoming more and more expensive. In particular, since the storage resources of the SSD controller in the terminal product are relatively tight, the size of the table items used to store the characteristic parameters of the storage array is limited, which affects the reliability and efficiency of storage array management.

[0048] In addition, the characteristic parameters of the storage array are maintained by the controller, which requires that when the SSD is in a low power state, the modules in the controller used to maintain the characteristic parameters of the storage array (for example, random access memory (RAM), processor, instruction interaction module (NAND Flash interface, NFI), physical interface (physics, PHY)) must also remain in a working state, which increases the energy consumption of the SSD in the low power state and reduces the energy-saving effect of the SSD in the low power state.

[0049] The embodiment of the present application provides a solid-state drive 100. The flash memory chip of the solid-state drive 100 can maintain the characteristic parameters of the storage array, and the solid-state drive controller does not need to maintain the characteristic parameters of the storage array, thereby saving the bandwidth, computing resources, and storage resources of the solid-state drive controller, and improving the reliability and efficiency of storage medium management. In addition, the flash memory chip of the solid-state drive maintains the characteristic parameters of the storage array, so that the RAM, processor, NFI, and PHY of the controller enter a low-power state, saving the energy consumption of the controller in the low-power state of the SSD, and improving the energy-saving effect of the low-power state of the solid-state drive.

[0050] Next, the solid state drive 100 will be described in detail.

[0051] Figure 1 FIG. 1 shows a structure of a solid state drive 100. Figure 1 As shown, the solid state drive 100 includes a controller 120 and one or more flash memory chips (die) 110. The one or more flash memory chips 110 can be packaged as a storage medium of the solid state drive 100.

[0052] The flash memory chip 110 is a component in the solid state drive 100 for storing business data. The business data is specifically stored in the storage array 111 of the flash memory chip 110. Figure 1 As shown, the flash memory chip 110 is composed of a plurality of planes (p lanes). A plane is composed of a plurality of blocks (blocks). A block is composed of a plurality of pages (pages). A page is composed of a plurality of storage units. Among them, a storage unit can be used to store one or more bits.

[0053] like Figure 1 As shown, the flash memory chip 110 may include a feature maintaining device 112. The feature maintaining device 112 is a feature self-maintenance (FSM) component of the flash memory chip 110, and is used to maintain the feature parameters of the storage array 111 in the flash memory chip 110. The details will be introduced below and will not be repeated here.

[0054] The feature maintaining device 112 includes a computing module and a storage module. The computing module is used to execute computing logic. For example, the computing module can parse the operation instruction (command) sent by the controller 120, and obtain or update the characteristic parameters of the storage array 111 based on the operation instruction. For another example, the computing module can manage the storage array 111 based on the characteristic parameters of the storage array 111. For another example, the computing module has the ability to count, calculate average values, calculate maximum values, and calculate minimum values. And so on. The storage module can be used as the memory or cache of the computing module to store the intermediate data and calculation results in the calculation process of the computing module. For example, the storage module is used to store the characteristic parameters obtained or updated by the computing module.

[0055] In some embodiments, the computing module may be a logic circuit with computing capability. In some embodiments, the computing module may be a hardware circuit with computing capability. In some embodiments, the computing module may be a microcontroller unit (MCU) or a functional module in the MCU.

[0056] The storage module may be a volatile memory or a non-volatile memory. In some embodiments, the storage module may be one or more storage units in the storage array 111. That is, one or more storage units in the storage array 111 may be used as a storage module. Exemplarily, the one or more storage units may be located in the same page or in different pages. Exemplarily, the one or more storage units may be located in the same block or in different blocks. Exemplarily, the one or more storage units may be located in the same plane or in different planes. In some embodiments, the storage module may be a RAM, a cache, or a register.

[0057] Continue reading Figure 1 The flash memory chip 110 includes an interface 113. The interface 113 is used for data exchange between the flash memory chip 113 and the controller 120. For example, the flash memory chip 113 receives an operation instruction sent by the controller 120 through the interface 113. For another example, the flash memory chip 113 sends characteristic parameters of the storage array 111, read business data, etc. through the interface 113.

[0058] The flash memory chip 110 includes an operation circuit 114. The operation circuit 114 may be a sensing circuit. The operation circuit 114 is used to perform a data read operation and / or a data write operation on the storage array 111. The data read operation may be referred to as a read operation, and the data write operation may be referred to as a write operation.

[0059] like Figure 1As shown, the controller 120 may include a management device 121 and an interface 122 .

[0060] The management device 121 may trigger the feature maintenance device 112 to obtain or update the feature parameters of the storage array. In some embodiments, the management device 121 may be a medium maintenance module (NAND maintenance, NMT). Since the feature maintenance device 112 is used to maintain the feature parameters of the storage array 111, part of the function of the management device 121 in maintaining the feature parameters of the storage array may be replaced by the feature maintenance device 112.

[0061] The interface 122 is used for data exchange between the controller 120 and the flash memory chip 110. For example, the controller 120 sends an operation instruction to the flash memory chip 110 through the interface 122. For another example, the controller 120 receives characteristic parameters of the storage array 111, read business data, etc. sent by the flash memory chip through the interface 122. In some embodiments, the interface 122 can be an NFI.

[0062] The above example introduces the structure of the solid state drive 100. Next, the implementation process of the feature maintaining device 112 maintaining the feature parameters of the storage array 111 is introduced in conjunction with the solid state drive 100.

[0063] See also Figure 2 In step 201 , the controller 121 may send an operation instruction to the flash memory chip 110 .

[0064] The operation instruction may be an FSM-related instruction or other instructions. The FSM-related instruction refers to an instruction that can trigger the characteristic maintaining device 112 to maintain the characteristic parameters of the storage array 111 .

[0065] In some embodiments, the FSM-related instructions may be input output (IO) instructions, such as read instructions and erase instructions, wherein the IO instructions may be issued by the flash translation layer (FTL) in the controller 120 and pass through the IO path and the interface 122 before reaching the flash memory chip 110.

[0066] In some embodiments, the FSM-related instructions may be FSM configuration instructions. The FSM configuration instructions are used to configure the working mode of the feature maintenance device 112 (i.e., the working mode of maintaining the characteristic parameters of the storage array), for example, the accuracy (granularity) of calculating and storing the read reference voltage, and the calculation method of the read reference voltage (such as averaging, taking the maximum value, etc.). In some embodiments, the FSM-related instructions may be FSM impel instructions, for example, instructions to indicate that the feature self-maintaining device 112 obtains the read reference voltage. Among them, the FSM configuration instructions and the FSM impel instructions may be issued by the management module 121 and reach the flash memory chip 110 through the interface 122.

[0067] In some embodiments, the operation instruction may be issued by the management device 121 .

[0068] In some embodiments, the controller 121 sends an operation instruction to the flash memory chip 110 through the interface 122 .

[0069] In some embodiments, the operation instruction may be a command. In some embodiments, the operation instruction may be a pin operation.

[0070] In step 202, the feature maintaining device 112 obtains or updates the feature parameters of the storage array 111 based on the operation instruction. In step 202, the feature maintaining device 112 first determines whether the operation instruction is an FSM-related instruction. If the operation instruction is an FSM-related instruction, the feature maintaining device 112 executes step 202.

[0071] In some embodiments, the interface 113 may receive an operation instruction sent by the controller 120 . The feature maintaining device 112 may obtain the operation instruction from the interface 113 .

[0072] In some embodiments, in step 202, the characteristic parameters obtained or updated by the characteristic maintaining device 111 are state parameters of the storage array, such as the number of reads, the number of erases, the number of errors, etc. The number of reads may also be referred to as a read count, and the number of erases may also be referred to as an erase count. The number of errors refers to the number or proportion of erroneous data in the data read from the storage array 111 by the operating circuit 114.

[0073] In some embodiments, see Figure 3 , the operation instruction may be set as an IO instruction, and in step 202, the feature maintaining device 112 may update the IO times of the storage unit corresponding to the read instruction. The IO times may also be referred to as an IO count.

[0074] In step 202, the feature maintenance device 112 can update the IO count of the storage unit corresponding to the IO instruction. The IO instruction includes an IO address, which is the address of one or more storage units. The IO instruction is used to read or erase data in the one or more storage units. Among them, the one or more storage units are the storage units corresponding to the IO instruction. In other words, the storage unit corresponding to the address included in the IO instruction can be called the storage unit corresponding to the IO instruction. Among them, the storage unit corresponding to the IO instruction can be a storage unit in one or more pages (that is, IO corresponds to one or more pages, and the granularity of IO counting is page), or a storage unit in one or more blocks (that is, IO corresponds to one or more blocks, and the granularity of IO counting is block), or a storage unit in one or more planes (that is, IO corresponds to one or more planes, and the granularity of IO counting is plane).

[0075] In one example, the IO instruction is a read instruction, and accordingly, the IO times are read times or read counts (readcnt). In step 202, the feature maintenance device 112 updates the read times or read counts of the storage unit corresponding to the read instruction when confirming that the operation instruction or the IO instruction is a read instruction. In one example, the IO instruction is an erase instruction, and accordingly, the IO times are erase times or erase counts. In step 202, the feature maintenance device 112 updates the read times or read counts of the storage unit corresponding to the read instruction when confirming that the operation instruction or the IO instruction is an erase instruction.

[0076] In some embodiments, step 201 and step 202 may be performed by Figure 4 The process shown is implemented.

[0077] Before step 201, the controller 120 may configure the granularity of the feature parameters and the feature maintenance range in step 401. The granularity may be a storage unit, page, block or plane. That is, the feature maintenance device 112 obtains or updates the feature parameters according to the storage unit, page, block or plane. That is, in step 202, the feature parameters obtained or updated are the feature parameters of a certain storage unit, a certain page, a certain block or a certain plane. The feature maintenance range is the working range of the feature maintenance device 112, that is, which storage array range the feature parameters of the storage array are maintained by the feature maintenance device 112. Exemplarily, the feature maintenance range is the entire storage array 111.

[0078] Step 201: the controller 120 sends an operation instruction to the flash memory chip 110. After obtaining the operation instruction, the feature maintaining device 112 may execute step 202. Figure 4 As shown, step 202 may include the following sub-steps.

[0079] In step 2021, the feature maintaining device 112 may determine whether the operation instruction is an FSM-related instruction, that is, determine whether the operation instruction is the IO instruction, FSM configuration instruction or FSM excitation instruction mentioned above.

[0080] If the operation instruction is not an FSM-related instruction, the feature maintaining device 112 executes step 2026 to instruct the operation circuit 114 to execute the operation instruction and return the execution result to the controller 120 .

[0081] If the operation instruction is an FSM related instruction, the feature maintaining device 112 determines whether the operation instruction is an FSM configuration instruction in step 2022. If the operation instruction is an FSM configuration instruction, the feature maintaining device 112 may execute step 2027 to store the operation parameters carried by the operation instruction.

[0082] If the operation instruction is an FSM related instruction but not an FSM configuration instruction, the feature maintaining device 112 determines in step 2023 whether the operation instruction is an erase instruction.

[0083] If the operation instruction is an erase instruction, the feature maintaining device 112 may, in step 2028, clear the read count of the storage unit corresponding to the erase instruction and add 1 to the erase count of the storage unit corresponding to the erase instruction to update the read count and erase count of the storage unit corresponding to the erase instruction.

[0084] If the operation instruction is not an erase instruction, it means that the operation instruction is a read instruction. Then, in step 2024, it is determined whether the operation instruction is a read instruction corresponding to the storage unit i. In other words, in step 2024, the storage unit corresponding to the operation instruction is determined.

[0085] If the storage unit corresponding to the operation instruction is storage unit i, then the number of reads of storage unit i is increased by 1 to obtain the updated number of reads of storage unit i. If storage unit i is a storage unit in one or more pages, that is, the operation instruction corresponds to one or more pages, then in step 2029, the number of reads of the one or more pages is increased by 1 to obtain the updated number of reads of the one or more pages. If storage unit i is a storage unit in one or more blocks, that is, the operation instruction corresponds to one or more blocks, then in step 2029, the number of reads of the one or more blocks is increased by 1 to obtain the updated number of reads of the one or more blocks. If storage unit i is a storage unit in one or more planes, that is, the operation instruction corresponds to one or more planes, then in step 2029, the number of reads of the one or more planes is increased by 1 to obtain the updated number of reads of the one or more planes.

[0086] If the storage unit corresponding to the operation instruction is not the storage unit i, then in step 2025, the read count of the storage unit i is maintained unchanged.

[0087] Thus, through the above method, the feature maintaining device 112 can update the read count or erase count of the storage unit corresponding to the operation instruction.

[0088] In some embodiments, see Figure 5 The operation instruction sent in step 201 may be a FSM configuration instruction. The FSM configuration instruction may be issued by the management device 121. In step 202, the feature maintaining device 111 may configure the working mode of the feature maintaining device 111 based on the FSM configuration instruction.

[0089] In one example, the FSM configuration instruction indicates a storage cell set, so that the working mode of the feature maintenance device 112 uses the storage cell set as the granularity to calculate and store the precision (granularity) of the read reference voltage. A storage cell set may be composed of storage cells in one or more pages, or storage cells in one or more blocks, or storage cells in one or more planes.

[0090] In one example, the FSM configuration instruction indicates a calculation method of the read reference voltage, such as averaging, taking a maximum value, etc. Thus, the characteristic maintaining device 112 calculates the read reference voltage of the memory cell set by averaging or taking a maximum value.

[0091] In some embodiments, see Figure 5 The operation instruction sent in step 201 may be a FSM excitation instruction. The FSM excitation instruction may be issued by the management device 121. In step 202, the feature maintenance device 112 may obtain or update the feature parameters of the storage array 111 based on the FSM excitation instruction.

[0092] In one example, the FSM excitation instruction sent in step 201 is specifically a voltage obtaining instruction. In step 202, the feature maintaining device 112 can respond to the voltage obtaining instruction and instruct the operating circuit 114 to perform a read operation on the first storage cell set in the storage array 111 based on a preset second read reference voltage to obtain a first read result; the feature maintaining device 112 obtains the first read result from the operating circuit 114, and obtains and stores the first read reference voltage of the storage cell set based on the second read reference voltage and the first read result. The storage cell set is the storage cell corresponding to the voltage obtaining instruction, and the first read reference voltage is used for the operating circuit 114 to perform a read operation on the storage cell set.

[0093] The first storage cell set may be any storage cell set in the storage array 111. The first storage cell set may be storage cells in one or more pages, that is, the first read reference voltage is used to operate the circuit to perform a read operation on the one or more pages (that is, the granularity of the first read reference voltage is one or more pages). The storage cell set may be storage cells in one or more blocks, that is, the first read reference voltage is used to operate the circuit to perform a read operation on the one or more blocks (that is, the granularity of the first read reference voltage is one or more blocks). The storage cell set may be storage cells in one or more planes, that is, the first read reference voltage is used to operate the circuit 114 to perform a read operation on the one or more planes (that is, the granularity of the first read reference voltage is one or more planes).

[0094] The second read reference voltage includes a plurality of voltage pairs, each voltage pair includes a low voltage and a high voltage. The high voltage is a preset voltage that can ensure that a bit flip occurs in the storage unit. In the same voltage pair, the low voltage is lower than the high voltage. The operation circuit 114 uses the low voltage and the high voltage of each voltage pair in the plurality of voltage pairs to perform a read operation on the storage unit set, respectively, to obtain a read result of the low voltage and a read result of the high voltage in the voltage pair. The first read result includes a read result of the low voltage and a read result of the high voltage of each voltage pair in the plurality of voltage pairs.

[0095] The reading result of the low voltage and the reading result of the high voltage of the voltage pair can be compared to obtain the number of errors corresponding to the voltage pair. Specifically, the number of inconsistent bits in the two reading results is the bit flip number. Among them, the bit flip number can represent or reflect the level of the bit error number. In the following description, the bit flip number can also be referred to as the bit error number or the error number. One voltage pair can obtain a read error number, and multiple voltage pairs can obtain multiple error numbers. The multiple voltage pairs correspond to the multiple error numbers one by one.

[0096] The feature maintaining device 112 can compare the multiple error numbers to obtain the minimum error number among the multiple error numbers. Then, the feature maintaining device 112 uses the low voltage of the voltage pair corresponding to the minimum error number as the first read reference voltage (ie, the read reference voltage of the first storage unit).

[0097] In one example, the FSM excitation instruction sent in step 201 is specifically a voltage obtaining instruction. In step 202, the feature maintaining device 112 can respond to the voltage obtaining instruction and instruct the operation circuit 114 to perform a read operation on each storage cell in the first storage cell set in the storage array 111 based on a preset third read reference voltage to obtain a read result of each storage cell; the feature maintaining device 112 obtains the read result of each storage cell from the operation circuit 114, and obtains the read reference voltage of each storage cell based on the read result of each storage cell and the third read reference voltage. Then, the read reference voltages of the storage cells in the first storage cell set are averaged or calculated as the maximum value; and the calculated average value or maximum value is used as the read reference voltage of the first storage cell set. The feature maintaining device 112 can store the read reference voltage of the first storage cell set.

[0098] More specifically, the third read reference voltage includes a plurality of voltage pairs, each of which includes a low voltage and a high voltage. The high voltage is a preset voltage that can ensure that the memory cell undergoes a bit flip. In the same voltage pair, the low voltage is lower than the high voltage. The operation circuit 114 uses the low voltage and the high voltage of each voltage pair in the plurality of voltage pairs to perform a read operation on the same memory cell, respectively, and obtains the read result of the low voltage and the read result of the high voltage in the voltage pair. It is determined whether the read result of the low voltage is consistent with the read result of the high voltage. If they are consistent, it can be confirmed that the low voltage in the voltage pair is a candidate read reference voltage for the memory cell. If they are inconsistent, the voltage pair is discarded. In the above manner, using a plurality of voltage pairs, at least one candidate read reference voltage for the memory cell may be obtained. Then, the minimum voltage among the at least one candidate read reference voltage is used as the read reference voltage for the memory cell. In this way, the read reference voltage of each memory cell in the first memory cell set can be obtained.

[0099] In the above manner, the feature maintaining device 112 can obtain the read reference voltage of the first storage cell set. The feature maintaining device 112 can also store the read reference voltage of the first storage cell set. The read reference voltage of the storage cell set is used to perform a read operation on any one or more storage cells in the storage cell set. That is, when performing a read operation on any one or more storage cells in the storage cell set, the read reference voltage of the storage cell set can be used to perform a read operation on the one or more storage cells.

[0100] In one example, the memory array 111 further includes at least one memory cell set other than the first memory cell set, such as a second memory cell set. Referring to the method of obtaining the read reference voltage of the first memory cell set, the read reference voltage of the second memory cell set can be obtained. After obtaining the read reference voltage of the second memory cell set, the feature maintaining device 112 can update the read reference voltage of the first memory cell set and the read reference voltage of the second memory cell set based on the configured calculation method of the read reference voltage.

[0101] In one example, the calculation method of the configured read reference voltage can be set to find the average value, then the feature maintaining device 112 calculates the average value of the read reference voltage of the first storage cell set and the read reference voltage of the second storage cell set, and uses the calculated average value as the read reference voltage of the first storage cell set and the read reference voltage of the second storage cell set, so as to update the read reference voltage of the first storage cell set and the read reference voltage of the second storage cell set. Among them, the feature maintaining device 112 only needs to store the average value. The average value is both the read reference voltage of the first storage cell set and the read reference voltage of the second storage cell set. That is, the average value is used to perform a read operation on the storage cells in the first storage cell set and also used to perform a read operation on the storage cells in the second storage cell set.

[0102] In one example, the calculation method of the configured read reference voltage can be set to take the maximum value, and the feature maintaining device 112 compares the read reference voltage of the first storage cell set and the read reference voltage of the second storage cell set to obtain the maximum value of the read reference voltage of the first storage cell set and the read reference voltage of the second storage cell set. The maximum value is used as the read reference voltage of the first storage cell set and the read reference voltage of the second storage cell set to update the read reference voltage of the first storage cell set or the read reference voltage of the second storage cell set. Among them, the feature maintaining device 112 only needs to store the maximum value, which is both the read reference voltage of the first storage cell set and the read reference voltage of the second storage cell. That is, the maximum value is used to perform a read operation on the storage cells in the first storage cell set and also used to perform a read operation on the storage cells in the second storage cell set.

[0103] Thus, whenever the controller 120 needs to read data in the first storage unit set, the read instruction sent to the flash memory chip 110 only needs to carry the address of the storage unit to be read (one or more storage units in the first storage unit set), and does not need to carry the read reference voltage. This can save bandwidth overhead between the controller 120 and the flash memory chip 110, and save computing resources of the controller 120.

[0104] Specifically, the controller 120 sends a read instruction to the flash memory chip 110, and the read instruction includes the address of one or more storage cells in the storage cell set. The operation circuit 114 is used to obtain the address of the one or more storage cells from the read instruction. The feature maintenance device 112 is used to respond to the read instruction and send the first read reference voltage stored by the feature maintenance device 112 (i.e., the read reference voltage of the storage cell set) to the operation circuit 114. The operation circuit 114 reads the data stored in the one or more storage cells according to the first read reference voltage and the address of the one or more storage cells. The operation circuit 114 sends the read result to the controller 120.

[0105] In one example, the FSM excitation instruction sent in step 201 is specifically a voltage update instruction. The voltage update instruction carries a read reference voltage. Among them, the voltage update instruction can be an instruction for the first storage unit set. When the feature maintenance device 112 receives the voltage update instruction, it can parse the voltage update instruction, obtain the read reference voltage, and store the read reference voltage as the read reference voltage of the first storage unit set. In one example, it can be set that the feature maintenance device 112 has stored the read reference voltage of the first storage unit set before receiving the voltage update instruction. Then, after receiving the voltage update instruction, the read reference voltage of the first storage unit set can be updated according to the configured calculation method of the read reference voltage based on the voltage update instruction and the stored read reference voltage of the first storage unit set.

[0106] In one example, the calculation method of the configured read reference voltage can be set to find the average value, then the feature maintaining device 112 calculates the average value of the stored read reference voltage of the first storage cell set and the read reference voltage in the voltage update instruction, and stores the calculated average value as the read reference voltage of the first storage cell set, thereby realizing the update of the read reference voltage of the first storage cell set.

[0107] In one example, the calculation method of the configured read reference voltage can be set to take the maximum value, then the feature maintaining device 112 takes the maximum value of the stored read reference voltage of the first storage cell set and the read reference voltage in the voltage update instruction, and stores the maximum value as the read reference voltage of the first storage cell set, thereby realizing the update of the read reference voltage of the first storage cell set.

[0108] In one example, the voltage update instruction may be a read instruction carrying a read reference voltage. After updating the read reference voltage of the first storage unit set, the feature maintaining device 112 instructs the operation circuit 114 to perform a read operation on the storage units in the first storage unit set according to the updated read reference voltage.

[0109] In one example, the FSM excitation instruction sent in step 201 is specifically an error number obtaining instruction. The error number reading instruction corresponds to one or more storage units. The one or more storage units may be storage units in one or more pages, that is, the error number obtaining instruction is used to obtain the number of read errors of one or more pages (that is, the granularity of obtaining the number of read errors is one or more pages). The one or more storage units may be storage units in one or more blocks, that is, the error number obtaining instruction is used to obtain the number of read errors of one or more blocks (that is, the granularity of obtaining the number of read errors is one or more blocks). The one or more storage units may be storage units in one or more planes, that is, the error number obtaining instruction is used to obtain the number of read errors of one or more planes (that is, the granularity of obtaining the number of read errors is one or more planes).

[0110] In step 202, the feature maintaining device 112 responds to the error number obtaining instruction, instructs the operation circuit 114 to perform a read operation on one or more storage cells in the storage array 111 based on a preset third read reference voltage to obtain a second read result; and instructs the operation circuit 114 to perform a read operation on the one or more storage cells based on the read reference voltage of the one or more storage cells to obtain a third read result. Wherein, the third read reference voltage is greater than the read reference voltage of the one or more storage cells. Then, in step 202, the feature maintaining device 112 obtains the second read result and the third read result from the operation circuit, and obtains the read error number of the one or more storage cells based on the second read result and the third read result. After obtaining the read error number of the one or more storage cells, the feature maintaining device 112 can store the read error number, or send the read error number to the controller 120.

[0111] The number of read errors may be referred to as the number of errors. The number of errors of a storage unit refers to the number of error bits in the reading result when the data stored in the storage unit is read according to the read reference voltage of the storage unit. Among them, the error bit refers to the bit that is not flipped during the reading process. This situation is usually caused by insufficient reading reference voltage, resulting in some bits not being flipped during the reading process. The third reading reference voltage is greater than the reading reference voltage indicating one or more storage units. The one or more storage units are read according to the third reading reference voltage, which can ensure that the bits stored in the one or more storage units are flipped. Therefore, by comparing the number of inconsistent bits between the second reading result and the third reading result, the number of errors of the one or more storage units can be obtained.

[0112] In the above, the number of errors of the storage cell, the read reference voltage of the storage cell, the number of reads of the storage cell, the number of erases of the storage cell, etc. obtained by the characteristic maintaining device 112 are all characteristic parameters of the storage cell. The storage cell is a storage cell in the storage array 111, so the characteristic parameters of the storage cell belong to the characteristic parameters of the storage array 111. That is to say, through the scheme described above, the characteristic maintaining device 112 can obtain the characteristic parameters of the storage array 111.

[0113] Continue to refer Figure 2 In step 203, the characteristic maintaining device 112 may store the characteristic parameters of the storage array 111, or send the characteristic parameters of the storage array 111 to the controller.

[0114] The characteristic parameters of the storage array 111 are used by the characteristic maintaining device 112 or the controller 120 to manage the storage array 111 .

[0115] In one example, the number of reads of a storage unit has an upper limit value. When the number of reads of a storage unit reaches the upper limit value, the number of errors of the storage unit will increase. Therefore, the feature maintenance device 112 or the controller 120 can obtain the number of reads of the storage unit and determine whether the number of reads of the storage unit has reached the upper limit value. If the upper limit value is reached, the feature maintenance device 112 or the controller 120 can instruct the operation circuit 114 to erase the storage unit and rewrite the data in the storage unit.

[0116] In one example, the number of times a storage unit is erased has an upper limit value. When the number of times a storage unit is erased reaches the upper limit value, the data storage capacity of the storage unit decreases. Therefore, the feature maintenance device 112 or the controller 120 can obtain the number of times a storage unit is erased and determine whether the number of times a storage unit is erased has reached the upper limit value. If the upper limit value is reached, the feature maintenance device 112 or the controller 120 can instruct the operation circuit 114 to stop storing data in the storage unit.

[0117] In one example, a read operation on a memory cell requires a read reference voltage. The feature maintaining device 112 can calculate and store the read reference voltage of the memory cell, so that a read instruction for the memory cell does not need to include the read reference voltage. The operation circuit 114 can obtain the read reference voltage of the memory cell from the feature maintaining device 112, so that a read operation can be performed on the memory cell.

[0118] In one example, the feature maintaining device 112 may calculate a read reference voltage of a memory cell and send the read reference voltage of the memory cell to the controller 120 , thereby eliminating the need for the controller 120 to configure the read reference voltage.

[0119] In some embodiments, step 202 may also be performed by Figure 6The process shown is implemented. Figure 6 As shown, step 202 or step 203 may include the following sub-steps.

[0120] After acquiring the operation instruction sent by the controller 120 in step 201, the feature maintaining device 112 can determine whether the operation instruction is an FSM-related instruction in step 601, that is, determine whether the operation instruction is the IO instruction, FSM configuration instruction or FSM excitation instruction mentioned above.

[0121] If the operation instruction is not an FSM-related instruction, the feature maintaining device 112 executes step 607 to instruct the operation circuit 114 to execute the operation instruction and return the execution result to the controller 120 .

[0122] If the operation instruction is an FSM related instruction, the feature maintenance device 112 determines whether the operation instruction is an FSM configuration instruction in step 602. If the operation instruction is an FSM configuration instruction, the feature maintenance device 112 can execute step 608 to configure the working mode of the feature maintenance device 112. For details, please refer to the above introduction and will not be repeated here.

[0123] If the operation instruction is an FSM related instruction but not an IO instruction, the feature maintaining device 112 determines in step 603 whether the operation instruction is a voltage obtaining instruction.

[0124] If the operation instruction is a voltage obtaining instruction, in step 609, the feature maintaining device 112 instructs the operation circuit 114 to perform a read operation; and the feature maintaining device 112 obtains a read reference voltage based on the read result. Specifically, the voltage obtaining instruction can be set to correspond to a storage unit set. In step 609, the feature maintaining device 112 can respond to the voltage obtaining instruction and instruct the operation circuit 114 to perform a read operation on the storage unit set in the storage array 111 based on a preset second read reference voltage to obtain a first read result; the feature maintaining device 112 obtains the first read result from the operation circuit 114, and obtains the first read reference voltage based on the second read reference voltage and the first read result. The feature maintaining device 112 can store the first read reference voltage. The first read reference voltage is used as the read reference voltage of the storage unit set. For details, please refer to the above introduction, which will not be repeated here.

[0125] In one example, before executing step 609, the feature maintaining device 112 has stored the read reference voltage of the storage cell set. For the convenience of description, the read reference voltage can be referred to as the original read reference voltage of the storage cell set. Then in step 609, when obtaining the first read reference voltage, the average value of the original read reference voltage of the storage cell set and the first read reference voltage can be calculated, and the obtained average value replaces the original read reference voltage of the storage cell set, that is, the obtained average value is used as the new read reference voltage of the storage cell set.

[0126] If the operation instruction is not a voltage obtain instruction, the feature maintaining device 112 determines in step 604 whether the operation instruction is a voltage update instruction.

[0127] If the operation instruction is a voltage update instruction, then in step 610, the feature maintaining device 112 updates the read reference voltage of the corresponding storage unit set. For details, please refer to the above introduction and will not be repeated here.

[0128] If the operation instruction is not a voltage update instruction, the feature maintaining device 112 determines in step 605 whether the operation instruction is a read instruction.

[0129] If the operation instruction is a read instruction, the feature maintaining device 112 sends the read reference voltage of the storage unit corresponding to the read instruction to the operation circuit 114 through step 611, so that the operation circuit 114 can obtain the read reference voltage of the storage unit corresponding to the read instruction, and then perform a read operation on the storage unit corresponding to the read instruction. In this way, the read operation can be implemented without the read instruction carrying the read reference voltage.

[0130] If the operation instruction is not a read instruction, the feature maintaining device 112 may respond to the operation instruction and return a result to the controller 120 in step 606. Exemplarily, the operation instruction may be a query instruction for the feature parameters of the storage array 111. In step 606, the feature maintaining device 112 may respond to the query instruction and send the feature parameters of the storage array 111 stored in the feature maintaining device 112 to the controller 120.

[0131] The characteristic parameters of the storage array are maintained and stored by the characteristic maintaining device on the flash memory chip side, which has higher energy efficiency.

[0132] Specifically, the characteristic parameters of the storage array are maintained and stored by the feature maintenance device on the flash memory chip side, which can reduce the interaction between the flash memory chip and the controller, that is, there is no need for the flash memory chip and the controller to interact additionally, which effectively reduces the overall power consumption of the solid-state drive. Taking the calculation of the read reference voltage of 4 pages in the idle state of the solid-state drive as an example, compared with the controller calculating the read reference voltage, the feature maintenance device on the flash memory chip side calculates the read reference voltage, which can save the power consumption of NFI and the interface power supply and core voltage (voltage core clamp quad, VCCQ) of the flash memory chip. Among them, at least 65mW of power consumption can be saved, which is 3% of the power consumption of the solid-state drive in the idle state.

[0133] In addition, the characteristic maintenance device on the flash memory chip side maintains and stores the characteristic parameters of the storage array, and the controller does not need to open a corresponding table cache, which effectively saves the storage resources of the controller. The characteristic maintenance device on the flash memory chip side calculates the number of reads, which can save about 4KB of table resources of the controller, and at the same time reduces the garbage collection (GC) of the read data channel (RDC) by 50%, thereby improving the corresponding reliability. The characteristic maintenance device on the flash memory chip side calculates the read reference voltage, which can save about 400KB of table resources of the controller and improve the storage quality of service (QoS).

[0134] The embodiment of the present application also provides a computing device. The computing device includes a processor and the solid-state drive 100 described above. Exemplarily, any one of a central processing unit (CPU), a graphics processing unit (GPU), a neural processing unit (NPU), a field programmable gate array (FPGA), etc.

[0135] An embodiment of the present application also provides a computer storage medium, which includes computer instructions. When the computer instructions are run on a flash memory chip of a solid-state drive (for example, a feature maintenance device on the flash memory chip), the flash memory chip executes the method performed by the feature maintenance device 112 introduced above.

[0136] An embodiment of the present application also provides a computer program product, which, when the program code contained in the computer program product is executed on the flash memory chip of the solid-state drive (for example, executed by the feature maintaining device on the flash memory chip), implements the method executed by the feature maintaining device 112 introduced above.

[0137] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the protection scope of the technical solutions of the embodiments of the present application.

Claims

1. A solid state hard disk, characterized in that: The solid state drive comprises: a controller and a flash memory chip; the flash memory chip comprises a storage array and a feature maintaining device; The controller is used to send an operation instruction to the flash memory chip; The characteristic maintaining device is used to obtain or update characteristic parameters of the storage array based on the operation instruction; the characteristic parameters include state parameters of the storage array and / or operation parameters of the storage array; The characteristic maintaining device is used to store the characteristic parameters or send the characteristic parameters to the controller; wherein the characteristic parameters are used by the characteristic maintaining device or the controller to manage the storage array.

2. The solid state drive according to claim 1, wherein: The operation instruction includes a first read reference voltage, and the feature maintaining device is used to store the first read reference voltage. The first read reference voltage is used by the operation circuit in the flash memory chip to perform a read operation on a first storage cell set in the storage array, and the first storage cell set includes at least one storage cell.

3. The solid state drive according to claim 1, wherein: The operation instruction includes a voltage obtaining instruction; The characteristic maintaining device is used to respond to the voltage to obtain the instruction, and based on the preset second read reference voltage, perform a read operation on a first set of storage cells in the storage array to obtain a first read result, wherein the first set of storage cells includes at least one storage cell; The characteristic maintaining device is used to obtain a first read reference voltage of the first storage unit set based on the second read reference voltage and the first read result; The characteristic maintaining device is used for storing the first read reference voltage.

4. The solid state hard disk according to claim 2 or 3, characterized in that: The storage array also includes a second storage cell set, the second storage cell set includes at least one storage cell, and the characteristic maintaining device is used to calculate the average value or maximum value of the read reference voltage of the second storage cell set and the first read reference voltage, and use the average value or the maximum value to update the first read reference voltage.

5. The solid state hard disk according to any one of claims 2 to 4, characterized in that: The controller is used to send a read instruction to the flash memory chip, wherein the read instruction includes addresses of one or more storage units in the first storage unit set; The operation circuit is used to obtain the address of the one or more storage units from the read instruction; The characteristic maintaining device is used for sending the first read reference voltage to the operating circuit in response to the read instruction; The operation circuit is used to read the data stored in the one or more storage cells according to the first read reference voltage and the addresses of the one or more storage cells; The operation circuit sends the read data to the controller.

6. The solid state hard disk according to any one of claims 2 to 5, characterized in that: The first storage unit set includes any one of the following: One or more pages in the storage array, one or more blocks in the storage array, and one or more planes in the storage array.

7. The solid state hard disk according to any one of claims 1 to 6, characterized in that: The characteristic parameter includes the number of reads; the characteristic maintaining device is used to update the number of reads of the storage unit corresponding to the read instruction when confirming that the operation instruction is a read instruction; And / or, the characteristic parameter includes the number of erasures; and the characteristic maintaining device is used to update the number of erasures of the storage unit corresponding to the read instruction when it is confirmed that the operation instruction is an erase instruction.

8. A data processing method, characterized in that: The method is applied to a solid state drive, the solid state drive comprising: a controller and a flash memory chip; the flash memory chip comprising a storage array and a feature maintaining device; the method comprises: The controller sends an operation instruction to the flash memory chip; The characteristic maintaining device obtains or updates characteristic parameters of the storage array based on the operation instruction; the characteristic parameters include state parameters of the storage array and / or operation parameters of the storage array; The characteristic maintaining device stores the characteristic parameters or sends the characteristic parameters to the controller; wherein the characteristic parameters are used by the characteristic maintaining device or the controller to manage the storage array.

9. The method according to claim 8, characterized in that The operation instruction includes a first read reference voltage; The feature maintaining device obtains or updates the feature parameter of the storage array based on the operation instruction, including: the feature maintaining device obtains the first read reference voltage from the operation instruction; The characteristic maintaining device stores the characteristic parameters or sends the characteristic parameters to the controller, including: the characteristic maintaining device stores the first read reference voltage, the first read reference voltage is used by the operating circuit in the flash memory chip to perform a read operation on the first storage cell set in the storage array, and the first storage cell set includes at least one storage cell.

10. The method according to claim 8, characterized in that The operation instruction includes a voltage obtaining instruction; The characteristic maintaining device obtains or updates the characteristic parameters of the storage array based on the operation instruction, including: The characteristic maintaining device obtains an instruction in response to the voltage, and performs a read operation on a first set of storage cells in the storage array based on a preset second read reference voltage to obtain a first read result, wherein the first set of storage cells includes at least one storage cell; The feature maintaining device obtains a first read reference voltage of the first set of storage cells based on the second read reference voltage and the first read result; The characteristic maintaining device stores the characteristic parameter or sends the characteristic parameter to the controller, including: the characteristic maintaining device stores the first read reference voltage.

11. The method according to claim 9 or 10, characterized in that: The storage array further includes a second storage unit set, the second storage unit set includes at least one storage unit, and the method further includes: An average value or a maximum value of the read reference voltage of the second memory cell set and the first read reference voltage is calculated, and the first read reference voltage is updated using the average value or the maximum value.

12. The method according to any one of claims 9 to 11, characterized in that: The method further comprises: The controller sends a read instruction to the flash memory chip, wherein the read instruction includes addresses of one or more storage units in the first storage unit set; The operation circuit obtains the address of the one or more storage units from the read instruction; The characteristic maintaining device sends the first read reference voltage to the operating circuit in response to the read instruction; The operation circuit reads the data stored in the one or more storage cells according to the first read reference voltage and the addresses of the one or more storage cells; The operation circuit sends the read data to the controller.

13. The method according to any one of claims 9 to 12, characterized in that: The first storage unit set includes any one of the following: One or more pages in the storage array, one or more blocks in the storage array, and one or more planes in the storage array.

14. The method according to any one of claims 8 to 13, characterized in that: The method further comprises: The characteristic parameter includes the number of reads; the characteristic maintaining device obtains or updates the characteristic parameter of the storage array based on the operation instruction, including: the characteristic maintaining device updates the number of reads of the storage unit corresponding to the read instruction when confirming that the operation instruction is a read instruction; And / or, the characteristic parameters include the number of erasures; the characteristic maintaining device obtains or updates the characteristic parameters of the storage array based on the operation instruction, including: when the characteristic maintaining device confirms that the operation instruction is an erase instruction, it updates the number of erases of the storage unit corresponding to the read instruction.

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