Electronic component package with metal sheet structure including

Abstract

The embodiment of the invention relates to an electronic component package with a metal plate structure including a tapered leg portion. One example includes an electronic circuit package (100). The electronic circuit package (100) includes a lead frame. The electronic circuit package includes an electronic circuit die (102) disposed on the lead frame. The electronic circuit package (100) includes a metal plate structure (106) formed on the electronic circuit die (102). The metal plate structure (106) includes an aperture extending through the metal plate structure (106) from a first surface coupled to the electronic circuit die (102) to a second surface opposite the first surface, and further includes a tapered foot portion (108) formed around a perimeter of the metal plate structure (106) at the first surface. The electronic circuit package (100) includes a molding material (104) covering the electronic circuit die (102) around the metal plate structure (106).

Description

Technical Field

[0001] The present invention relates generally to electronic component packaging, and more particularly to electronic component packaging having a metal plate structure including tapered leg portions. Background Art

[0002] Electronic component packages contain electronic components, such as integrated circuits, mounted on a substrate. Integrated circuits require careful attention to packaging. Electronic component packages containing integrated circuits are not only expensive and delicate, but also prone to cracking and delamination. Integrated circuits come in a variety of sizes and often irregular shapes, making it challenging to find a suitable packaging solution that can effectively protect them. Electronic packaging relies on engineering principles such as dynamics, stress analysis, heat transfer, and fluid mechanics.

[0003] The design of electronic component packaging depends on the production method and requires careful consideration of dimensions, tolerances and tooling design. Electronic packaging requires engineers to perform analysis to estimate aspects such as maximum component temperature, structural resonant frequency and dynamic stress and deflection in harsh environments to prevent current or premature electronic product failure. Summary of the invention

[0004] The following is a brief summary of subject matter that is described in greater detail herein. This summary is not intended to limit the scope of the claims.

[0005] In a first example, an electronic component package includes a lead frame. The electronic component package includes an electronic circuit die disposed on the lead frame. The electronic component package includes a metal plate structure formed on the electronic circuit die, the metal plate structure including an aperture extending through the metal plate structure from a first surface coupled to the electronic circuit die to a second surface opposite the first surface, and further including a tapered leg portion formed around a perimeter of the metal plate structure at the first surface. The electronic component package includes a molding material covering the electronic circuit die around the metal plate structure.

[0006] According to a second example, a method of forming an electronic component package includes forming a lead frame. The method of forming an electronic component package includes forming an electronic circuit die on the lead frame. The method of forming an electronic component package includes forming a photoresist layer on the electronic circuit die, the photoresist layer including an aperture extending through the photoresist layer to a surface of the electronic circuit die and a recess around the periphery of the aperture. The method of forming an electronic component package includes depositing a metal layer to fill the aperture, the metal layer including a tapered leg portion configured to fill the recess. The method of forming an electronic component package includes removing the photoresist layer. The method of forming an electronic component package includes forming a molding material to cover the electronic circuit die around the metal layer.

[0007] According to a third example, a method of forming an electronic component package includes forming a lead frame. The method of forming the electronic component package includes forming an electronic circuit die on the lead frame. The method of forming the electronic component package includes forming a photoresist layer on the electronic circuit die, the photoresist layer including an annular aperture extending through the photoresist layer to the surface of the electronic circuit die and a first recess around the inner periphery of the annular aperture and a second recess around the outer periphery of the aperture. The method of forming the electronic component package includes depositing a metal material in the aperture to form a metal ring structure, the metal ring structure including a first tapered leg portion configured to fill the first recess and a second tapered leg portion configured to fill the second recess. The method of forming the electronic component package includes removing the photoresist layer. The method of forming the electronic component package includes forming a molding material to cover the electronic circuit die around the outer periphery of the ring structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The general concept of the invention and its illustrative examples and advantages are described in more detail below by way of example with reference to the accompanying drawings, in which:

[0009] Figure 1 A diagram illustrating an electronic component package.

[0010] Figure 2A and 2B A cross-sectional view illustrating an electronic component package.

[0011] Figure 3 Description Explanatory diagrams showing examples of photolithography used in the manufacture of electronic component packages.

[0012] Figure 4 A top view illustrating a manufactured electronic component package.

[0013] Figure 5An example of a flow chart for forming an electronic component package is described. DETAILED DESCRIPTION

[0014] The present disclosure describes an electronic component package and a method of forming a metal ring structure therein, the metal ring structure having a tapered foot portion that is configured according to a notch in a chip molding. As described herein, the tapered foot portion is of particular interest for preventing stress fractures and cracks in the active circuitry and silicon substrate of the electronic component package. As described herein, the formation of the tapered foot portion of the metal ring structure provides improvements in supporting high stress concentration points.

[0015] As an example, the electronic component package described herein includes a metal plate structure including a central aperture for sensing moisture, humidity, and moisture in an operating environment. In one example, the walls of the central aperture may be plated with a metal to form the metal ring structure. As an example, one or more tapered leg portions of the metal ring structure may be formed along a surface of an electronic circuit die. The formation of the metal ring structure with one or more tapered leg portions improves the adhesion of the molding compound to the metal ring structure of the electronic component package and the electronic circuit die, thereby reducing crack formation in the electronic circuit die caused by mechanical stress.

[0016] As described herein, a process for forming a metal ring structure having a tapered leg portion includes forming a photoresist coating on an electronic circuit die. The photoresist coating may have pores extending through the photoresist coating to a top surface of the electronic circuit die. The photoresist coating may be soft-baked at a temperature of about 130° C. or less. The photoresist coating may be at least about 1900 mJ / cm 2 An exposure process is performed. A post-exposure bake may then be performed on the photoresist coating at a temperature greater than about 100° C. A flooding development process may be performed for more than 9 iterations to form a tapered leg portion of the metal ring structure.

[0017] refer to Figure 1 , depicting a block diagram of an electronic circuit package 100 according to the present disclosure. The electronic circuit package 100 includes a circuit die 102, a molding layer 104, a metal plate structure 106, and one or more tapered leg portions 108 of the metal plate structure 106. For example, the metal plate structure 106 may be formed as a loop that includes pores extending through the metal plate structure to the surface of the circuit die 102. As an example, the electronic circuit package 100 of the present disclosure may be configured to sense the atmospheric environment in the pores of the metal plate structure 106 so as to detect characteristics (e.g., temperature, pressure, quality, etc.) of the relative humidity of the air or gas when moisture is absorbed in the operating environment of the electronic circuit package 100.

[0018] The circuit die 102 may be disposed on a surface of a lead frame (not shown). The metal plate structure 106 may be disposed on a central portion of the circuit die 102. The mold layer 104 may be formed around an outer periphery of the metal plate structure 106. The mold layer 104 may be configured to extend from the surface of the circuit die 102 to an upper portion of the metal plate structure 106. The mold layer 104 may be configured to cover the entire surface of the circuit die 102.

[0019] In one example, the metal plate structure 106 may be configured to include one or more tapered foot portions 108 along the surface of the circuit die 102. The metal plate structure 106 may also be configured to have a trapezoidal inclined inner wall to reduce the formation of stress points of the electronic circuit package 100 at material junctions therein. The metal plate structure 106 including one or more tapered foot portions 108 may allow for increased support to achieve material reliability. Moreover, in order to form the tapered foot portions 108, a photoresist material layer (not shown) may be formed to provide a recess along the surface of the circuit die 102. The tapered foot portions 108 of the metal plate structure 106 may thus be formed to fill the recess at the junction where the molding layer 104 meets the circuit die 102.

[0020] For example, outside the metal plate structure 106, the mold layer 104 surrounds the perimeter of the metal plate structure 106. A first tapered foot portion 108 may be formed around the lower outer perimeter of the metal plate structure 106 to fill a recess formed in a lower portion of the photoresist material layer. The photoresist material layer above the recess may be configured as an angled wall. The inclined configuration of the recess allows for additional decompression at stress points in the circuit die 102 when filled with metal material to form the tapered foot portion 108 of the metal plate structure 106. The inner perimeter of the metal plate structure 106 may be configured to include a second tapered foot portion 108 along the surface of the circuit die 102 for additional structural support.

[0021] As described above, the metal plate structure 106 may be formed as a loop (e.g., a ring) such that the metal plate structure 106 includes an aperture (not shown) to draw in air or other gas for sensing. The aperture may be configured to sense a condensation temperature (e.g., a dew point) near or around the electronic circuit package 100. The opening of the aperture is formed adjacent to the metal plate structure 106 of the molding layer 104. The aperture may be configured to extend downward to the surface of the circuit die 102 to allow for atmospheric sensing within the sensing aperture.

[0022] Now turn Figure 2A and 2B, shows a diagram 200 of an electronic circuit package having an aperture, the aperture comprising a metal ring including a tapered leg portion. The diagram 200 includes a first view 202, which is a plan view of a surface of an electronic circuit package (hereinafter referred to as electronic circuit package 206) including a metal plate structure 208. The diagram also includes a second view 204, which is a cross-sectional view of the electronic circuit package 206 through "A", which includes the metal plate structure 208, the metal plate structure including tapered leg portions 210 on both the inner perimeter and the outer perimeter of the metal plate structure 208. For simplicity and ease of description, the diagram 200 is a plan view of a surface of an electronic circuit package (hereinafter referred to as electronic circuit package 206) including a metal plate structure 208. The diagram also includes a second view 204, which is a cross-sectional view of the electronic circuit package 206 through "A", which includes the metal plate structure 208, the metal plate structure including tapered leg portions 210 on both the inner perimeter and the outer perimeter of the metal plate structure 208. Figure 2A and 2B In the example of FIG. 2 , the electronic circuit package 206 is depicted as a very simplified example.

[0023] The electronic circuit package 206 may be formed on a lead frame 212, which may provide mechanical support and electrical connections for a circuit die 214. The lead frame 212 may be used in a variety of die configurations (e.g., DIP, QFP, and other packages) to provide electrical connections to the electronic circuit package 206. The lead frame 212 includes a central die pad (not shown) in which the circuit die 214 is placed, surrounded by leads (not shown) or conductive paths that may lead to other circuit components. The circuit die 214 is glued or soldered to the central die pad inside the lead frame. Bonding wires (not shown) may be attached between the central die pad and a set of bonding pads (not shown) to connect the central die pad to the leads.

[0024] In one example, the metal plate structure 208 may be plated via an electroless deposition process, where metals and metal alloys are deposited onto the circuit die 214 when an external current is applied. A mushroom-shaped cross-section may be formed on the metal plate structure 208 to provide partial coverage over the circuit die 214. The metal plate structure 208 includes an aperture 216 extending to the electronic circuit package 206, through which air and gas may be sensed by a sensor (not shown) in the circuit die.

[0025] The metal plate structure 208 may be configured to include one or more tapered standoff portions 210 to reduce stress points formed by the manufacture of the electronic circuit package 206. A mold layer 218 may be formed around the metal plate structure 208, thereby encapsulating the electronic circuit package 206. The joints between the mold layer 218, the metal plate structure 208, and the circuit die 214 are reduced in cracking and delamination by the angled support of the tapered standoff portions 210. The tapered standoff portions 210 may extend from the base of the metal plate structure 208 toward the center of the aperture 216 by between about 15% and about 25% of the inner radius of the aperture 216.

[0026] The metal plate structure 208 includes a first sidewall 220 facing the aperture 216, which can be configured to be angled inwardly toward the center of the aperture 216. The first sidewall 220 can be exposed to the atmosphere to direct air or gas to the circuit die 214. The metal plate structure 208 includes a second sidewall 222 facing the molding layer 218, which can be configured to be angled outwardly toward the edge of the electronic circuit package 206. The second sidewall 222 meets the tapered foot portion 210 at an angle to relieve stress points and support adhesion of the material. The tapered foot portion 210 prevents the sidewalls (220, 222) from contacting the circuit die at an angle, which would otherwise be prone to cracking in the circuit die 214.

[0027] Now turn Figure 3 , depicts an explanatory diagram of a die assembly 300 showing an example of photolithography used in the manufacture of electronic component packages. Figure 3 In the example of Figure 2A The cross section of "A" in the example of FIG. 3 shows a die assembly 300. The die assembly 300 can be configured to undergo a photolithography process to form a metal plate structure of an electronic circuit package including a tapered leg portion as described herein. The metal plate structure profile 302 can be formed on the circuit die 304 and the lead frame 306 by depositing a photoresist material 308 on the circuit die 304. Figure 3 In the example of FIG. 3 , the metal plate structure profile 302 is shown to include two cavity portions that may correspond collectively to a single loop-shaped cavity. The metal plate structure profile 302 may be filled with a metal (e.g., copper) to form a resulting metal plate structure (e.g., metal plate structure 208). The photoresist material 308 may be formed to include at least one notch 310 at the surface of the circuit die 304, which is subsequently filled with a metal material to become a tapered foot portion of the metal plate structure.

[0028] In one example, a photoresist deposition step may be performed to deposit a photoresist material 308 over the circuit die 304. The photoresist material 308 may be formed over the circuit die 304, having a first portion 312 of the photoresist material 308 and a second portion 314 of the photoresist material 308, such that the loop-shaped cavity of the metal sheet structure profile 302 occupies a volume therebetween. The combination of the first portion 312 and the second portion 314 thus defines the metal sheet structure profile 302 to be filled with metal material to form a metal sheet structure of an electronic circuit package. In another example, the photoresist material may be formed as a solid layer having a first portion 312 and a second portion 314 of the photoresist material formed during the development process of the metal sheet structure. The photoresist material 308 may be applied by a spin coating method consisting of dispensing the photoresist material 308 over the circuit die assembly 300 and rapidly spinning the circuit assembly 300 until it dries. Alternatively, the photoresist material 308 may be applied by a laser printer.

[0029] A soft bake process is performed on the photoresist material 308 to evaporate the solvent within the photoresist material 308 to make the formation more solid for filling the metal plate structure shape 302 during the metal plate structure development process. The soft bake process also improves the adhesion of the photoresist material 308 to the circuit die 304. The soft bake process is performed at a temperature of about 130° C. or less (e.g., at about 125° C.), which may be less than a soft bake process (e.g., typically about 140° C.) used in a photolithography process for conventional chip manufacturing. The evaporation of the solvent within the photoresist material 308 may change the thickness of the photoresist material 308 so that it may be ready for exposure to ultraviolet light during the exposure process.

[0030] An exposure process may be performed on the circuit die assembly 300 after the soft bake. The exposure process may be performed by applying at least about 1900 mJ / cm 2 (For example, about 2000 mJ / cm 2 ) is performed by exposing the photoresist material 308 of the circuit die assembly 300 to ultraviolet light at a rate of about 1,800 mJ / cm . The exposure process can be performed to generate radiation to form a pattern image on the photoresist material 308 that defines what will become the metal plate structural shape 302 during the development step. The exposure process performed on the circuit die assembly 300 can be greater than the exposure process used for conventional chip manufacturing (e.g., typically about 1800 mJ / cm 2 ). A pattern may be formed on circuit die assembly 300 using a mask that defines areas of the photoresist material surface to be exposed to radiation and areas to be covered. Portions of photoresist material 308 that are subjected to radiation become more soluble during the development process.

[0031] In one example, a post-exposure bake may be performed on the circuit die assembly 300 after the exposure step. The post-exposure bake may be performed at greater than about 100° C. (e.g., at 105° C.), which drives diffusion of photosensitive products in the photoresist material 308. Diffusion may be used to minimize the effects of standing waves from periodic variations in exposure dose over the depth of the photoresist material 308, which are generated by interference of incident and reflected radiation. The post-exposure bake also drives an acid-catalyzed reaction that changes the solubility of the polymer in the photoresist material 308. The post-exposure bake process performed on the circuit die assembly 300 may be greater than the post-exposure bake process used for conventional chip manufacturing (e.g., typically about 100° C.).

[0032] A developing process (e.g., flooding) can be performed on the circuit die assembly 300. A solvent can be applied to the photoresist material 308 in the form of a pattern defined during the exposure step. Unwanted photoresist material is boiled and washed away. The flooding process is repeated to reach the desired depth in the photoresist material 308. A first set of flooding steps can be performed to form a channel representing a metal plate structure down to the circuit die 304. The first set of flooding steps can be performed in less than nine iterations (e.g., eight iterations). In conventional chip manufacturing processes, photoresist lithography usually only implements the first set of flooding steps of eight or less iterations. However, in order to manufacture the circuit die assembly 300, a second set of flooding steps can be performed to form a recess 310 of a tapered leg portion that will be filled with metal to become a metal plate structure. The second set of flooding steps can be performed to include at least two additional iterations (e.g., three additional iterations). By performing flooding steps of about eleven iterations, a metal plate structure profile 302 can be formed as described herein.

[0033] By providing a change in the photolithography process in terms of soft baking, exposure, post-exposure baking, and development steps relative to conventional manufacturing, the photolithography process can be implemented to form a recess in the metal plate structure profile 302, which allows the tapered leg portion of the metal plate structure to be formed. After the metal plate structure profile 302 has been formed by the development of the photoresist material 308, the metal plate structure profile 302 can be filled by a metal plating process. The metal plating process forms the metal plate structure of the electronic circuit package. The metal plate structure thus includes a tapered leg portion along the surface of the circuit die, so that material stress can be resolved attributable to relieving the right-angle adhesion point between the metal plate structure and the circuit die 304. The metal plating process can form an over-plating, such as a mushroom-shaped cover, along the top surface of the metal plate structure for mold release control when the molding layer is later applied to the circuit die assembly 300 in the electronic circuit package assembly process.

[0034] After the metal plate structure has been formed, the remaining photoresist material 308 can be removed from the circuit die assembly 300. Once the photoresist material has been removed, a chemical roughening process can be performed on the tapered leg portion of the metal plate structure. The chemical roughening process can form grooves in the tapered leg portion to improve adhesion to the molding material of the electronic circuit package. The grooved tapered leg portion of the metal plate structure provides a more durable electronic circuit package.

[0035] Now turn Figure 4 , showing a packaged manufactured electronic component. The electronic circuit package 400 described herein is a chip on which a humidity sensor package is formed. The electronic circuit package 400 includes a metal plate structure 402 that is presented as having a loop-shaped shape (e.g., a ring). The metal plate structure 402 includes a first tapered leg portion 404, which is disposed around the inner periphery of the metal plate structure 402 and thus defines an aperture 406 extending through the metal plate structure 402 to the surface of the circuit die of the electronic circuit package 400. The metal plate structure 402 also includes a second tapered leg portion 408, which is disposed around the outer periphery of the metal plate structure 402 and is formed at the bottom of the metal plate structure 402. Figure 4 In the example shown in FIG. 4 , the molded portion 410 is obscured by the molding material 410 .

[0036] The molding material 410 may be formed on the circuit die around the outer periphery of the metal plate structure 402. The molding material 410 may include a molding compound, a molding underfill, an epoxy resin, or a resin. After the molding process, the top surface of the molding material 410 may be higher than the top surface of the metal plate structure 402. The molding material 410 may be dispensed as a fluid and then cured to form the electronic component package 400, such as Figure 4 As described herein, the presence of first tapered foot portion 404 and / or second tapered foot portion 408 can reduce cracks that can form in the circuit die during application of molding material 410.

[0037] The foregoing summarizes the features of several examples so that those skilled in the art can better understand the various aspects of the present disclosure. Those skilled in the art will appreciate that they can easily use the present disclosure as a basis for designing or modifying other processes and structures for achieving the same purpose and / or achieving the same advantages of the examples introduced herein. Those skilled in the art will also recognize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that various changes, substitutions, and modifications may be made herein without departing from the spirit and scope of the present disclosure.

[0038] Reference Figure 5 , illustrating a flowchart 500 for forming an electronic component package according to one or more examples described herein.

[0039] At 502 , the flow chart includes forming a lead frame.

[0040] At 504 , the flow chart includes forming an electronic circuit die on a lead frame.

[0041] At 506 , the flow chart includes depositing a photoresist layer on the electronic circuit die, the photoresist layer including an aperture extending through the photoresist layer to a surface of the electronic circuit die and a notch around a perimeter of the aperture.

[0042] At 508 , the flow chart includes depositing a metal layer to fill the aperture, the metal layer including a tapered leg portion configured to fill the recess.

[0043] At 510 , the flow chart includes removing the photoresist layer.

[0044] At 512 , the flow chart includes forming a molding material to cover the electronic circuit die around the metal layer.

[0045] Forming a photoresist layer on the electronic circuit die further includes applying the photoresist material to the electronic circuit die via a spin coating process.

[0046] Forming a photoresist layer on the electronic circuit die further includes performing a soft bake process at a temperature of about 130° C. or less.

[0047] Forming a photoresist layer on the electronic circuit die further comprises applying a photoresist layer at a temperature of at least about 1900 mJ / cm 2 The photoresist layer is exposed to ultraviolet light at a rate of

[0048] Forming a photoresist layer on the electronic circuit die further includes performing a post-bake process at greater than about 100°C.

[0049] Depositing the metal layer to fill the pores includes depositing a metal material in each of a first set of nine or fewer bath procedures to form a first portion of the metal layer, and depositing the metal material in each of a second set of at least two bath procedures to form a tapered foot portion of the metal layer.

[0050] The foregoing detailed description is only illustrative and is not intended to limit the application or use of the examples and / or examples. In addition, it is not intended to be bound by any explicit or implicit information in the foregoing technical field, background technology, inventive content or the following detailed description.

[0051] As used in the specification and the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0052] Unless otherwise indicated, any element, characteristic, feature, or combination of elements, characteristics, and features may be used in any example disclosed herein, regardless of whether an element, characteristic, feature, or combination is explicitly disclosed in the example. It will be readily understood that features described with respect to any particular aspect described herein may be applicable to other aspects described herein, provided that the features are compatible with the aspect. Specifically, features described herein with respect to methods may be applicable to optical data transmission products, and vice versa.

[0053] References throughout this specification to "one example" or "an example" mean that a particular feature, structure, or characteristic described in conjunction with the example is included in at least one example. Thus, the phrases "in one example," "in one aspect," or "in an example" appearing in various places throughout this specification do not necessarily refer to the same example. Furthermore, in one or more examples, particular features, structures, or characteristics may be combined in any suitable manner.

[0054] The words "exemplary" and / or "illustrative" are used herein to mean serving as examples, instances, or illustrations. For the avoidance of doubt, the subject matter disclosed herein is not limited by such examples. In addition, any aspect or design described herein as exemplary and / or demonstrative is not necessarily to be construed as being preferred or advantageous over other aspects, nor is it intended to exclude equivalent exemplary structures and technologies known to those skilled in the art. In addition, to the extent that words belonging to "including," "having," "containing," and other similar words are used in specific embodiments or claims, such terms are intended to be inclusive in a manner similar to the term "comprise" as an open transition word, without excluding any additional or other elements.

[0055] The above description includes non-limiting aspects of various examples. Of course, it is not possible to describe every conceivable combination of components or methods for the purpose of describing the disclosed subject matter, but those skilled in the art may recognize that additional combinations and arrangements of various examples are possible. The disclosed subject matter is intended to encompass all such changes, modifications, and variations that fall within the spirit of the appended claims.

[0056] For the various functions performed by the above-described components, unless otherwise indicated, the terms used to describe such components (including references to "members") are intended to also include any structure that performs the specified function of the described components (e.g., functionally equivalent), even if the structure is not equivalent to the disclosed structure. In addition, while particular features of the disclosed subject matter may have been disclosed with respect to only one of several embodiments, such features may be combined with one or more other features of other embodiments, which may be desirable and advantageous for any given or specific application.

[0057] As used herein, the terms "exemplary" and / or "illustrative" are intended to mean serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited to such examples. In addition, any aspect or design described herein as "exemplary" and / or "illustrative" is not necessarily to be construed as being preferred or advantageous over other aspects or designs, nor is it meant to exclude equivalent structures and techniques known to those skilled in the art. In addition, to the extent that words belonging to "including," "having," "containing," and other similar words are used in specific embodiments or claims, such terms are intended to be inclusive in a manner similar to the term "comprise" as an open transition word, without excluding any additional or other elements.

Claims

1. An electronic component package, comprising: Lead frame; an electronic circuit die mounted on the lead frame; a metal plate structure formed on the electronic circuit die, the metal plate structure comprising an aperture extending through the metal plate structure from a first surface coupled to the electronic circuit die to a second surface opposite the first surface, and further comprising a tapered foot portion formed around a perimeter of the metal plate structure at the first surface; as well as A molding material surrounds the metal plate structure and covers the electronic circuit die. 2 . The electronic component package of claim 1 , wherein the electronic circuit die comprises a sensor configured to sense the atmospheric environment in the aperture of the metal plate structure.

3. The electronic component package of claim 1, wherein a surface of the tapered foot portion that contacts the molding material includes a set of grooves for improving adhesion to the molding material.

4. An electronic component package according to claim 1, wherein the periphery is an outer periphery outside the aperture, wherein the metal plate structure includes a first conical foot portion formed around an inner periphery of the metal plate structure at the first surface, and a second conical foot portion formed around the inner periphery of the metal plate structure around the aperture.

5. The electronic component package of claim 4, wherein the second tapered leg portion extends between about 15% and about 25% of the radius toward the center of the aperture. 6 . The electronic component package of claim 1 , wherein the second surface of the metal plate structure includes overplating for release control of the molding material.

7. A method of forming an electronic component package, the method comprising: forming a lead frame; forming an electronic circuit die on the lead frame; depositing a photoresist layer on the electronic circuit die, the photoresist layer forming a loop-shaped cavity extending to a surface of the electronic circuit die and a recess around the loop-shaped cavity at the surface of the electronic circuit die; depositing a metallic material to fill the loop-shaped cavity to form a metal plate structure including a tapered leg portion configured to fill the recess in the photoresist layer; removing the photoresist layer to provide an aperture extending through the metal plate structure from a first surface coupled to the electronic circuit die to a second surface opposite the first surface; as well as A molding material is formed to cover the electronic circuit die around the metal plate structure.

8. The method of claim 7, wherein said depositing said photoresist layer on said electronic circuit die comprises applying a photoresist material to said electronic circuit die via a spin coating process.

9. The method of claim 7, wherein said forming said photoresist layer on said electronic circuit die comprises performing a soft bake process at a temperature of about 130°C or less.

10. The method of claim 7, wherein forming the photoresist layer on the electronic circuit die comprises applying a photoresist layer at a temperature of at least about 1900 mJ / cm 2 The photoresist layer is exposed to ultraviolet light at a rate of 11. The method of claim 7, wherein said forming said photoresist layer on said electronic circuit die comprises performing a post-bake process at greater than about 100°C.

12. The method of claim 7, wherein depositing a metal layer to fill the pores comprises depositing a metal material to form a first portion of the metal layer in each of a first set of nine or fewer bath procedures, and depositing the metal material to form the tapered foot portion of the metal layer in each of a second set of at least two bath procedures.

13. The method of claim 7, wherein depositing the photoresist layer comprises forming a groove in the recess, and wherein depositing a metal layer comprises depositing the metal layer to fill the groove of the recess.

14. The method of claim 7, wherein depositing the photoresist layer comprises forming the notch between about 15% and about 25% of an inner radius of the aperture of the metal plate structure.

15. A method of forming an electronic component package, the method comprising: forming a lead frame; forming an electronic circuit die on the lead frame; forming a photoresist layer on the electronic circuit die, the photoresist layer comprising an annular cavity extending through the photoresist layer to a surface of the electronic circuit die and a first notch around an inner periphery of the annular cavity and a second notch around an outer periphery of an aperture; depositing a metal material in the annular cavity to form a metal ring structure, the metal ring structure comprising a first tapered leg portion configured to fill the first recess and a second tapered leg portion configured to fill the second recess; removing the photoresist layer; as well as A molding material is formed to cover the electronic circuit die around an outer perimeter of the ring structure.

16. The method of claim 15, wherein said depositing said photoresist layer on said electronic circuit die comprises applying a photoresist material to said electronic circuit die via a spin coating process.

17. The method of claim 15, wherein said forming said photoresist layer on said electronic circuit die comprises performing a soft bake process at a temperature of about 130°C or less.

18. The method of claim 15, wherein forming the photoresist layer on the electronic circuit die comprises applying a photoresist layer at a temperature of at least about 1900 mJ / cm 2 The photoresist layer is exposed to ultraviolet light at a rate of 19. The method of claim 15, wherein said forming said photoresist layer on said electronic circuit die comprises performing a post-bake process at greater than about 100°C.

20. The method of claim 15, wherein depositing a metal layer to fill the annular cavity comprises depositing a metal material to form a first portion of the metal layer in each of a first set of nine or fewer liquid coating procedures, and depositing the metal material to form the tapered foot portion of the metal layer in each of a second set of at least two liquid coating procedures.

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