Driving circuit for inhibiting crosstalk of SiC MOSFET bridge arm

Abstract

The invention discloses a drive circuit for inhibiting crosstalk of SiC MOSFET bridge arms, and relates to the technical field of power electronics, and the drive circuit is characterized in that a grid electrode of each bridge arm SiC MOSFET is connected with a push-pull circuit, a grid electrode voltage clamping circuit is connected in parallel between the push-pull circuit and the grid electrode of the SiC MOSFET, the G ends of two field effect transistors of the push-pull circuit are connected with PWM1 signals, and the G ends of the two field effect transistors of the grid electrode voltage clamping circuit are connected with the PWM M1 signals. An electrical isolation barrier sigma 1 exists between a PWM1 signal and the G end of the field effect transistor, the D end of the field effect transistor is connected to the grid electrode of the SiC MOSFET, the grid electrode voltage clamping circuit comprises a capacitor C and an auxiliary MOS transistor which are connected in series, and the G end of the auxiliary MOS transistor is further connected with a comparator circuit; the system is easy to integrate, the control strategy is simple, and no extra control signal is included.

Description

Technical Field

[0001] The invention belongs to the technical field of power electronics, and in particular relates to a driving circuit formula for suppressing SiC MOSFET bridge arm crosstalk. Background Art

[0002] In recent years, broadband semiconductor materials, especially SiC MOSFET, have gradually become the preferred devices in the field of high-frequency, high-temperature and high-power density power electronic converters due to their many excellent properties, such as wider bandgap, high thermal conductivity, fast switching speed, high blocking voltage and excellent high-temperature resistance. These characteristics make SiC MOSFET show great advantages in demanding application scenarios such as electric vehicles, renewable energy systems, aerospace and industrial power drives. The excellent performance of SiC MOSFET not only improves the efficiency and power density of the system, but also significantly reduces the size and weight of the system, making more compact and reliable power electronic solutions possible.

[0003] However, with the gradual popularization of SiC MOSFET in practical applications, some new challenges have gradually emerged. Due to its inherent high-speed switching capability, SiC MOSFET will produce a large voltage change rate (dv / dt) and current change rate (di / dt) during the switching process, which invisibly amplifies the negative impact of parasitic parameters in circuits and devices. Especially in high-speed switching application scenarios, the rapid turn-on and turn-off of SiC MOSFET will cause a series of potential problems. For example, in a power converter with a phase leg configuration, the rapid switching action can easily cause parasitic gate voltage spikes between adjacent SiC MOSFETs, and the appearance of these spike voltages may cause serious crosstalk. Once the crosstalk phenomenon occurs, it may bring a series of serious consequences. When the forward gate-source voltage spike exceeds the threshold voltage of the MOSFET, it may cause the MOSFET to turn on at an inappropriate time, thereby causing a penetration phenomenon in the bridge arm structure. This phenomenon will cause a short circuit in the circuit, and in severe cases, it will even damage the power device. In addition, if the negative gate-source voltage spike exceeds the minimum allowable voltage of the MOSFET, it may cause overvoltage breakdown of the adjacent MOSFET, thereby affecting the normal operation of the device and even causing system failure.

[0004] Therefore, in order to give full play to the advantages of SiC MOSFET in high-frequency and high-power density applications and overcome the crosstalk problems it brings, it is particularly important to develop fast and efficient gate drivers with crosstalk suppression functions. Such gate drivers not only need to have fast response capabilities to adapt to the high-speed switching characteristics of SiC MOSFET, but also need to optimize the design to reduce or eliminate the parasitic effects caused by high-speed switching to ensure that SiC MOSFET can operate safely, stably and efficiently in various complex application scenarios. Research and progress in this field will have a profound impact on the development of future power electronics technology.

[0005] Prior to this, there have been a large number of research reports on gate drivers, which mainly proposed various methods to solve the crosstalk problem in SiC MOSFET. At present, the strategies for suppressing crosstalk can be roughly summarized into three categories: reducing the dv / dt rate, providing a low impedance path, and using multi-level voltage shutdown.

[0006] The above technology has the following disadvantages: it only has an inhibitory effect when the MOSFET is turned on, and is powerless against the negative gate crosstalk voltage generated during the shutdown transient, or it may simultaneously reduce the switching speed of the device or increase the difficulty of circuit design and the control complexity of the system and increase the driving loss. Summary of the invention

[0007] The object of the present invention is to provide a driving circuit for suppressing crosstalk of a SiC MOSFET bridge arm.

[0008] To achieve the above object, the present invention provides the following technical solutions: A driving circuit for suppressing crosstalk of SiC MOSFET bridge arms, wherein a push-pull circuit is connected to the gate of each bridge arm SiC MOSFET, a gate voltage clamping circuit is connected in parallel between the push-pull circuit and the gate of the SiC MOSFET, two field effect tube G terminals of the push-pull circuit are connected to a PWM1 signal, and an electrical isolation barrier exists between the PWM1 signal and the field effect tube G terminal б 1 The D terminal of the field effect tube is connected to the gate of the SiC MOSFET. The gate voltage clamping circuit includes a capacitor C and an auxiliary MOS tube connected in series. The G terminal of the auxiliary MOS tube is also connected to a comparator circuit.

[0009] As a preferred solution of the present invention, the comparator circuit includes an amplifier module, and a resistor R5 is connected in series between the output end of the amplifier module and the auxiliary MOS tube. One end of the resistor R5 is connected to the G end of the auxiliary MOS tube, and the other end is connected to the output end of the amplifier module.

[0010] As a preferred solution of the present invention, the output end of the amplification module is connected in parallel with resistors R1, R2, R3 and R4, one end of resistor R1 is connected to the gate voltage VCC, and the other end is connected to resistor R2, the other end of resistor R2 is grounded, one end of resistor R3 is connected to the gate voltage VEE, and the other end is connected to resistor R4, and the other end of resistor R4 is grounded.

[0011] As a preferred solution of the present invention, the non-phase input terminal of the amplifying module is connected to the PWM2 signal, and the inverting input terminal of the amplifying module is connected to the reference voltage.

[0012] As a preferred solution of the present invention, there is an electrical isolation barrier between the PWM2 signal and the positive phase input terminal. б 2 .

[0013] In summary, the beneficial technical effects of the present invention are as follows: the method is easy to integrate, and uses a comparator to control an active clamping circuit composed of an auxiliary power tube and an auxiliary capacitor. An isolation unit is set during the switching period of the switch tube to achieve signal delay and create a low-impedance loop. The bridge arm crosstalk problem can be effectively suppressed without reducing the high switching speed of the SiC power tube. At the same time, the drive circuit can clamp the gate voltage spike to a safe voltage range without reducing the switching speed and increasing the switching loss, and the circuit does not include any additional control signals, and the control strategy is simple. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification, but do not constitute a limitation of the present invention. In the accompanying drawings: Figure 1 is a circuit diagram of a driving circuit for suppressing crosstalk of a SiC MOSFET bridge arm according to this embodiment; Figure 2 It is a circuit diagram of operation modes Mode 1 to 4 of a driving circuit for suppressing crosstalk of a SiC MOSFET bridge arm in this embodiment; Figure 3 It is a circuit diagram of operation modes 5 to 8 of a driving circuit for suppressing crosstalk of a SiC MOSFET bridge arm in this embodiment; Figure 4 Schematic diagram of the switching sequence of a driving circuit for suppressing crosstalk of a SiC MOSFET bridge arm in this embodiment; Figure 5 This embodiment uses a different gate driver lower bridge arm Q H Turn on the transient simulation waveform comparison chart; Figure 6 This embodiment uses a different gate driver lower bridge arm Q H Comparison of shutdown transient simulation waveforms; Figure 7 This is the comparison test result of the crosstalk voltage between the PGD circuit and the traditional driving circuit when the lower bridge arm power device of this embodiment is turned on: A in the figure is the CGD circuit, and B is the PGD circuit; Figure 8 This is the comparison test result of the crosstalk voltage between the PGD circuit and the traditional driving circuit when the lower bridge arm power device of this embodiment is turned off: A in the figure is the CGD circuit, and B is the PGD circuit; Fig. 9 This embodiment is V DC Changes in the comparison test of changes in the graph; Fig.10 It is a diagram showing the changes in the load current of this embodiment in a comparative test. DETAILED DESCRIPTION

[0015] The present invention is further described in detail below in conjunction with the accompanying drawings.

[0016] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0017] See also Figure 1 The present invention provides a technical solution: a driving circuit for suppressing crosstalk of SiC MOSFET bridge arms, wherein a push-pull circuit is connected to the gate of each bridge arm SiC MOSFET, a gate voltage clamping circuit is connected in parallel between the push-pull circuit and the gate of the SiC MOSFET, two field effect tube G terminals of the push-pull circuit are connected to a PWM1 signal, and an electrical isolation barrier exists between the PWM1 signal and the G terminal of the field effect tube б 1 The D terminal of the field effect tube is connected to the gate of the SiC MOSFET. The gate voltage clamping circuit includes a capacitor C and an auxiliary MOS tube connected in series. The G terminal of the auxiliary MOS tube is also connected to a comparator circuit.

[0018] In this embodiment The SiC MOSFET includes two upper and lower bridge arms and a DC voltage source V DC , and inductor L, where the upper bridge arm includes: switch Q H , parasitic capacitance C gdH , parasitic capacitance C gsH , parasitic capacitance C dsH , parasitic resistance R gH(in) and inductor L gH The lower bridge arm includes: switch Q L , parasitic capacitance CgdL、 Parasitic capacitance C gsL , parasitic capacitance C dsL , parasitic resistance R gL(in) and inductor L gL .

[0019] Switch Q H The gates of the gH(in) One end of the parasitic capacitance C gdH One end and the parasitic capacitance C dsH One end of the parasitic capacitance C gsH The other end is connected to the switch Q H The source, inductor L gH One end and the parasitic capacitance C dsH One end of the parasitic capacitance C gdH The other end of the switch Q H The drain and parasitic capacitance C dsH The other end is connected to a DC voltage source V DC The positive electrode, parasitic capacitance C gdH The other end of the inductor L is connected to one end of the inductor L, and the other end of the inductor L is connected to the switch Q H The drain of the device is connected to the positive electrode of the DC voltage source Vdc.

[0020] Switch Q L The gates of the gL(in) One end of the parasitic capacitance C gdL One end and the parasitic capacitance C gsL One end of the parasitic capacitance C gsL The other end is connected to the switch Q L The source, inductor L gL One end and the parasitic capacitance C dsL One end of the parasitic capacitance C gdL The other end of the switch Q L The drain and parasitic capacitance C dsL The other end and the DC voltage source V DC The negative pole of is connected to the power ground at the same time.

[0021] The G terminals of the two field effect tubes in the push-pull circuit are connected to the PWM1 signal, and there is an electrical isolation barrier between the PWM1 signal and the G terminals of the field effect tubes. б 1 The D end of the field effect tube is connected to the gate of the SiC MOSFET, and the source of the field effect tube is connected in series with a resistor R g .

[0022] The comparator circuit includes an amplifier module. A resistor R5 is connected in series between the output end of the amplifier module and the auxiliary MOS tube. One end of the resistor R5 is connected to the G end of the auxiliary MOS tube, and the other end is connected to the output end of the amplifier module.

[0023] in б 1 It is the delay time required from the issuance of PWM signal to the change of gate drive voltage. б 2 Represents the propagation delay required for the PWM signal to reach the input of the complementary bridge arm comparator.

[0024] A SiC MOSFET crosstalk suppression driving circuit described in this embodiment includes a bridge arm part and a complementary bridge arm part.

[0025] The bridge arm part includes: resistance R 5H , resistor R 1H , resistor R 2H , resistor R 3H And the resistor R 4H , resistor R 1H One end is connected to the gate voltage VCC H , the other end is connected to the resistor R 2H , resistor R 2H The other end is grounded, and the resistor R 3H One end is connected to the gate voltage VEE H , the other end is connected to the resistor R 4H , resistor R 4H The other end is grounded, the positive input of the amplifier module is connected to the PWM2 signal, the negative input of the amplifier module is connected to the reference voltage, and there is an electrical isolation barrier between the PWM2 signal and the positive input. б 2 , push-pull circuit, capacitor C H , inductance L SH2 .

[0026] The PWM1 signal passes through the electrical isolation barrier б 1 There is a signal transmission delay. After the signal is delayed, it is output through the S pole of the two field effect tubes and then connected to the capacitor C. H One end of the connection, C H The other end is connected to the D pole of the auxiliary MOS tube, the S pole of the auxiliary MOS tube is grounded, and the G pole of the auxiliary MOS tube is connected to the resistor R 5H The other end of the resistor R5 is connected to the output end of the amplifier module. The positive input end of the amplifier module is connected to the PWM2 signal. The negative input end of the amplifier module is connected to the reference voltage. The output end of the amplifier module is connected in parallel with the resistor R 1H , resistor R 2H , resistor R 3H And the resistor R4H , resistor R 1H One end is connected to the gate voltage VCC, and the other end is connected to the resistor R 2H , resistor R 2H The other end is grounded, and the resistor R 3H One end is connected to the gate voltage VEE, and the other end is connected to the resistor R 4H , resistor R 4H The other end is grounded, and the inductor L SH2 One end and switch Q H The S pole is connected, the inductor L SH2 The other end is connected to one end of the inductor L.

[0027] The complementary bridge arm part includes: resistor R 5L , resistor R 1L , resistor R 2L , resistor R 3L And the resistor R 4L , resistor R 1L One end is connected to the gate voltage VCC L , the other end is connected to the resistor R 2L , resistor R 2L The other end is grounded, and the resistor R 3L One end is connected to the gate voltage VEE L , the other end is connected to the resistor R 4L , resistor R 4L The other end is grounded, the positive input of the amplifier module is connected to the PWM2 signal, the negative input of the amplifier module is connected to the reference voltage, and there is an electrical isolation barrier between the PWM2 signal and the positive input. б 2 , push-pull circuit, capacitor C H , inductance L SH2 .

[0028] PWM2 signal passes through the electrical isolation barrier б 1 There is a signal transmission delay. After the signal is delayed, it is output through the S pole of the two field effect tubes and then connected to the capacitor C. H One end of the connection, C H The other end is connected to the D pole of the auxiliary MOS tube, the S pole of the auxiliary MOS tube is grounded, and the G pole of the auxiliary MOS tube is connected to the resistor R 5L One end of the resistor R 5L The other end is connected to the output end of the amplifier module, the positive input end of the amplifier module is connected to the PWM1 signal, the negative input end of the amplifier module is connected to the reference voltage, and the output end of the amplifier module is connected in parallel with the resistor R 1L , resistor R 2L , resistor R 3L And the resistor R 4L , resistor R 1LOne end is connected to the gate voltage VCC, and the other end is connected to the resistor R 2L , resistor R 2L The other end is grounded, and the resistor R 3L One end is connected to the gate voltage VEE, and the other end is connected to the resistor R 4L , resistor R 4L The other end is grounded, and the inductor L SL2 One end and switch Q L The S pole is connected, the inductor L SL2 The other end is grounded.

[0029] In this embodiment, the PGD timing diagram is as follows: Figure 4 As shown, the operation mode is as follows Figure 2 , 3 The 8 operation modes are described as follows: Mode 1 [t0~t1]: At t0, in order to turn on the lower bridge arm, the PWM2 signal changes from low level to high level. After a transmission delay of б2, the signal reaches the upper bridge comparator input terminal +IN_H. At t1, the voltage value of +IN_H is higher than the set voltage value, so the comparator outputs a voltage to turn on the auxiliary MOS tube to prepare for eliminating the positive crosstalk voltage. During the entire switching process of the lower bridge, the upper bridge remains in the off state, so the PWM1 signal remains at a low level. PWM1 reaches the lower bridge comparator input terminal +IN_L through transmission, and its voltage value is less than the set voltage. The comparator outputs a negative voltage to keep the lower bridge auxiliary MOS tube in the off state.

[0030] Mode 2 [t1~t2]: From time t0 through б 1 After a delay of , the gate voltage of the lower bridge arm changes from the off voltage to the on voltage at time t2.

[0031] Mode 3 [t2~t3]: Forward crosstalk occurs at t2~t3. Since the parasitic capacitance of the auxiliary power tube is several orders of magnitude smaller than the capacitance of the series connection, the influence of the parasitic capacitance of the auxiliary MOS tube can be ignored. L The parasitic capacitance value is much larger, which provides a low-impedance loop for the Miller current when the upper tube crosstalk occurs, thereby greatly reducing the upper tube gate-source crosstalk voltage and suppressing the crosstalk.

[0032] Mode 4 [t3~t4]: The switching states of all power tubes remain unchanged, the circuit is stable, and no crosstalk occurs in the circuit.

[0033] Mode 5 [t4~t5]: PWM2 signal changes from high level to low level after the transmission time б 2The post-conversion signal reaches the input terminal +IN_H of the upper bridge comparator. At time t5, the voltage value of +IN_H is lower than the set voltage value, so the comparator turns off the auxiliary MOS tube.

[0034] Mode 6 [t5~t6]: From time t5 ( б 1 - б 2 ) after a delay of , at time t6, the gate voltage of the lower bridge arm changes from the on state to the off state. Mode 7 [t6~t7]: At this time, negative crosstalk occurs, and the Miller current will flow through the low impedance loop formed by the parasitic diode and series capacitor of the auxiliary power tube. The negative voltage crosstalk generated by the gate-source of the upper tube will be reduced, which inhibits the damage of the negative crosstalk voltage to the upper tube when the lower tube is turned off.

[0035] Mode 8 [t7~t0]: The circuit reaches stability and no crosstalk occurs in the circuit.

[0036] According to the working principle of the proposed PGD, the crosstalk voltage can be minimized without slowing down the switching speed. The proposed PGD circuit is suitable for SiC MOSFETs with fast switching capability.

[0037] The proposed PGD is simulated and experimentally verified using a double pulse test. In this implementation, LTspice is used to simulate the conventional gate driver (CGD) and the gate driver (PGD) proposed in this paper. To be consistent with the experimental conditions, the positive and negative gate voltages are set to +20V and -5V, respectively. The main circuit DC voltage is set to 200V and the inductive load is 200μH. The external gate resistance is 5Ω, and the parasitic inductance of all gate drivers in the simulation is 10nH.

[0038] Table I lists the switching performance parameters of different gate drivers. Figure 5 The following is a comparison of transient simulation waveforms of the lower bridge arm QH when different gate drivers are used. The positive peak gate voltage of the traditional gate driver reaches -1.8 V, while that of the gate driver proposed in this paper is around -2.8 V. Figure 6 The following is a comparison of the transient simulation waveforms of the lower bridge arm QH turn-off using different gate drivers. From the simulation results, compared with the traditional drive circuit, the drive circuit proposed in this paper not only ensures a good crosstalk suppression effect, but also improves the switching rate of the system and reduces the total switching loss. TABLE I. Parameters of PGD The simulation results show that the proposed PGD has good crosstalk suppression performance. In order to gain a deeper understanding of the characteristics of the proposed PGD, a double-pulse test platform was built for experimental verification.

[0039] The double pulse experimental parameters are shown in Table II. Figure 7 and Figure 8 The comparison test results of the bridge arm crosstalk voltage of the PGD crosstalk suppression driving circuit and the traditional driving circuit are given respectively when the lower bridge arm power device is turned on and off. The switching characteristic parameters of the experimental results are shown in Table VI. TABLE II. Double-pulse experimental parameters from Figure 7 It can be seen that the peak value of the positive crosstalk voltage of the traditional gate drive circuit reaches -2.54V. During the turn-on transient of the lower MOSFET, the gate-source voltage VgsH increases by 3.26V. Although VgsH is still within the safe range, the additional turn-on time increases the turn-on loss of the device. The peak value of the positive crosstalk voltage of the gate driver proposed in this paper is −3.11 V. After applying PGD, the crosstalk effect of the gate-source voltage VgsH is reduced by 0.57V. Compared with the traditional method, the proposed PGD ensures the stability of the gate-source voltage VgsH when positive crosstalk occurs, greatly improving the reliability of the power device. At the same time, the turn-on transient becomes 65.2% faster, reducing the turn-on loss of the device.

[0040] Figure 8 The waveform during the turn-off transient is shown. Similar to the turn-on transient, the peak negative crosstalk voltage of the conventional drive circuit is -8.51 V, and the gate-source voltage is reduced by 3.51 V during the turn-off transient. Through PGD, the negative crosstalk voltage generated by the gate is -6.63 V, and the peak negative crosstalk voltage is reduced by 22.1%. The turn-off transient is reduced from 110.0ns to 41.6ns, which is 62.2% faster, effectively suppressing the negative crosstalk generated during the communication process.

[0041] Fig. 9 The comparison test results of DC voltage are shown when the load current is 5A, the gate resistance is 5Ω, and Vdc varies from 100 to 400 V. When Vdc increases, the crosstalk phenomenon becomes more significant.

[0042] Fig.10 The comparative test results of load current variation are shown, where Vdc is 200v and the external gate resistor is 5Ω. When the load current varies from 2 to 10a, the switching loss increases and the spike increases. The working principle of the present invention is to use a comparator to control an active clamping circuit composed of an auxiliary power tube and an auxiliary capacitor to create a low impedance loop during the switching period of the switch tube, which can effectively suppress the bridge arm crosstalk problem without reducing the high switching speed of the SiC power tube.

[0043] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0044] Finally, it should be noted that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A driving circuit based on suppressing SiC MOSFET bridge arm crosstalk, characterized in that: A push-pull circuit is connected to the gate of each bridge arm SiC MOSFET, and a gate voltage clamp circuit is connected in parallel between the push-pull circuit and the gate of the SiC MOSFET. The two field effect tube G terminals of the push-pull circuit are connected to the PWM1 signal, and there is an electrical isolation barrier between the PWM1 signal and the field effect tube G terminal. б 1 The D terminal of the field effect tube is connected to the gate of the SiC MOSFET. The gate voltage clamping circuit includes a capacitor C and an auxiliary MOS tube connected in series. The G terminal of the auxiliary MOS tube is also connected to a comparator circuit.

2. The driving circuit for suppressing SiC MOSFET bridge arm crosstalk according to claim 1, characterized in that: The comparator circuit includes an amplifier module, and a resistor R5 is connected in series between the output end of the amplifier module and the auxiliary MOS tube. One end of the resistor R5 is connected to the G end of the auxiliary MOS tube, and the other end is connected to the output end of the amplifier module.

3. The driving circuit for suppressing SiC MOSFET bridge arm crosstalk according to claim 2, characterized in that: The output end of the amplifier module is connected in parallel with resistors R1, R2, R3 and R4. One end of resistor R1 is connected to the gate voltage VCC, and the other end is connected to resistor R2. The other end of resistor R2 is grounded. One end of resistor R3 is connected to the gate voltage VEE, and the other end is connected to resistor R4. The other end of resistor R4 is grounded.

4. A SiC MOSFET crosstalk suppression driving circuit according to claim 2, characterized in that: The non-phase input terminal of the amplifying module is connected to the PWM2 signal, and the inverting input terminal of the amplifying module is connected to the reference voltage.

5. A SiC MOSFET crosstalk suppression driving circuit according to claim 4, characterized in that: There is an electrical isolation barrier between the PWM2 signal and the positive phase input terminal б 2 .

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