Circuit for eliminating voltage spike caused by resonant inductance

By introducing clamp diodes into the phase shift full bridge circuit, the voltage oscillation and spike problems caused by the resonant inductance of the output rectifier tube are solved, and the voltage stress reduction and the converter efficiency are improved.

CN119727397APending Publication Date: 2025-03-28BEIJING INST OF COMP TECH & APPL
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Patent Information

Application Number
CN202411680042.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-22
Publication Date
2025-03-28

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Abstract

The invention relates to a circuit for eliminating voltage spikes caused by resonant inductance, and belongs to the field of power converters. The circuit comprises field effect transistors Q1 to Q6, capacitors C0 to C6, body diodes D1 to D4, a resonant inductor Lr, a transformer, energy storage inductors L1 and L2, clamping diodes DC1 and DC2 and an output load RL. Two diodes are introduced at the joint of the resonant inductor and the primary winding of the transformer, the other ends of the two diodes are respectively connected to the positive end and the negative end of the input voltage, and the voltage spike can be effectively eliminated by adding two clamping tubes at the input side.
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Description

Technical Field

[0001] The invention belongs to the field of power converters, and in particular relates to a circuit for eliminating voltage spikes caused by resonant inductance. Background Art

[0002] In the phase-shifted full-bridge circuit, the junction capacitance of the output rectifier will resonate with the leakage inductance or external inductance of the transformer, resulting in voltage oscillation and voltage spikes on the output rectifier, increasing its voltage stress. Generally, an RC or RCD snubber circuit is required to damp the voltage oscillation. However, the RC or RCD snubber circuit cannot completely eliminate the voltage oscillation, and its voltage spike is still very large; at the same time, the excess resonant energy in the resonant inductor is all consumed in the resistance of the RC or RCD snubber circuit, which reduces the efficiency of the converter. Summary of the invention

[0003] 1. Technical issues to be resolved

[0004] The technical problem to be solved by the present invention is how to provide a circuit for eliminating voltage spikes caused by resonant inductance, so as to solve the problem of voltage oscillation and voltage spikes on the output rectifier tube in the phase-shifted full-bridge circuit.

[0005] (II) Technical solution

[0006] In order to solve the above technical problems, the present invention proposes a circuit for eliminating voltage spikes caused by resonant inductance, the circuit comprising: field effect transistors Q1-Q6, capacitors C0-C6, body diodes D1-D4, resonant inductor Lr, transformer, energy storage inductors L1 and L2, clamping diodes DC1 and DC2, and output load RL;

[0007] Among them, Q1~Q4 are field effect tubes, forming two groups of bridge arms of the phase-shifted full bridge; Q5 and Q6 are output synchronous rectification field effect tubes;

[0008] Q1 is the upper tube of the super forearm, C1 is the junction capacitance of Q1, connected in parallel across the source and drain of Q1; D1 is the body diode of Q1, connected in parallel across the source and drain of Q1; the source of Q1 is connected to the VIN terminal, the drain is connected to point A, and the gate is connected to the driver OUTA;

[0009] Q2 is the lower tube of the super forearm, C2 is the junction capacitance of Q2, connected in parallel across the source and drain of Q2; D2 is the body diode of Q2, connected in parallel across the source and drain of Q2; the source of Q2 is connected to point A, the drain is connected to GND, and the gate is connected to the driver OUTB;

[0010] Q3 is the upper tube of the lagging arm, C3 is the junction capacitance of Q3, connected in parallel across the source and drain of Q3; D3 is the body diode of Q3, connected in parallel across the source and drain of Q3; the source of Q3 is connected to VIN, the drain is connected to point B, and the gate is connected to the driver OUTC;

[0011] Q4 is the lower tube of the lagging arm, C4 is the junction capacitance of Q4 tube, connected in parallel across the source and drain of Q4; D4 is the body diode of Q4 tube, connected in parallel across the source and drain of Q4; the source of Q4 is connected to point B, the drain is connected to GND, and the gate is connected to the driver OUTD;

[0012] Lr is the resonant inductor, with its two ends connected to points A and C respectively; Lp is the transformer primary winding inductor, with its two ends connected to points C and B respectively, and connected in series with the resonant inductor Lr; Ls is the transformer secondary winding inductor, connected to the source of Q5 and the drain of Q6 respectively;

[0013] The source of Q5 is connected to one end of the transformer secondary winding inductor Ls, the drain of Q5 is connected to the drain of Q6, the gate of Q5 is connected to the driver OUTE, and C5 is the junction capacitance of Q5, which is connected in parallel across the source and drain of Q5;

[0014] The source of Q6 is connected to the other end of the transformer secondary winding inductor Ls, the drain of Q6 is connected to the source of Q5, the gate of Q6 is connected to the driver OUTF, and C6 is the junction capacitor of Q6, which is connected in parallel across the source and drain of Q6;

[0015] L1 and L2 are energy storage inductors of the secondary circuit, respectively. One end of L1 is connected to the source of Q5, and the other end is connected to the output VO; one end of L2 is connected to the source of Q6, and the other end is connected to the output VO;

[0016] C0 and RL are the output filter capacitor and output load respectively, one end is connected to VO and the other end is connected to the drain of Q5;

[0017] The cathode of DC1 is connected to the VIN terminal, and the anode of DC1 is connected to point C; the cathode of DC2 is connected to the C terminal, and the anode of DC2 is connected to GND.

[0018] (III) Beneficial effects

[0019] The present invention proposes a circuit for eliminating voltage spikes caused by resonant inductance. In order to verify the effectiveness of eliminating voltage spikes of output rectifier tubes, a 400W phase-shifted full-bridge topology current doubler rectifier principle prototype was completed in the laboratory. Its main performance indicators are: input DC voltage Uin=300V; output DC voltage Uo=5.5V; output current Io=72A.

[0020] First, the voltage waveform at both ends of the output rectifier tube was tested without adding a clamping diode. The highest voltage peak can reach 22.2V. Figure 1 Then the clamping diode is connected from the circuit, and the voltage waveform across the output rectifier tube is measured. The highest voltage is 16V, which is 6.2V lower than that without the clamping circuit. Figure 1 As shown in b.

[0021] Tests and verifications show that the present invention can effectively eliminate voltage spikes by adding two clamping tubes on the input side. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is the voltage waveform on the output rectifier tube;

[0023] Figure 2 This is the basic circuit diagram of the transformer power section;

[0024] Figure 3 This is the voltage oscillation waveform caused by the output rectifier tube junction capacitance;

[0025] Figure 4 This is the resonant working process of Lr and C6;

[0026] Figure 5 is the equivalent circuit of the period [t6, t7];

[0027] Figure 6 The invention adds a full-bridge converter circuit after diode clamping. DETAILED DESCRIPTION

[0028] In order to make the purpose, content and advantages of the present invention more clear, the specific implementation methods of the present invention are further described in detail below in conjunction with the drawings and examples.

[0029] The present invention will analyze in detail the causes of voltage oscillation and voltage spikes of the output rectifier tube in the full-bridge converter, and focus on the basic idea of ​​adding clamping diodes to the primary side of the transformer to eliminate the voltage oscillation and voltage spikes.

[0030] In order to completely eliminate the voltage oscillation and voltage spike on the output rectifier tube, the present invention introduces two diodes at the connection between the resonant inductor and the primary winding of the transformer. The other ends of the two diodes are respectively connected to the positive end and the negative end of the input voltage. These two diodes are called clamping diodes.

[0031] In order to make the purpose, content and advantages of the present invention more clear, the specific implementation methods of the present invention are further described in detail below in conjunction with the drawings and examples.

[0032] Figure 2 The basic circuit diagram of the power part of the phase-shift controlled ZVS full-bridge converter is given, including: field effect transistors Q1-Q6, capacitors C0-C6, body diodes D1-D4, resonant inductor Lr, transformer, energy storage inductors L1 and L2, and output load RL;

[0033] Among them, Q1~Q4 are field effect tubes, forming two groups of bridge arms of the phase-shifted full bridge; Q5 and Q6 are output synchronous rectification field effect tubes;

[0034] Q1 is the upper tube of the super forearm, C1 is the junction capacitance of Q1, connected in parallel across the source and drain of Q1. D1 is the body diode of Q1, connected in parallel across the source and drain of Q1. The source of Q1 is connected to the VIN terminal, the drain is connected to point A, and the gate is connected to the driver OUTA.

[0035] Q2 is the lower tube of the super forearm, C2 is the junction capacitance of Q2, connected in parallel across the source and drain of Q2. D2 is the body diode of Q2, connected in parallel across the source and drain of Q2. The source of Q2 is connected to point A, the drain is connected to GND, and the gate is connected to the driver OUTB.

[0036] Q3 is the upper tube of the lagging arm, C3 is the junction capacitance of Q3, connected in parallel across the source and drain of Q3. D3 is the body diode of Q3, connected in parallel across the source and drain of Q3. The source of Q3 is connected to VIN, the drain is connected to point B, and the gate is connected to the driver OUTC.

[0037] Q4 is the lower tube of the lagging arm, C4 is the junction capacitance of Q4, connected in parallel across the source and drain of Q4. D4 is the body diode of Q4, connected in parallel across the source and drain of Q4. The source of Q4 is connected to point B, the drain is connected to GND, and the gate is connected to the driver OUTD.

[0038] Lr is the resonant inductor, with its two ends connected to points A and C respectively. Lp is the transformer primary winding inductor, with its two ends connected to points C and B respectively, and connected in series with the resonant inductor Lr. Ls is the transformer secondary winding inductor, connected to the source of Q5 and the drain of Q6 respectively.

[0039] The source of Q5 is connected to one end of the transformer secondary winding inductor Ls, the drain of Q5 is connected to the drain of Q6, the gate of Q5 is connected to the driver OUTE, and C5 is the junction capacitance of Q5, which is connected in parallel across the source and drain of Q5.

[0040] The source of Q6 is connected to the other end of the transformer secondary winding inductor Ls, the drain of Q6 is connected to the source of Q5, the gate of Q6 is connected to the driver OUTF, and C6 is the junction capacitor of Q6, which is connected in parallel across the source and drain of Q6.

[0041] L1 and L2 are energy storage inductors of the secondary circuit, wherein one end of L1 is connected to the source of Q5, and the other end is connected to the output VO. One end of L2 is connected to the source of Q6, and the other end is connected to the output VO.

[0042] C0 and RL are the output filter capacitor and output load respectively, one end is connected to VO and the other end is connected to the drain of Q5.

[0043] Figure 6 The present invention is Figure 2The improved circuit includes: field effect transistors Q1-Q6, capacitors C0-C6, body diodes D1-D4, resonant inductor Lr, transformer, energy storage inductors L1 and L2, clamping diodes DC1 and DC2, and output load RL; Figure 2 Two clamping diodes DC1 and DC2 are added to the circuit, where the cathode of DC1 is connected to the VIN terminal, and the anode of DC1 is connected to point C. The cathode of DC2 is connected to the C terminal, and the anode of DC2 is connected to GND.

[0044] Figure 3 The voltage oscillation waveform caused by the output rectifier tube junction capacitors C5 and C6 is given. It can be seen that points C and B, namely U CB voltage, there is a very high voltage spike. Before t6, Q3 and Q2 are turned on, and the primary current I p It increases linearly in the reverse direction, and it is not enough to provide the load current. At this time, the two output rectifier diodes Q5 and Q6 are turned on at the same time. At time t6, Ip increases in the reverse direction to the negative inductor current converted to the primary side, -I Lf / K (where K is the primary-to-secondary turns ratio of the transformer, I Lf isI L2 and I L1 The sum of Q6 ends. p Continue to increase in the reverse direction, the junction capacitance of Q6, C6 is charged. In fact, the resonant inductor and the junction capacitance of the rectifier tube are working in resonance, such as Figure 4 The working process of the resonant inductor Lr and C6 is shown.

[0045] Depend on Figure 4 The circuit is further equivalent to Figure 5 , where C0 and RL can be regarded as a current I Lf The current source, which is converted to the primary side, is -I Lf / K; C6′ is the equivalent capacitance of C6 after conversion to the primary side, and its value is C6′=4*C6 / K. At time t6, the primary circuit I p The initial values ​​of the voltages of C6 and C6′ are I p (t6) = I Lf / K,U C6′ (t6) = 0. Reference Figure 5 , we can get I p and U C6′ The expressions are:

[0046] I p (t) = I Lf (t) / K+(U in / Z r )sin[ω r (t-t6)] (1)

[0047] U C6′ (t) = U in {1-cos[ω r (t-t6)]} (2)

[0048] In the formula,

[0049] Correspondingly, the voltage U on the output rectifier Q6 C6 for:

[0050] U C6 (t)=(U in / K){1-cos[ω r (t-t6)]} (3)

[0051] From formula (1), we can see that I p The maximum value of is:

[0052] I p (t) = I Lf(t) / K+U in / Z r (4)

[0053] It consists of two parts, one part is the filter inductor current I converted to the primary side. Lf / K, the other part is the current U caused by the resonant operation of the resonant inductor and junction capacitor in / Z r , we call this part of the current the resonant current. During normal operation, I p Should be equal to I Lf / K, that is, the first part of the current, and the resonant current U in / Z r It is redundant, and the corresponding energy is stored in the resonant inductor. The excess energy in the resonant inductor must be consumed or fed back to the input power supply and the load, otherwise it will cause the voltage and primary current on the output rectifier to oscillate. In addition, it is stated that if the resistance in the line is zero, the voltage on the output rectifier is an equal-amplitude oscillation. Generally speaking, there is always a certain resistance in the line, which dampens the resonance of the resonant inductor and the junction capacitance of the output rectifier, so that the waveform on the output rectifier is gradually attenuated. In order to reduce the voltage stress of the output rectifier, it is necessary to take some measures to suppress or even eliminate the voltage oscillation on the output rectifier.

[0054] observe Figure 3 and Figure 6 , in the period [t6, t7], Q3 is turned on and the voltage at point B is U in , and the transformer primary voltage U CB is negative (the potential at point B is higher than that at point C), and there is oscillation, the amplitude of which is greater than U in, which means that the voltage at point C will be lower than zero. At this time, the clamping diode DC2 will be turned on, clamping the voltage at point C to approximately 0V. Correspondingly, the maximum voltage on the output rectifier tube Q6 is clamped at U in / K, is half of the case without clamping diode DC2; where U in is the input DC voltage, K is the primary-to-secondary turns ratio of the transformer;

[0055] Similarly, in [t 12 , t1] period, the voltage U across the transformer CB is positive and has a magnitude greater than U in Since Q1 and Q4 are turned on, the potential at point A is equal to U in , the potential at point B is equal to 0, that is, the potential at point C is higher than U in , so that the clamping diode DC1 is turned on and the potential of point C is clamped at U in Accordingly, the maximum voltage on the output rectifier Q5 is clamped at U in / K is half of the case when no clamping diode DC1 is added. DC1 and DC2 are the upper and lower clamping diodes respectively.

[0056] In order to verify the effectiveness of eliminating the output rectifier voltage spike, a 400W phase-shifted full-bridge topology current doubler rectifier prototype was completed in the laboratory. Its main performance indicators are: input DC voltage Uin=300V; output DC voltage Uo=5.5V; output current Io=72A.

[0057] First, the voltage waveform at both ends of the output rectifier tube was tested without adding a clamping diode. The highest voltage peak can reach 22.2V. Figure 1 Then the clamping diode is connected from the circuit, and the voltage waveform across the output rectifier tube is measured. The highest voltage is 16V, which is 6.2V lower than that without the clamping circuit. Figure 1 As shown in b.

[0058] Tests and verifications show that the present invention can effectively eliminate voltage spikes by adding two clamping tubes on the input side.

[0059] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A circuit for eliminating voltage spikes caused by resonant inductance, characterized in that: The circuit includes: field effect transistors Q1-Q6, capacitors C0-C6, body diodes D1-D4, resonant inductor Lr, transformer, energy storage inductors L1 and L2, clamping diodes DC1 and DC2, and output load RL; Among them, Q1~Q4 are field effect tubes, forming two groups of bridge arms of the phase-shifted full bridge; Q5 and Q6 are output synchronous rectification field effect tubes; Q1 is the upper tube of the super forearm, C1 is the junction capacitance of Q1, connected in parallel across the source and drain of Q1; D1 is the body diode of Q1, connected in parallel across the source and drain of Q1; the source of Q1 is connected to the VIN terminal, the drain is connected to point A, and the gate is connected to the driver OUTA; Q2 is the lower tube of the super forearm, C2 is the junction capacitance of Q2, connected in parallel across the source and drain of Q2; D2 is the body diode of Q2, connected in parallel across the source and drain of Q2; the source of Q2 is connected to point A, the drain is connected to GND, and the gate is connected to the driver OUTB; Q3 is the upper tube of the lagging arm, C3 is the junction capacitance of Q3, connected in parallel across the source and drain of Q3; D3 is the body diode of Q3, connected in parallel across the source and drain of Q3; the source of Q3 is connected to VIN, the drain is connected to point B, and the gate is connected to the driver OUTC; Q4 is the lower tube of the lagging arm, C4 is the junction capacitance of Q4 tube, connected in parallel across the source and drain of Q4; D4 is the body diode of Q4 tube, connected in parallel across the source and drain of Q4; the source of Q4 is connected to point B, the drain is connected to GND, and the gate is connected to the driver OUTD; Lr is the resonant inductor, with its two ends connected to points A and C respectively; Lp is the transformer primary winding inductor, with its two ends connected to points C and B respectively, and connected in series with the resonant inductor Lr; Ls is the transformer secondary winding inductor, connected to the source of Q5 and the drain of Q6 respectively; The source of Q5 is connected to one end of the transformer secondary winding inductor Ls, the drain of Q5 is connected to the drain of Q6, the gate of Q5 is connected to the driver OUTE, and C5 is the junction capacitance of Q5, which is connected in parallel across the source and drain of Q5; The source of Q6 is connected to the other end of the transformer secondary winding inductor Ls, the drain of Q6 is connected to the source of Q5, the gate of Q6 is connected to the driver OUTF, and C6 is the junction capacitor of Q6, which is connected in parallel across the source and drain of Q6; L1 and L2 are energy storage inductors of the secondary circuit, respectively. One end of L1 is connected to the source of Q5, and the other end is connected to the output VO; one end of L2 is connected to the source of Q6, and the other end is connected to the output VO; C0 and RL are the output filter capacitor and output load respectively, one end is connected to VO and the other end is connected to the drain of Q5; The cathode of DC1 is connected to the VIN terminal, and the anode of DC1 is connected to point C; the cathode of DC2 is connected to the C terminal, and the anode of DC2 is connected to GND.

2. The circuit for eliminating voltage spikes caused by resonant inductance as claimed in claim 1, characterized in that: By introducing two diodes at the connection between the resonant inductor and the primary winding of the transformer, the other ends of the two diodes are respectively connected to the positive end and the negative end of the input voltage. These two diodes are called clamping diodes.

3. The circuit for eliminating voltage spikes caused by resonant inductance as claimed in claim 1, characterized in that: Before t6, Q3 and Q2 are turned on, and the primary current I p It increases linearly in the reverse direction and is not enough to provide the load current. At this time, the two output rectifier diodes Q5 and Q6 are turned on at the same time.

4. The circuit for eliminating voltage spikes caused by resonant inductance as claimed in claim 3, characterized in that: At t6, Ip is reversed and increases to negative, which is the inductor current converted to the primary side, -I Lf / K, where K is the primary-to-secondary turns ratio of the transformer, I Lf isI L2 and I L1 The sum of the total, ending in Q6.

5. The circuit for eliminating voltage spikes caused by resonant inductance as claimed in claim 4, characterized in that: After that, Ip continues to increase in the reverse direction, and the junction capacitance of Q6, C6 is charged. In fact, the resonant inductor and the junction capacitance of the rectifier tube are working in resonance.

6. The circuit for eliminating voltage spikes caused by resonant inductance as claimed in claim 5, characterized in that: C0 and RL are considered as a current I Lf The current source, which is converted to the primary side, is -I Lf / K; C6′ is the equivalent capacitance of C6 after conversion to the primary side, and its value is C6′=4*C6 / K; at time t6, the primary circuit I p The initial values ​​of the voltages of C6 and C6′ are I p (t6) = I Lf / K,U C6′ (t6) = 0; thus I p and U C6′ The expressions are: I p (t)=I Lf (t) / K+(U in / Z r )sin[ω r (t-t6)] (1) U C6′ (t)=U in P{1-cos[ω r (t-t6)]} (2) In the formula, Correspondingly, the voltage U on the output rectifier Q6 C6 for: U C6 (t)=(U in / K){1-cos[ω r (t-t6)]} (3) From formula (1), we can see that I p The maximum value of is: I p (t)=I Lf(t) / K+U in / Z r (4) The maximum value of Ip consists of two parts, one of which is the filter inductor current I converted to the primary side. Lf / K, the other part is the current U caused by the resonant operation of the resonant inductor and junction capacitor in / Z r , this part of current is called resonant current.

7. The circuit for eliminating voltage spikes caused by resonant inductance as claimed in claim 6, characterized in that: During normal operation, I p Should be equal to I Lf / K, that is, the first part of the current, and the resonant current U in / Z r is redundant and the corresponding energy is stored in the resonant inductor.

8. The circuit for eliminating voltage spikes caused by resonant inductance as claimed in claim 7, characterized in that: The excess energy in the resonant inductor must be consumed or fed back to the input power supply and the load, otherwise it will cause the voltage and primary current on the output rectifier to oscillate.

9. The circuit for eliminating voltage spikes caused by resonant inductance as claimed in claim 1, characterized in that: During the period [t6, t7], Q3 is turned on and the voltage at point B is U in , and the transformer primary voltage U CB is negative and there is oscillation, and its amplitude is greater than U in , which means that the voltage at point C will be lower than zero. At this time, the clamping diode DC2 will be turned on, clamping the voltage at point C to approximately 0V. Correspondingly, the maximum voltage on the output rectifier tube Q6 is clamped at U in / K, is half of the case without clamping diode DC2; where U in is the input DC voltage, and K is the primary-to-secondary turns ratio of the transformer.

10. The circuit for eliminating voltage spikes caused by resonant inductance as claimed in claim 9, characterized in that: In [t 12 , t1] period, the voltage U across the transformer CB is positive and has a magnitude greater than U in ; Because Q1 and Q4 are turned on, the potential at point A is equal to U in , the potential at point B is equal to 0, that is, the potential at point C is higher than U in , so that the clamping diode DC1 is turned on and the potential of point C is clamped at U in ; Accordingly, the maximum voltage on the output rectifier Q5 is clamped at U in / K, which is half of the value when no clamping diode DC1 is added.