Mixed modulus calibration method and system for mass spectrometer high-voltage system

Abstract

The invention relates to a mixed modulus calibration method and system for a mass spectrometer high-voltage system, and the method comprises the steps: introducing a multi-segment capacitor array which comprises a first capacitor array, a second capacitor array and a third capacitor array through an AD sampling circuit; the offset voltage is quantized through the first capacitor array and the third capacitor array to obtain an offset voltage value; quantifying the capacitor mismatch through the second capacitor array to obtain a capacitor mismatch value; and compensating the AD error according to the offset voltage value and the capacitance mismatch value. According to the invention, calibration compensation with higher conversion rate and higher accuracy can be carried out.

Description

Technical Field

[0001] The present invention relates to the technical field of high-voltage system control, and in particular to a hybrid analog-to-digital calibration method and system for a high-voltage system of a mass spectrometer. Background Art

[0002] Traditional ADC correction technology is mainly divided into two categories. The first category is offset voltage calibration. The principle refers to the difference in DC voltage added to the two input terminals in order to obtain a constant zero voltage output at the output terminal in a differential amplifier or an operational amplifier with differential input. The disadvantage is that the output is only related to the input signal, common mode level and voltage gain, and has nothing to do with the offset voltage; but if the gain AV of the op amp is very large, the comparator output may be saturated, and the offset voltage cannot be compensated, and the voltage generated by the ADC cannot be calibrated. The second category is capacitor mismatch calibration. Traditional capacitor mismatch calibration adds a calibration capacitor array through hardware. In the calibration mode, the low-order capacitor array is switched by switches to quantify the mismatch of the high-order capacitor to be calibrated, and the high-order capacitor mismatch is obtained. The mismatch of the high-order capacitor value is compensated by using the calibration capacitor array. This method not only increases the circuit power consumption, but also has low compensation accuracy. Summary of the invention

[0003] The present invention aims to solve at least one of the technical problems existing in the related art. To this end, the present invention provides a hybrid analog-to-digital calibration method and system for a mass spectrometer high-pressure system.

[0004] The present invention provides a hybrid analog-to-digital calibration method for a mass spectrometer high-voltage system, comprising:

[0005] S1: introducing a multi-segment capacitor array including a first capacitor array, a second capacitor array and a third capacitor array from an AD sampling circuit;

[0006] S2: quantifying the offset voltage through the first capacitor array and the third capacitor array to obtain an offset voltage value;

[0007] S3: quantifying the capacitance mismatch through the second capacitance array to obtain a capacitance mismatch value;

[0008] S4: Compensating the AD error according to the offset voltage value and the capacitance mismatch value.

[0009] According to a hybrid analog-to-digital calibration method for a high-voltage system of a mass spectrometer provided by the present invention, the capacitor array in step S1 comprises:

[0010] A first capacitor array, wherein the first capacitor array is a calibration capacitor array;

[0011] A second capacitor array, wherein the second capacitor array is a high-position capacitor array;

[0012] A third capacitor array, wherein the third capacitor array is a low-position capacitor array;

[0013] The first capacitor array is provided with two groups, and the second capacitor array and the third capacitor array are bridged by a bridge capacitor.

[0014] According to a hybrid analog-to-digital calibration method for a high-voltage system of a mass spectrometer provided by the present invention, the weight expression of the second capacitor array is:

[0015]

[0016] The weight expression of the third capacitor array is:

[0017]

[0018] Among them, W M is the second capacitor array weight, W L is the third capacitor array weight, C b is the bridge capacitance, C msb is the second capacitor array, C lsb is the third capacitor array.

[0019] According to a hybrid analog-to-digital calibration method for a mass spectrometer high-voltage system provided by the present invention, step S2 further comprises:

[0020] S21: performing analog compensation for the offset voltage by switching the switch state of the first capacitor array, obtaining a preliminary compensation voltage value, and recording comparator output data;

[0021] S22: by switching the switch state of the third capacitor array, the residual value of the offset voltage except the preliminary compensation voltage value is approximated successively to obtain the offset voltage digital code;

[0022] S23: Calculate the residual value according to the offset voltage digital code, and calculate the offset voltage value according to the preliminary compensation voltage value and the residual value.

[0023] According to a hybrid analog-to-digital calibration method for a mass spectrometer high-pressure system provided by the present invention, the expression of the residual value in step S23 is:

[0024]

[0025] Where, ΔV OS is the residual value of the offset voltage except the preliminary compensation voltage value, x is the number of capacitors in the third capacitor array, m is the number of switches in the second capacitor array, n is the number of switches in the third capacitor array, D off(n) is the offset voltage digital code generated by the third capacitor array switch, C lsb_x is the capacitance of the capacitor in the third capacitor array, W L is the third capacitor array weight, V ref is the reference voltage.

[0026] According to a hybrid analog-to-digital calibration method for a mass spectrometer high-pressure system provided by the present invention, step S3 further comprises:

[0027] S31: performing capacitance calibration on capacitance mismatch by switching the switch states of the second capacitor array and the third capacitor array;

[0028] S32: injecting the comparator output data into the positive and negative terminals to offset the residual value and obtain the comparator output voltage difference;

[0029] S33: performing primary and secondary approximation on the comparator output voltage difference through the third capacitor array to obtain a capacitance calibration code;

[0030] S34: Calculate and obtain a capacitance mismatch value according to the capacitance calibration code.

[0031] According to a hybrid analog-to-digital calibration method for a mass spectrometer high-pressure system provided by the present invention, step S4 further comprises:

[0032] S41: Calculating the AD sampling input terminal error generated by the offset voltage according to the offset voltage value to obtain a first error value;

[0033] S42: calculating the AD sampling input terminal error caused by the capacitance mismatch according to the capacitance mismatch value to obtain a second error value;

[0034] S43: Calculate and obtain a digital output code to be compensated according to the first error value and the second error value, and compensate for the AD error according to the digital output code to be compensated.

[0035] According to a hybrid analog-to-digital calibration method for a mass spectrometer high-voltage system provided by the present invention, the expression of the first error value in step S41 is:

[0036]

[0037] Among them, V 1 is the AD sampling input error caused by the offset voltage, β is the number of mismatched capacitors, D off (β) is the digital code of the offset voltage generated by the mismatched capacitor, C lsb_β is the mismatched capacitance in the third capacitor array, C msb_l is the mismatched capacitance in the second capacitor array, m is the number of switches in the second capacitor array, n is the number of switches in the third capacitor array, WM is the second capacitor array weight, W L is the third capacitor array weight, V ref is the reference voltage;

[0038] The expression of the second error value in step S42 is:

[0039]

[0040] Among them, V 2 is the AD sampling input error caused by capacitor mismatch, γ is the number of mismatched capacitors, α is the digital output of mismatched capacitors, Q P_l+γ (β) is the capacitance calibration code at the non-inverting end of the mismatched capacitor during the sampling phase, Q N_l+γ (β) is the capacitance calibration code at the inverting end of the mismatched capacitor during the sampling phase, Q P_l (β) is the capacitance calibration code at the in-phase end of the mismatched capacitor in quantization stage 1, Q N_l (β) is the capacitance calibration code at the inverting end of the mismatched capacitor in quantization stage 1, Q P_α+γ (β) is the capacitance calibration code of the non-inverting terminal of the mismatched capacitor in the quantization stage 2, Q N_α+γ (β) is the capacitance calibration code at the inverting end of the mismatched capacitor in the quantization stage 2, Q P_msb_α (β) is the capacitance calibration code of the non-inverting end of the mismatched capacitor at the MSB end, Q N_msb_α (β) is the capacitance calibration code of the inverting end of the mismatched capacitor at the MSB end, D(α) is the digital output of the mismatched capacitor, Negate the digital output for mismatched capacitors.

[0041] The present invention also provides a hybrid analog-to-digital calibration system for a mass spectrometer high-voltage system, which is used to perform a hybrid analog-to-digital calibration method for a mass spectrometer high-voltage system as described in any one of the above items, comprising:

[0042] Building module: used for introducing a multi-segment capacitor array including a first capacitor array, a second capacitor array and a third capacitor array by an AD sampling circuit;

[0043] A voltage quantization module: used to quantify the offset voltage through the first capacitor array and the third capacitor array to obtain an offset voltage value;

[0044] Capacitance quantization module: used for quantifying the capacitance mismatch through the second capacitance array to obtain a capacitance mismatch value;

[0045] Compensation module: used for compensating AD error according to the offset voltage value and the capacitance mismatch value.

[0046] The present invention proposes a hybrid analog-to-digital calibration method and system for a mass spectrometer high-voltage system. By introducing a multi-segment capacitor array, the offset voltage and the capacitor mismatch can be quantified respectively, thereby realizing accurate compensation for the AD sampling circuit error. Compared with the traditional single calibration method, the method can better reflect the actual error situation and improve the accuracy and reliability of the calibration. Secondly, by quantizing and compensating the error, the present invention effectively reduces the system instability caused by error accumulation and improves the overall performance and stability of the mass spectrometer high-voltage system. In addition, by gradually quantizing the offset voltage and the capacitor mismatch and calculating the corresponding compensation value, the present invention simplifies the calibration process and reduces the difficulty and complexity of the calibration. Compared with the traditional calibration method that may require additional hardware resources or complex calibration circuits, the present invention realizes an efficient calibration function by making full use of the existing capacitor array and the AD sampling circuit, improves the utilization rate of hardware resources, and the universal calibration method provided by the present invention enhances the adaptability and flexibility of the system.

[0047] The present invention utilizes a compensation capacitor array to perform analog compensation for the offset voltage, and the remaining offset voltage and capacitor mismatch amount reuse a low-order capacitor array to successively approximate and generate offset and mismatch codes, so that the digital back end can perform high-precision compensation for the normal conversion digital code without considering the problem of algorithm non-convergence. Compared with the LMS algorithm, pseudo-random code verification and RC structure circuit calibration technology, the technology proposed by the present invention has a higher conversion rate and higher efficiency.

[0048] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0050] Figure 1 It is a flow chart of a hybrid analog-to-digital calibration method for a mass spectrometer high-pressure system provided by the present invention;

[0051] Figure 2 It is a structural schematic diagram of a hybrid analog-to-digital calibration system for a mass spectrometer high-pressure system provided by the present invention;

[0052] Figure 3 It is a schematic diagram of a SAR ADC analog-to-digital hybrid calibration model based on a capacitor array constructed according to the present invention.

[0053] Reference numerals:

[0054] 100, construction module; 200, voltage quantization module; 300, capacitance quantization module; 400, compensation module. DETAILED DESCRIPTION

[0055] In order to make the purpose, technical scheme and advantages of the present invention clearer, the technical scheme of the present invention will be clearly and completely described below in conjunction with the drawings in the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present invention. The following embodiments are used to illustrate the present invention, but cannot be used to limit the scope of the present invention.

[0056] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the embodiment of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0057] In order to better understand the present invention, the research background of the present invention is first explained below.

[0058] The triple quadrupole mass spectrometer is widely used in military reconnaissance, nuclear industry, public security, and environmental science as a conventional quantitative analysis instrument due to its high sensitivity, fast analysis speed, and small sample consumption. When using a triple quadrupole mass spectrometer, the mobile phase sample is first placed in the injection system. After the sample is pretreated by the injection system, it enters the ion source. The present invention is based on atmospheric pressure chemical ionization (APCI) and is studied on the basis of the source. The charged ions generated by the APCI source need to enter the quadrupole mass analyzer for ion screening and detection. In the mass analyzer, a radio frequency voltage matching the charged ions needs to be applied to ensure that the charged ions perform spiral motion in the analyzer to complete ion detection. The mass analyzer screens ions of different mass-to-charge ratios according to different U / V values, where U and V are the DC high voltage and radio frequency voltage loaded into the mass analyzer, respectively.

[0059] Based on an existing new type of boosting method, in view of the difficulty in realizing high-voltage DC programmable power supplies at home and abroad, a step-type constant current control method is proposed. This method greatly improves the adjustable voltage range and stability of the programmable power supply, thus opening up new ideas for high-voltage DC programmable power supplies.

[0060] The step-type constant current control method is to divide a high-voltage power supply into several groups of small power supplies and then use constant current protection. The several small power supplies must be within the tolerance range of electronic devices. The step-type control method can achieve high-voltage control. The power supply can be greater than 10KV. The relay must withstand high voltage and use high-voltage relays. High voltage is very dangerous. If the device connected to the programmable power supply breaks down or short-circuits, the power supply will be burned out immediately. Constant current protection must be used for this.

[0061] Compared with the high-voltage programmable power supply, which has problems such as low accuracy and poor stability, the loop regulation of the step-type constant current control adopts the PID regulation algorithm, which is composed of proportion, differentiation and integration.

[0062] However, there is a certain error in the output voltage of the PID control method. The analysis of the error by the present invention shows that the error comes from A / D rather than D / A, because the error of D / A can be offset by A / D modulation, while the error of A / D itself cannot be offset by self-modulation.

[0063] Traditional ADC correction technology is mainly divided into two categories. The first category is offset voltage calibration. The principle refers to the difference in DC voltage added to the two input terminals in order to obtain a constant zero voltage output at the output terminal in a differential amplifier or an operational amplifier with differential input. The disadvantage is that the output is only related to the input signal, common mode level and voltage gain, and has nothing to do with the offset voltage; but if the gain AV of the op amp is very large, the comparator output may be saturated, and the offset voltage cannot be compensated, and the voltage generated by the ADC cannot be calibrated. The second category is capacitor mismatch calibration. Traditional capacitor mismatch calibration adds a calibration capacitor array through hardware. In the calibration mode, the low-order capacitor array is switched by switches to quantify the mismatch of the high-order capacitor to be calibrated, and the high-order capacitor mismatch is obtained. The mismatch of the high-order capacitor value is compensated by using the calibration capacitor array. This method not only increases the circuit power consumption, but also has low compensation accuracy.

[0064] In order to overcome the above limitations, the present invention proposes an analog-to-digital hybrid calibration technology that coordinates analog front-end calibration with digital back-end calibration. The offset voltage is analog-compensated using a compensation capacitor array, and the remaining offset voltage and capacitor mismatch are multiplexed using a low-order capacitor array to successively approximate the offset and mismatch code, so that the digital back-end can perform high-precision compensation for the normal conversion digital code.

[0065] The embodiments of the present invention are described below with reference to the accompanying drawings.

[0066] like Figure 1 As shown, the present invention provides a hybrid analog-to-digital calibration method for a mass spectrometer high-pressure system, comprising:

[0067] S1: A multi-segment capacitor array including a first capacitor array, a second capacitor array and a third capacitor array is introduced from an AD sampling circuit.

[0068] Wherein, the capacitor array in step S1 includes:

[0069] A first capacitor array, wherein the first capacitor array is a calibration capacitor array;

[0070] A second capacitor array, wherein the second capacitor array is a high-position capacitor array;

[0071] A third capacitor array, wherein the third capacitor array is a low-position capacitor array;

[0072] The first capacitor array is provided with two groups, and the second capacitor array and the third capacitor array are bridged by a bridge capacitor.

[0073] like Figure 3 As shown in FIG. 1 , it is a schematic diagram of the SAR ADC analog-to-digital hybrid calibration model provided by the present invention. The three-segment binary capacitor arrays established are respectively the first capacitor array C al , the second capacitor array C msb , the third capacitor array C lsb , C al The capacitor array is used to perform analog “rough” compensation for the offset voltage, C msb , C lsb The part is used for the normal AD operation of the analog-to-digital converter, through the bridge capacitor C b , C lsb The weight of the capacitor is reduced, C lsb Internal C al Used with C b , so that the MSB to LSB capacitance weight is binary transition, C tail Used as tail capacitor to quantize capacitor mismatch.

[0074] Furthermore, the above C msb Most Significant Bit Capacitive Array (MSBCA) indicates the capacitor array of the most significant bit. lsb It is the least significant bit capacitive array (LSBCA), the least significant bit (LeastSignificant Bit) capacitor array.

[0075] Since the total amount of charge on the capacitor plates does not change during the switching process, the weights of the Cmsb and Clsb capacitor arrays can be derived as follows.

[0076] Wherein, the weight expression of the second capacitor array is:

[0077]

[0078] The weight expression of the third capacitor array is:

[0079]

[0080] Among them, W M is the second capacitor array weight, W L is the third capacitor array weight, C b is the bridge capacitance, C msb is the second capacitor array, C lsb is the third capacitor array.

[0081] Furthermore, the two most important factors causing AD errors are offset voltage and capacitor mismatch. The present invention quantifies these two important influencing factors by establishing a mathematical model. Therefore, offset voltage quantification and mismatched capacitance quantification are performed in steps S2 and S3 respectively, laying the foundation for digital calibration in step S4.

[0082] S2: quantifying the offset voltage through the first capacitor array and the third capacitor array to obtain an offset voltage value.

[0083] In step S1 of the present invention, a calibration capacitor is introduced in the high-order segment. In step S2, by setting the switch state of the calibration capacitor, a portion of V OS The remaining offset voltage is quantized using the LSB part through SAR logic successive approximation, and the digital code is output for the back-end digital compensation, which can realize the calibration of larger offset voltage.

[0084] Wherein, step S2 further comprises:

[0085] S21: performing analog compensation for the offset voltage by switching the switch state of the first capacitor array, obtaining a preliminary compensation voltage value, and recording comparator output data;

[0086] In the specific compensation, first in the sampling stage, the initial V out =1, if V + >V - , then V out =1, then K is controlled in the quantization stage pal_1 The switch is V refSwitch to DVSS, in quantization stage 1, the initial V out =0, if V + <V - , then V out = 0, in the quantization stage 2, K is controlled pal_2 The switch is V ref Switch to DVSS, and so on.

[0087] S22: by switching the switch state of the third capacitor array, the residual value of the offset voltage except the preliminary compensation voltage value is approximated successively to obtain the offset voltage digital code;

[0088] S23: Calculate the residual value according to the offset voltage digital code, and calculate the offset voltage value according to the preliminary compensation voltage value and the residual value.

[0089] In step S21 and step S23, switch C al The capacitor array switches to offset part of V OS , and then record the comparator output data as OSI[1:K], and the remaining V after the analog front-end calibration is completed OS The residual is called ΔV OS , ΔV OS The offset voltage digital code D is generated by successive approximation through the LSB part switch switching. off [m+n,m+1], used to quantify ΔV OS , the following residual value expression can be obtained according to the above principle.

[0090] The residual value in step S23 is expressed as:

[0091]

[0092] Where, ΔV OS is the residual value of the offset voltage except the preliminary compensation voltage value, x is the number of capacitors in the third capacitor array, m is the number of switches in the second capacitor array, n is the number of switches in the third capacitor array, D off (n) is the offset voltage digital code generated by the third capacitor array switch, C lsb_x is the capacitance of the capacitor in the third capacitor array, W L is the third capacitor array weight, V ref is the reference voltage.

[0093] S3: quantifying the capacitance mismatch through the second capacitance array to obtain a capacitance mismatch value.

[0094] Since the MSB capacitor array weight value is relatively large, according to the MSB side capacitor weight formula provided in step S1, a small capacitor mismatch in the MSB capacitor array will also produce a large error. Therefore, the LSB part with a smaller weight is treated as an ideal capacitor array. Only the MSB large capacitor array needs to be calibrated. The push-pull voltage value corresponding to the high-order capacitor weight is equal to the sum of the push-pull voltage values ​​of all low-order capacitor weights.

[0095] Wherein, step S3 further comprises:

[0096] S31: performing capacitance calibration on capacitance mismatch by switching the switch states of the second capacitor array and the third capacitor array;

[0097] S32: injecting the comparator output data into the positive and negative terminals to offset the residual value and obtain the comparator output voltage difference;

[0098] S33: performing primary and secondary approximation on the comparator output voltage difference through the third capacitor array to obtain a capacitance calibration code;

[0099] S34: Calculate and obtain a capacitance mismatch value according to the capacitance calibration code.

[0100] The specific steps in steps S31 to S34 are: capacitance calibration from C msb_m To begin, if you calibrate the P terminal C p_msb_m Capacitor mismatch, the N-terminal capacitor switches are all connected to V during the sampling phase ref , all LSB capacitor array switches at the P end are connected to DVSS, and the remaining capacitor switches are connected to V ref , C lk Switch closed, quantization phase, C lk Disconnect, then the P-side LSB capacitor switch is switched to V ref , C p_msb_m Capacitor switch is V ref Cut to DVSS, and inject OSI[1:K] data obtained by simulating the offset voltage into the P and N terminals C al Calibrate array switching states to offset ΔV OS .

[0101] The P-terminal C is generated by successive approximation of ΔV by the LSB ideal capacitor array. p_msb_m Capacitance calibration code Q p_m [m+n,m+1], the remaining capacitors are quantized one by one in this way to generate corresponding capacitance calibration codes for digital end compensation calibration, let the MSB capacitance calibration codes of P and N terminals be Q p_x [m+n,m+1] and Q n_x [m+n,m+1].

[0102] S4: Compensating the AD error according to the offset voltage value and the capacitance mismatch value.

[0103] Wherein, step S4 further comprises:

[0104] S41: Calculating the AD sampling input terminal error generated by the offset voltage according to the offset voltage value to obtain a first error value;

[0105] S42: calculating the AD sampling input terminal error caused by the capacitance mismatch according to the capacitance mismatch value to obtain a second error value;

[0106] S43: Calculate and obtain a digital output code to be compensated according to the first error value and the second error value, and compensate for the AD error according to the digital output code to be compensated.

[0107] In steps S41 to S43, first, when the ADC is operating normally, the sampling switch K p / n_msb_1 Connect V ip / n This is used to sample the input signal. When the sampling is completed, C lk Disconnect, then K p / n_msb_1 Capacitor switch is V ip / n Switch to V ref At the same time, the OSI[1:K] data obtained by simulating the offset voltage is injected into the P and N terminals C al Calibrate array switching states to offset ΔV OS At this time, V + and V - The respective expressions are:

[0108] V + =DVDD+(V ref -V ip )K p_msb_1 W M +ΔV OS ;

[0109] V - =DVDD+(V ref -V in )C n_msb_1 W M ;

[0110] Among them, V + V is the voltage value of the non-inverting terminal of the SAR ADC analog calibration circuit. - is the voltage value of the inverting terminal of the SAR ADC analog calibration circuit, DVDD is the logic value of the SAR output, V ip For no offset voltage, V in is the input voltage when the capacitor is mismatched, K p_msb_1 For the SAR ADC analog-to-digital mixed calibration model C msbPart of the switch, C n_msb_1 For the SAR ADC analog-to-digital mixed calibration model C msb Part of the correction capacitor.

[0111] Subsequent control K p / n_msb_1～m and K p / n_msb_m+1～m+n The switch is switched, and the SAR logic is used to approximate the final quantized output digital code D[1:m+n]. If the offset voltage and capacitor mismatch are considered, D[1:m+n] is superimposed with V OS The error V generated by the analog sampling input 1 , and the capacitor mismatch during the switching process is converted to the analog input error voltage V 2 , using D off [m+1:m+n], K p / n_x [m+1:m+n] The error voltage can be expressed as follows.

[0112] The expression of the first error value in step S41 is:

[0113]

[0114] Among them, V 1 is the AD sampling input error caused by the offset voltage, β is the number of mismatched capacitors, D off (β) is the digital code of the offset voltage generated by the mismatched capacitor, C lsb_β is the mismatched capacitance in the third capacitor array, C msb_l is the mismatched capacitance in the second capacitor array, m is the number of switches in the second capacitor array, n is the number of switches in the third capacitor array, W M is the second capacitor array weight, W L is the third capacitor array weight, V ref is the reference voltage.

[0115] The expression of the second error value in step S42 is:

[0116]

[0117] Among them, V 2 is the AD sampling input error caused by capacitor mismatch, γ is the number of mismatched capacitors, α is the digital output of mismatched capacitors, Q P_l+γ (β) is the capacitance calibration code at the non-inverting end of the mismatched capacitor during the sampling phase, Q N_l+γ (β) is the capacitance calibration code at the inverting end of the mismatched capacitor during the sampling phase, Q P_l (β) is the capacitance calibration code at the in-phase end of the mismatched capacitor in quantization stage 1, Q N_l (β) is the capacitance calibration code at the inverting end of the mismatched capacitor in quantization stage 1, QP_α+γ (β) is the capacitance calibration code of the non-inverting terminal of the mismatched capacitor in the quantization stage 2, Q N_α+γ (β) is the capacitance calibration code at the inverting end of the mismatched capacitor in the quantization stage 2, Q P_msb_α (β) is the capacitance calibration code of the non-inverting end of the mismatched capacitor at the MSB end, Q N_msb_α (β) is the capacitance calibration code of the inverting end of the mismatched capacitor at the MSB end, D(α) is the digital output of the mismatched capacitor, Negate the digital output for mismatched capacitors.

[0118] Finally, V 1 With V 2 Converted into V ip_in The final compensated digital output code can be obtained, thus eliminating the error caused by AD.

[0119] like Figure 2 As shown, the present invention also provides a hybrid analog-to-digital calibration system for a mass spectrometer high-pressure system, comprising:

[0120] Construction module 100: used to introduce a multi-segment capacitor array including a first capacitor array, a second capacitor array and a third capacitor array by an AD sampling circuit;

[0121] The voltage quantization module 200 is used to quantify the offset voltage through the first capacitor array and the third capacitor array to obtain an offset voltage value;

[0122] Capacitance quantization module 300: used to quantify capacitance mismatch through the second capacitor array to obtain a capacitance mismatch value;

[0123] The compensation module 400 is used to compensate the AD error according to the offset voltage value and the capacitance mismatch value.

[0124] In a specific embodiment, the present invention finds through comparative experiments that it is independent of the reference voltage when the upper limit of D / A is not exceeded. Therefore, the step-by-step constant current control of the high-voltage DC programmable power supply and the ADC calibration method of the present invention are adopted. The error generated by the ADC can be basically offset, thereby achieving stability and high accuracy. The specific analysis results are shown in Table 1.

[0125] Table 1 Error analysis of different ADC calibration methods

[0126] aisle ADC measurement error / mv Error after offset voltage calibration / mv Capacitor mismatch calibration error / mv 3-segment binary capacitor array structure error after calibration / mv 1 20.7 11.4 9.3 0.93 2 17.9 9.5 8.4 0.87 3 19.8 12.1 6.2 0.62 4 19.2 9.9 9.3 1.01

[0127] The method of the present invention is used in the development of 0-8000V, 1A programmable power supply to control high-voltage constant current aging equipment. After repeated long-term experiments, the programmable power supply is quite stable and reliable, and can smoothly transition from 0-8000V with an accuracy of less than 0.2%, and the drift is within 0.5%. When the voltage value is set, stability can be achieved quickly. The high-voltage direct-current programmable power supply method can greatly improve the high-voltage adjustment range of the programmable power supply, and provides a method for the development of high-voltage direct-current programmable power supplies, and provides experience for making higher high-voltage direct-current programmable power supplies.

[0128] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A hybrid analog-to-digital calibration method for a mass spectrometer high-voltage system, characterized in that: include: S1: introducing a multi-segment capacitor array including a first capacitor array, a second capacitor array and a third capacitor array from an AD sampling circuit; S2: quantifying the offset voltage through the first capacitor array and the third capacitor array to obtain an offset voltage value; S3: quantifying the capacitance mismatch through the second capacitance array to obtain a capacitance mismatch value; S4: Compensating the AD error according to the offset voltage value and the capacitance mismatch value.

2. A hybrid analog-to-digital calibration method for a mass spectrometer high-voltage system according to claim 1, characterized in that: The capacitor array in step S1 includes: A first capacitor array, wherein the first capacitor array is a calibration capacitor array; A second capacitor array, wherein the second capacitor array is a high-position capacitor array; A third capacitor array, wherein the third capacitor array is a low-position capacitor array; The first capacitor array is provided with two groups, and the second capacitor array and the third capacitor array are bridged by a bridge capacitor.

3. A hybrid analog-to-digital calibration method for a mass spectrometer high-voltage system according to claim 2, characterized in that: The weight expression of the second capacitor array is: The weight expression of the third capacitor array is: Among them, W M is the second capacitor array weight, W L is the third capacitor array weight, C b is the bridge capacitance, C msb is the second capacitor array, C lsb is the third capacitor array.

4. The hybrid analog-to-digital calibration method for a mass spectrometer high-voltage system according to claim 1, characterized in that: Step S2 further comprises: S21: performing analog compensation for the offset voltage by switching the switch state of the first capacitor array, obtaining a preliminary compensation voltage value, and recording comparator output data; S22: by switching the switch state of the third capacitor array, the residual value of the offset voltage except the preliminary compensation voltage value is approximated successively to obtain the offset voltage digital code; S23: Calculate the residual value according to the offset voltage digital code, and calculate the offset voltage value according to the preliminary compensation voltage value and the residual value.

5. A hybrid analog-to-digital calibration method for a mass spectrometer high-voltage system according to claim 4, characterized in that: The expression of the residual value in step S23 is: Where, ΔV OS is the residual value of the offset voltage except the preliminary compensation voltage value, x is the number of capacitors in the third capacitor array, m is the number of switches in the second capacitor array, n is the number of switches in the third capacitor array, D off (n) is the offset voltage digital code generated by the third capacitor array switch, C lsb_x is the capacitance of the capacitor in the third capacitor array, W L is the third capacitor array weight, V ref is the reference voltage.

6. A hybrid analog-to-digital calibration method for a mass spectrometer high-voltage system according to claim 4, characterized in that: Step S3 further comprises: S31: performing capacitance calibration on capacitance mismatch by switching the switch states of the second capacitor array and the third capacitor array; S32: injecting the comparator output data into the positive and negative terminals to offset the residual value and obtain the comparator output voltage difference; S33: performing primary and secondary approximation on the comparator output voltage difference through the third capacitor array to obtain a capacitance calibration code; S34: Calculate and obtain a capacitance mismatch value according to the capacitance calibration code.

7. A hybrid analog-to-digital calibration method for a mass spectrometer high-voltage system according to claim 4, characterized in that: Step S4 further comprises: S41: Calculating the AD sampling input terminal error generated by the offset voltage according to the offset voltage value to obtain a first error value; S42: calculating the AD sampling input terminal error caused by the capacitance mismatch according to the capacitance mismatch value to obtain a second error value; S43: Calculate and obtain a digital output code to be compensated according to the first error value and the second error value, and compensate for the AD error according to the digital output code to be compensated.

8. A hybrid analog-to-digital calibration method for a mass spectrometer high-voltage system according to claim 7, characterized in that: The expression of the first error value in step S41 is: Among them, V1 is the AD sampling input error caused by the offset voltage, β is the number of mismatched capacitors, and D off (β) is the digital code of the offset voltage generated by the mismatched capacitor, C lsb_β is the mismatched capacitance in the third capacitor array, C msb_l is the mismatched capacitance in the second capacitor array, m is the number of switches in the second capacitor array, n is the number of switches in the third capacitor array, W M is the second capacitor array weight, W L is the third capacitor array weight, V ref is the reference voltage; The expression of the second error value in step S42 is: Among them, V2 is the AD sampling input error caused by capacitor mismatch, γ is the number of mismatched capacitors, α is the digital output of mismatched capacitors, and Q P_l+γ (β) is the capacitance calibration code at the non-inverting end of the mismatched capacitor during the sampling phase, Q N_l+γ (β) is the capacitance calibration code at the inverting end of the mismatched capacitor during the sampling phase, Q P_l (β) is the capacitance calibration code at the in-phase end of the mismatched capacitor in quantization stage 1, Q N_l (β) is the capacitance calibration code at the inverting end of the mismatched capacitor in quantization stage 1, Q P_α+β (β) is the capacitance calibration code of the non-inverting terminal of the mismatched capacitor in the quantization stage 2, Q N_α+γ (β) is the capacitance calibration code at the inverting end of the mismatched capacitor in the quantization stage 2, Q P_msb_α (β) is the capacitance calibration code of the non-inverting end of the mismatched capacitor at the MSB end, Q N_msb_α (β) is the capacitance calibration code of the inverting end of the mismatched capacitor at the MSB end, D(α) is the digital output of the mismatched capacitor, Negate the digital output for mismatched capacitors.

9. A hybrid analog-to-digital calibration system for a mass spectrometer high-voltage system, used to perform a hybrid analog-to-digital calibration method for a mass spectrometer high-voltage system according to any one of claims 1 to 8, characterized in that: include: Building module: used for introducing a multi-segment capacitor array including a first capacitor array, a second capacitor array and a third capacitor array by an AD sampling circuit; A voltage quantization module: used to quantify the offset voltage through the first capacitor array and the third capacitor array to obtain an offset voltage value; Capacitance quantization module: used for quantifying the capacitance mismatch through the second capacitance array to obtain a capacitance mismatch value; Compensation module: used for compensating AD error according to the offset voltage value and the capacitance mismatch value.

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