Clock synchronization system, clock synchronization method, apparatus, medium, and program product

Abstract

The embodiment of the invention discloses a clock synchronization system, a clock synchronization method, equipment, a medium and a program product. A specific embodiment of the clock synchronization system comprises: a first system configured to send a clock synchronization request to a second system; the second system is configured to respond to the received clock synchronization request sent by the first system, record a timestamp as a second system timestamp and send a response handshake packet to the first system, and the first system is in communication connection with the second system; the first system is further configured to record a timestamp as a first system timestamp in response to receiving a response handshake packet sent by the second system; the second system is further configured to send a second system timestamp to the first system; the first system is further configured to perform clock synchronization processing on the first system and the second system according to the first system timestamp and the second system timestamp. According to the embodiment, the accuracy of cross-system time synchronization is improved.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of computer technology, and in particular to a clock synchronization system, a clock synchronization method, a device, a medium, and a program product. Background Art

[0002] Two systems that communicate with each other run independently, forming two independent clock systems. Since the two clock systems run independently, there will be time deviation between them. At present, when synchronizing the clocks of two systems, the commonly used method is: the two systems exchange message information containing local clock timestamps through the USB protocol, and estimate the time consumed by USB transmission through an algorithm to calculate the time deviation between the two systems.

[0003] However, when the above method is used for clock synchronization, the following technical problems often occur: in the solution that relies on the time consumed for each message exchange transmission to calculate the time deviation, the USB transmission time across systems cannot be accurately measured, resulting in poor accuracy of the time deviation determined between the two systems, resulting in poor accuracy of time synchronization between the two systems.

[0004] The above information disclosed in this Background section is only for enhancement of understanding of the background of the inventive concept and therefore it may contain information that does not form the prior art that is already known to a person of ordinary skill in the art. Summary of the invention

[0005] The content of this disclosure is used to introduce concepts in a brief form, which will be described in detail in the detailed implementation section below. The content of this disclosure is not intended to identify the key features or essential features of the technical solution claimed for protection, nor is it intended to limit the scope of the technical solution claimed for protection.

[0006] Some embodiments of the present disclosure propose a clock synchronization system, a clock synchronization method, an electronic device, a computer-readable medium, and a computer program product to solve one or more of the technical problems mentioned in the above background technology section.

[0007] In a first aspect, some embodiments of the present disclosure provide a clock synchronization system, comprising: a first system, configured to send a clock synchronization request to a second system; the second system, configured to record a timestamp as a second system timestamp in response to receiving the clock synchronization request sent by the first system, and to send a response handshake packet to the first system, wherein the first system is communicatively connected with the second system; the first system is also configured to record a timestamp as a first system timestamp in response to receiving a response handshake packet sent by the second system; the second system is also configured to send the second system timestamp to the first system; the first system is also configured to perform clock synchronization processing on the first system and the second system according to the first system timestamp and the second system timestamp.

[0008] Optionally, the first system is further configured to perform clock synchronization on the first system and the second system according to the first system timestamp and the second system timestamp through the following steps: generating a clock offset according to the first system timestamp and the second system timestamp; sending the clock offset to the second system, so that the second system performs clock synchronization according to the clock offset.

[0009] Optionally, the second system is further configured to adjust the clock of the second system according to the clock offset.

[0010] Optionally, the first system is further configured to generate a clock offset according to the first system timestamp and the second system timestamp through the following steps: determining a difference between the second system timestamp and the first system timestamp as the clock offset.

[0011] Optionally, the clock synchronization system includes various second systems, and the first system is further configured to: for each of the second systems, perform the following steps: determine the second system as the current second system; generate a clock offset of the current second system corresponding to the first system based on the first system timestamp and the second system timestamp corresponding to the current second system; send the generated clock offset to the current second system, so that the current second system performs clock synchronization according to the received clock offset.

[0012] Optionally, each of the above-mentioned second systems is configured to: in response to receiving the clock offset corresponding to the above-mentioned first system sent by any second system, determine the clock offset corresponding to the above-mentioned first system sent by any second system as the first clock offset; determine the clock offset of the above-mentioned second system corresponding to the above-mentioned first system as the second clock offset; and generate the clock offset of the above-mentioned second system corresponding to the above-mentioned any second system based on the above-mentioned first clock offset and the above-mentioned second clock offset.

[0013] Optionally, the clock synchronization system includes a head-mounted display device and a host device communicatively connected to the head-mounted display device, the first system includes the head-mounted display device or the host device, and the second system includes the host device or the head-mounted display device.

[0014] In a second aspect, some embodiments of the present disclosure provide a clock synchronization method, which is applied to a first system included in a clock synchronization system, comprising: sending a clock synchronization request to a second system included in the above-mentioned clock synchronization system; in response to receiving a response handshake packet sent by the above-mentioned second system, recording a timestamp as a first system timestamp; in response to receiving a second system timestamp corresponding to the above-mentioned clock synchronization request sent by the above-mentioned second system, performing clock synchronization processing on the above-mentioned first system and the above-mentioned second system according to the above-mentioned first system timestamp and the above-mentioned second system timestamp.

[0015] In a third aspect, some embodiments of the present disclosure provide a clock synchronization method, which is applied to a second system included in a clock synchronization system, comprising: in response to receiving a clock synchronization request sent by a first system included in the above-mentioned clock synchronization system, recording a timestamp as a second system timestamp, and sending a response handshake packet to the above-mentioned first system; sending the above-mentioned second system timestamp to the above-mentioned first system, so that the above-mentioned first system performs clock synchronization processing according to the above-mentioned second system timestamp and the first system timestamp corresponding to the above-mentioned response handshake packet.

[0016] In a fourth aspect, some embodiments of the present disclosure provide an electronic device, comprising: one or more processors; a storage device on which one or more programs are stored, and when the one or more programs are executed by the one or more processors, the one or more processors implement the method described in any implementation manner of the above-mentioned first aspect.

[0017] In a fifth aspect, some embodiments of the present disclosure provide a computer-readable medium having a computer program stored thereon, wherein when the program is executed by a processor, the method described in any implementation manner of the above-mentioned first aspect is implemented.

[0018] In a sixth aspect, some embodiments of the present disclosure provide a computer program product, including a computer program, which implements the method described in any implementation manner of the above-mentioned first aspect when executed by a processor.

[0019] The above-mentioned embodiments of the present disclosure have the following beneficial effects: through the clock synchronization system of some embodiments of the present disclosure, the accuracy of cross-system time synchronization is improved. Specifically, the reason for the poor accuracy of time synchronization between two systems is that in the solution that relies on the time consumed by each message exchange transmission to calculate the time deviation, the USB transmission time between the systems cannot be accurately measured, resulting in poor accuracy of the determined time deviation between the two systems, resulting in poor accuracy of time synchronization between the two systems. Based on this, the clock synchronization system of some embodiments of the present disclosure includes a first system, which is configured to send a clock synchronization request to a second system; the second system, which is configured to record a timestamp as a second system timestamp in response to receiving the clock synchronization request sent by the first system, and send a response handshake packet to the first system, wherein the first system is connected in communication with the second system; the first system is also configured to record a timestamp as a first system timestamp in response to receiving a response handshake packet sent by the second system; the second system is also configured to send the second system timestamp to the first system; the first system is also configured to perform clock synchronization processing on the first system and the second system according to the first system timestamp and the second system timestamp. Also, because the response handshake packet is used as the clock synchronization trigger signal between the two systems in the process of cross-system transmission, the problem of poor accuracy of the time deviation between the two systems determined due to the inability to measure the transmission time between the systems in the USB message-based synchronization scheme can be avoided, and the accuracy of the time deviation between the two systems determined is improved, thereby improving the accuracy of the cross-system time synchronization. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. Throughout the accompanying drawings, the same or similar reference numerals represent the same or similar elements. It should be understood that the drawings are schematic and that components and elements are not necessarily drawn to scale.

[0021] Figure 1 is a timing flow chart of a clock synchronization system of some embodiments of the present disclosure;

[0022] Figure 2 is a flowchart of some embodiments of a clock synchronization method applied to a first system according to the present disclosure;

[0023] Figure 3is a flowchart of some embodiments of a clock synchronization method applied to a second system according to the present disclosure;

[0024] Figure 4 It is a schematic diagram of the structure of an electronic device suitable for implementing some embodiments of the present disclosure. DETAILED DESCRIPTION

[0025] Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not intended to limit the scope of protection of the present disclosure.

[0026] It should also be noted that, for ease of description, only the parts related to the invention are shown in the drawings. In the absence of conflict, the embodiments and features in the embodiments of the present disclosure can be combined with each other.

[0027] It should be noted that the concepts such as "first" and "second" mentioned in the present disclosure are only used to distinguish different devices, modules or units, and are not used to limit the order or interdependence of the functions performed by these devices, modules or units.

[0028] It should be noted that the modifications of "one" and "plurality" mentioned in the present disclosure are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise clearly indicated in the context, it should be understood as "one or more".

[0029] The names of the messages or information exchanged between multiple devices in the embodiments of the present disclosure are only used for illustrative purposes and are not used to limit the scope of these messages or information.

[0030] The present disclosure will be described in detail below with reference to the accompanying drawings and in conjunction with embodiments.

[0031] Figure 1 1 is a timing flow chart of a clock synchronization system in some embodiments of the present disclosure. The timing flow 100 includes the following steps:

[0032] Step 101: The first system sends a clock synchronization request to the second system.

[0033] In some embodiments, the clock synchronization system may include a first system and a second system. The first system and the second system may be two systems whose clocks run independently. The first system is connected to the second system in communication. The connection between the first system and the second system may be a wired connection. The first system and the second system may be computing devices of the same type or computing devices of different types. For example, the first system and the second system may be a mobile phone and a computer, respectively. Here, there is no limitation on the types of the first system and the second system. In practice, the first system may send a clock synchronization request to the second system via USB transmission. The clock synchronization request may be a request for triggering clock synchronization. Specifically, the first system may periodically send a clock synchronization request to the second system at a preset time interval as a period. For example, the preset time interval may be 100 milliseconds.

[0034] Step 102: In response to receiving the clock synchronization request sent by the first system, the second system records the timestamp as the second system timestamp and sends a response handshake packet to the first system.

[0035] In some embodiments, the second system may record the timestamp as the second system timestamp and send a response handshake packet to the first system in response to receiving the clock synchronization request sent by the first system. The second system timestamp may represent the time when the second system receives the clock synchronization request. The response handshake packet may be data for the receiver to confirm or feedback the data of the sender. For example, the response handshake packet may be an ACK handshake packet. The ACK handshake packet may indicate successful reception. In practice, the second system may synchronously send a response handshake packet to the first system while recording the timestamp as the second system timestamp.

[0036] Step 103: In response to receiving the response handshake packet sent by the second system, the first system records the timestamp as the first system timestamp.

[0037] In some embodiments, the first system may record a timestamp as the first system timestamp in response to receiving a response handshake packet sent by the second system. The first system timestamp may represent the time when the first system receives the response handshake packet. It should be noted that, since the transmission time of the response handshake packet is extremely short, the second system timestamp and the first system timestamp may be considered to be timestamps recorded at the same physical moment.

[0038] Step 104: The second system sends the second system timestamp to the first system.

[0039] In some embodiments, the second system may send the second system timestamp to the first system. In practice, the second system may send the second system timestamp to the first system via USB transmission.

[0040] Step 105: The first system performs clock synchronization processing on the first system and the second system according to the first system timestamp and the second system timestamp.

[0041] In some embodiments, the first system performs clock synchronization processing on the first system and the second system according to the first system timestamp and the second system timestamp. In practice, first, the first system may use the local clock as the reference clock. Then, the difference between the second system timestamp and the first system timestamp may be determined as the clock offset. Then, the clock offset may be sent to the second system, so that the second system may add the clock offset to the clock of the second system to perform clock synchronization with the clock of the first system.

[0042] Optionally, the clock synchronization system may include various second systems. The first system may be further configured as follows:

[0043] For each of the above second systems, perform the following steps:

[0044] The first step is to determine the second system as the current second system.

[0045] The second step is to generate the clock offset of the current second system corresponding to the first system according to the first system timestamp and the second system timestamp corresponding to the current second system. The recording method of the first system timestamp and the second system timestamp corresponding to the current second system is as follows: Figure 1 The corresponding embodiments are not described in detail here. The first system may send clock synchronization requests to each second system synchronously. In practice, the first system may determine the difference between the second system timestamp corresponding to the current second system and the first system timestamp corresponding to the current second system as the clock offset.

[0046] The third step is to send the generated clock offset to the current second system, so that the current second system performs clock synchronization according to the received clock offset. In practice, the current second system can add the received clock offset to the clock to perform clock synchronization. Thus, each second system can perform clock synchronization processing with the first system as the clock reference system, thereby achieving clock synchronization among multiple systems. It should be noted that any system included in the clock synchronization system can be used as a clock reference system, and the operations performed by the clock reference system can refer to the first system, which will not be repeated here.

[0047] Optionally, each of the above-mentioned second systems may be configured as follows:

[0048] In the first step, in response to receiving a clock offset corresponding to the first system and sent by any second system, the clock offset corresponding to the first system and sent by any second system is determined as a first clock offset.

[0049] In the second step, the clock offset of the second system corresponding to the first system is determined as the second clock offset.

[0050] The third step is to generate a clock offset of the second system corresponding to any second system according to the first clock offset and the second clock offset. In practice, the second system can determine the difference between the second clock offset and the first clock offset as the clock offset of the second system corresponding to any second system. Thus, the clock deviation between the second systems can be determined by the clock offset of the second system corresponding to the clock reference system.

[0051] Optionally, the clock synchronization system may include a head-mounted display device and a host device communicatively connected to the head-mounted display device. For example, the head-mounted display device may be, but is not limited to, AR glasses, MR glasses, and VR glasses. The host device may be, but is not limited to, a smart terminal, a mobile phone, and a tablet computer. The first system includes a head-mounted display device or a host device, and the second system includes a host device or a head-mounted display device. It can be understood that when the first system is a head-mounted display device, the second system may be a host device. When the first system is a host device, the second system may be a head-mounted display device. Thus, it can be applied to clock synchronization between a split head-mounted display device and a host device.

[0052] Optionally, the clock synchronization system may further include a server. The first system and the second system are further configured to send registration information to the server in response to first access to the network. The registration information may include but is not limited to: device ID, device type, and registration request time.

[0053] Optionally, the server may be configured to perform the following steps:

[0054] The first step is to determine the system to be synchronized according to the received registration information in response to receiving the registration information. The system to be synchronized is the first system or the second system. In practice, the server can determine the device corresponding to the device ID included in the registration information as the system to be synchronized. If the registration information is sent by the first system, the system to be synchronized is the first system. If the registration information is sent by the second system, the system to be synchronized is the second system.

[0055] The second step is to send a heartbeat signal to each of the determined systems to be synchronized. The heartbeat signal may be a message or a data packet, which is sent from the sender to the receiver to confirm the receiving time. The heartbeat signal may include a sequence number. The sequence number may start from 0 and increase in sequence.

[0056] The third step is to determine the sending time of the above heartbeat signal as the first timestamp.

[0057] In the fourth step, in response to receiving the feedback confirmation information sent by any system to be synchronized, the time of receiving the feedback confirmation information is determined as a fourth timestamp. The feedback confirmation information can indicate that the receiver confirms receipt of the heartbeat signal.

[0058] Step 5: Send the first timestamp and the fourth timestamp to any of the systems to be synchronized.

[0059] Optionally, each of the above-mentioned systems to be synchronized may be configured to perform the following steps:

[0060] The first step is to, in response to receiving a heartbeat signal sent by the server, determine the time when the heartbeat signal is received as a second timestamp.

[0061] The second step is to send the return confirmation information to the above-mentioned server.

[0062] The third step is to determine the sending time of the above-mentioned feedback confirmation information as the third timestamp.

[0063] The fourth step is to generate a time deviation of the system to be synchronized corresponding to the server according to the first timestamp, the second timestamp, the third timestamp and the fourth timestamp in response to receiving the first timestamp and the fourth timestamp sent by the server. In practice, the system to be synchronized may first determine the difference between the second timestamp and the first timestamp as the first time difference. Then, the difference between the fourth timestamp and the third timestamp may be determined as the second time difference. Finally, the average of the first time difference and the second time difference may be determined as the time deviation of the system to be synchronized corresponding to the server.

[0064] Step 5: Synchronize and adjust the local clock of the system to be synchronized according to the generated time deviation. In practice, the system to be synchronized can add the generated time deviation to the local clock of the system to be synchronized to synchronize and adjust the local clock of the system to be synchronized.

[0065] The above-mentioned server and the related contents of the system to be synchronized are an inventive point of the embodiment of the present disclosure, which solves the technical problem of "clock synchronization based on the time deviation between systems, even if the time recorded by each system is synchronized, the time recorded by each system may be greatly different from the standard time, and the accuracy of the recorded time is poor". The factors that lead to the poor accuracy of the recorded time are often as follows: clock synchronization based on the time deviation between systems, even if the time recorded by each system is synchronized, the time recorded by each system may be greatly different from the standard time, and the accuracy of the recorded time is poor. If the above factors are solved, the effect of improving the accuracy of the time recorded by each system can be achieved. In order to achieve this effect, the present disclosure introduces a server. When each system is first connected to the network, it is necessary to first calibrate it based on the clock of the server. The clock of the server can be used as the standard time. After calibration with the standard time, the accuracy of the time recorded by the clock of each system is improved. After that, the clock between the systems is used for clock synchronization, which can improve the accuracy of clock synchronization and the accuracy of the recorded time.

[0066] The above-mentioned embodiments of the present disclosure have the following beneficial effects: through the clock synchronization system of some embodiments of the present disclosure, the accuracy of cross-system time synchronization is improved. Specifically, the reason for the poor accuracy of time synchronization between two systems is that in the solution that relies on the time consumed by each message exchange transmission to calculate the time deviation, the USB transmission time between the systems cannot be accurately measured, resulting in poor accuracy of the determined time deviation between the two systems, resulting in poor accuracy of time synchronization between the two systems. Based on this, the clock synchronization system of some embodiments of the present disclosure includes a first system, which is configured to send a clock synchronization request to a second system; the second system, which is configured to record a timestamp as a second system timestamp in response to receiving the clock synchronization request sent by the first system, and send a response handshake packet to the first system, wherein the first system is connected in communication with the second system; the first system is also configured to record a timestamp as a first system timestamp in response to receiving a response handshake packet sent by the second system; the second system is also configured to send the second system timestamp to the first system; the first system is also configured to perform clock synchronization processing on the first system and the second system according to the first system timestamp and the second system timestamp. Also, because the response handshake packet is used as the clock synchronization trigger signal between the two systems in the process of cross-system transmission, the problem of poor accuracy of the time deviation between the two systems determined due to the inability to measure the transmission time between the systems in the USB message-based synchronization scheme can be avoided, and the accuracy of the time deviation between the two systems determined is improved, thereby improving the accuracy of the cross-system time synchronization.

[0067] Further references Figure 2 , which shows a process 200 of some embodiments of a clock synchronization method applied to a first system. The process 200 of the clock synchronization method includes the following steps:

[0068] Step 201: Send a clock synchronization request to a second system included in the clock synchronization system.

[0069] In some embodiments, the specific implementation of step 201 and the technical effects brought about can be referred to Figure 1 The corresponding step 101 in the embodiments will not be described in detail here.

[0070] Step 202: In response to receiving a response handshake packet sent by the second system, record the timestamp as the first system timestamp.

[0071] In some embodiments, the specific implementation of step 202 and the technical effects brought about can be referred to Figure 1 The corresponding step 103 in the embodiments will not be described in detail here.

[0072] Step 203 : in response to receiving the second system timestamp corresponding to the clock synchronization request sent by the second system, perform clock synchronization processing on the first system and the second system according to the first system timestamp and the second system timestamp.

[0073] In some embodiments, the specific implementation of step 203 and the technical effects brought about can be referred to Figure 1 The corresponding step 105 in the embodiments will not be described in detail here.

[0074] Figure 2 The process 200 of the clock synchronization method in some corresponding embodiments reflects the steps performed by the first system when performing clock synchronization. Therefore, the schemes described in these embodiments can use the clock of the first system as the clock reference to achieve clock synchronization of the first system and the second system.

[0075] Further references Figure 3 , which shows a process 300 of some embodiments of a clock synchronization method applied to a second system. The process 300 of the clock synchronization method includes the following steps:

[0076] Step 301 : in response to receiving a clock synchronization request sent by a first system included in the clock synchronization system, record a timestamp as a second system timestamp, and send a response handshake packet to the first system.

[0077] In some embodiments, the specific implementation of step 301 and the technical effects brought about can be referred to Figure 1 The corresponding step 102 in the embodiments will not be described in detail here.

[0078] Step 302: Send the second system timestamp to the first system, so that the first system performs clock synchronization processing according to the second system timestamp and the first system timestamp of the corresponding response handshake packet.

[0079] In some embodiments, the specific implementation of step 302 and the technical effects brought about can be referred to Figure 1 The corresponding step 104 in the embodiments will not be described in detail here.

[0080] Figure 3 The process 300 of the clock synchronization method in some corresponding embodiments reflects the steps performed by the second system when performing clock synchronization. Therefore, the schemes described in these embodiments can use the clock of the first system as the clock reference to achieve clock synchronization between the first system and the second system.

[0081] Reference below Figure 4 , which shows a schematic diagram of the structure of an electronic device 400 suitable for implementing some embodiments of the present disclosure. The electronic devices in some embodiments of the present disclosure may include, but are not limited to, mobile terminals such as head-mounted display devices, mobile phones, laptop computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Figure 4 The electronic device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present disclosure.

[0082] like Figure 4 As shown, the electronic device 400 may include a processing device 401 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 402 or a program loaded from a storage device 408 into a random access memory (RAM) 403. In the RAM 403, various programs and data required for the operation of the electronic device 400 are also stored. The processing device 401, the ROM 402, and the RAM 403 are connected to each other via a bus 404. An input / output (I / O) interface 405 is also connected to the bus 404.

[0083] Typically, the following devices may be connected to the I / O interface 405: an input device 406 including, for example, a touch screen, a touch pad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, etc.; an output device 407 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; and a communication device 409. The communication device 409 may allow the electronic device 400 to communicate with other devices wirelessly or by wire to exchange data. Figure 4The electronic device 400 is shown with various devices, but it should be understood that it is not required to implement or possess all the devices shown. More or fewer devices may be implemented or possessed instead. Figure 4 Each block shown in the figure may represent one device, or may represent multiple devices as required.

[0084] In particular, according to some embodiments of the present disclosure, the process described above with reference to the flowchart can be implemented as a computer software program. For example, some embodiments of the present disclosure include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In some such embodiments, the computer program can be downloaded and installed from the network through the communication device 409, or installed from the storage device 408, or installed from the ROM 402. When the computer program is executed by the processing device 401, the above-mentioned functions defined in the method of some embodiments of the present disclosure are executed.

[0085] It should be noted that the computer-readable medium recorded in some embodiments of the present disclosure may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In some embodiments of the present disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, device or device. In some embodiments of the present disclosure, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code. This propagated data signal may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. The computer readable signal medium may also be any computer readable medium other than a computer readable storage medium, which may send, propagate or transmit a program for use by or in conjunction with an instruction execution system, apparatus or device. The program code contained on the computer readable medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (radio frequency), etc., or any suitable combination of the above.

[0086] In some embodiments, the client and the server may communicate using any currently known or future developed network protocol such as HTTP (HyperText Transfer Protocol), and may be interconnected with any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network ("LAN"), a wide area network ("WAN"), an internet (e.g., the Internet), and a peer-to-peer network (e.g., an ad hoc peer-to-peer network), as well as any currently known or future developed network.

[0087] The computer-readable medium may be included in the electronic device; or it may exist independently without being installed in the electronic device. The computer-readable medium carries one or more programs. When the one or more programs are executed by the electronic device, the electronic device: sends a clock synchronization request to the second system included in the clock synchronization system; in response to receiving a response handshake packet sent by the second system, records a timestamp as a first system timestamp; in response to receiving a second system timestamp corresponding to the clock synchronization request sent by the second system, performs clock synchronization processing on the first system and the second system according to the first system timestamp and the second system timestamp.

[0088] Or make the electronic device: in response to receiving a clock synchronization request sent by the first system included in the above-mentioned clock synchronization system, record the timestamp as the second system timestamp, and send a response handshake packet to the above-mentioned first system; send the above-mentioned second system timestamp to the above-mentioned first system, so that the above-mentioned first system performs clock synchronization processing according to the above-mentioned second system timestamp and the first system timestamp corresponding to the above-mentioned response handshake packet.

[0089] Computer program code for performing the operations of some embodiments of the present disclosure may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0090] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some implementations as replacements, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0091] The functions described above herein may be performed at least in part by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), complex programmable logic devices (CPLDs), and the like.

[0092] Some embodiments of the present disclosure further provide a computer program product, including a computer program, which implements any of the above-mentioned clock synchronization methods when executed by a processor.

[0093] The above descriptions are only some preferred embodiments of the present disclosure and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the invention involved in the embodiments of the present disclosure is not limited to the technical solutions formed by a specific combination of the above-mentioned technical features, but should also cover other technical solutions formed by any combination of the above-mentioned technical features or their equivalent features without departing from the above-mentioned inventive concept. For example, the above-mentioned features are replaced with the technical features with similar functions disclosed in the embodiments of the present disclosure (but not limited to) and the technical solutions formed.

Claims

1. A clock synchronization system, comprising: The first system is configured to send a clock synchronization request to the second system; a second system configured to, in response to receiving a clock synchronization request sent by the first system, record a timestamp as a second system timestamp, and send a response handshake packet to the first system, wherein the first system is communicatively connected with the second system; The first system is further configured to record a timestamp as a first system timestamp in response to receiving a response handshake packet sent by the second system; The second system is further configured to send the second system timestamp to the first system; The first system is further configured to perform clock synchronization processing on the first system and the second system according to the first system timestamp and the second system timestamp.

2. The clock synchronization system according to claim 1, wherein: The first system is further configured to perform clock synchronization processing on the first system and the second system according to the first system timestamp and the second system timestamp through the following steps: Generate a clock offset according to the first system timestamp and the second system timestamp; The clock offset is sent to the second system, so that the second system performs clock synchronization according to the clock offset.

3. The clock synchronization system according to claim 2, wherein: The second system is further configured to adjust a clock of the second system according to the clock offset.

4. The clock synchronization system according to claim 2, wherein: The first system is further configured to generate a clock offset according to the first system timestamp and the second system timestamp by the following steps: A difference between the second system timestamp and the first system timestamp is determined as a clock offset.

5. The clock synchronization system according to claim 1, wherein: The clock synchronization system comprises respective second systems, wherein the first systems are further configured to: For each of the second systems, the following steps are performed: determining the second system as a current second system; Generate a clock offset of the current second system corresponding to the first system according to the first system timestamp and the second system timestamp corresponding to the current second system; The generated clock offset is sent to the current second system, so that the current second system performs clock synchronization according to the received clock offset.

6. The clock synchronization system according to claim 5, wherein: Each of the second systems is configured as follows: In response to receiving a clock offset corresponding to the first system and sent by any second system, determining the clock offset corresponding to the first system and sent by the any second system as a first clock offset; Determine a clock offset of the second system corresponding to the first system as a second clock offset; A clock offset of the second system corresponding to the arbitrary second system is generated according to the first clock offset and the second clock offset.

7. The clock synchronization system according to claim 1, wherein: The clock synchronization system includes a head-mounted display device and a host device communicatively connected to the head-mounted display device, the first system includes the head-mounted display device or the host device, and the second system includes the host device or the head-mounted display device.

8. A clock synchronization method, applied to the first system included in the clock synchronization system according to any one of claims 1 to 7, comprising: Sending a clock synchronization request to a second system included in the clock synchronization system; In response to receiving the response handshake packet sent by the second system, recording the timestamp as the first system timestamp; In response to receiving the second system timestamp corresponding to the clock synchronization request sent by the second system, clock synchronization processing is performed on the first system and the second system according to the first system timestamp and the second system timestamp.

9. A clock synchronization method, applied to the second system included in the clock synchronization system according to any one of claims 1 to 7, comprising: In response to receiving a clock synchronization request sent by a first system included in the clock synchronization system, recording a timestamp as a second system timestamp, and sending a response handshake packet to the first system; The second system timestamp is sent to the first system, so that the first system performs clock synchronization processing according to the second system timestamp and the first system timestamp corresponding to the response handshake packet.

10. An electronic device, comprising: one or more processors; a storage device having one or more programs stored thereon, When the one or more programs are executed by the one or more processors, the one or more processors implement the method according to claim 8 or 9.

11. A computer readable medium having a computer program stored thereon, wherein: When the computer program is executed by a processor, the method according to claim 8 or 9 is implemented.

12. A computer program product comprising a computer program, which, when executed by a processor, implements the method according to claim 8 or 9.

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