Vertical gallium nitride Schottky device structure and preparation method thereof

Abstract

The invention relates to a vertical gallium nitride Schottky device structure and a preparation method thereof, and belongs to the technical field of semiconductor power devices. The vertical gallium nitride Schottky device structure comprises an anode, a cathode, an edge termination structure, and a non-intrinsic substrate layer, a buffer layer, an N + channel layer and an N-drift layer which are stacked in sequence along the thickness direction, wherein the edge termination structure covers the side wall and a part of the upper surface of the N-drift layer; the anode is located on the upper surface of the rest part of the N-drift layer and extends to the part of the upper surface of the edge termination structure to form an anode field plate, and the cathode is located on the part of the surface, not covered by the N-drift layer, of the N + channel layer; wherein the material of the edge termination structure comprises p-type semiconductor oxide. The edge termination structure with a specific structure and material is arranged, the anode field plate is arranged on the surface of the edge termination structure, and the edge termination structure and the anode field plate act together, so that the current distribution of the anode edge can be effectively controlled, the current crowding is reduced, and the reverse breakdown voltage of the device is effectively improved.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor power devices, and in particular to a vertical gallium nitride Schottky device structure and a preparation method thereof. Background Art

[0002] Gallium nitride (GaN), a wide band gap (WBG) semiconductor material, is highly favored for its electronic properties such as high breakdown field strength, high electron mobility and high electron saturation velocity. In GaN-based Schottky barrier diodes (SBDs), the vertical power device structure can effectively increase the reverse breakdown voltage (BV) by growing a thicker low-doped drift region without increasing the lateral size. However, when the vertical GaN Schottky power device is under high reverse bias, the voltage on the Schottky junction increases rapidly, and the Schottky barrier will be reduced due to the mirror force, so its reverse breakdown voltage is relatively low and the reverse leakage current is large.

[0003] In order to improve the reverse breakdown voltage of vertical GaN Schottky power devices by suppressing the large current and high electric field that may appear at the edge of the anode under the action of high reverse bias voltage, the prior art has proposed to set an edge termination structure around the anode. However, the existing edge termination structure is not effective in controlling current distribution and suppressing reverse current, and the manufacturing process cost is high. Summary of the invention

[0004] To solve the above problems, the purpose of the embodiments of the present application includes providing a vertical gallium nitride Schottky device structure and a method for preparing the same. By setting an edge termination structure with a specific structure and material composition, the production cost is low, and the current distribution at the edge of the anode electrode can be effectively controlled, reducing current crowding, thereby effectively improving the reverse breakdown voltage of the device.

[0005] In a first aspect, the present invention provides a vertical GaN Schottky device structure, including an anode, a cathode, an edge termination structure, and a non-intrinsic substrate layer, a buffer layer, a N + Channel layer, N - Drift layer, edge termination structure covering N - The sidewalls and part of the upper surface of the drift layer; the anode is located at N - The remaining part of the drift layer and the upper surface extending to the edge termination structure form an anode field plate, and the cathode is located at N + The channel layer is not N - A portion of the surface covered by the drift layer; wherein the material of the edge termination structure includes a p-type semiconductor oxide.

[0006] In the above technical solution, the vertical GaN Schottky device structure provided by the present application adopts a non-intrinsic substrate, and the edge termination structure is simultaneously arranged on the N - The sidewall and part of the upper surface of the drift layer are formed, and the material of the edge termination structure is set to be a p-type semiconductor oxide prepared by physical vapor deposition, and the p-type semiconductor oxide is - The drift layer can form a PN heterojunction, which has the characteristics of low production cost, large process window and high reliability compared with the prior art. In addition, the part of the anode extending to the surface of the edge termination structure forms an anode field plate. The edge termination structure with a specific structure and material composition works together with the anode field plate to effectively control the current distribution at the edge of the anode, reduce current crowding, effectively suppress reverse current, and thus effectively improve the reverse breakdown voltage of the device. In the case of the solution given in this application, the reverse breakdown voltage of the vertical gallium nitride Schottky device structure is at least greater than 1200V.

[0007] In some embodiments of the present application, the p-type semiconductor oxide includes at least one of p-type nickel oxide or p-type copper oxide. - The heterostructure formed by the drift layer has a smaller turn-on voltage and a greater hole injection efficiency, which is more conducive to enhancing the reverse breakdown voltage of the device.

[0008] In some embodiments of the present application, the thickness of the edge termination structure is 50-1000 nm, and the doping concentration is 10 16 -10 20 cm -3 By controlling the thickness and doping concentration of the edge termination structure within an appropriate range, the reverse breakdown voltage of the device can be further improved.

[0009] In some embodiments of the present application, the edge termination structure includes a first edge termination layer and a second edge termination layer, wherein the first edge termination layer covers N - The second edge termination layer covers the side and part of the upper surface of the drift layer. - The upper surface of the drift layer and the upper surface of the first edge termination layer, the anode is located at N - a portion of an upper surface of the drift layer and a portion of an upper surface of the second edge termination structure.

[0010] In some embodiments of the present application, the second edge termination layer covers N - A portion of the upper surface of the drift layer and the upper surface and side surfaces of the first edge termination layer.

[0011] In the above technical solution, by simultaneously providing the first edge termination layer and the second edge termination layer and controlling the position structure of the two, the electric field distribution can be further optimized, and the stability and reverse breakdown voltage of the device in high voltage applications can be enhanced.

[0012] In some embodiments of the present application, the material of the first edge termination layer includes low-doped p-type nickel oxide with a doping concentration of 10 16 -10 18 cm -3 And / or, the material of the second edge termination layer includes highly doped p-type nickel oxide with a doping concentration of 10 18 -10 20 cm -3 By setting the first edge termination layer and the second edge termination layer to have different doping concentrations, the electric field distribution can be further optimized and the reverse breakdown voltage of the device can be enhanced.

[0013] In some embodiments of the present application, the extrinsic substrate layer includes one of a silicon substrate, a sapphire substrate, a silicon carbide substrate or a QST substrate. The above extrinsic substrate layers with high thermal conductivity are used with low cost and large diameter, and can meet different reverse breakdown voltage requirements.

[0014] In some embodiments of the present application, the non-intrinsic substrate layer is a QST substrate, which includes a polycrystalline ceramic core layer, a barrier layer encapsulating the polycrystalline ceramic core layer, a bonding layer bonded to the barrier layer, and a single crystal silicon layer bonded to the bonding layer. - The thickness of the drift layer is greater than 10 μm.

[0015] Compared with traditional non-intrinsic substrate layers (silicon substrate, sapphire substrate, silicon carbide substrate, etc.), QST substrate can grow thicker, continuous, low dislocation density epitaxial layers, N - The thickness of the drift layer can be greater than 10 μm, and combined with the edge termination structure, the reverse breakdown voltage of the device can be further improved.

[0016] In some embodiments of the present application, N + The channel layer material includes highly doped gallium nitride with a doping concentration of 10 18 -10 19 cm -3 ; N - The drift layer material consists of low-doped gallium nitride with a doping concentration of 10 15 -10 16 cm -3 .

[0017] In some embodiments of the present application, the material of the buffer layer includes at least one of gallium nitride, aluminum gallium nitride, and aluminum nitride.

[0018] Optionally, the vertical GaN Schottky device structure further includes a semi-insulating layer, the semi-insulating layer being located at N + Between the channel layer and the buffer layer.

[0019] In a second aspect, the present invention provides a method for preparing the vertical GaN Schottky device structure, comprising the following steps: epitaxially growing a buffer layer, a N + Channel layer and N - Drift layer; in N + The channel layer is not N - The part of the surface covered by the drift layer forms the cathode; - The sidewalls and part of the upper surface of the drift layer form an edge termination structure; - An anode with an anode field plate is formed on the remaining upper surface of the drift layer and a portion of the upper surface of the edge termination structure to obtain a vertical gallium nitride Schottky device structure.

[0020] In the above technical solution, in the present application, a vertical GaN Schottky device structure is obtained by epitaxial growth on a non-intrinsic substrate layer, and combined with N - The sidewall and part of the upper surface of the drift layer are formed into an edge termination structure made of a p-type semiconductor oxide, and the preparation method is simple and low-cost. In addition, when forming the anode, the anode is extended to part of the upper surface of the edge termination structure, and an anode field plate can be directly formed. The anode field plate and the edge termination structure work together to effectively improve the current distribution, suppress the reverse current, and thus effectively improve the reverse breakdown voltage of the device.

[0021] In some embodiments of the present application, physical vapor deposition is used to deposit N - P-type nickel oxide is deposited on the side and a portion of the upper surface of the drift layer to form an edge termination structure.

[0022] In the above technical solution, compared with the complex and expensive epitaxial growth technologies such as metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE) used in the prior art, the present application can use a simple physical vapor deposition (PVD) technology, such as a short-range magnetron sputtering device, which can directly deposit p-type nickel oxide on N due to its low step characteristics. - The sidewall and upper surface of the drift layer are formed to form an edge termination structure, which has low manufacturing process cost, large process window and high reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0024] Figure 1A process flow chart of a method for preparing a vertical gallium nitride Schottky device structure provided in an embodiment of the present application.

[0025] Figure 2 In the embodiment of the present application, a buffer layer, a semi-insulating layer, an N + Schematic diagram of the cross section after the channel layer and drift formation layer.

[0026] Figure 3 A schematic cross-sectional view of a QST substrate provided in an embodiment of the present application.

[0027] Figure 4 For the general Figure 2 The drift formation layer in the - Schematic diagram of the cross section after the drift layer.

[0028] Figure 5 For Figure 4 N shown + The channel layer is not N - Schematic diagram of the cross section of the surface covered by the drift layer after forming the cathode.

[0029] Figure 6 For Figure 5 N shown - Schematic cross-sectional view of the sidewall and part of the upper surface of the drift layer after the edge termination structure is formed.

[0030] Figure 7 For Figure 6 N shown - Schematic cross-sectional view of a vertical GaN Schottky device structure obtained after forming an anode with an anode field plate on a portion of the upper surface of the drift layer and a portion of the upper surface of the edge termination structure.

[0031] Figure 8 A schematic cross-sectional view of another vertical GaN Schottky device structure provided in an embodiment of the present application.

[0032] Fig. 9 A schematic cross-sectional view of another vertical GaN Schottky device structure provided in an embodiment of the present application.

[0033] Description of main component symbols:

[0034] 100-vertical GaN Schottky device structure; 10-extrinsic substrate layer; 11-polycrystalline ceramic core layer; 12-first cladding layer; 13-conductive layer; 14-second cladding layer; 15-barrier layer; 16-bonding layer; 17-single crystal silicon layer; 20-buffer layer; 30-semi-insulating layer; 40-N + Channel layer; 50a-drift formation layer; 50-N -Drift layer; 60 - cathode; 70 - edge termination structure; 70a - first edge termination layer; 80 - anode; 80a - anode field plate; 82 - stepped groove; 90a, 90b - second edge termination layer; T - thickness direction. DETAILED DESCRIPTION

[0035] Below, the vertical gallium nitride Schottky device structure and the implementation method of the preparation method of the present application are specifically disclosed in detail with appropriate reference to the accompanying drawings. However, there may be cases where unnecessary detailed descriptions are omitted. For example, there are cases where detailed descriptions of well-known matters and repeated descriptions of actually the same structure are omitted. This is to avoid the following description from becoming unnecessarily lengthy and to facilitate the understanding of those skilled in the art. In addition, the drawings and the following description are provided for those skilled in the art to fully understand the present application and are not intended to limit the subject matter described in the claims.

[0036] If not otherwise specified, all embodiments and optional embodiments of the present application can be combined with each other to form a new technical solution.

[0037] Unless otherwise specified, all technical features and optional technical features of this application can be combined with each other to form a new technical solution.

[0038] If there is no special explanation, all steps of the present application can be performed sequentially or randomly, preferably sequentially. For example, the method includes steps (a) and (b), which means that the method may include steps (a) and (b) performed sequentially, or may include steps (b) and (a) performed sequentially. For example, the method may further include step (c), which means that step (c) may be added to the method in any order. For example, the method may include steps (a), (b) and (c), or may include steps (a), (c) and (b), or may include steps (c), (a) and (b), etc.

[0039] As mentioned above, in order to improve the reverse breakdown voltage of the vertical GaN Schottky power device, the prior art has proposed to set an edge termination structure around the anode. However, the existing edge termination structure is usually only set on a single side surface of the anode, which has a poor effect in suppressing the reverse current, and needs to be formed using MOCVD or MBE epitaxial growth equipment, which has a high manufacturing process cost.

[0040] Based on this, the embodiment of the present application provides a vertical GaN Schottky device structure, which forms an edge termination structure by using a p-type semiconductor oxide. - The drift layer can form a PN heterojunction by covering the N -The sidewall and part of the upper surface of the drift layer, and the anode located on part of the upper surface of the edge termination structure form an anode field plate. The edge termination structure with a specific structure and material composition works together with the anode field plate to effectively control the current distribution at the edge of the anode electrode, reduce current crowding, and effectively improve the reverse breakdown voltage of the device. In addition, the vertical gallium nitride Schottky device structure uses a low-cost non-intrinsic substrate with a diameter exceeding the intrinsic GaN substrate, thereby achieving the dual advantages of cost-effectiveness and larger size.

[0041] The specific structure and preparation method of the vertical GaN Schottky device structure provided by the embodiment of the present application are described in detail below with reference to the accompanying drawings.

[0042] Figure 1 A process flow chart of a method for preparing a vertical gallium nitride Schottky device structure provided in an embodiment of the present application. Figure 2 to Figure 7 A schematic diagram of the process of preparing a vertical GaN Schottky device structure provided in an embodiment of the present application. Figure 1 to Figure 7 The method for preparing a vertical gallium nitride Schottky device structure provided in the embodiment of the present application comprises the following steps:

[0043] S110, see Figure 4 The buffer layer 20, N 20 and N 20 are epitaxially grown in sequence along the thickness direction T on the surface of the extrinsic substrate layer 10. + Channel layer 40 and N - Drift layer 50 .

[0044] Among them, N - The drift layer 50 is N + The projected area on the channel layer 40 is smaller than N + The area of ​​the upper surface of the channel layer 40, N - The drift layer 50 is located at N + The middle portion of the channel layer 40 is in an island-like structure.

[0045] In some embodiments, see Figure 2 , N - The drift layer 50 may be formed by: + A drift forming layer 50a is formed on the surface of the channel layer 40, and the drift forming layer 50a is etched to expose a portion of N + The surface of the channel layer 40 obtains N - Drift layer 50 .

[0046] Specifically, photolithography technology can be used to set a photoresist or other more solid mask (such as SiO2, SiN xand other oxide or nitride materials, or metal materials such as Ni, Cr, Au, etc.), and then etched using vacuum plasma technology, such as reactive ion etching (RIE), RIE-ICP or electron cyclotron resonance (ECR). During the plasma etching process, Cl2, BCl3 gas or a mixture of these gases can be used to obtain the best effect. In order to further optimize the plasma conditions, other auxiliary gases can be added if necessary, including but not limited to SF6, CF4, CHF3, C4F8, Ar, N2, O2, HBr, etc. Due to the precise N + The etching of the channel layer 40 is somewhat difficult, so some over-etching may be involved in the process. In addition, the etching of the drift forming layer 50a may also be carried out by wet chemical methods, using chemical etchants such as KOH or TMAH. In some cases, plasma etching can also be combined with wet chemical etching to complete the main etching task and repair the material damage that may occur after etching.

[0047] In some embodiments, the extrinsic substrate layer 10 includes one of a silicon substrate, a sapphire substrate, a silicon carbide substrate or a QST (Qromis Substrate Technology) substrate. Optionally, the thickness of the extrinsic substrate layer 10 may be 50 μm to 1500 μm.

[0048] Preferably, the non-intrinsic substrate layer 10 is a QST substrate. Figure 3 The QST substrate includes a polycrystalline ceramic core layer 11, a barrier layer 15 encapsulating the polycrystalline ceramic core layer 11, a bonding layer 16 bonded to the barrier layer 15, and a single crystal silicon layer 17 bonded to the barrier layer.

[0049] The thickness of the polycrystalline ceramic core layer 11 may be 100 μm to 1500 μm, for example, 750 μm. The material of the polycrystalline ceramic core layer 11 may include polycrystalline aluminum nitride (poly-AlN), and may also include polycrystalline gallium nitride, polycrystalline aluminum gallium nitride, etc. Preferably, the material of the polycrystalline ceramic core layer 11 includes polycrystalline aluminum nitride, which has a highly matched thermal expansion coefficient with GaN and has a thermal conductivity similar to or better than that of Si, so that a thicker, continuous, low dislocation density epitaxial layer can be grown.

[0050] In some embodiments, the polycrystalline ceramic core layer 11 is coated with a first cladding layer 12 for encapsulating and protecting the polycrystalline ceramic core layer 11. The material of the first cladding layer 12 may include silicon dioxide (SiO2).

[0051] In some embodiments, the QST substrate further includes a conductive layer 13 surrounding the first cladding layer 12. The conductive layer 13 may be made of doped polysilicon, and may have a thickness of 0.1-5 μm, for example, 0.3 μm. The provision of the conductive layer 13 facilitates the processing of the QST substrate in the subsequent preparation of semiconductor devices, for example, facilitating adsorption onto the electronic chuck during the bonding process.

[0052] A second cladding layer 14 may be provided around the conductive layer 13, and a barrier layer 15 is formed on the surface of the second cladding layer 14. The barrier layer 15 may be made of silicon nitride, such as Si3N4. The barrier layer 15 may prevent the elements in the polycrystalline ceramic core layer 11 from diffusing.

[0053] The bonding layer 16 may be made of silicon dioxide (SiO2), and the single crystal silicon layer 17 is used to provide a starting surface for epitaxial growth of GaN, that is, as a seed layer. The thickness of the single crystal silicon layer 17 may be 0.1-1 μm, for example, 0.25 μm.

[0054] It can be understood that the buffer layer 20, N + Channel layer 40 and N - The drift layer 50 may be formed by metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE) or other epitaxial growth techniques.

[0055] In some embodiments, the material of the buffer layer 20 may include one or more of gallium nitride, aluminum gallium nitride, and aluminum nitride. Optionally, the thickness of the buffer layer 20 may be 0.5-2 μm.

[0056] In some embodiments, N + The material of the channel layer 40 includes highly doped gallium nitride (N + GaN), doped with Si at a concentration of 10 18 -10 19 cm -3 Optionally, N + The thickness of the channel layer 40 may be 0.1 μm to 1 μm.

[0057] In some embodiments, N - The material of the drift layer 50 includes low-doped gallium nitride (N - GaN), the doping elements may include Si, Ge, etc., and the doping concentration is 10 15 -10 16 cm -3 Optionally, N - The drift layer 50 may have a thickness of 0.1 to 100 μm.

[0058] Usually, in order to increase the reverse breakdown voltage of the device, it is necessary to increase N- The thickness of the drift layer 50 is reduced and its doping concentration is reduced. In the embodiment of the present application, a QST substrate with a diameter of 150 mm or more is used as the non-intrinsic substrate layer 10, N - The thickness of the drift layer 50 may be greater than 10 μm. A thicker drift region may provide the device with lower leakage current and higher reverse breakdown voltage.

[0059] In some embodiments, step S110 further includes: forming a semi-insulating layer 30 for device isolation on the surface of the buffer layer 20. The material of the semi-insulating layer 30 may include gallium nitride.

[0060] S120, see Figure 5 , in N + The channel layer 40 is not N - A portion of the surface covered by the drift layer 50 forms a cathode 60 .

[0061] It can be understood that the cathode 60 is arranged at N + The edge portion of the upper surface of the channel layer 40, and the cathode 60 and N - The drift layer 50 is not in contact with the substrate, and there is a certain distance between the two.

[0062] In some embodiments, the material of the cathode 60 may include metal materials such as Ti, Al, Cr, and Ta. In addition, composite metal stacks may be used, such as gold combinations of Ti / Al / Ni / Au, Ti / Al / Ti / Au, Ti / Al / Mo / Au, Ti / Al / Cr / Au, Ta / Al / Ta / Au, and Ti / Au, or gold-free combinations such as Ti / Al / Ni / TiN, Ti / Al / Ni / W, Ti / Al / Ti / TiN, Ti / Al / Ti / W, Ta / Al / Ta / TiN, Ta / Al / Ta / W, Ti / W, and Ti / TiN. Other metal stacks that can form ohmic contacts are also suitable for the present invention.

[0063] In some embodiments, the thickness of cathode 60 may be 10-150 nm, such as 20 nm, 50 nm, 100 nm, etc.

[0064] The cathode 60 may be formed by a physical vapor deposition (PVD) method including but not limited to sputtering, thermal evaporation, electron beam evaporation, ion beam evaporation, and the like.

[0065] S130, see Figure 6 , in N - The sidewalls and a portion of the upper surface of the drift layer 50 form an edge termination structure 70 .

[0066] The material of the edge termination structure 70 includes p-type semiconductor oxide, including but not limited to p-type nickel oxide (p- NiO), p-type copper oxide (p - CuO) etc.

[0067] In some embodiments, a p-type semiconductor oxide is deposited onto the N - The sidewalls and a portion of the upper surface of the drift layer 50 form an edge termination structure 70. By adjusting the ratio of argon (Ar) and oxygen (O2) during the deposition process, the doping concentration can be effectively controlled. Increasing the ratio of O2 will increase the hole concentration and increase the concentration of p-type carriers.

[0068] In some embodiments, the material of the edge termination structure 70 includes low-doped p-type nickel oxide with a doping concentration of 10 15 -10 16 cm -3 , the thickness of the edge termination structure 70 may be 50-1000 nm.

[0069] It can be understood that the edge termination structure 70 is not in contact with the cathode 60, and there is a certain distance between the two. The edge termination structure 70 can be a single-layer structure or a multi-layer structure.

[0070] S140, see Figure 7 , in N - An anode 80 with an anode field plate 80 a is formed on the remaining upper surface of the drift layer 50 and a portion of the upper surface of the edge termination structure 70 , thereby obtaining a vertical GaN Schottky device structure 100 .

[0071] In some embodiments, the material of the anode 80 is generally a metal with a relatively high work function, such as Ni, Pt, Au, Ti, etc.

[0072] Anode 80 with anode field plate 80a can be directly formed by physical vapor deposition method. The deposited metal can be directly - The upper surface of the drift layer 50 forms an ohmic contact. - The portion of the upper surface of the drift layer 50 that directly forms an ohmic contact is the anode 80, and the portion of the metal that extends to cover the edge termination structure 70 is formed as the anode field plate 80a. The anode field plate 80a can function as an edge termination together with the edge termination structure 70. By adjusting the length (L FP ), the distribution of the electric field can be optimized to achieve better electrical performance.

[0073] In some embodiments, the upper surface of the anode 80 is recessed inward to form a stepped groove 82, which is located in the middle part of the anode 80, so that the anode field plate 80a can form a stepped structure, thereby further improving the uniformity of the electric field distribution and improving the reverse breakdown voltage of the device.

[0074] In some embodiments, one or more field plate metallization layers may be added between the edge termination structure 70 and the anode 80 to construct a multi-layer stepped field plate structure to further enhance the electric field control capability and improve the overall reliability and performance of the device.

[0075] In the method for preparing the vertical GaN Schottky device structure provided in the embodiment of the present application, a physical vapor deposition method with a larger process window and higher stability is used to prepare the GaN Schottky device structure. - P-type nickel oxide is deposited on the sidewalls and part of the upper surface of the drift layer 50 to form an edge termination structure 70. The preparation method is simple and the process cost is low. Moreover, compared with the edge terminal in the prior art, the edge termination structure 70 with a specific structure and material composition works together with the anode field plate 80a to be more effective in suppressing reverse current, and can effectively control the current distribution at the edge of the anode electrode, reduce current crowding, and thus effectively improve the reverse breakdown voltage of the device. This technological breakthrough not only improves the performance of SBD, but also opens up new possibilities for the design and manufacture of semiconductor power devices.

[0076] See also Figure 7 In one embodiment of the present application, a vertical GaN Schottky device structure 100 is provided, comprising an anode 80, a cathode 60, an edge termination structure 70, and a non-intrinsic substrate layer 10, a buffer layer 20, and N + Channel layer 40, N - The drift layer 50 and the edge termination structure 70 cover the N - The sidewall and part of the upper surface of the drift layer 50, the anode 80 is located at N - The anode field plate 80a is formed on a portion of the upper surface of the drift layer 50 and extends to a portion of the upper surface of the edge termination structure 70. The cathode 60 is located at N + The channel layer 40 is not N - The drift layer 50 covers a portion of the surface. The material of the edge termination structure 70 includes a p-type semiconductor oxide.

[0077] In the embodiment of the present application, the edge termination structure 70 having a specific structure and material composition works together with the anode field plate 80a to improve the withstand voltage, and can effectively control the current distribution at the edge of the anode, reduce current crowding, effectively suppress reverse current, and thereby effectively improve the reverse breakdown voltage of the device.

[0078] It can be understood that the edge termination structure 70 covers the N - The edge region of the upper surface of the drift layer 50, the anode 80 is located at N - The middle region of the upper surface of the drift layer 50 .

[0079] In some embodiments, the vertical GaN Schottky device structure 100 further includes a semi-insulating layer 30 for device isolation. The semi-insulating layer 30 is located between the buffer layer 20 and the N + Between the channel layers 40.

[0080] See also Figure 8 In some embodiments, the edge termination structure 70 includes a first edge termination layer 70a and a second edge termination layer 90a. The first edge termination layer 70a covers N - The sidewall and part of the upper surface of the drift layer 50, the second edge termination layer 90a covers part of N - The upper surface of the drift layer 50 and a portion of the upper surface of the first edge termination layer 70a. The anode 80 is located at N - The remaining portion of the drift layer 50 extends over and covers a portion of the upper surface of the second edge termination layer 90 a .

[0081] In some embodiments, the first edge termination layer 70a, the second edge termination layer 90a and the anode 80 are formed on the N - The upper surface of the drift layer 50 has a stepped structure, which helps to further improve the current distribution and reduce current crowding.

[0082] In some embodiments, the material of the first edge termination layer 70a includes low-doped p-type nickel oxide with a doping concentration of 10 16 -10 18 cm -3 The material of the second edge termination layer 90a includes highly doped p-type nickel oxide with a doping concentration of 10 18 -10 20 cm -3 .

[0083] See also Fig. 9 In some embodiments, the second edge termination layer 90b also covers the side of the first edge termination layer 70a, thereby further improving the reverse withstand voltage of the device and further improving the reverse breakdown voltage of the device.

[0084] The embodiments described above are part of the embodiments of the present application, rather than all of the embodiments. The detailed description of the embodiments of the present application is not intended to limit the scope of the present application for protection, but merely represents the selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.

Claims

1. A vertical gallium nitride Schottky device structure, characterized in that: It includes an anode, a cathode, an edge termination structure, and a non-intrinsic substrate layer, a buffer layer, and N + Channel layer, N - drift layer, the edge termination structure covers the N - The sidewalls and a portion of the upper surface of the drift layer; The anode is located at the N - The remaining part of the drift layer and the upper surface extending to the upper surface of the edge termination structure form an anode field plate, and the cathode is located at the N + The channel layer is not - A portion of the surface covered by the drift layer; wherein the material of the edge termination structure includes a p-type semiconductor oxide.

2. The vertical GaN Schottky device structure according to claim 1, characterized in that: The p-type semiconductor oxide includes at least one of p-type nickel oxide or p-type copper oxide; And / or, the thickness of the edge termination structure is 50-1000nm, the doping concentration is 10 16 -10 20 cm -3 .

3. The vertical GaN Schottky device structure according to claim 1 or 2, characterized in that: The edge termination structure includes a first edge termination layer and a second edge termination layer, wherein the first edge termination layer covers the N - The sides and part of the upper surface of the drift layer; The second edge termination layer covers the N - The anode is located on the N - A portion of the upper surface of the drift layer and a portion of the upper surface of the second edge termination layer; or, the second edge termination layer covers the N - a portion of the upper surface of the drift layer and the upper surface and side surfaces of the first edge termination layer.

4. The vertical GaN Schottky device structure according to claim 3, characterized in that: The material of the first edge termination layer includes low-doped p-type nickel oxide with a doping concentration of 10 16 -10 18 cm -3 ; And / or, the material of the second edge termination layer comprises highly doped p-type nickel oxide with a doping concentration of 10 18 -10 20 cm -3 .

5. The vertical GaN Schottky device structure according to claim 1, characterized in that: The extrinsic substrate layer includes one of a silicon substrate, a sapphire substrate, a silicon carbide substrate or a QST substrate.

6. The vertical GaN Schottky device structure according to claim 5, characterized in that: The extrinsic substrate layer is a QST substrate, and the QST substrate includes a polycrystalline ceramic core layer, a barrier layer encapsulating the polycrystalline ceramic core layer, a bonding layer bonded to the barrier layer, and a single crystal silicon layer bonded to the bonding layer; and / or, the N - The thickness of the drift layer is greater than 10 μm.

7. The vertical GaN Schottky device structure according to claim 1, characterized in that: The N + The channel layer material includes highly doped gallium nitride with a doping concentration of 10 18 -10 19 cm -3 ; The N - The drift layer material consists of low-doped gallium nitride with a doping concentration of 10 15 -10 16 cm -3 .

8. The vertical GaN Schottky device structure according to claim 1, characterized in that: The material of the buffer layer includes at least one of gallium nitride, aluminum gallium nitride, and aluminum nitride; And / or, the vertical GaN Schottky device structure further includes a semi-insulating layer, the semi-insulating layer is located in the N + between the channel layer and the buffer layer.

9. A method for preparing a vertical gallium nitride Schottky device structure according to any one of claims 1 to 8, characterized in that: The following steps are involved: The buffer layer, N + Channel layer and N - drift layer; In the N + The channel layer is not N - The portion of the surface covered by the drift layer forms the cathode; In the N - The sidewalls and a portion of the upper surface of the drift layer form an edge termination structure; In the N - An anode with an anode field plate is formed on the remaining upper surface of the drift layer and a portion of the upper surface of the edge termination structure to obtain a vertical gallium nitride Schottky device structure.

10. The preparation method according to claim 9, characterized in that: The physical vapor deposition method was used to - P-type nickel oxide is deposited on the side surface and a portion of the upper surface of the drift layer to form the edge termination structure.

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