High-luminous-efficiency light-emitting diode structure and manufacturing method thereof

Abstract

The invention discloses a high-luminous-efficiency light-emitting diode structure and a manufacturing method thereof. The high-luminous-efficiency light-emitting diode structure comprises a substrate; the light-emitting unit is located above the substrate, the light-emitting unit comprises a P-type semiconductor layer, an active layer and an N-type semiconductor layer which are sequentially stacked above the substrate, and a first groove extending from the lower surface of the P-type semiconductor layer to the N-type semiconductor layer is formed in the light-emitting unit; the electrodes comprise a first electrode which is arranged in the first groove and is in contact with the N-type semiconductor layer, a second electrode which is arranged on the lower surface of the P-type semiconductor layer and a covering electrode which is arranged on the lower surface of the first electrode, and the covering electrode is electrically connected with the substrate; the insulating layer is located between the light-emitting unit and the substrate and at least fills part of the first groove. The first electrode with good ohmic contact is obtained while the quality of the second electrode is not affected, and the problem that the adhesive force of the insulating layer on the first electrode is poor after high-temperature annealing is solved.

Description

Technical Field

[0001] The invention belongs to the technical field of LEDs, and in particular relates to a high-light-efficiency light-emitting diode structure and a manufacturing method thereof. Background Art

[0002] Light Emitting Diode (LED) has the advantages of fast response speed, small size, environmental protection, long life, etc., and has a wide range of applications in many fields. The current LED chip mainly adopts a vertical structure and is widely used in blue and white LEDs, purple LEDs and near-ultraviolet LEDs. When the light-emitting band is less than 365nm, due to the serious absorption of GaN in the band below 365nm, the epitaxial structure material of the LED chip gradually changes from GaN material to AlGaN material, and the shorter the light-emitting wavelength, the higher the Al component. Due to the change of epitaxial structure materials, the traditional vertical structure LED chip process can no longer meet the demand, especially the formation of N-type ohmic contact.

[0003] In the prior art, the conventional vertical structure LED chip, because the component in the epitaxial material is usually GaN, the difficulty of making N-type ohmic contact is not high, and generally no annealing is required (or low temperature annealing, <300°C). At the same time, in the preparation process of the conventional vertical structure LED chip, the second electrode in contact with the P-type semiconductor layer is generally made first, and then the first electrode in contact with the N-type semiconductor layer is made, and the annealing temperature of the second electrode (<500°C) is higher than that of the first electrode. However, when the light-emitting band enters the short wave, in order to reduce the absorption of the epitaxial material, the Al component of the AlGaN material in the epitaxial structure is generally higher. When the Al component is increased, the N-type contact without annealing or low temperature annealing is basically a Schottky contact, and a better ohmic contact needs to be formed under high temperature annealing (>800°C). At this time, the annealing temperature of the first electrode is higher than that of the second electrode, which will cause great damage to the P-type ohmic contact.

[0004] In addition, after high-temperature annealing, the surface of the first electrode becomes rough and uneven, resulting in poor adhesion of the insulating layer subsequently deposited on the first electrode, which affects the quality of the chip.

[0005] Therefore, in view of the above technical problems, it is necessary to provide a high-light-efficiency light-emitting diode structure and a manufacturing method. Summary of the invention

[0006] The object of the present invention is to provide a high-light-efficiency light-emitting diode structure and a manufacturing method, which can achieve good N-type ohmic contact without affecting P-type ohmic contact and can improve the problem of poor adhesion of the insulating layer.

[0007] In order to achieve the above purpose, the technical solution provided by an embodiment of the present invention is as follows:

[0008] A high-light-efficiency light-emitting diode structure, the high-light-efficiency light-emitting diode structure comprising:

[0009] substrate;

[0010] A light-emitting unit is located above the substrate, the light-emitting unit comprises a P-type semiconductor layer, an active layer and an N-type semiconductor layer sequentially stacked above the substrate, and a first groove extending from the lower surface of the P-type semiconductor layer to the N-type semiconductor layer is provided in the light-emitting unit;

[0011] An electrode, comprising a first electrode disposed in the first groove and in contact with the N-type semiconductor layer, a second electrode disposed on a lower surface of the P-type semiconductor layer, and a covering electrode disposed on a lower surface of the first electrode, wherein the covering electrode is electrically connected to the substrate;

[0012] The insulating layer is located between the light emitting unit and the substrate and at least fills a portion of the first groove.

[0013] In one embodiment, the insulating layer includes a first insulating layer and a second insulating layer stacked in sequence below the light-emitting unit, the first insulating layer is located on a portion of the lower surface of the P-type semiconductor layer and the side wall and a portion of the bottom wall of the first groove, the second electrode passes through the first insulating layer and contacts the P-type semiconductor layer, the first electrode passes through the first insulating layer and contacts the N-type semiconductor layer, and a portion of the second insulating layer is located between the second electrode and the substrate.

[0014] In one embodiment, the projection area of ​​the first electrode on the bottom wall of the first groove at least partially overlaps with the projection area of ​​the covering electrode on the bottom wall of the first groove, or the projection area of ​​the first electrode on the bottom wall of the first groove is within the projection area of ​​the covering electrode on the bottom wall of the first groove, and the covering electrode is at least partially in contact with the first insulating layer.

[0015] In one embodiment, the second insulating layer is partially located outside the first insulating layer in the first groove, and / or covers a portion of the lower surface of the covering electrode, and / or covers a portion of the outer side surface of the covering electrode.

[0016] In one embodiment, a metal bonding layer is provided between the insulating layer and the substrate, a second groove connecting the covering electrode and the metal bonding layer is formed in the insulating layer, and a filling metal layer in contact with the covering electrode and the metal bonding layer is provided in the second groove.

[0017] In one embodiment, a lead electrode electrically connected to the second electrode is provided in the insulating layer, the lead electrode is electrically connected to the second electrode pad, and the lead electrode is made of the same material as the covering electrode.

[0018] In one embodiment, the N-type semiconductor layer comprises an N-type AlGaN layer or an AlInGaN layer; and / or,

[0019] The substrate is a conductive substrate.

[0020] Another embodiment of the present invention provides a technical solution as follows:

[0021] A method for manufacturing a high-light-efficiency light-emitting diode structure, the manufacturing method comprising the following steps:

[0022] Providing a substrate and preparing a light-emitting unit on the substrate, wherein the light-emitting unit includes an N-type semiconductor layer, an active layer and a P-type semiconductor layer sequentially stacked on the substrate;

[0023] Etching the light-emitting unit to form a first groove in the light-emitting unit extending from the outer surface of the P-type semiconductor layer to the N-type semiconductor layer;

[0024] An insulating layer and an electrode are prepared on the light-emitting unit, wherein the electrode comprises a first electrode disposed in the first groove and in contact with the N-type semiconductor layer, a second electrode disposed on the outer surface of the P-type semiconductor layer, and a covering electrode disposed on the outer surface of the first electrode, and the insulating layer is located on the outer surface of the light-emitting unit and fills at least a portion of the first groove;

[0025] Providing a substrate, and bonding an epitaxial structure prepared with an insulating layer and an electrode to the substrate, wherein the substrate is electrically connected to the covering electrode;

[0026] Peel off the substrate.

[0027] In one embodiment, preparing an insulating layer and an electrode on a light-emitting unit specifically includes the following steps:

[0028] Preparing a first insulating layer on the outer surface of the P-type semiconductor layer and the sidewalls and bottom wall of the first groove;

[0029] Etching the first insulating layer on the bottom wall of the first groove to form a third groove penetrating into the N-type semiconductor layer;

[0030] preparing a first electrode in the third groove;

[0031] Etching the first insulating layer on the outer surface of the P-type semiconductor layer to form a fourth groove penetrating the P-type semiconductor layer;

[0032] preparing a second electrode in the fourth groove;

[0033] preparing a covering electrode on the outer surface of the first electrode;

[0034] A second insulating layer is prepared on the outer surface of the first insulating layer, wherein the second insulating layer is partially located outside the first insulating layer in the first groove and / or covers the upper surface of the electrode and / or covers the outer side of the electrode.

[0035] In one embodiment, after preparing the first electrode in the third groove, the method further includes: annealing the first electrode at a temperature of 800° C. to 1000° C.; and / or,

[0036] After preparing the second electrode in the fourth groove, the method further includes: annealing the second electrode at a temperature less than or equal to 600°C.

[0037] In one embodiment, the covering electrode is prepared on the outer surface of the first electrode, and further comprises: simultaneously preparing a lead electrode on the outer surface of the second electrode;

[0038] After the substrate is peeled off, the method further includes: preparing a second electrode pad beside the light-emitting unit, wherein the second electrode pad is electrically connected to the lead electrode.

[0039] In one embodiment, bonding the epitaxial structure having the insulating layer and the electrode to the substrate specifically includes the following steps:

[0040] A second groove penetrating to the covering electrode is prepared in the insulating layer, and a filling metal layer in contact with the covering electrode and a metal bonding layer extending below the insulating layer are integrally prepared in the second groove;

[0041] The structure prepared with the metal bonding layer is bonded to a substrate, and the substrate is electrically connected to the covering electrode through the metal bonding layer and the filling metal layer.

[0042] Compared with the prior art, the present invention has the following beneficial effects:

[0043] The present invention first prepares a first electrode in contact with an N-type semiconductor layer and performs annealing, and then prepares a second electrode in contact with a P-type semiconductor layer, thereby obtaining a first electrode with good ohmic contact without affecting the quality of the second electrode;

[0044] The present invention first prepares a covering electrode on the outer surface of a first electrode and then prepares a second insulating layer, thereby improving the problem of poor adhesion of the insulating layer on the first electrode after high-temperature annealing. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0046] Figure 1 This is a schematic structural diagram of a high light-efficiency light-emitting diode structure in Example 1 of the present invention;

[0047] Figure 2a~2qThis is a process flow chart of the method for manufacturing a high-light-efficiency light-emitting diode structure in Example 1 of the present invention.

[0048] Description of main reference numerals:

[0049] 10-substrate, 201-P-type semiconductor layer, 202-active layer, 203-N-type semiconductor layer, 204-buffer layer, 205-substrate, 21-first groove, 301-first electrode, 302-second electrode, 311-covering electrode, 312-lead electrode, 401-first insulating layer, 402-second insulating layer, 41-second groove, 421-third groove, 422-fourth groove, 43-fifth groove, 50-second electrode pad, 60-filling metal layer, 70-metal bonding layer. DETAILED DESCRIPTION

[0050] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0051] The present invention discloses a high light-efficiency light-emitting diode structure, comprising:

[0052] substrate;

[0053] A light-emitting unit is located above the substrate, the light-emitting unit comprises a P-type semiconductor layer, an active layer and an N-type semiconductor layer sequentially stacked above the substrate, and a first groove extending from the lower surface of the P-type semiconductor layer to the N-type semiconductor layer is provided in the light-emitting unit;

[0054] An electrode, comprising a first electrode disposed in the first groove and in contact with the N-type semiconductor layer, a second electrode disposed on a lower surface of the P-type semiconductor layer, and a covering electrode disposed on a lower surface of the first electrode, wherein the covering electrode is electrically connected to the substrate;

[0055] The insulating layer is located between the light emitting unit and the substrate and at least fills a portion of the first groove.

[0056] The present invention also discloses a method for manufacturing a high-light-efficiency light-emitting diode structure, comprising the following steps:

[0057] Providing a substrate and preparing a light-emitting unit on the substrate, wherein the light-emitting unit includes an N-type semiconductor layer, an active layer and a P-type semiconductor layer sequentially stacked on the substrate;

[0058] Etching the light-emitting unit to form a first groove in the light-emitting unit extending from the outer surface of the P-type semiconductor layer to the N-type semiconductor layer;

[0059] An insulating layer and an electrode are prepared on the light-emitting unit, wherein the electrode includes a first electrode disposed in the first groove and in contact with the N-type semiconductor layer, a second electrode disposed on the outer surface of the P-type semiconductor layer, and a covering electrode disposed on the outer surface of the first electrode, and the insulating layer is located on the outer surface of the light-emitting unit and fills at least a portion of the first groove;

[0060] Providing a substrate, and bonding an epitaxial structure prepared with an insulating layer and an electrode to the substrate, wherein the substrate is electrically connected to the covering electrode;

[0061] Peel off the substrate.

[0062] The present invention is further described below with reference to specific examples.

[0063] Embodiment 1:

[0064] Ginseng Figure 1 Combined with Figure 2b As shown, the high light-efficiency light-emitting diode structure in this embodiment includes:

[0065] substrate 10;

[0066] A light emitting unit is located above the substrate, the light emitting unit comprises a P-type semiconductor layer 201, an active layer 202 and an N-type semiconductor layer 203 which are sequentially stacked above the substrate, and a first groove 21 extending from the lower surface of the P-type semiconductor layer 201 to the N-type semiconductor layer 203 is provided in the light emitting unit;

[0067] Electrodes, including a first electrode 301 disposed in the first groove 21 and in contact with the N-type semiconductor layer 203, a second electrode 302 disposed on the lower surface of the P-type semiconductor layer 201, and a covering electrode 311 disposed on the lower surface of the first electrode 301, wherein the covering electrode 311 is electrically connected to the substrate 10;

[0068] The insulating layer is located between the light emitting unit and the substrate 10 and at least fills a portion of the first groove 21 .

[0069] The substrate 10 in this embodiment is a conductive substrate, preferably a silicon substrate or a Mo / Cu substrate.

[0070] The insulating layer in this embodiment includes a first insulating layer 401 and a second insulating layer 402 stacked sequentially below the light-emitting unit. The first insulating layer 401 is located on a portion of the lower surface of the P-type semiconductor layer 201 and the side walls and a portion of the bottom wall of the first groove 21 , and a portion of the second insulating layer 402 is located between the second electrode 302 and the substrate 10 .

[0071] Specifically, the first electrode 301 penetrates the first insulating layer 401 and contacts the N-type semiconductor layer 203 , and the second electrode 302 penetrates the first insulating layer 401 and contacts the P-type semiconductor layer 201 .

[0072] More specifically, in this embodiment, a portion of the second insulating layer 402 is located outside the first insulating layer 401 in the first groove 21 and covers a portion of the lower surface and the outer side surface of the covering electrode 311 .

[0073] Of course, in other embodiments, the morphology of the second insulating layer 402 includes being partially located outside the first insulating layer 401 in the first groove 21 , and / or covering a portion of the lower surface of the covering electrode 311 , and / or covering the outer side surface of the covering electrode 311 .

[0074] Combination Figure 2j As shown, the insulating layer in this embodiment is provided with a second groove 41 penetrating to the covering electrode 311, and a metal bonding layer 70 is further provided between the insulating layer and the substrate 10. The second groove 41 connects the covering electrode 311 and the metal bonding layer 70, and a filling metal layer 60 in contact with the covering electrode 311 and the metal bonding layer 70 is provided in the second groove 41. After the above structure is bonded to the substrate 10, the substrate 10 is electrically connected to the covering electrode 311 through the metal bonding layer 70 and the filling metal layer 60. The lower surface of the filling metal layer 60 should be at the same level as the lower surface of the insulating layer as much as possible, and the filling metal layer 60 can effectively avoid the generation of bonding holes during bonding.

[0075] In this embodiment, the material of the metal bonding layer 70 includes but is not limited to one or more of AuSn, NiSn, CuSn, AgSn, Auln, and AuAu.

[0076] It is worth noting that a bonding barrier layer (not shown) may be further provided between the metal bonding layer 70 and the insulating layer, and the material of the bonding barrier layer includes but is not limited to one or more of Ti, TiW, Ni, Pt, Au, and Al.

[0077] Furthermore, in this embodiment, a lead electrode 312 electrically connected to the second electrode 302 is disposed in the insulating layer, and the lead electrode 312 is electrically connected to the second electrode pad 50 disposed beside the light emitting unit.

[0078] Specifically, the lead electrode 312 is disposed on the lower surface of the second electrode 302 and covers a portion of the lower surface of the first insulating layer 401. Preferably, the lead electrode 312 and the covering electrode 311 are made of the same material.

[0079] In addition, the projection area of ​​the first electrode 301 on the bottom wall of the first groove 21 at least partially overlaps with the projection area of ​​the covering electrode 311 on the bottom wall of the first groove 21, or the projection area of ​​the first electrode 301 on the bottom wall of the first groove 21 is within the projection area of ​​the covering electrode 311 on the bottom wall of the first groove 21, and the covering electrode 311 at least partially contacts the first insulating layer 401. In this embodiment, the projection area of ​​the first electrode 301 on the bottom wall of the first groove 21 is located within the projection area of ​​the covering electrode 311 on the bottom wall of the first groove 21, and the covering electrode 311 partially contacts the first insulating layer 401, that is, the covering electrode 311 needs to cover the lower surface of the first electrode 301, and the second insulating layer 402 does not contact the first electrode 301.

[0080] In this embodiment, the material of the first electrode 301 includes but is not limited to one or more of Cr, Ti, Al, Ni, and Au.

[0081] In this embodiment, the material of the second electrode 302 can be a highly reflective metal material such as Ag, Al, Ni, Rh, etc. that can directly form an ohmic contact with the semiconductor layer, or it can be a combination of a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO) that can form an ohmic contact with the semiconductor layer and a highly reflective metal material such as Ag, Al, Ni, Rh, etc. It can also be an omnidirectional reflector (ODR) structure composed of a transparent conductive layer, a dielectric layer and a metal reflective layer to facilitate brightness improvement.

[0082] Furthermore, the N-type semiconductor layer 203 in this embodiment includes an N-type AlGaN layer or an AlINGaN layer, wherein the Al component is greater than 10%, the P-type semiconductor layer 201 includes a P-type AlGaN layer or a GaN layer, and the active layer includes a component capable of emitting ultraviolet waves, such as AlInGaN or AlGaN.

[0083] The method for manufacturing a high-light-efficiency light-emitting diode structure in this embodiment comprises the following steps:

[0084] S1. Provide a substrate 205 and prepare a light-emitting unit on the substrate 205. The light-emitting unit includes an N-type semiconductor layer 203, an active layer 202 and a P-type semiconductor layer 201 which are sequentially stacked on the substrate.

[0085] Ginseng Figure 2a As shown, this step specifically involves sequentially growing a buffer layer 204 , an N-type semiconductor layer 203 , an active layer 202 and a P-type semiconductor layer 201 on a substrate 205 to form an epitaxial wafer having an epitaxial structure.

[0086] S2 , etching the light emitting unit to form a first groove 21 extending from the outer surface of the P-type semiconductor layer 201 to the N-type semiconductor layer 203 in the light emitting unit.

[0087] Specifically, refer to Figure 2b As shown, a patterned photoresist layer is first formed on the outer surface of the P-type semiconductor layer 201 by a photolithography process, and then the epitaxial wafer is mesa-etched by a dry etching process, such as an inductively coupled plasma etching process (ICP), to form a plurality of first grooves 21 extending from the outer surface of the P-type semiconductor layer 201 to the N-type semiconductor layer 203.

[0088] Illustratively, before etching the epitaxial wafer, the present embodiment also includes cleaning the epitaxial wafer with an inorganic or organic solution to remove pollutants on the surface of the epitaxial wafer; and high-temperature annealing of the epitaxial wafer to break the Mg-H bond and activate the P-type semiconductor layer 201.

[0089] It is worth noting that if Mg activation treatment has been performed in the epitaxial furnace during the growth of the epitaxial structure, high-temperature annealing of the epitaxial wafer can be omitted.

[0090] S3. Prepare an insulating layer and an electrode on the light-emitting unit, wherein the electrode includes a first electrode 301 disposed in the first groove 21 and in contact with the N-type semiconductor layer 203, a second electrode 302 disposed on the outer surface of the P-type semiconductor layer 201, and a covering electrode 311 disposed on the outer surface of the first electrode 301, and the insulating layer is located on the outer surface of the light-emitting unit and fills at least a portion of the first groove 21.

[0091] Specifically, this step includes:

[0092] 1. Ginseng Figure 2c As shown, a first insulating layer 401 is formed on the outer surface of the P-type semiconductor layer 201 and the sidewalls and bottom wall of the first groove 21 .

[0093] 2. Ginseng Figure 2d As shown, the first insulating layer 401 on the bottom wall of the first groove 21 is etched to form a third groove 421 penetrating to the N-type semiconductor layer 203 .

[0094] 3. Ginseng Figure 2e As shown, the first electrode 301 is prepared in the third groove 421 .

[0095] Specifically, after the first electrode 301 is deposited, it is necessary to perform high temperature annealing on the first electrode 301 , and the annealing temperature is 800° C. to 1000° C.

[0096] 4. Ginseng Figure 2f As shown, the first insulating layer 401 on the outer surface of the P-type semiconductor layer 201 is etched to form a fourth groove 422 penetrating the P-type semiconductor layer 201 .

[0097] 5. Ginseng Figure 2g As shown, the second electrode 302 is prepared in the fourth groove 422 .

[0098] Illustratively, in this embodiment, after the deposition of the second electrode 302 is completed, the second electrode 302 needs to be annealed, and the annealing temperature is less than 600°C.

[0099] 6. Ginseng Figure 2h As shown, a covering electrode 311 is prepared on the outer surface of the first electrode 301 , and a lead electrode 312 is prepared on the outer surface of the second electrode 302 .

[0100] In this embodiment, the cover electrode 311 and the lead electrode 312 are deposited simultaneously by designing the photolithography pattern, thereby simplifying the process flow.

[0101] Exemplarily, the lead electrode 312 covers a portion of the outer surface of the first insulating layer 401 .

[0102] 7. Prepare a second insulating layer 402 on the outer surface of the first insulating layer 401 . Part of the second insulating layer 402 is located outside the first insulating layer 401 in the first groove 21 , and covers part of the upper surface of the covering electrode 311 and the outer side surface of the covering electrode 311 .

[0103] Specifically, refer to Figure 2i As shown, firstly, the second insulating layer 402 is deposited on the outer surface of the first insulating layer 401, so that the second insulating layer 402 covers the entire surface of the above structure, that is, the outer surface of the second insulating layer 402 is a plane; then, Figure 2j As shown, the second insulating layer 402 is etched to form a second groove 41 penetrating to the covering electrode 311 .

[0104] S4, providing a substrate 10, and bonding the epitaxial structure prepared with an insulating layer and electrodes to the substrate 10, and the substrate 10 is electrically connected to the covering electrode 311.

[0105] Specifically, this step includes the following steps:

[0106] 1. Ginseng Figure 2k As shown, a filling metal layer 60 in contact with the cover electrode 311 and a metal bonding layer 70 extending below the second insulating layer 60 are integrally prepared in the second groove 41, and the outer surface of the filling metal layer 60 is flush with the outer surface of the second insulating layer 402. In addition, in this embodiment, the filling metal layer 60 is directly prepared after the second insulating layer 402 is etched to form the second groove 41, and no photolithography steps are added, which simplifies the process. Exemplarily, a bonding barrier layer is also deposited before depositing the metal bonding layer 70.

[0107] 2. Ginseng Figure 2lAs shown, the structure prepared with the metal bonding layer 70 is bonded to the substrate 10 , and the substrate 10 is electrically connected to the covering electrode 11 through the metal bonding layer 70 and the filling metal layer 60 .

[0108] S5. Figure 2m As shown, the substrate 205 is peeled off.

[0109] Specifically, the substrate 205 is first removed by one or more of the processes such as laser stripping, mechanical polishing, wet etching, and dry etching, and then the buffer layer 204 is preferably etched by an ICP process. In this step, the buffer layer 204 can be etched away completely at one time or only partially etched, and a portion of the buffer layer 204 is temporarily retained.

[0110] Further, Figure 2n As shown, after the buffer layer 204 is etched, the outer surface of the etched structure is roughened to improve the light extraction efficiency of the chip. For example, the roughening process can be performed by dry etching or wet etching.

[0111] Ginseng Figure 2o As shown, in this embodiment, after the roughening process is completed, it is necessary to perform trenching, and the epitaxial structure is etched by a dry etching process or a wet etching process to form a step located next to the light-emitting unit. The epitaxial structure between adjacent chips is etched cleanly by the trenching step to achieve physical separation of the epitaxial structure between the chips, and at the same time, it is convenient to prepare the second electrode pad 50 electrically connected to the lead electrode 312.

[0112] Ginseng Figure 2p Combined with what is shown in FIG2q, the first insulating layer 401 exposed at the step is finally etched to form a fifth groove 43 penetrating to the lead electrode 312, and a second electrode pad 50 extending upward to protrude from the first insulating layer 401 is prepared in the fifth groove 43.

[0113] In summary, the process flow in this embodiment is:

[0114] Prepare epitaxial wafer → Mesa etching → prepare first insulating layer → prepare first electrode → anneal first electrode → prepare second electrode → anneal second electrode → prepare covering electrode and lead electrode → prepare second insulating layer → prepare filling metal layer, bonding barrier layer and metal bonding layer → bonding → thinning and removal of substrate → etching buffer layer → roughening → groove opening → prepare second electrode pad → test.

[0115] Comparative Example 1:

[0116] The process flow in this comparative example is:

[0117] Prepare epitaxial wafer → prepare second electrode → anneal second electrode → Mesa etching → prepare insulating layer → prepare first electrode → prepare bonding barrier layer and metal bonding layer → bonding → thinning and removal of substrate → etching buffer layer → roughening → groove grooving → prepare second electrode pad → test.

[0118] Compared with Example 1, in this comparative example, the second electrode is prepared first and then the first electrode is prepared, and no covering electrode is prepared on the surface of the first electrode. When the Al component in the epitaxial structure is high, the first electrode with good ohmic contact cannot be prepared.

[0119] It can be seen from the above technical solution that the present invention has the following beneficial effects:

[0120] The present invention first prepares a first electrode in contact with an N-type semiconductor layer and performs annealing, and then prepares a second electrode in contact with a P-type semiconductor layer, thereby obtaining a first electrode with good ohmic contact without affecting the quality of the second electrode;

[0121] The present invention first prepares a covering electrode on the outer surface of a first electrode and then prepares a second insulating layer, thereby improving the problem of poor adhesion of the insulating layer on the first electrode after high-temperature annealing.

[0122] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0123] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A high light-efficiency light-emitting diode structure, characterized in that: The high light-emitting diode structure comprises: substrate; A light-emitting unit is located above the substrate, the light-emitting unit comprises a P-type semiconductor layer, an active layer and an N-type semiconductor layer sequentially stacked above the substrate, and a first groove extending from the lower surface of the P-type semiconductor layer to the N-type semiconductor layer is provided in the light-emitting unit; An electrode, comprising a first electrode disposed in the first groove and in contact with the N-type semiconductor layer, a second electrode disposed on a lower surface of the P-type semiconductor layer, and a covering electrode disposed on a lower surface of the first electrode, wherein the covering electrode is electrically connected to the substrate; The insulating layer is located between the light emitting unit and the substrate and at least fills a portion of the first groove.

2. The high light-emitting diode structure according to claim 1, characterized in that: The insulating layer includes a first insulating layer and a second insulating layer stacked in sequence below the light-emitting unit, the first insulating layer is located on a portion of the lower surface of the P-type semiconductor layer and the side wall and a portion of the bottom wall of the first groove, the second electrode penetrates the first insulating layer and contacts the P-type semiconductor layer, the first electrode penetrates the first insulating layer and contacts the N-type semiconductor layer, and a portion of the second insulating layer is located between the second electrode and the substrate.

3. The high light-emitting diode structure according to claim 2, characterized in that: The projection area of ​​the first electrode on the bottom wall of the first groove at least partially overlaps with the projection area of ​​the covering electrode on the bottom wall of the first groove, or the projection area of ​​the first electrode on the bottom wall of the first groove is within the projection area of ​​the covering electrode on the bottom wall of the first groove, and the covering electrode is at least partially in contact with the first insulating layer.

4. The high light-efficiency light-emitting diode structure according to claim 2, characterized in that: The second insulating layer is partially located outside the first insulating layer in the first groove, and / or covers a lower surface of the electrode, and / or covers an outer side surface of the electrode.

5. The high light-emitting diode structure according to claim 1, characterized in that: A metal bonding layer is provided between the insulating layer and the substrate, a second groove connecting the covering electrode and the metal bonding layer is formed in the insulating layer, and a filling metal layer in contact with the covering electrode and the metal bonding layer is provided in the second groove.

6. A high light-efficiency light-emitting diode structure according to claim 1 or 3, characterized in that: A lead electrode electrically connected to the second electrode is disposed in the insulating layer, the lead electrode is electrically connected to the second electrode pad, and the lead electrode is made of the same material as the covering electrode.

7. The high light-emitting diode structure according to claim 3, characterized in that: The N-type semiconductor layer comprises an N-type AlGaN layer or an AlInGaN layer; and / or, The substrate is a conductive substrate.

8. A method for manufacturing a high-efficiency light-emitting diode structure, characterized in that: The production method comprises the following steps: Providing a substrate and preparing a light-emitting unit on the substrate, wherein the light-emitting unit includes an N-type semiconductor layer, an active layer and a P-type semiconductor layer sequentially stacked on the substrate; Etching the light-emitting unit to form a first groove in the light-emitting unit extending from the outer surface of the P-type semiconductor layer to the N-type semiconductor layer; An insulating layer and an electrode are prepared on the light-emitting unit, wherein the electrode comprises a first electrode disposed in the first groove and in contact with the N-type semiconductor layer, a second electrode disposed on the outer surface of the P-type semiconductor layer, and a covering electrode disposed on the outer surface of the first electrode, and the insulating layer is located on the outer surface of the light-emitting unit and fills at least a portion of the first groove; Providing a substrate, and bonding an epitaxial structure prepared with an insulating layer and an electrode to the substrate, wherein the substrate is electrically connected to the covering electrode; Peel off the substrate.

9. The method for manufacturing a high-efficiency light-emitting diode structure according to claim 8, characterized in that: The insulating layer and the electrode are prepared on the light-emitting unit, specifically comprising the following steps: Preparing a first insulating layer on the outer surface of the P-type semiconductor layer and the sidewalls and bottom wall of the first groove; Etching the first insulating layer on the bottom wall of the first groove to form a third groove penetrating into the N-type semiconductor layer; preparing a first electrode in the third groove; Etching the first insulating layer on the outer surface of the P-type semiconductor layer to form a fourth groove penetrating the P-type semiconductor layer; preparing a second electrode in the fourth groove; preparing a covering electrode on the outer surface of the first electrode; A second insulating layer is prepared on the outer surface of the first insulating layer, wherein the second insulating layer is partially located outside the first insulating layer in the first groove and / or covers the upper surface of the electrode and / or covers the outer side of the electrode.

10. The method for manufacturing a high-efficiency light-emitting diode structure according to claim 9, characterized in that: After preparing the first electrode in the third groove, the method further includes: annealing the first electrode at a temperature of 800° C. to 1000° C.; and / or, After preparing the second electrode in the fourth groove, the method further includes: annealing the second electrode at a temperature less than or equal to 600°C.

11. The method for manufacturing a high-efficiency light-emitting diode structure according to claim 9, characterized in that: Preparing a covering electrode on the outer surface of the first electrode, further comprising: simultaneously preparing a lead electrode on the outer surface of the second electrode; After the substrate is peeled off, the method further includes: preparing a second electrode pad beside the light-emitting unit, wherein the second electrode pad is electrically connected to the lead electrode.

12. The method for manufacturing a high-efficiency light-emitting diode structure according to claim 8, characterized in that: Bonding the epitaxial structure having the insulating layer and the electrode to the substrate specifically comprises the following steps: A second groove penetrating to the covering electrode is prepared in the insulating layer, and a filling metal layer in contact with the covering electrode and a metal bonding layer extending below the insulating layer are integrally prepared in the second groove; The structure prepared with the metal bonding layer is bonded to a substrate, and the substrate is electrically connected to the covering electrode through the metal bonding layer and the filling metal layer.

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