Display device and mobile electronic device

Abstract

The invention relates to a display device and a mobile electronic device. According to an embodiment, the display device may include: a display panel; a plurality of flexible films attached to one side of the display panel; and a circuit board electrically connected to the display panel through the plurality of flexible films. Each of the plurality of flexible films may include: a first display driver IC (DDI) and a second DDI spaced apart from each other on a surface of a corresponding one of the plurality of flexible films; a first common line electrically connecting an input pad and the first DDI; a second common line branched from the first common line and extending below the first DDI to bypass the first DDI; a third common line electrically connecting the second common line and the second DDI; a first independent line electrically connecting the input pad and the first DDI; and a second independent line electrically connecting the input pad and the second DDI.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2023-0131133 filed in the Korean Intellectual Property Office on September 27, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a display device and a mobile electronic device including the display device. Background Art

[0004] As the information society develops, the demand for display devices for displaying images is increasing in various forms. For example, display devices are applied to various electronic devices such as smart phones, digital cameras, notebook computers, navigation devices, and smart TVs.

[0005] According to user demand, display devices are increasingly equipped with display panels with high resolution and high pixel per inch (PPI) specifications. Therefore, research and development are being conducted on driving circuits for driving display panels. For example, for display panels of about 200 PPI or higher, a chip-on-film (COF) packaging technology with a multi-chip structure has been proposed. The COF packaging technology with a multi-chip structure places multiple integrated circuits (ICs) on a flexible film to place many driver ICs in a limited space (panel width).

[0006] However, COF packaging technology with a multi-chip structure has difficulty in ensuring pad spacing, resulting in high process difficulty and reduced yield and reliability. Summary of the invention

[0007] Aspects of the present disclosure provide a display device capable of improving yield and reliability by easily securing a pad pitch while placing a plurality of integrated circuits on a flexible film, and a mobile electronic device including the display device.

[0008] According to an embodiment of the present disclosure, a display device may include: a display panel; a plurality of flexible films attached to one side of the display panel; and a circuit board electrically connected to the display panel through the plurality of flexible films. Each of the plurality of flexible films may include: a first display driver IC (DDI) and a second DDI spaced apart from each other on a surface of a corresponding one of the plurality of flexible films; a first common line electrically connecting an input pad and the first DDI; a second common line branching from the first common line and extending under the first DDI to bypass the first DDI; a third common line electrically connecting the second common line and the second DDI; a first independent line electrically connecting the input pad and the first DDI; and a second independent line electrically connecting the input pad and the second DDI.

[0009] Each of the plurality of flexible films may include: a first metal layer adjacent to a front surface of a corresponding one of the plurality of flexible films; and a second metal layer adjacent to a rear surface of a corresponding one of the plurality of flexible films, and the first DDI and the second DDI may be disposed on the front surface of the corresponding one of the plurality of flexible films.

[0010] In each of the plurality of flexible films, an input pad may be disposed adjacent to one side of a corresponding one of the plurality of flexible films and may be disposed on a front surface of the corresponding one of the plurality of flexible films, an output pad may be disposed adjacent to another side of the corresponding one of the plurality of flexible films and may be disposed on a rear surface of the corresponding one of the plurality of flexible films, and a first DDI may be disposed between the input pad and the second DDI.

[0011] In each of the plurality of flexible films, the first common line and the third common line may be provided in a first metal layer, and the second common line may be provided in a second metal layer.

[0012] In each of the plurality of flexible films, the first common line and the third common line may be electrically connected through a plurality of vias penetrating a plurality of portions of a corresponding one of the plurality of flexible films to connect the first metal layer and the second metal layer.

[0013] In each of the plurality of flexible films, the plurality of through holes may include a first through hole in which one ends of the first common line and the second common line are electrically connected, and a second through hole in which the other ends of the third common line and the second common line are electrically connected.

[0014] In each of the plurality of flexible films, the first independent line may be electrically connected to the first DDI through the first metal layer.

[0015] In each of the plurality of flexible films, the second independent line may be electrically connected to the second DDI through the first metal layer and the second metal layer.

[0016] Each of the plurality of flexible films may include a plurality of bypass lines disposed on opposite front and rear surfaces of a corresponding one of the plurality of flexible films to bypass the first DDI and the second DDI.

[0017] In each of the multiple flexible films, a first DDI can drive a plurality of first sub-pixels set in a first display area of ​​the display panel, a second DDI can drive a plurality of second sub-pixels set in a second display area adjacent to the first display area, and the circuit included in the first DDI and the circuit included in the second DDI can be the same.

[0018] Each of the plurality of flexible films may include a first metal layer adjacent to a front surface of a corresponding one of the plurality of flexible films, wherein the first DDI and the second DDI may be disposed on the front surface of the corresponding one of the plurality of flexible films.

[0019] In each of the plurality of flexible films, an input pad may be disposed adjacent to one side of a corresponding one of the plurality of flexible films and may be disposed on a front surface of the corresponding one of the plurality of flexible films, an output pad may be disposed adjacent to another side of the corresponding one of the plurality of flexible films and may be disposed on a rear surface of the corresponding one of the plurality of flexible films, and a first DDI may be disposed between the input pad and the second DDI.

[0020] The first to third common lines and the first and second independent lines in each of the plurality of flexible films may be disposed in the first metal layer.

[0021] The second common line in each of the plurality of flexible films may pass between the plurality of bumps of the first DDI attached to the front surface of a corresponding one of the plurality of flexible films.

[0022] The second independent wire in each of the plurality of flexible films may pass between the plurality of bumps of the first DDI attached to the front surface of a corresponding one of the plurality of flexible films.

[0023] According to an embodiment of the present disclosure, a mobile electronic device may include: a display device, the display device including: a display panel; a plurality of flexible films attached to one side of the display panel; and a circuit board electrically connected to the display panel through the plurality of flexible films. Each of the plurality of flexible films may include: a first DDI and a second DDI spaced apart from each other on a surface of a corresponding one of the plurality of flexible films; a first common line electrically connecting an input pad and the first DDI; a second common line branching from the first common line and extending under the first DDI to bypass the first DDI; a third common line electrically connecting the second common line and the second DDI; a first independent line electrically connecting the input pad and the first DDI; and a second independent line electrically connecting the input pad and the second DDI.

[0024] Each of the plurality of flexible films may include: a first metal layer adjacent to a front surface of a corresponding one of the plurality of flexible films; and a second metal layer adjacent to a rear surface of a corresponding one of the plurality of flexible films, and the first DDI and the second DDI may be disposed on the front surface of the corresponding one of the plurality of flexible films.

[0025] In each of the plurality of flexible films, an input pad may be disposed adjacent to one side of a corresponding one of the plurality of flexible films and may be disposed on a front surface of the corresponding one of the plurality of flexible films, an output pad may be disposed adjacent to another side of the corresponding one of the plurality of flexible films and may be disposed on a rear surface of the corresponding one of the plurality of flexible films, and a first DDI may be disposed between the input pad and the second DDI.

[0026] In each of the plurality of flexible films, the first common line and the third common line may be provided in a first metal layer, and the second common line may be provided in a second metal layer.

[0027] Each of the plurality of flexible films may be penetrated by a plurality of through holes, in which the first common line and the third common line may be electrically connected and the first metal layer and the second metal layer may be electrically connected.

[0028] However, aspects of the present disclosure may not be limited to the aspects set forth herein. The above and other aspects of the present disclosure will become more apparent to those skilled in the art to which the present disclosure pertains by referring to the detailed description of the present disclosure given below. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] These and / or other aspects will become apparent and more easily understood through the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0030] Figure 1 is an exploded perspective view of a display device according to an embodiment;

[0031] Figure 2 It is shown in Figure 1 A bottom view showing an example of a panel with the flexible film unfolded;

[0032] Figure 3 It is shown in Figure 1 A bottom view of an example of a display panel to which a bottom bracket may be coupled with the flexible membrane being bent toward the bottom of the bottom bracket;

[0033] Figure 4 is a schematic cross-sectional view showing an example of a first substrate, a second substrate, and a pixel array layer of a display panel;

[0034] Figure 5 is a layout diagram of a front portion of a flexible film according to an embodiment;

[0035] Figure 6 is based on Figure 5 A layout diagram of a rear portion of a flexible membrane of an embodiment;

[0036] Figure 7 is a layout diagram of a front portion of a flexible film according to an embodiment; and

[0037] Figure 8 is a schematic diagram illustrating a second independent line passing between bumps of a display driver IC (DDI) according to an embodiment. DETAILED DESCRIPTION

[0038] In the following description, for the purpose of explanation, many specific details are set forth to provide a thorough understanding of various embodiments or implementations of the present invention. As used herein, "embodiment" and "implementation" are interchangeable words, which are non-limiting examples of the device or method disclosed herein. However, it is apparent that various embodiments may be practiced without these specific details or with one or more equivalent arrangements. Here, various embodiments need not be exclusive and need not limit the present disclosure. For example, the specific shape, configuration and characteristics of an embodiment may be used or implemented in another embodiment.

[0039] Unless otherwise specified, the illustrated embodiments will be understood to provide features of the present invention. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects of the various embodiments, etc. (hereinafter individually or collectively referred to as "elements") may be further combined, separated, interchanged and / or rearranged without departing from the concept of the present invention.

[0040] The use of cross hatching and / or shadows in the drawings is generally provided to make the boundaries between adjacent elements clear. Thus, unless otherwise specified, the presence or absence of cross hatching or shadows does not convey or indicate any preference or requirement for the specific material, material properties, size, ratio, commonality between the elements shown, and / or any other characteristics, attributes, properties, etc. of the elements. In addition, in the drawings, the size and relative size of the elements may be exaggerated for clarity and / or descriptive purposes. When the embodiment can be implemented differently, the specific process sequence can be performed differently from the described order. For example, two continuously described processes can be performed substantially simultaneously or in an order opposite to the described order. In addition, the same figure mark and / or number represent the same element.

[0041] When an element or layer is referred to as "on" another element or layer, "connected to" or "coupled to" another element or layer, the element or layer may be directly on, directly connected to or coupled to the other element or layer, or there may be an intervening element or layer. However, when an element or layer is referred to as "directly on" another element or layer, "directly connected to" or "directly coupled to" another element or layer, there is no intervening element or layer. For this reason, the term "connection" may represent physical, electrical (electrical) and / or fluid connections with or without intervening elements. In addition, the X-axis (X-axis direction), the Y-axis (Y-axis direction) and the Z-axis (Z-axis direction) are not limited to the three axes of a rectangular coordinate system, such as an x-axis, a y-axis and a z-axis, and may be interpreted in a broader sense. For example, the X-axis (X-axis direction), the Y-axis (Y-axis direction) and the Z-axis (Z-axis direction) may be perpendicular to each other, or may represent different directions that are not perpendicular to each other.

[0042] For the purpose of this disclosure, "at least one of A and B" may be interpreted as only A, only B, or any combination of A and B. In addition, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z. As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items.

[0043] Although the terms "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the teachings of the present disclosure, the first element discussed below may be referred to as the second element.

[0044] The terms used herein are for the purpose of describing specific embodiments and are not intended to be restrictive. As used herein, unless the context clearly indicates otherwise, the singular forms "a", "one (kind / person)" and "the (the)" are also intended to include plural forms. In addition, when the terms "comprises / comprising" and / or "includes / including" are used in this specification, it is explained that there are stated features, wholes, steps, operations, elements, components and / or their groups, but it is not excluded that there are or add one or more other features, wholes, steps, operations, elements, components and / or their groups. It is also noted that, as used herein, the terms "substantially", "about (approximately)" and other similar terms are used as approximate terms rather than degree terms, and as such, are used to explain the inherent deviations in the measured values, calculated values ​​and / or provided values ​​that will be recognized by those of ordinary skill in the art.

[0045] Various embodiments are described herein with reference to cross-sectional views and / or exploded views that are schematic diagrams of embodiments and / or intervening structures. As such, variations in the shapes of the illustrations due to, for example, manufacturing techniques and / or tolerances are to be expected. Therefore, the embodiments disclosed herein should not necessarily be construed as limited to the specific illustrated shapes of the regions, but will include deviations in shapes due to, for example, manufacturing. In this manner, the regions illustrated in the accompanying drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and as such, are not necessarily intended to be limiting.

[0046] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. It will also be understood that, unless explicitly defined as such herein, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and should not be interpreted in an idealized or overly formal sense.

[0047] Hereinafter, specific embodiments will be described with reference to the accompanying drawings.

[0048] Figure 1 is an exploded perspective view of the display device 10 according to the embodiment.

[0049] Reference Figure 1 , also refer to Figure 4 According to the embodiment, the display device 10 can be applied to mobile electronic devices such as mobile phones, smart phones, tablet personal computers (PCs), mobile communication terminals, electronic notebooks, electronic books, portable multimedia players (PMPs), navigation devices, and ultra-mobile PCs (UMPCs). According to the embodiment, the display device 10 can be applied as a display portion of a television, a notebook computer, a monitor, a billboard, or an Internet of Things (IoT) device. According to the embodiment, the display device 10 can be applied to wearable devices such as smart watches, watch phones, glasses-type displays, and head-mounted displays (HMDs). According to the embodiment, the display device 10 can be applied to a dashboard of a vehicle, a central dashboard of a vehicle, a central information display (CID) set on the dashboard of a vehicle, an interior mirror display instead of a side mirror of a vehicle, or a display set on the back of a front seat for entertainment of rear seat passengers of a vehicle.

[0050] Reference Figure 1According to the embodiment, the display device 10 may include an upper cover 100, a lower cover 102, a display panel 110, a source driving circuit 121, a flexible film 122, a source circuit board 140, a first cable 150, a control circuit board 160, a power circuit 171 and a timing control circuit 170.

[0051] In the present specification, the terms "above", "top" and "upper surface" indicate a direction in which the second substrate 112 may be disposed relative to the first substrate 111 of the display panel 110, for example, a third direction (Z-axis direction), and the terms "below", "bottom" and "lower surface" may be directions opposite to the third direction (Z-axis direction). The terms "left", "right", "upper" and "lower surface" indicate directions when the display panel 110 may be viewed in a plan view. For example, "left" indicates a first direction (X-axis direction), "right" indicates a direction opposite to the first direction (X-axis direction), "up" indicates a second direction (Y-axis direction), and "lower" indicates a direction opposite to the second direction (Y-axis direction).

[0052] The upper set cover 100 may be positioned to cover the edge of the upper surface of the display panel 110. The upper set cover 100 may cover a non-display area other than the display area of ​​the display panel 110. In a case where the source circuit board 140, the first cable 150, and the control circuit board 160 are disposed below the display panel 110 due to the bending of the flexible film 122, the lower set cover 102 may cover the source circuit board 140, the first cable 150, and the control circuit board 160.

[0053] The length of the lower cover 102 in the second direction (Y-axis direction) may be greater than the length of the bottom bracket 180 in the second direction (Y-axis direction), or may be substantially equal to the length of the bottom bracket 180 in the second direction (Y-axis direction). The upper cover 100 and the lower cover 102 may be made of plastic or metal, or may include both plastic and metal.

[0054] The display panel 110 may be rectangular in plan view. Figure 2 As shown in , the display panel 110 may have a rectangular planar shape having a long side extending in a first direction (X-axis direction) and a short side extending in a second direction (Y-axis direction). Each corner where the long side extending in the first direction (X-axis direction) intersects the short side extending in the second direction (Y-axis direction) may be a right angle, or may be rounded with a curvature (e.g., a predetermined curvature or a selectable curvature). The planar shape of the display panel 110 may not be limited to a rectangular shape, and may also be other polygonal shapes, a circular shape, or an elliptical shape.

[0055] Despite Figure 1The display panel 110 may be formed to be approximately flat, but the present specification may not be limited to this case. The display panel 110 may further include a curved portion curved with a curvature (eg, a predetermined curvature or a selectable curvature).

[0056] The display panel 110 may include a first substrate 111 and a second substrate 112. The second substrate 112 may face a first surface of the first substrate 111. The first substrate 111 and the second substrate 112 may be rigid or flexible. The first substrate 111 may be made of glass or plastic. The second substrate 112 may be made of glass, plastic, an encapsulation film or a barrier film. The second substrate 112 may be omitted. In the case where the first substrate 111 and the second substrate 112 may be made of plastic, the plastic may be polyethersulfone (PES), polyacrylate (PA), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), cellulose triacetate (CAT), cellulose acetate propionate (CAP) or a combination thereof. The encapsulation film or barrier film may be a film in which a plurality of inorganic layers may be stacked on each other.

[0057] The display panel 110 may be an organic light-emitting display panel using an organic light-emitting diode including a first electrode, an organic light-emitting layer and a second electrode, an inorganic light-emitting display panel using an inorganic light-emitting diode including a first electrode, an inorganic semiconductor layer and a second electrode, or a quantum dot light-emitting display panel including a quantum dot light-emitting diode including a first electrode, a quantum dot light-emitting layer and a second electrode.

[0058] The display panel 110 may be described below as an organic light emitting display panel including a thin film transistor layer TFTL, a light emitting element layer EML, a filler FL, a light wavelength conversion layer QDL, and a color filter layer CFL between a first substrate 111 and a second substrate 112. The first substrate 111 may be a thin film transistor substrate on which the thin film transistor layer TFTL, the light emitting element layer EML, and a thin film encapsulation layer may be formed, the second substrate 112 may be a color filter substrate on which the light wavelength conversion layer QDL and the color filter layer CFL may be formed, and the filler FL may be provided between the thin film encapsulation layer of the first substrate 111 and the light wavelength conversion layer QDL of the second substrate 112.

[0059] The second substrate 112 of the display panel 110 may be omitted, and the thin film encapsulation layer may be disposed on the light emitting element layer EML. The filler FL may be omitted, and the light wavelength conversion layer QDL and the color filter layer CFL may be disposed on the thin film encapsulation layer.

[0060] One side of each of the flexible films 122 may be disposed on the first surface of the first substrate 111 of the display panel 110, and the other side may be attached to the surface of one of the source circuit boards 140. Specifically, since the first substrate 111 may be larger in size than the second substrate 112, one side of the first substrate 111 may be exposed without being covered by the second substrate 112. The flexible film 122 may be attached to the exposed side of the first substrate 111 that may not be covered by the second substrate 112. Each of the flexible films 122 may be attached to the first surface of the first substrate 111 and to the surface of one of the source circuit boards 140 by using an anisotropic conductive film.

[0061] Each of the flexible films 122 may be a flexible film such as a tape carrier package or a chip on film. The flexible film 122 may be bent toward the bottom of the first substrate 111. Figure 1 Eight flexible films 122 may be attached to the first substrate 111 of the display panel 110 , but the number of the flexible films 122 may not be limited to eight in this specification.

[0062] The source driving circuit 121 may be disposed on a surface of each of the flexible films 122. The source driving circuit 121 may be formed as an integrated circuit. Each of the source driving circuits 121 converts digital video data into an analog data voltage according to a source control signal of the timing control circuit 170, and supplies the analog data voltage to a data line of the display panel 110 through the flexible film 122. The source driving circuit 121 may be referred to as a display driver integrated circuit (IC) (DDI).

[0063] The display panel 110 may include scan lines crossing the data lines and pixels disposed in an area defined by the data lines and the scan lines. The scan lines may receive scan signals from a scan driver formed in the display panel 110. The scan driver may include a plurality of thin film transistors and generate scan signals according to a scan control signal of the timing control circuit 170. Each of the pixels may be electrically connected to at least one data line and at least one scan line, and may receive a data voltage of the data line when the scan signal is supplied to the scan line.

[0064] Each of the source circuit boards 140 may be electrically connected to the control circuit board 160 through the first cable 150. Each of the source circuit boards 140 may include a first connector 151a for connecting to the first cable 150. The source circuit boards 140 may be flexible printed circuit boards or printed circuit boards. The first cable 150 may be a flexible cable.

[0065] The control circuit board 160 may be electrically connected to the source circuit board 140 through the first cable 150. To this end, the control circuit board 160 may include a second connector 152 for connecting to the first cable 150.

[0066] Despite Figure 1 In the embodiment, four first cables 150 connect the source circuit board 140 and the control circuit board 160, but the number of the first cables 150 may not be limited to four in the present specification. Figure 1 Two source circuit boards 140 are shown in FIG. 1 , but the number of source circuit boards 140 may not be limited to two in this specification.

[0067] In the case where the number of the flexible films 122 is small, the source circuit board 140 may be omitted. The flexible film 122 may be connected (eg, directly connected) to the control circuit board 160.

[0068] The timing control circuit 170 may be disposed on the surface of the control circuit board 160. The timing control circuit 170 may be formed as an integrated circuit. The timing control circuit 170 may receive digital video data and a timing signal from a system on a chip of the system circuit board, and generate a source control signal for controlling the timing of the source driving circuit 121 according to the timing signal.

[0069] The power circuit 171 may be provided on the surface of the control circuit board 160. The power circuit 171 may be formed as an integrated circuit. The power circuit 171 may generate a voltage required to drive the display panel 110 from the main power received from the system circuit board, and supply the generated voltage to the display panel 110. For example, the power circuit 171 may generate a high potential voltage, a low potential voltage, and an initialization voltage for driving an organic light emitting element, and supply the generated voltage to the display panel 110. The power circuit 171 may generate and supply a driving voltage for driving the source driving circuit 121, the timing control circuit 170, and the like.

[0070] The system on chip may be mounted on a system circuit board electrically connected to the control circuit board 160 via a flexible cable, and may be formed as an integrated circuit. The system on chip may be a processor of a smart TV, a central processing unit (CPU) or a graphics card of a computer (e.g., a notebook computer), or an application processor of a smart phone or a tablet PC. The system circuit board may be a flexible printed circuit board or a printed circuit board.

[0071] Although the display device 10 according to the embodiment may be shown to include Figure 1The display device 10 according to the embodiment may be a medium / large display device including a plurality of source drive circuits 121, but the present specification may not be limited to this case. For example, the display device 10 according to the embodiment may also be a small display device including one source drive circuit 121. The flexible film 122, the source circuit board 140, and the first cable 150 may be omitted. The source drive circuit 121 and the timing control circuit 170 may be integrated into one integrated circuit and then attached to one flexible circuit board or to the first substrate 111 of the display panel 110. Examples of medium / large display devices include monitors and televisions, and examples of small display devices include smart phones and tablet PCs.

[0072] Figure 2 It is shown in Figure 1 FIG. 1 is a bottom view of an example of a display panel 110 in which the flexible film 122 is unfolded. Figure 3 It is shown in Figure 1 A bottom view of an example of a display panel 110 to which the bottom bracket 180 may be coupled with the flexible film 122 being bent toward the bottom of the bottom bracket 180 .

[0073] Reference Figure 2 and Figure 3 , also refer to Figure 4 , the first surface of the first substrate 111 and the first surface of the second substrate 112 may face each other. Figure 4 ) may be disposed between the first surface of the first substrate 111 and the first surface of the second substrate 112. The pixel array layer 113 may include a plurality of pixels PX1 to PX3 that emit light.

[0074] A heat dissipation film (not shown) may be disposed on the second surface of the first substrate 111. The heat dissipation film may include graphite and a metal layer having high thermal conductivity such as silver (Ag), copper (Cu), or aluminum (Al).

[0075] The flexible film 122 may be bent toward the bottom of the bottom bracket 180 and attached to the source circuit board 140 located on the surface of the bottom bracket 180. The source circuit board 140 and the control circuit board 160 may be disposed on the surface of the bottom bracket 180 and may be electrically connected to each other through the first cable 150.

[0076] The timing control circuit 170 and the power circuit 171 may be disposed on the control circuit board 160 .

[0077] Figure 4 The display panel 110 (see Figure 1 ) is a schematic cross-sectional view of an example of a first substrate 111, a second substrate 112, and a pixel array layer 113.

[0078] Reference Figure 4, the display panel 110 may include a first substrate 111, a second substrate 112, and a pixel array layer 113. The pixel array layer 113 may include a thin film transistor layer TFTL and a light emitting element layer EML.

[0079] The buffer layer 302 may be formed on the surface of the first substrate 111 facing the second substrate 112. The buffer layer 302 may be formed on the first substrate 111 to protect the thin film transistor 335 and the light emitting element from moisture introduced through the first substrate 111 susceptible to moisture penetration. The buffer layer 302 may be composed of a plurality of inorganic layers alternately stacked on each other. For example, the buffer layer 302 may be selected from silicon oxide (SiO x ) layer, silicon nitride (SiN x ) layer and silicon oxynitride (SiO x N y ) layers may be stacked alternately with one another. The buffer layer 302 may also be omitted.

[0080] The thin film transistor layer TFTL may be formed on the buffer layer 302. The thin film transistor layer TFTL includes a thin film transistor 335, a gate insulating layer 336, an interlayer insulating film 337, a protective layer 338, and a planarization layer 339.

[0081] The thin film transistors 335 may be formed on the buffer layer 302. Each of the thin film transistors 335 includes an active layer 331, a gate electrode 332, a source electrode 333, and a drain electrode 334. Figure 4 In the embodiment, each of the thin film transistors 335 may be formed as a top gate type in which the gate electrode 332 may be located above the active layer 331. However, it should be noted that the present specification may not be limited to this case. For example, each of the thin film transistors 335 may also be formed as a bottom gate type in which the gate electrode 332 may be located below the active layer 331, or a dual gate type in which the gate electrode 332 may be located both above and below the active layer 331.

[0082] The active layer 331 may be formed on the buffer layer 302. The active layer 331 may be made of a silicon-based semiconductor material or an oxide-based semiconductor material. A light shielding layer may be formed between the buffer layer 302 and the active layer 331 to block external light from entering the active layer 331.

[0083] The gate insulating layer 336 may be formed on the active layer 331. The gate insulating layer 336 may be an inorganic layer, for example, SiO x Layer, SiN x layer or a plurality of layers composed of these layers.

[0084] The gate electrode 332 and the gate line may be formed on the gate insulating layer 336. Each of the gate electrode 332 and the gate line may be a single layer or a multilayer made of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), an alloy thereof, or a combination thereof.

[0085] An interlayer insulating film 337 may be formed on the gate electrode 332 and the gate line. The interlayer insulating film 337 may be an inorganic layer, for example, SiO x Layer, SiN x layer or a plurality of layers composed of these layers.

[0086] The source electrode 333, the drain electrode 334, and the data line may be formed on the interlayer insulating film 337. Each of the source electrode 333 and the drain electrode 334 may be electrically connected to the active layer 331 through a contact hole penetrating the gate insulating layer 336 and the interlayer insulating film 337. Each of the source electrode 333, the drain electrode 334, and the data line may be a single layer or a multilayer made of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), an alloy thereof, or a combination thereof.

[0087] A protective layer 338 for insulating the thin film transistor 335 may be formed on the source electrode 333, the drain electrode 334, and the data line. The protective layer 338 may be an inorganic layer, for example, SiO x Layer, SiN x layer or a plurality of layers composed of these layers.

[0088] A planarization layer 339 may be formed on the protection layer 338 to planarize a step due to the thin film transistor 335. The planarization layer 339 may be made of an organic layer such as acrylic resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, or a combination thereof.

[0089] The light emitting element layer EML may be formed on the thin film transistor layer TFTL. The light emitting element layer EML includes a light emitting element and a pixel defining layer 344 .

[0090] The light emitting elements and the pixel defining layer 344 may be formed on the planarization layer 339. The light emitting elements may be organic light emitting devices. Each of the light emitting elements may include an anode 341, a light emitting layer 342, and a cathode 343.

[0091] The anode 341 may be formed on the planarization layer 339. The anode 341 may be electrically connected to the drain electrode 334 of the thin film transistor 335 through a contact hole penetrating the protection layer 338 and the planarization layer 339.

[0092] The pixel defining layer 344 may be formed on the planarization layer 339 and may cover the edge of the anode 341 to define the pixel. For example, the pixel defining layer 344 may be used as a pixel defining layer for defining sub-pixels PX1 to PX3. Each of the sub-pixels PX1 to PX3 may be a region where the anode 341, the light emitting layer 342, and the cathode 343 may be sequentially stacked on each other so that holes from the anode 341 and electrons from the cathode 343 may be recombined in the light emitting layer 342 to emit light.

[0093] The light emitting layer 342 may be formed on the anode 341 and the pixel defining layer 344. The light emitting layer 342 may be an organic light emitting layer. The light emitting layer 342 may emit light having a short wavelength, such as blue light or ultraviolet light. The blue light may have a peak wavelength range of about 450nm to about 490nm, and the ultraviolet light may have a peak wavelength range of less than about 450nm. The light emitting layer 342 may be a common layer shared by all sub-pixels PX1 to PX3. The display panel 110 may include an optical wavelength conversion layer QDL for converting short wavelength light such as blue light or ultraviolet light emitted from the light emitting layer 342 into red light, green light, and blue light, and a color filter layer CFL for transmitting each of the red light, green light, and blue light.

[0094] The light emitting layer 342 may include a hole transport layer, a light emitting layer, and an electron transport layer. The light emitting layer 342 may be formed in a series structure of two or more stacked layers. A charge generating layer may be formed between the stacked layers.

[0095] The cathode 343 may be formed on the light emitting layer 342. The cathode 343 may be formed to cover the light emitting layer 342. The cathode 343 may be a common layer shared by all pixels.

[0096] The light emitting element layer EML may be formed as a top emission type that emits light toward the second substrate 112 (e.g., in an upward direction). The anode 341 may be made of a metal material with high reflectivity (such as a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and indium tin oxide (ITO / Al / ITO), an APC alloy, or a stacked structure of an APC alloy and indium tin oxide (ITO / APC / ITO). The APC alloy may be an alloy of silver (Ag), palladium (Pd), and copper (Cu). The cathode 343 may be made of a transparent conductive material (TCO) capable of transmitting light (such as indium tin oxide (ITO) or indium zinc oxide (IZO)), or of a semi-transmissive conductive material (such as magnesium (Mg), silver (Ag), or an alloy of Mg and Ag). In the case where the cathode 343 is made of a semi-transmissive conductive material, the light output efficiency may be improved by a microcavity.

[0097] The encapsulation layer 345 may be formed on the light emitting element layer EML. The encapsulation layer 345 is used to prevent oxygen or moisture from penetrating into the light emitting layer 342 and the cathode 343. To this end, the encapsulation layer 345 may include at least one inorganic layer. The inorganic layer may be made of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, or a combination thereof. The encapsulation layer 345 may also include at least one organic layer. The organic layer may be formed to a sufficient thickness to prevent particles from penetrating the encapsulation layer 345 and entering the light emitting layer 342 and the cathode 343. The organic layer may include any one or a combination of epoxy resin, acrylate, and polyurethane acrylate.

[0098] The color filter layer CFL may be disposed on a surface of the second substrate 112 facing the first substrate 111. The color filter layer CFL may include a black matrix 360 and a color filter 370.

[0099] The black matrix 360 may be formed on the surface of the second substrate 112. The black matrix 360 may not overlap the sub-pixels PX1 to PX3 but may overlap the pixel defining layer 344. The black matrix 360 may include a black dye or an opaque metal material capable of blocking light.

[0100] The color filter 370 may overlap the sub-pixels PX1 to PX3. The first color filter 371 may overlap the first sub-pixel PX1, the second color filter 372 may overlap the second sub-pixel PX2, and the third color filter 373 may overlap the third sub-pixel PX3. The first color filter 371 may be a first color light-transmitting color filter that transmits light of a first color, the second color filter 372 may be a second color light-transmitting color filter that transmits light of a second color, and the third color filter 373 may be a third color light-transmitting color filter that transmits light of a third color. For example, the first color may be red, the second color may be green, and the third color may be blue, but the present specification may not be limited thereto. The peak wavelength range of red light passing through the first color filter 371 may be in the range of about 620 nm to about 750 nm, the peak wavelength range of green light passing through the second color filter 372 may be in the range of about 500 nm to about 570 nm, and the peak wavelength range of blue light passing through the third color filter 373 may be in the range of about 450 nm to about 490 nm.

[0101] Edges of two adjacent color filters may overlap with the black matrix 360. Therefore, the black matrix 360 may prevent color mixing that occurs in the case where light emitted from the light emitting layer 342 of any one sub-pixel travels to the color filter of an adjacent sub-pixel.

[0102] An overcoat layer may be formed on the color filter 370 to planarize a step caused by the color filter 370 and the black matrix 360. The overcoat layer may also be omitted.

[0103] The light wavelength conversion layer QDL may be disposed on the color filter layer CFL and may include a first capping layer 351 , a first wavelength conversion layer 352 , a second wavelength conversion layer 353 , a third wavelength conversion layer 354 , a second capping layer 355 , an interlayer organic film 356 , and a third capping layer 357 .

[0104] The first cover layer 351 may be disposed on the color filter layer CFL. The first cover layer 351 may prevent moisture or oxygen from penetrating from the outside through the color filter layer CFL into the first wavelength conversion layer 352, the second wavelength conversion layer 353, and the third wavelength conversion layer 354. The first cover layer 351 may be made of an inorganic layer such as silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, or a combination thereof.

[0105] The first wavelength conversion layer 352 , the second wavelength conversion layer 353 , and the third wavelength conversion layer 354 may be disposed on the first cover layer 351 .

[0106] The first wavelength conversion layer 352 may overlap the first sub-pixel PX1. The first wavelength conversion layer 352 may convert short-wavelength light such as blue light or ultraviolet light emitted from the light emitting layer 342 of the first sub-pixel PX1 into light of a first color. To this end, the first wavelength conversion layer 352 may include a first base resin, a first wavelength converter, and a first scatterer.

[0107] The first matrix resin may be a material having high light transmittance and excellent dispersion characteristics for the first wavelength converter and the first scatterer. For example, the first matrix resin may include an organic material such as epoxy resin, acrylic resin, cardo resin, imide resin, or a combination thereof.

[0108] The first wavelength converter may convert the wavelength range of the incident light or shift the wavelength range of the incident light. The first wavelength converter may be a quantum dot, a quantum rod or a phosphor. In the case where the first wavelength converter may be a quantum dot, as a semiconductor nanocrystal material, they may have a specific band gap according to their composition and size. Therefore, the first wavelength converter may absorb the incident light and then emit light having a unique wavelength. The first wavelength converter may have a core-shell structure including a core containing nanocrystals and a shell surrounding the core. Examples of nanocrystals forming the core include group IV nanocrystals, group II-VI compound nanocrystals, group III-V compound nanocrystals, group IV-VI nanocrystals and combinations thereof. The shell may be used as a protective layer for maintaining semiconductor properties by preventing chemical denaturation of the core and / or as a charging layer for imparting electrophoretic properties to quantum dots. The shell may be a single layer or multiple layers. The shell may be, for example, a metal or non-metal oxide, a semiconductor compound or a combination thereof.

[0109] The first scatterer may have a refractive index different from that of the first matrix resin and may form an optical interface with the first matrix resin. For example, the first scatterer may be light scattering particles. For example, the first scatterer may be metal oxide particles, such as titanium oxide (TiO 2 ), silicon oxide (SiO 2 ), zirconium oxide (ZrO 2 ), aluminum oxide (Al 2 O 3 ), indium oxide (In 2 O 3 )、ZnO、SnO 2 ) or a combination thereof. The first scatterer may be organic particles, such as acrylic resin or polyurethane resin.

[0110] The first scatterer may scatter incident light in random directions without substantially changing the wavelength of light passing through the first wavelength conversion layer 352. Therefore, the length of the path of light passing through the first wavelength conversion layer 352 may be increased, thereby improving the color conversion efficiency of the first wavelength converter.

[0111] The first wavelength conversion layer 352 may overlap with the first color filter 371. Therefore, a portion of the short-wavelength light such as blue light or ultraviolet light provided from the first subpixel PX1 may pass through the first wavelength conversion layer 352 as it is without being converted into light of the first color by the first wavelength converter. However, the short-wavelength light such as blue light or ultraviolet light incident on the first color filter 371 without being converted by the first wavelength conversion layer 352 cannot pass through the first color filter 371. On the other hand, the light of the first color into which the short-wavelength light has been converted by the first wavelength conversion layer 352 can pass through the first color filter 371 and proceed toward the second substrate 112.

[0112] The second wavelength conversion layer 353 may overlap with the second sub-pixel PX2. The second wavelength conversion layer 353 may convert short-wavelength light such as blue light or ultraviolet light emitted from the light-emitting layer 342 of the second sub-pixel PX2 into light of a second color. To this end, the second wavelength conversion layer 353 may include a second base resin, a second wavelength converter, and a second scatterer. The second base resin, the second wavelength converter, and the second scatterer of the second wavelength conversion layer 353 may be substantially the same as the first base resin, the first wavelength converter, and the first scatterer of the first wavelength conversion layer 352, and therefore a detailed description thereof may be omitted. In the case where the first wavelength converter and the second wavelength converter are quantum dots, the diameter of the second wavelength converter may be smaller than the diameter of the first wavelength converter.

[0113] The second wavelength conversion layer 353 may overlap with the second color filter 372. Therefore, a portion of the short-wavelength light such as blue light or ultraviolet light provided from the second subpixel PX2 may pass through the second wavelength conversion layer 353 as it is without being converted into light of the second color by the second wavelength converter. However, the short-wavelength light such as blue light or ultraviolet light incident on the second color filter 372 without being converted by the second wavelength conversion layer 353 cannot pass through the second color filter 372. On the other hand, the light of the second color into which the short-wavelength light has been converted by the second wavelength conversion layer 353 can pass through the second color filter 372 and proceed toward the second substrate 112.

[0114] The third wavelength conversion layer 354 may overlap the third sub-pixel PX3. The third wavelength conversion layer 354 may convert short-wavelength light such as blue light or ultraviolet light emitted from the light emitting layer 342 of the third sub-pixel PX3 into light of a third color. To this end, the third wavelength conversion layer 354 may include a third base resin and a third scatterer. The third base resin and the third scatterer of the third wavelength conversion layer 354 may be substantially the same as the first base resin and the first scatterer of the first wavelength conversion layer 352, and thus a detailed description thereof is omitted.

[0115] The third wavelength conversion layer 354 may overlap the third color filter 373. Therefore, short wavelength light such as blue light or ultraviolet light provided from the third subpixel PX3 may pass through the third wavelength conversion layer 354 as it is, and the light passing through the third wavelength conversion layer 354 can pass through the third color filter 373 and proceed toward the second substrate 112.

[0116] The second cover layer 355 may be disposed on the first wavelength conversion layer 352, the second wavelength conversion layer 353, the third wavelength conversion layer 354, and the first cover layer 351 exposed without being covered by the wavelength conversion layers 352 to 354. The second cover layer 355 prevents moisture or oxygen from penetrating from the outside into the first wavelength conversion layer 352, the second wavelength conversion layer 353, and the third wavelength conversion layer 354. The second cover layer 355 may be made of an inorganic layer such as silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, or a combination thereof.

[0117] The interlayer organic film 356 may be disposed on the second capping layer 355. The interlayer organic film 356 may be a planarization layer for planarizing a step caused by the wavelength conversion layers 352 to 354. The interlayer organic film 356 may be made of an organic layer such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, or a combination thereof.

[0118] The third capping layer 357 may be disposed on the interlayer organic film 356. The third capping layer 357 may be made of an inorganic layer such as silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, or a combination thereof.

[0119] The filler FL may be disposed between the encapsulation layer 345 (e.g., a thin film encapsulation layer) disposed on the first substrate 111 and the third cover layer 357 disposed on the second substrate 112. The filler FL may be made of a material having a buffering function. For example, the filler FL may be made of an organic layer such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, or a combination thereof.

[0120] A sealing material for bonding the first substrate 111 and the second substrate 112 together may be provided in the non-display region of the display panel 110. When viewed in a plan view, the filler FL may be surrounded by the sealing material. The sealing material may be frit or a sealant.

[0121] according to Figure 4 In the embodiment shown in , the first sub-pixel PX1 to the third sub-pixel PX3 may emit short-wavelength light such as blue light or ultraviolet light. The light of the first sub-pixel PX1 may be converted into light of a first color by the first wavelength conversion layer 352, and then output through the first color filter 371. The light of the second sub-pixel PX2 may be converted into light of a second color by the second wavelength conversion layer 353, and then output through the second color filter 372. The light of the third sub-pixel PX3 may be output through the third wavelength conversion layer 354 and the third color filter 373. Therefore, it is possible to output white light.

[0122] according to Figure 4 In the embodiment shown in FIG. 1 , each of the sub-pixels PX1 to PX3 may be formed as a top emission type that emits light toward the second substrate 112 (eg, in an upward direction). Therefore, a heat dissipation film including an opaque material such as graphite or aluminum may be disposed on the other surface of the first substrate 111.

[0123] Figure 5 is a layout diagram of a front portion of the flexible film 122 according to an embodiment. Figure 6 is based on Figure 5 Layout diagram of the rear portion of the flexible membrane 122 of an embodiment.

[0124] Reference Figure 5 and Figure 6 The display device according to the embodiment may include a display panel 110 (see Figure 1) on one side of the flexible film 122, and a plurality of DDIs may be provided on each flexible film 122. For example, the first DDI 511 and the second DDI 512 may be provided on one flexible film 122. Figure 5 , the fourth direction DR1 may be a direction along which the bypass line 5211a extends from the through hole CT11 to the bypass input pad 521, and the fifth direction DR2 may be a direction opposite to the fourth direction DR1.

[0125] According to an embodiment, each flexible film 122 may include a first DDI 511 and a second DDI 512 spaced apart from each other on a surface of the flexible film 122. Each of the first DDI 511 and the second DDI 512 drives a portion of a display area of ​​the display panel 110. For example, the first DDI 511 drives a first sub-pixel disposed in a first display area of ​​the display panel 110. The second DDI 512 drives a second sub-pixel disposed in a second display area adjacent to the first display area.

[0126] According to an embodiment, the first DDI 511 and the second DDI 512 may have the same circuit. For example, the circuit included in the first DDI 511 and the circuit included in the second DDI 512 may be the same. For example, the first DDI 511 and the second DDI 512 may be components that drive different display areas of the display panel 110 but have the same circuit. Therefore, the signal or power input to the first DDI 511 may be the same as the signal or power input to the second DDI 512. The signal or power output from the first DDI 511 may be the same as the signal or power output from the second DDI 512. However, the driving timing of the first DDI 511 may be different from the driving timing of the second DDI 512. Therefore, some signals input to the first DDI 511 may be independent of the signals input to the second DDI 512.

[0127] According to an embodiment, each flexible film 122 may include a common line for supplying a signal or power to be commonly input to the first DDI 511 and the second DDI 512 provided on the flexible film 122. Each flexible film 122 may include an independent line for supplying a signal or power to be independently input to the first DDI 511 and the second DDI 512 provided on the flexible film 122. In the present specification, the term "common line" may be replaced with a term such as, but not limited to, a "first line". In the present specification, the term "independent line" may be replaced with a term such as, but not limited to, a "second line".

[0128] According to an embodiment, the power or signal input to each of the first DDI 511 and the second DDI 512 by a line (i.e., a common line or an independent line) provided in each flexible film 122 may include IC logic power, gamma power, sensing reference power, clock signal, option signal, and control signal. Among them, the gamma power, sensing reference power, and clock signal may be power or signals commonly input to the first DDI 511 and the second DDI 512. Such a common power or common signal may be input to the first DDI 511 and the second DDI 512 through a common line provided in each flexible film 122. In the electronic device according to the embodiment, a common signal or common power among the signals or power input to a plurality of DDIs (e.g., the first DDI 511 and the second DDI 512) provided on each flexible film 122 may be transmitted through one line. Therefore, the number of lines and pads in the flexible film 122 can be reduced.

[0129] The structure and form of the common line according to the embodiment will now be described in detail.

[0130] According to an embodiment, each flexible film 122 includes a first DDI 511 and a second DDI 512 , and the first DDI 511 and the second DDI 512 may be spaced apart from each other. The first DDI 511 may be disposed between an input pad 522 and the second DDI 512 of the flexible film 122 .

[0131] In the flexible film 122 , the input pad 522 may be disposed on one side of the flexible film 122 , and the output pad 622 may be disposed on the other side of the flexible film 122 .

[0132] The input pad 522 of the flexible film 122 receives power or a signal to be input to the first DDI 511 and the second DDI 512. The bypass input pads 521 may be respectively provided on both sides of the input pad 522. The bypass input pads 521 may receive a signal that bypasses the flexible film 122 and is not input to the first DDI 511 and the second DDI 512.

[0133] The output pads 622 of the flexible film 122 receive signals or power output from the first DDI 511 and the second DDI 512, and transmit the received signals or power to the display panel 110. The bypass output pads 621 may be respectively provided on both sides of each of the output pads 622. The bypass output pads 621 may transmit signals that bypass the flexible film 122 and are not input to the first DDI 511 and the second DDI 512.

[0134] According to an embodiment, one or more common lines 5221 and one or more independent lines 5223 and 5222 may be disposed between the input pad 522 and the first DDI 511 and / or between the input pad 522 and the second DDI 512 .

[0135] According to an embodiment, the common line 5221 may include a first common line 5221a, a second common line 5221b, and a third common line 5221c. Among the independent lines 5223 and 5222, the second independent line 5222 may include three parts 5222a, 5222b, and 5222c.

[0136] The first common line 5221a may be disposed between the input pad 522 and the first DDI 511, and connect the input pad 522 and the first DDI 511. The second common line 5221b is branched from the first common line 5221a, and extends under the first DDI 511 to bypass the first DDI 511. The third common line 5221c may be electrically connected to the second common line 5221b, and connect the second common line 5221b and the second DDI 512.

[0137] The first independent line 5223 may be disposed between the input pad 522 and the first DDI 511, and may connect the input pad 522 and the first DDI 511. The second independent line 5222 may be disposed between the input pad 522 and the second DDI 512, and may connect the input pad 522 and the second DDI 512. A portion of the second independent line 5222 (e.g., the second portion 5222b of the second independent line 5222) may extend to bypass the bottom of the first DDI 511.

[0138] like Figure 5 and Figure 6 As shown in , the flexible film 122 according to the embodiment may have a multilayer structure including a plurality of metal layers. For example, each flexible film 122 may include a first metal layer adjacent to the front surface of the flexible film 122 and a second metal layer adjacent to the rear surface of the flexible film 122. Each of the first metal layer and the second metal layer may include a line for transmitting a signal or power. For example, Figure 5 Lines included in the first metal layer are shown, and the shown lines may be used as lines for transmitting signals or power. Figure 6 Lines included in the second metal layer are shown, and the shown lines may be used as lines for transmitting signals or power.

[0139] According to the embodiment, Figure 5 As shown in FIG. 1 , the first common line 5221a and the third common line 5221c may be disposed in the first metal layer. Figure 6As shown in , the second common line 5221b may be disposed in the second metal layer. Each flexible film 122 may include through holes CT21 and CT22 in which the second common line 5221b disposed in the second metal layer and each of the first common line 5221a and the third common line 5221c disposed in the first metal layer may be electrically connected. The through holes CT21 and CT22 penetrate portions of the flexible film 122 and connect the first metal layer and the second metal layer.

[0140] According to an embodiment, the through holes CT21 and CT22 may include a first through hole CT21 in which one end of the first common line 5221a and the second common line 5221b may be electrically connected, and a second through hole CT22 in which the third common line 5221c and the other end of the second common line 5221b may be electrically connected. Therefore, among the signals or power input to the plurality of DDIs (e.g., the first DDI 511 and the second DDI 512) provided on each flexible film 122, a common signal or common power may be input to the first DDI 511 via the input pad 522 and the first common line 5221a. Among the signals or power input to the DDIs (e.g., the first DDI 511 and the second DDI 512) provided on each flexible film 122, a common signal or common power may be input to the second DDI 512 via the input pad 522, the first common line 5221a, the first through hole CT21, the second common line 5221b, the second through hole CT22, and the third common line 5221c. The first through via CT21 may be disposed between the first DDI 511 and the input pad 522 , and the second through via CT22 may be disposed between the first DDI 511 and the second DDI 512 .

[0141] Power or signals for independently controlling the first DDI 511 and the second DDI 512 may be individually input to the first DDI 511 and the second DDI 512 through the independent lines 5223 and 5222. The first independent line 5223 may be provided between the input pad 522 and the first DDI 511 to connect the first DDI 511 and the input pad 522 to each other. The first portion 5222a of the second independent line 5222 may be electrically connected to the second portion 5222b of the second independent line 5222 provided in the second metal layer through the through hole CT31 provided between the input pad 522 and the first DDI 511. The second portion 5222b of the second independent line 5222 may be electrically connected to the third portion 5222c of the second independent line 5222 provided in the first metal layer via the through hole CT32 provided between the first DDI 511 and the second DDI 512. The third portion 5222 c of the second independent line 5222 may extend from the through-via CT32 to the second DDI 512 , and thus may transmit independent power or an independent signal to the second DDI 512 .

[0142] According to an embodiment, bypass lines 5211a and 5211b that bypass the first DDI 511 and the second DDI 512 may be respectively provided on both sides of each flexible film 122. Some of the bypass lines 5211a and 5211b pass through the first metal layer to connect the bypass input pad 521 and the bypass output pad 621 to each other. Some of the bypass lines 5211a and 5211b pass through the first metal layer and the second metal layer to connect the bypass input pad 521 and the bypass output pad 621 to each other. A through hole CT11 that electrically connects the first metal layer and the second metal layer may be connected to the bypass lines 5211a and 5211b.

[0143] The signal or power output from each of the first DDI 511 and the second DDI 512 may be transmitted to the output pad 622 of each flexible film 122 through the output lines OL1 and OL2 provided in the flexible film 122. The output lines OL1 and OL2 may include a first output line OL1 that transmits the signal or power output from the first DDI 511 to the output pad 622 and a second output line OL2 that transmits the signal or power output from the second DDI 512 to the output pad 622. Each of the first output line OL1 and the second output line OL2 may extend through the first metal layer and the second metal layer. For example, a first portion of each of the first output lines OL1 may be electrically connected to the first DDI 511 in the first metal layer, and may be electrically connected to a second portion provided in the second metal layer through a through hole CT41. For example, a first portion of each of the second output lines OL2 may be electrically connected to the second DDI 512 in the first metal layer, and may be electrically connected to a second portion provided in the second metal layer through a through hole CT42.

[0144] Figure 7 is a layout diagram of a front portion of the flexible film 122 according to an embodiment. Figure 8 is a schematic diagram illustrating a second independent wire 5222 passing between bumps BM of a DDI according to an embodiment.

[0145] Figure 7 and Figure 8 Examples and Figure 5 and Figure 6 The embodiment of the present invention differs in that the flexible film 122 comprises a single metal layer. Figure 7 and Figure 8 Only describe and Figure 5 and Figure 6 The embodiments are characterized by different features.

[0146] Reference Figure 7 and Figure 8, the flexible film 122 according to the embodiment may have a single metal layer structure including a single metal layer. For example, each flexible film 122 may include a first metal layer adjacent to the front surface of the flexible film 122. The first metal layer may include a line for transmitting a signal or power. For example, Figure 7 and Figure 8 Lines included in the first metal layer are shown, and the shown lines may be used as lines for transmitting signals or power.

[0147] According to an embodiment, the first common line 5221a, the second common line 5221b, and the third common line 5221c may be disposed in the first metal layer. The first independent line 5223 and the second independent line 5222 may be disposed in the first metal layer. The bypass line 5211 may be disposed in the first metal layer.

[0148] The first common line 5221a may be disposed between the first DDI 511 and the input pad 522 to connect the first DDI 511 and the input pad 522. For example, one end of the first common line 5221a may be electrically connected to the input pad 522, and the other end of the first common line 5221a may be electrically connected to a bump BM of the first DDI 511 located on the bottom of the first DDI 511. The second common line 5221b may pass under the first DDI 511. The second common line 5221b may extend from the bump BM of the first DDI 511 to which the first common line 5221a may be electrically connected toward the second DDI 512. Here, the second common line 5221b may extend to pass between the bump BM disposed on the bottom of the first DDI 511. The third common line 5221c may be disposed between the first DDI 511 and the second DDI 512 to connect the second common line 5221b and the second DDI 512. For example, one end of the third common line 5221 c may be electrically connected to the second common line 5221 b , and the other end of the third common line 5221 c may be electrically connected to the bump BM of the second DDI 512 .

[0149] exist Figure 8 , "BA1" represents a first bump array BA1 indicating a bump BM included in each of the first DDI 511 and the second DDI 512. "BA2" represents a second bump array BA2 indicating a bump BM included in each of the first DDI 511 and the second DDI 512. As shown, the first bump array BA1 and the second bump array BA2 may be arranged in parallel with each other. The first bump array BA1 may be arranged relatively closer to the input pad 522 than the second bump array BA2. The second bump array BA2 may be arranged relatively closer to the output pad 622 than the first bump array BA1.

[0150] Reference Figure 8, one end of the first common line 5221a may be electrically connected to the input pad 522, and the other end of the first common line 5221a may be electrically connected to the first bump array BA1 located on the bottom of the first DDI 511. The second common line 5221b may pass under the first DDI 511. The second common line 5221b may extend from the bump BM of the first DDI 511 to which the first common line 5221a may be electrically connected toward the second DDI 512. Here, the second common line 5221b may extend to pass between the bumps BM of the second bump array BA2 of the first DDI 511.

[0151] The first independent line 5223 and the second independent line 5222 for independently transmitting a signal or power to the first DDI 511 and the second DDI 512 may be arranged as follows. The first independent line 5223 may be disposed between the first DDI 511 and the input pad 522 to connect the first DDI 511 and the input pad 522 to each other. The second independent line 5222 may connect the second DDI 512 and the input pad 522 to each other via the bottom of the first DDI 511. For example, the first portion 5222a of the second independent line 5222 may be disposed between the first DDI 511 and the input pad 522, the second portion 5222b of the second independent line 5222 may pass between the bumps BM of the first DDI 511 located on the bottom of the first DDI 511, and the third portion 5222c of the second independent line 5222 may be disposed between the first DDI 511 and the second DDI 512.

[0152] Reference Figure 8 , the second independent wire 5222 may extend to the second DDI 512 via the bottom of the first DDI 511. Here, the second independent wire 5222 may pass between the bumps BM of the first bump array BA1 of the first DDI 511 and between the bumps BM of the second bump array BA2 of the first DDI 511.

[0153] According to the display device and the mobile electronic device including the display device according to the embodiment, a pad interval can be easily secured while placing a plurality of integrated circuits on one flexible film, thereby improving yield and reliability.

[0154] However, the effects of the present disclosure may not be limited to the effects set forth herein. The above and other effects of the present disclosure will become more apparent to those of ordinary skill in the art to which the present disclosure belongs by referring to the claims.

[0155] In summarizing the detailed description, it will be appreciated by those skilled in the art that many changes and modifications may be made to the embodiments without departing substantially from the principles of the invention. Therefore, the disclosed embodiments of the present invention are used in a general and descriptive sense only and not for a limiting purpose.

Claims

1. A display device, wherein: The display device comprises: Display panel; a plurality of flexible films attached to one side of the display panel; and a circuit board electrically connected to the display panel through the plurality of flexible films, Wherein, each of the plurality of flexible films comprises: a first display driver integrated circuit and a second display driver integrated circuit spaced apart from each other on a surface of a corresponding one of the plurality of flexible films; a first common line electrically connecting the input pad and the first display driver integrated circuit; a second common line branched from the first common line and extending under the first display driver integrated circuit to bypass the first display driver integrated circuit; a third common line electrically connecting the second common line and the second display driver integrated circuit; a first independent line electrically connecting the input pad and the first display driver integrated circuit; and A second independent line electrically connects the input pad and the second display driver integrated circuit.

2. The display device according to claim 1, wherein: Each of the plurality of flexible films comprises: a first metal layer adjacent to a front surface of a corresponding one of the plurality of flexible films; and a second metal layer adjacent to a rear surface of the corresponding one of the plurality of flexible films, and The first display driver integrated circuit and the second display driver integrated circuit are disposed on the front surface of the corresponding one of the plurality of flexible films.

3. The display device according to claim 2, wherein: In each of the plurality of flexible films, The input pad is disposed adjacent to one side of a corresponding one of the plurality of flexible films and is disposed on the front surface of the corresponding one of the plurality of flexible films, An output pad is disposed adjacent to the other side of the corresponding one of the plurality of flexible films and is disposed on the rear surface of the corresponding one of the plurality of flexible films, and The first display driver integrated circuit is disposed between the input pad and the second display driver integrated circuit.

4. The display device according to claim 3, wherein: In each of the plurality of flexible films, The first common line and the third common line are disposed in the first metal layer, and The second common line is disposed in the second metal layer.

5. The display device according to claim 4, wherein: In each of the plurality of flexible films, the first common line and the third common line are electrically connected through a plurality of vias penetrating a plurality of portions of a corresponding one of the plurality of flexible films to connect the first metal layer and the second metal layer.

6. The display device according to claim 5, wherein: In each of the plurality of flexible films, the plurality of through holes comprises: a first through hole in which one end of the first common line and one end of the second common line are electrically connected; and A second through hole in which the third common line and the other end of the second common line are electrically connected.

7. The display device according to claim 3, wherein: In each of the plurality of flexible films, the first independent line is electrically connected to the first display driver integrated circuit through the first metal layer.

8. The display device according to claim 3, wherein: In each of the plurality of flexible films, the second independent line is electrically connected to the second display driver integrated circuit through the first metal layer and the second metal layer.

9. The display device according to claim 1, wherein: Each of the plurality of flexible films includes a plurality of bypass lines disposed on opposite front and rear surfaces of a corresponding one of the plurality of flexible films to bypass the first display driver integrated circuit and the second display driver integrated circuit.

10. The display device according to claim 1, wherein: In each of the plurality of flexible films, The first display driver integrated circuit drives a plurality of first sub-pixels arranged in a first display area of ​​the display panel, The second display driver integrated circuit drives a plurality of second sub-pixels disposed in a second display area adjacent to the first display area, and A circuit included in the first display driver integrated circuit and a circuit included in the second display driver integrated circuit are the same.

11. The display device according to claim 1, wherein: Each of the plurality of flexible films comprises: a first metal layer adjacent to a front surface of a corresponding one of the plurality of flexible films, wherein The first display driver integrated circuit and the second display driver integrated circuit are disposed on the front surface of the corresponding one of the plurality of flexible films.

12. The display device according to claim 11, wherein: In each of the plurality of flexible films, The input pad is disposed adjacent to one side of a corresponding one of the plurality of flexible films and is disposed on the front surface of the corresponding one of the plurality of flexible films, An output pad is disposed adjacent to the other side of the corresponding one of the plurality of flexible films and is disposed on a rear surface of the corresponding one of the plurality of flexible films, and The first display driver integrated circuit is disposed between the input pad and the second display driver integrated circuit.

13. The display device according to claim 11, wherein: The first to third common lines and the first and second independent lines in each of the plurality of flexible films are disposed in the first metal layer.

14. The display device according to claim 13, wherein: The second common line in each of the plurality of flexible films passes between a plurality of bumps of the first display driver integrated circuit attached to the front surface of the corresponding one of the plurality of flexible films.

15. The display device according to claim 13, wherein: The second independent wire in each of the plurality of flexible films passes between a plurality of bumps of the first display driver integrated circuit attached to the front surface of the corresponding one of the plurality of flexible films.

16. A mobile electronic device, wherein: The mobile electronic device comprises: A display device, the display device comprising: Display panel; a plurality of flexible films attached to one side of the display panel; and a circuit board electrically connected to the display panel through the plurality of flexible films, Wherein, each of the plurality of flexible films comprises: a first display driver integrated circuit and a second display driver integrated circuit spaced apart from each other on a surface of a corresponding one of the plurality of flexible films; a first common line electrically connecting the input pad and the first display driver integrated circuit; a second common line branched from the first common line and extending under the first display driver integrated circuit to bypass the first display driver integrated circuit; a third common line electrically connecting the second common line and the second display driver integrated circuit; a first independent line electrically connecting the input pad and the first display driver integrated circuit; and A second independent line electrically connects the input pad and the second display driver integrated circuit.

17. The mobile electronic device according to claim 16, wherein: Each of the plurality of flexible films comprises: a first metal layer adjacent to a front surface of a corresponding one of the plurality of flexible films; and a second metal layer adjacent to a rear surface of the corresponding one of the plurality of flexible films, and The first display driver integrated circuit and the second display driver integrated circuit are disposed on the front surface of the corresponding one of the plurality of flexible films.

18. The mobile electronic device according to claim 17, wherein: In each of the plurality of flexible films, The input pad is disposed adjacent to one side of a corresponding one of the plurality of flexible films and is disposed on the front surface of the corresponding one of the plurality of flexible films, An output pad is disposed adjacent to the other side of the corresponding one of the plurality of flexible films and is disposed on the rear surface of the corresponding one of the plurality of flexible films, and The first display driver integrated circuit is disposed between the input pad and the second display driver integrated circuit.

19. The mobile electronic device according to claim 18, wherein: In each of the plurality of flexible films, The first common line and the third common line are disposed in the first metal layer, and The second common line is disposed in the second metal layer.

20. The mobile electronic device according to claim 19, wherein: Each of the plurality of flexible films is penetrated by a plurality of through holes in which the first common line and the third common line are electrically connected and the first metal layer and the second metal layer are electrically connected.

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