A multifunctional memristor based on TaO x and a preparation method thereof

Abstract

The application belongs to the field of micro-nano electronic devices, and discloses a multifunctional memristor based on TaO x , which comprises, from bottom to top, a substrate, a first electrode layer, a functional layer, a barrier layer and a second electrode layer, wherein the first and second electrode layers are respectively made of inert metal material and active metal material; the functional layer is made of TaO x material and x is less than 2.5, so as to form trap energy levels by existing oxygen vacancies; the barrier layer is made of inert metal material and is used for blocking metal atoms of the second electrode layer from entering the functional layer. When different electrical operations are applied to the second electrode layer, the whole device shows different electrical characteristics. The application also discloses a corresponding manufacturing method. Through the application, the functions of dendrites, cell bodies and synapses in a biological neural network can be simulated respectively, a multifunctional memristor capable of bearing multiple functions is provided for an existing artificial neural network, and the process complexity in the hardware implementation process is reduced and the integration is improved.

Description

Technical Field

[0001] The present invention belongs to the field of micro-nanoelectronic devices, and more specifically, relates to a TaO-based x Multifunctional memristor and preparation method thereof. Background Art

[0002] With the rapid development of large-scale model-based artificial intelligence, parallel computing chips such as graphics processing units (GPUs) and specialized AI chips such as tensor processing units (TPUs) have been launched to meet the parallel, high-speed, and large-capacity computing needs. However, these processors still rely on the von Neumann architecture and are still limited by the data transmission bottleneck in the memory wall. Inspired by the structure and operating principles of the human brain, an in-memory computing architecture based on artificial synapses and neurons has been proposed. This architecture can directly process information in parallel in the synaptic memory array and then dynamically process signals through neurons. This not only effectively overcomes the "von Neumann bottleneck" but also has the potential to surpass conventional computing capabilities.

[0003] In biological neural systems, synapses connect different neurons, and their "weights" represent the strength of the connections between neurons. Biological neurons are composed of dendrites, cell bodies, and axons. Dendrites integrate input from other neurons, cell bodies convert this information into specific action potentials, and axons output this information. Artificial neural networks also have a variety of neuromorphic devices, such as artificial synaptic devices with non-volatile properties that form networks by connecting neurons, artificial dendrite devices with volatile analog properties that perform filtering and signal integration, and artificial cell body devices with volatile digital properties that act as threshold devices to detect and emit membrane potential signals.

[0004] Memristors are considered the fourth fundamental circuit element, alongside resistors, capacitors, and inductors, and can be used to characterize the relationship between charge and magnetic flux. They can store information in the form of resistance, and their resistance can be adjusted by a history of external stimuli. Memristors have been extensively studied due to their simple structure, ease of integration, low power consumption, and compatibility with semiconductor CMOS processes, making them promising candidates for neuromorphic devices. Specifically, memristors can be divided into two types based on their ability to retain their resistive state: volatile memristors and non-volatile memristors. These different characteristics allow for different functions in artificial neural networks. Analog volatile memristors can be used in artificial dendrite devices, digital volatile memristors in artificial cell bodies, and non-volatile memristors in artificial synapses.

[0005] However, further research has shown that, in existing technologies, a memristor with a defined material and structure typically only possesses one of the three functions mentioned above, with a few devices capable of achieving two of these functions through different operating methods. With the rapid development of artificial neural networks, their application scenarios are constantly expanding, and a single network often requires the participation of multiple neuromorphic devices with different functions. Therefore, in the fabrication of large-scale artificial neural network integrated circuits, if different functions require different devices, the process complexity will increase exponentially as the network grows.

[0006] As artificial neural networks continue to develop, the need to reduce the process complexity of their hardware implementation and increase their integration is crucial. Therefore, exploring devices that can perform multiple functions under different electrical conditions is crucial. Accordingly, research and improvements are urgently needed in this field to overcome the technical difficulties such as the high process complexity caused by the single function of devices in existing large-scale artificial neural network hardware implementations. Summary of the Invention

[0007] In view of one or more of the above defects or improvement requirements of the prior art, the present invention provides a TaO-based x A multifunctional memristor and preparation method, wherein by combining the working characteristics and specific needs of the memristor, its specific structural composition and working mechanism are redesigned in a targeted manner, and a memristor device that can realize multiple different functions under different electrical operations can be obtained in a compact and easy-to-control manner. The memristor device is suitable for simulating the functions of dendrites, cell bodies and synapses in biological neural networks, and effectively solves the problems of low integration and complex processes of existing devices, and is particularly beneficial to large-scale integrated applications of artificial neural networks.

[0008] To achieve the above object, according to one aspect of the present invention, a method based on TaO x The multifunctional memristor is characterized in that the memristor includes a substrate, and a first electrode layer, a functional layer, a barrier layer and a second electrode layer sequentially stacked on the substrate, wherein:

[0009] The first electrode layer and the second electrode layer are made of inert metal material and active metal material respectively; the functional layer is made of TaO x The barrier layer is made of an inert metal material and x is less than 2.5, so that oxygen vacancies exist in the functional layer to form trap energy levels; the barrier layer is made of an inert metal material and is used to block metal atoms of the second electrode layer from entering the functional layer;

[0010] When a negative voltage is applied to the second electrode layer, electrons transitioning from the second electrode layer to the functional layer are captured by its trap energy levels, and the entire device changes from a low-resistance state to a high-resistance state. When the negative voltage is removed, the electrons captured by the functional layer are released back to the second electrode layer, and the entire device spontaneously returns to a high-resistance state, correspondingly exhibiting the simulated volatile resistive switching characteristics of a memristor.

[0011] When the second electrode layer is initialized by applying a current-limiting forward voltage, the metal atoms in the second electrode layer undergo an oxidation-reduction reaction and form a conductive filament in the functional layer, which connects the first and second electrode layers, thereby changing the entire device to a low-resistance state; wherein, when the current-limiting current is not greater than the preset value, the conductive filament is formed into a relatively thin diameter and spontaneously breaks after the forward power supply is removed, which corresponds to the digital volatile resistive switching characteristics of the memristor; in addition, when the current-limiting current is greater than the preset value, the conductive filament is formed into a relatively thick diameter and does not break after the forward voltage is removed, which corresponds to the non-volatile resistive switching characteristics of the memristor.

[0012] As a further preferred embodiment of the present invention, the material of the first electrode layer is one of Pt, Pd, Au, Ni, ITO, Ti, W, Al, Ta, Hf, TaN, TiN and TiW; the material of the barrier layer is one of Pt, Pd, Au, Ni, ITO, Ti, W, Al, Ta, Hf, TaN, TiN and TiW; the material of the second electrode layer is one of Ag and Cu.

[0013] As a further preference of the present invention, the thickness of the first electrode layer is designed to be 5nm-2000nm, the thickness of the functional layer is designed to be 2nm-100nm, the thickness of the barrier layer is designed to be 2nm-10nm, and the thickness of the second electrode layer is designed to be 10nm-2000nm.

[0014] According to another aspect of the present invention, a corresponding preparation method is also provided, characterized in that the method comprises the following steps:

[0015] (i) providing a substrate;

[0016] (ii) preparing the first electrode layer on a substrate;

[0017] (iii) preparing the functional layer on the first electrode layer;

[0018] (iv) processing desired patterns on the functional layer, and preparing the barrier layer accordingly based on the patterns;

[0019] (v) preparing the second electrode layer on the barrier layer, and after the second electrode layer is grown, sequentially performing operations of peeling, cleaning, and drying, thereby obtaining the desired multifunctional memristor.

[0020] As a further preference of the present invention, in step (iii), the functional layer is preferably prepared by physical vapor deposition, chemical vapor deposition, magnetron sputtering, molecular beam epitaxy, atomic layer deposition or electrochemical growth.

[0021] As a further preferred embodiment of the present invention, in step (iv), a photolithography process is preferably used to process the desired graphic pattern on the functional layer.

[0022] As a further preference of the present invention, in step (v), after the second electrode layer is grown, it is preferably peeled off by immersing in acetone, and then washed with anhydrous ethanol and deionized water in sequence, and then dried with nitrogen, thereby obtaining the desired multifunctional memristor.

[0023] In general, the above technical solutions conceived by the present invention have the following technical advantages compared with the existing technology:

[0024] (1) By redesigning the specific structure and working mechanism of the device, the present application can obtain a memristor device that realizes a variety of different electrical characteristics under different electrical operations; among them, when a negative voltage is applied, the device exhibits analog volatile resistive switching characteristics; after an initialization operation of applying a small current-limiting forward voltage, the device exhibits digital volatile resistive switching characteristics; and after an initialization operation of applying a large current-limiting forward voltage, the device exhibits non-volatile resistive switching characteristics;

[0025] (2) This application further optimizes the processing technology and key processing parameters of the multifunctional memristor, thereby enabling the production of compact devices with high quality, high efficiency, and ease of manipulation, and enabling the realization of multiple neuromorphic device functions such as dendrites, cell bodies, and synapses in the same device.

[0026] (3) The multifunctional memristor of the present application effectively solves the technical problems of low integration and complex process of existing devices, and is particularly beneficial to large-scale integrated applications of artificial neural networks, and thus has broad application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 According to a preferred embodiment of the present invention, a TaO x Schematic diagram of the main structure of the multifunctional memristor;

[0028] Figure 2 This is a specific embodiment of the present invention (Pt / TaO xI-V curve of the Ag / Ti / Ag multifunctional device obtained after continuous negative voltage sweep on the Ag electrode;

[0029] Figure 3 This is a specific embodiment of the present invention (Pt / TaO x I-V curve of a Ti / Ag multifunctional device after initialization operation with a small current-limiting forward voltage applied to the Ag electrode and then a continuous forward voltage sweep;

[0030] Figure 4 This is a specific embodiment of the present invention (Pt / TaO x Figure 4 I-V curves of a / Ti / Ag multifunctional device after initialization operation with a large current-limiting forward voltage applied to the Ag electrode and continuous voltage sweep. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0032] It should be understood that expressions such as "include" and "may include" used in this application indicate the existence of the disclosed functions, operations, or constituent elements, and do not limit one or more additional functions, operations, and constituent elements. In this application, terms such as "include" and / or "have" may be interpreted as indicating a specific characteristic, number, operation, constituent element, component, or combination thereof, but may not be interpreted as excluding the existence or possibility of adding one or more other characteristics, numbers, operations, constituent elements, components, or combinations thereof.

[0033] It should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0034] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0035] In this application, unless otherwise specified or limited, the terms "mounted," "connected," "connect," "fixed," etc. should be understood broadly. For example, they can refer to fixed connection, detachable connection, or integral connection; mechanical connection or electrical connection; direct connection or indirect connection through an intermediate medium; or internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0036] Figure 1 According to a preferred embodiment of the present invention, a TaO x The main structure diagram of the multifunctional memristor. Figure 1 The present invention will be explained in more detail.

[0037] like Figure 1 As shown in the present invention, the TaO x The multifunctional memristor is characterized in that the memristor includes a substrate, and a first electrode layer, a functional layer, a barrier layer and a second electrode layer sequentially stacked on the substrate, wherein:

[0038] The first electrode layer and the second electrode layer are made of inert metal material and active metal material respectively; the functional layer is made of TaO x The barrier layer is made of an inert metal material and x is less than 2.5, so that oxygen vacancies exist in the functional layer to form trap energy levels; the barrier layer is made of an inert metal material and is used to block metal atoms of the second electrode layer from entering the functional layer;

[0039] When a negative voltage is applied to the second electrode layer, electrons transitioning from the second electrode layer to the functional layer are captured by its trap energy levels, and the entire device changes from a low-resistance state to a high-resistance state. When the negative voltage is removed, the electrons captured by the functional layer are released to the second electrode layer, and the entire device spontaneously returns to a high-resistance state, correspondingly exhibiting the simulated volatile resistive switching characteristics of a memristor.

[0040] When the second electrode layer is initialized by applying a current-limiting forward voltage, the metal atoms in the second electrode layer undergo an oxidation-reduction reaction and form a conductive filament in the functional layer, which connects the first and second electrode layers, thereby changing the entire device to a low-resistance state; wherein, when the current-limiting current is not greater than the preset value, the conductive filament is formed into a relatively thin diameter and spontaneously breaks after the positive power supply is removed, which corresponds to the digital volatile resistive switching characteristics of the memristor.

[0041] More specifically, because the oxygen content in the functional layer is lower than that of Ta2O5, certain oxygen vacancies exist therein, forming trap energy levels. When the second electrode layer is initialized by applying a positive voltage, the metal atoms in the second electrode layer undergo an oxidation-reduction reaction and form a conductive filament within the functional layer. When the conductive filament connects the first and second electrode layers, the device exhibits a low-resistance state, otherwise it exhibits a high-resistance state. When the limiting current is set to no greater than a preset limiting current value, after the voltage is removed, the conductive filament spontaneously breaks due to its thinness, and the device exhibits digital volatile resistive switching characteristics. When the limiting current is set to greater than a preset limiting current value, after the voltage is removed, the conductive filament is thick, requiring the application of a negative voltage to return the device to the high-resistance state, and the device exhibits non-volatile resistive switching characteristics.

[0042] Accordingly, the multifunctional memristor according to the present invention can exhibit different electrical properties under different electrical operations and can be used in different neuromorphic devices, thereby reducing the process complexity of large-scale artificial neural network hardware implementation and improving its integration.

[0043] According to a preferred embodiment of the present invention, the first electrode layer and the barrier layer are respectively made of one of the following inert metal materials: Pt, Pd, Au, Ni, ITO, Ti, W, Al, Ta, Hf, TaN, TiN and TiW; the second electrode layer is made of the following active metal materials: Ag, Cu or other similar materials.

[0044] According to another preferred embodiment of the present invention, the thickness of the first electrode layer is designed to be 5nm~2000nm, the thickness of the functional layer is designed to be 2nm~100nm, the thickness of the barrier layer is designed to be 2nm~10nm, and the thickness of the second electrode layer is designed to be 10nm~2000nm.

[0045] It should be noted that the thickness of the functional layer should not exceed 100nm, nor be less than 2nm. If it is too thin, the device yield will decrease, and if it is too thick, the operating voltage of the device will be too high, which is not conducive to practical application. For the barrier layer, its thickness should not exceed 10nm, nor be less than 2nm. If it is too thin, it will not be able to prevent the metal atoms of the second electrode layer from entering the TaO during the growth of the second electrode layer. x When the thickness is too thick, when a positive voltage is applied to the second electrode layer, fewer metal ions generated by oxidation and reduction of the second electrode layer can enter the TaO x layer, thus failing to form complete conductive filaments.

[0046] The present invention also discloses a corresponding preparation process, which comprises the following steps:

[0047] (i) providing a substrate;

[0048] (ii) preparing the first electrode layer on a substrate;

[0049] (iii) preparing the functional layer on the first electrode layer;

[0050] (iv) processing desired patterns on the functional layer, and preparing the barrier layer accordingly based on the patterns;

[0051] (v) preparing the second electrode layer on the barrier layer, and after the second electrode layer is grown, sequentially performing operations of peeling, cleaning, and drying, thereby obtaining the desired multifunctional memristor.

[0052] According to a preferred embodiment of the present invention, in step (iii), the functional layer is preferably prepared by physical vapor deposition, chemical vapor deposition, magnetron sputtering, molecular beam epitaxy, atomic layer deposition or electrochemical growth.

[0053] According to another preferred embodiment of the present invention, in step (iv), a photolithography process is preferably used to form a desired pattern on the functional layer, wherein the photolithography process steps are respectively: coating, pre-baking, pre-exposure, post-baking, post-exposure, and development.

[0054] According to another preferred embodiment of the present invention, in step (v), after the second electrode layer is grown, it is preferably peeled off by immersing in acetone, and then washed with anhydrous ethanol and deionized water in sequence, and then dried with nitrogen, thereby obtaining the desired multifunctional memristor.

[0055] Some specific embodiments are given below to explain the present invention more clearly.

[0056] Example 1

[0057] In this example, a 500μm thick silicon wafer with a (100) crystal phase was selected. A 1μm thick SiO2 thin film was thermally grown on its surface to serve as the substrate. The wafer was then cut into 1×1cm samples, immersed in acetone, and cleaned ultrasonically for 10-15 minutes. The wafer was then immersed in anhydrous ethanol and ultrasonically cleaned for 5 minutes at a power of 40W. Finally, the wafer was rinsed with deionized water and dried with a nitrogen gun.

[0058] Next, a cleaned sample was taken and magnetron sputtered to grow a 100nm thick layer of the first metal electrode, Pt, on its surface. To improve the adhesion of the Pt electrode to the substrate, a Ti layer of approximately 10nm was deposited using DC sputtering. This was followed by DC sputtering of the Pt target at a power of 200W in an Ar atmosphere of 0.5Pa for 1000s.

[0059] Then, for example, the functional layer is prepared by magnetron sputtering, and the target material is Ta2O5 target. x In the process of TaO x The valence and content of oxygen in the medium can obtain the functional layer, namely TaO x The thickness of the layer, in this example, the functional layer is 10 nm.

[0060] Next, a square photolithography pattern with a size of 100 μm×100 μm is prepared on the sample prepared above by a photolithography process, wherein the photolithography process steps are: coating, pre-baking, pre-exposure, post-baking, post-exposure, and development.

[0061] Next, a 5 nm thick Ti layer was grown on the sample processed as above by magnetron sputtering at a power of 50 W and an Ar atmosphere of 0.5 Pa for 25 seconds to obtain a barrier layer.

[0062] Next, a 100 nm thick Ag layer was grown on the sample processed as above by magnetron sputtering at a power of 30 W, an Ar atmosphere of 0.5 Pa, and a sputtering time of 600 s to obtain a second electrode layer.

[0063] Finally, the film sample prepared above was soaked in acetone for 30-50 minutes, then washed with anhydrous ethanol and deionized water, and dried with nitrogen.

[0064] After completing the above steps, Pt / TaO is prepared. x / Ti / Ag multifunctional devices.

[0065] Example 2

[0066] In this example, a 500μm thick silicon wafer with a (100) crystal phase was selected. A 1μm thick SiO2 thin film was thermally grown on its surface to serve as the substrate. The wafer was then cut into 1×1cm samples, immersed in acetone, and cleaned ultrasonically for 10-15 minutes. The wafer was then immersed in anhydrous ethanol and ultrasonically cleaned for 5 minutes at a power of 40W. Finally, the wafer was rinsed with deionized water and dried with a nitrogen gun.

[0067] Next, a cleaned sample was taken and magnetron sputtered to grow a 5nm thick layer of Au, the first metal electrode (the first electrode layer). To improve the adhesion of the Au electrode to the substrate, a Ti layer of approximately 10nm was deposited using DC sputtering. This was followed by DC sputtering of the Au target at a power of 200W, an Ar atmosphere of 0.5Pa, and a sputtering time of 1000s.

[0068] Then, for example, the functional layer is prepared by magnetron sputtering, and the target material is Ta2O5 target.x In the process of TaO x The valence and content of oxygen in the medium can obtain the functional layer, namely TaO x The thickness of the layer, in this example, the functional layer is 2 nm.

[0069] Next, a square photolithography pattern with a size of 100 μm×100 μm is prepared on the sample prepared above by a photolithography process, wherein the photolithography process steps are: coating, pre-baking, pre-exposure, post-baking, post-exposure, and development.

[0070] Next, a 2 nm thick Ni layer was grown on the sample processed as above by magnetron sputtering at a power of 50 W and an Ar atmosphere of 0.5 Pa for 25 s to obtain a barrier layer.

[0071] Next, a 10 nm thick Ag layer was grown on the sample processed as above by magnetron sputtering at a power of 30 W, an Ar atmosphere of 0.5 Pa, and a sputtering time of 600 s to obtain a second electrode layer.

[0072] Finally, the film sample prepared above was soaked in acetone for 30-50 minutes, then washed with anhydrous ethanol and deionized water, and dried with nitrogen.

[0073] After completing the above steps, Au / TaO is prepared. x / Ni / Ag multifunctional devices.

[0074] Example 3

[0075] In this example, a 500μm thick silicon wafer with a (100) crystal phase was selected. A 1μm thick SiO2 thin film was thermally grown on its surface to serve as the substrate. The wafer was then cut into 1×1cm samples, immersed in acetone, and cleaned ultrasonically for 10-15 minutes. The wafer was then immersed in anhydrous ethanol and ultrasonically cleaned for 5 minutes at a power of 40W. Finally, the wafer was rinsed with deionized water and dried with a nitrogen gun.

[0076] Next, a cleaned sample was taken and magnetron sputtered to grow a 2000nm thick layer of TaN, the first metal electrode layer. To improve adhesion between the electrode and the substrate, a 10nm thick layer of Ti was deposited using DC sputtering. The target was then sputtered using DC sputtering at a power of 200W in an Ar atmosphere of 0.5Pa for 1000s.

[0077] Then, for example, the functional layer is prepared by magnetron sputtering, and the target material is Ta2O5 target. x In the process of TaOx The valence and content of oxygen in the medium can obtain the functional layer, namely TaO x The thickness of the layer, in this example, the functional layer is 100 nm.

[0078] Next, a square photolithography pattern with a size of 100 μm×100 μm is prepared on the sample prepared above by a photolithography process, wherein the photolithography process steps are: coating, pre-baking, pre-exposure, post-baking, post-exposure, and development.

[0079] Next, a 10 nm thick TiN layer was grown on the sample processed as above by magnetron sputtering at a power of 50 W, an Ar atmosphere of 0.5 Pa, and sputtering for 25 seconds to obtain a barrier layer.

[0080] Next, a 2000 nm thick Cu layer was grown on the sample processed as above by magnetron sputtering at a power of 30 W, an Ar atmosphere of 0.5 Pa, and a sputtering time of 600 s to obtain a second electrode layer.

[0081] Finally, the film sample prepared above was soaked in acetone for 30-50 minutes, then washed with anhydrous ethanol and deionized water, and dried with nitrogen.

[0082] After completing the above steps, TaN / TaO is prepared. x / TiN / Cu multifunctional devices.

[0083] Example 4

[0084] In this example, a 500μm thick silicon wafer with a (100) crystal phase was selected. A 1μm thick SiO2 thin film was thermally grown on its surface to serve as the substrate. The wafer was then cut into 1×1cm samples, immersed in acetone, and cleaned ultrasonically for 10-15 minutes. The wafer was then immersed in anhydrous ethanol and ultrasonically cleaned for 5 minutes at a power of 40W. Finally, the wafer was rinsed with deionized water and dried with a nitrogen gun.

[0085] Next, a cleaned sample is taken and magnetron sputtered to grow a 200nm thick layer of the first metal electrode, Pd, on its surface. To improve the adhesion of the Pd electrode to the substrate, a Ti layer of approximately 10nm is deposited using DC sputtering. This is followed by DC sputtering of the Pd target at a power of 200W in an Ar atmosphere of 0.5Pa for 1000s.

[0086] Then, for example, the functional layer is prepared by magnetron sputtering, and the target material is Ta2O5 target. x In the process of TaO x The valence and content of oxygen in the medium can obtain the functional layer, namely TaOx The thickness of the layer, in this example, the functional layer is 30 nm.

[0087] Next, a square photolithography pattern with a size of 100 μm×100 μm is prepared on the sample prepared above by a photolithography process, wherein the photolithography process steps are: coating, pre-baking, pre-exposure, post-baking, post-exposure, and development.

[0088] Next, a 4 nm thick Ni layer was grown on the sample processed as above by magnetron sputtering at a power of 50 W and an Ar atmosphere of 0.5 Pa for 25 seconds to obtain a barrier layer.

[0089] Next, a 200 nm thick Ag layer was grown on the sample processed as above by magnetron sputtering at a power of 30 W, an Ar atmosphere of 0.5 Pa, and a sputtering time of 600 s to obtain a second electrode layer.

[0090] Finally, the film sample prepared above was soaked in acetone for 30-50 minutes, then washed with anhydrous ethanol and deionized water, and dried with nitrogen.

[0091] After completing the above steps, Pd / TaO is prepared. x / Ni / Ag multifunctional devices.

[0092] Example 5

[0093] In this example, a 500μm thick silicon wafer with a (100) crystal phase was selected. A 1μm thick SiO2 thin film was thermally grown on its surface to serve as the substrate. The wafer was then cut into 1×1cm samples, immersed in acetone, and cleaned ultrasonically for 10-15 minutes. The wafer was then immersed in anhydrous ethanol and ultrasonically cleaned for 5 minutes at a power of 40W. Finally, the wafer was rinsed with deionized water and dried with a nitrogen gun.

[0094] Next, a cleaned sample was taken and magnetron sputtered to grow a first metal electrode (Pd) approximately 1000nm thick on its surface. To improve the adhesion of the Pd electrode to the substrate, a Ti layer approximately 10nm thick was deposited using DC sputtering. This was followed by DC sputtering of a Pd target at a power of 200W in an Ar atmosphere of 0.5Pa for 1000s.

[0095] Then, for example, the functional layer is prepared by magnetron sputtering, and the target material is Ta2O5 target. x In the process of TaO x The valence and content of oxygen in the medium can obtain the functional layer, namely TaO x The thickness of the layer, in this example, the functional layer is 60 nm.

[0096] Next, a square photolithography pattern with a size of 100 μm×100 μm is prepared on the sample prepared above by a photolithography process, wherein the photolithography process steps are: coating, pre-baking, pre-exposure, post-baking, post-exposure, and development.

[0097] Next, a 6 nm thick Ni layer was grown on the sample processed as above by magnetron sputtering at a power of 50 W and an Ar atmosphere of 0.5 Pa for 25 seconds to obtain a barrier layer.

[0098] Next, a 1000 nm thick Ag layer was grown on the sample processed as above by magnetron sputtering at a power of 30 W, an Ar atmosphere of 0.5 Pa, and a sputtering time of 600 s to obtain a second electrode layer.

[0099] Finally, the film sample prepared above was soaked in acetone for 30-50 minutes, then washed with anhydrous ethanol and deionized water, and dried with nitrogen.

[0100] After completing the above steps, Pd / TaO is prepared. x / Ni / Ag multifunctional devices.

[0101] The following is the Pt / TaO obtained in Example 1 x / Ti / Ag multifunctional devices were subjected to a series of tests.

[0102] like Figure 2 As shown in the figure, the Pt / TaO x The DC characteristic diagram of the / Ti / Ag multifunctional device after applying a negative voltage, where the Pt electrode is grounded and the Ag electrode is subjected to a negative scanning voltage of 0~-3~0V. The device has volatile analog characteristics and the number of cycles is 50. x The oxygen content of the layer is lower than that of Ta2O5, and it is in an oxygen-deficient state. There are certain oxygen vacancies that form trap energy levels. When a negative voltage is applied to the second electrode layer, the second electrode layer is connected to the TaO x Electrons that transition between layers are captured by trap energy levels, causing the device's resistance state to change. When the voltage is removed, the trapped electrons are released to the second electrode layer, causing the device's resistance state to spontaneously return to a high-resistance state. The number of electrons in the layer affects the device's resistance state, allowing the device to have multiple resistance states. This allows the device to simulate volatile resistive switching, enabling it to function like dendrites in neurons.

[0103] like Figure 3 As shown in the figure, the Pt / TaO xThe DC characteristics of the / Ti / Ag multifunctional device after initialization with a small current-limiting forward voltage applied, with the Pt electrode grounded and a voltage applied to the Ag electrode. The initialization parameters are a 0-1V sweep voltage and a 10uA current limit. The post-initialization parameters are a 0-0.5-0V sweep voltage, a 50uA current limit, and 50 cycles. After initialization with a current limit of no more than 10uA applied to the second electrode layer, thin conductive filaments are formed that spontaneously break when the voltage is removed, giving the device digital volatile resistive switching characteristics that can function as a neuron's cell body.

[0104] like Figure 4 As shown, it shows the Pt / TaO x The DC characteristic diagram of the / Ti / Ag multifunctional device after the initialization operation with a large current-limiting forward voltage applied, where the Pt electrode is grounded and the Ag electrode is applied with voltage. The initialization operation parameters are a 0-2V scanning voltage and a 10mA current limit. The parameters after initialization are 0-0.7 to 0-0.7V, with a current limit of 1mA in the forward voltage direction and no current limit in the negative current direction. Among them, when the initialization operation with a current limit greater than 10mA is applied to the second electrode layer, a thicker conductive filament can be formed that does not spontaneously break when the voltage is removed, giving the device non-volatile resistive switching characteristics and realizing the function of a synapse.

[0105] Based on the above electrical measurements, it can be found that the device exhibits different electrical properties under different electrical operations, so only one device is needed to implement multiple functions in a large artificial neural network. When a negative bias is applied to the second metal layer, the device exhibits analog volatile resistive switching characteristics; after initialization operation is performed by applying a small current-limiting forward voltage in the direction of the second metal layer, the device exhibits digital volatile characteristics; after initialization operation is performed by applying a large current-limiting forward voltage in the direction of the second metal layer, the device exhibits non-volatile characteristics, respectively implementing the functions of multiple neuromorphic devices such as dendrites, cell bodies, and synapses, which can reduce the process complexity of artificial neural network hardware implementation and improve the integration level.

[0106] In summary, according to the present invention, a memristor device that can realize multiple different functions under different electrical operations can be obtained in a compact and easy-to-control manner. At the same time, it effectively solves the technical problems of low integration and complex processes of existing devices. Therefore, it is particularly suitable for large-scale integrated applications of artificial neural networks and has good practical value and application prospects.

[0107] It is easy for those skilled in the art to understand that the above is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the scope of protection of the present application.

Claims

1. A TaO-based x The multifunctional memristor is characterized in that The memristor includes a substrate, and a first electrode layer, a functional layer, a barrier layer, and a second electrode layer sequentially stacked on the substrate, wherein: The first electrode layer and the second electrode layer are made of inert metal material and active metal material respectively; the functional layer is made of TaO x The barrier layer is made of an inert metal material and x is less than 2.5, so that oxygen vacancies exist in the functional layer to form trap energy levels; the barrier layer is made of an inert metal material and is used to block metal atoms of the second electrode layer from entering the functional layer; When a negative voltage is applied to the second electrode layer, electrons transitioning from the second electrode layer to the functional layer are captured by its trap energy levels, and the entire device changes from a low-resistance state to a high-resistance state. When the negative voltage is removed, the electrons captured by the functional layer are released back to the second electrode layer, and the entire device spontaneously returns to a high-resistance state, correspondingly exhibiting the simulated volatile resistive switching characteristics of a memristor. When the second electrode layer is initialized by applying a current-limiting forward voltage, the metal atoms in the second electrode layer undergo an oxidation-reduction reaction and form a conductive filament in the functional layer, which connects the first and second electrode layers, thereby changing the entire device to a low-resistance state; wherein, when the current-limiting current is not greater than the preset value, the conductive filament is formed into a relatively thin diameter and spontaneously breaks after the forward power supply is removed, which corresponds to the digital volatile resistive switching characteristics of the memristor; in addition, when the current-limiting current is greater than the preset value, the conductive filament is formed into a relatively thick diameter and does not break after the forward voltage is removed, which corresponds to the non-volatile resistive switching characteristics of the memristor.

2. The multifunctional memristor according to claim 1, wherein The material of the first electrode layer is one of Pt, Pd, Au, Ni, ITO, Ti, W, Al, Ta, Hf, TaN, TiN and TiW; the material of the barrier layer is one of Pt, Pd, Au, Ni, ITO, Ti, W, Al, Ta, Hf, TaN, TiN and TiW; the material of the second electrode layer is one of Ag and Cu.

3. The multifunctional memristor according to claim 1 or 2, characterized in that: The thickness of the first electrode layer is designed to be 5nm-2000nm, the thickness of the functional layer is designed to be 2nm-100nm, the thickness of the barrier layer is designed to be 2nm-10nm, and the thickness of the second electrode layer is designed to be 10nm-2000nm.

4. A method for preparing a multifunctional memristor according to any one of claims 1 to 3, characterized in that: The method comprises the following steps: (i) providing a substrate; (ii) preparing the first electrode layer on a substrate; (iii) preparing the functional layer on the first electrode layer; (iv) processing desired patterns on the functional layer, and preparing the barrier layer accordingly based on the patterns; (v) preparing the second electrode layer on the barrier layer, and after the second electrode layer is grown, sequentially performing operations of peeling, cleaning, and drying, thereby obtaining the desired multifunctional memristor.

5. The preparation method according to claim 4, wherein In step (iii), the functional layer is preferably prepared by physical vapor deposition, chemical vapor deposition, magnetron sputtering, molecular beam epitaxy, atomic layer deposition or electrochemical growth.

6. The preparation method according to claim 4 or 5, characterized in that In step (iv), a photolithography process is preferably used to form a desired pattern on the functional layer.

7. The preparation method according to claim 6, wherein In step (v), after the second electrode layer is grown, it is preferably peeled off by soaking in acetone, then washed with anhydrous ethanol and deionized water in sequence, and then dried with nitrogen, thereby obtaining the desired multifunctional memristor.

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