Imaging device

Abstract

According to the invention, the noise component caused by dark current is reduced while the requirement on mechanical shading is eliminated. An image pickup device includes: a pixel provided with a lateral overflow storage capacitor for storing charge overflowing from a photoelectric conversion part; and a signal processing unit that performs correction processing on a pixel signal read out from the pixel on the basis of a dummy light-shielding signal read out from the lateral overflow accumulation capacitor in a state in which the charge photoelectrically converted by the photoelectric conversion unit is not accumulated in the lateral overflow accumulation capacitor. The imaging device may further include a flow rate control unit capable of discharging the charge obtained by photoelectric conversion by the photoelectric conversion unit so that the charge does not accumulate in the lateral overflow accumulation capacitor.

Description

Technical Field

[0001] The present technology relates to an image pickup device and, more particularly, to an image pickup device in which a lateral overflow integration capacitor (LOFIC) is provided in a pixel. Background Art

[0002] In order to remove the noise component inherent to the element called dark current when photographing, in some cases, a technique of imaging a light-shielded image under the same conditions as those of normal photography and subtracting the image from the normal image (so-called black subtraction) is used. For example, a technique has been proposed in which, immediately before the imaging unit performs continuous photography, the imaging unit is controlled to acquire a light-shielded image signal, and a noise removal method is changed based on the exposure conditions and temperature when the continuous photography is performed (for example, see Patent Document 1). Citation List Patent Literature

[0003] Patent Document 1: Japanese Patent Application Laid-Open No. 2014-220580 Summary of the invention Problem that the invention aims to solve

[0004] However, in the above-mentioned conventional technology, in order to acquire a light-shielding image signal, a mechanical light shielding such as a mechanical shutter or a light shielding curtain is required, and depending on the use of the imaging device, it may be difficult to apply the technology.

[0005] The present technology has been made in view of the above-described situation, and an object of the present technology is to reduce noise components caused by dark current while eliminating the need for mechanical light shielding. Technical solutions to technical problems

[0006] The present technology is completed to solve the above-mentioned problems, and the first aspect of the present technology is an imaging device, which includes a pixel and a signal processing unit. The pixel is provided with a lateral overflow storage capacitor for accumulating charges overflowing from a photoelectric conversion unit. The signal processing unit performs correction processing on the pixel signal read out from the pixel based on a virtual light shielding signal read from the lateral overflow storage capacitor in a state where the charges obtained by photoelectric conversion by the photoelectric conversion unit are not accumulated in the lateral overflow storage capacitor. This brings about the following effect: the noise component can be removed based on the virtual light shielding signal caused by the dark current.

[0007] In addition, in the first aspect, the camera device may further include: a flow control unit capable of discharging the charge obtained by the photoelectric conversion unit in such a manner that the charge is not accumulated in the lateral overflow storage capacitor. This brings about the following effect: a virtual light shielding signal caused by dark current can be generated without shielding the photoelectric conversion unit.

[0008] In addition, in the first aspect, the camera device may further include a normal accumulation period and a virtual light-shielding accumulation period. During the normal accumulation period, in a state where the charge accumulated in the photoelectric conversion unit can overflow into the lateral overflow accumulation capacitor, the charge is accumulated in the photoelectric conversion unit. During the virtual light-shielding accumulation period, in a state where the charge obtained by the photoelectric conversion unit through photoelectric conversion is not accumulated in the lateral overflow accumulation capacitor, the charge based on the dark current is accumulated in the lateral overflow accumulation capacitor. This brings about the following effect: a normal image generated based on photoelectric conversion and a virtual light-shielding image caused by the dark current can be generated without shading the photoelectric conversion unit.

[0009] Furthermore, in the first aspect, each of the normal accumulation period and the virtual light shielding accumulation period may include: a timing when the charge accumulated in the photoelectric conversion unit is read as a single body; and a timing when the charge accumulated in the photoelectric conversion unit and the charge accumulated in the lateral overflow accumulation capacitor are read together. This brings about the effect that an image with different conversion efficiencies can be generated corresponding to the amount of light of each pixel.

[0010] In the first aspect, each of the normal accumulation period and the virtual light shielding accumulation period may include a timing for reading the charge accumulated in the photoelectric converter with different conversion efficiencies. This brings about the effect that an image with different conversion efficiencies for each pixel can be generated.

[0011] In the first aspect, the normal accumulation period and the virtual light shielding accumulation period may be set in the same frame. This brings about the effect that an image with reduced noise components due to dark current can be generated while suppressing a decrease in frame rate.

[0012] In the first aspect, the normal accumulation period and the virtual light-shielded accumulation period may be set in different frames. This produces an effect of being able to generate a virtual light-shielded image containing noise components equivalent to those caused by dark current contained in a normal image.

[0013] Furthermore, in the first aspect, for a normal image generated based on the charges accumulated during the normal accumulation period, the signal processing unit can perform correction processing on the pixel signal by using a virtual light-shielded image generated based on the charges accumulated during the virtual light-shielded accumulation period. This brings about an effect of being able to generate a virtual light-shielded image that includes a noise component corresponding to the fluctuation of the noise component caused by the dark current included in the normal image.

[0014] Furthermore, in the first aspect, for a plurality of normal images generated based on charges accumulated in the different normal accumulation periods, the signal processing unit can perform correction processing on the pixel signal by using a virtual light-shielded image generated based on charges accumulated in the virtual light-shielded accumulation period. This brings about the following effect: while being able to suppress a decrease in the frame rate when generating the virtual light-shielded image, it is also possible to generate a normal image with reduced noise components caused by dark current.

[0015] Furthermore, in the first aspect, for one normal image generated based on the charges accumulated in the normal accumulation period, the signal processing unit can perform correction processing on the pixel signal by using a plurality of virtual light-shielding images generated based on the charges accumulated in the virtual light-shielding accumulation periods that are different from each other. This brings about the following effect: while being able to average the noise components when generating the virtual light-shielding images, it is also possible to generate a normal image with reduced noise components caused by dark current.

[0016] Furthermore, in the first aspect, for each of the normal image generated based on the charge accumulated during the normal accumulation period and the virtual light-shielding image generated based on the charge accumulated during the virtual light-shielding accumulation period, the signal processing unit may perform analog-to-digital (AD) conversion of the signal level based on different reset levels. This brings about the following effect: a normal image with reduced noise components caused by dark current can be generated.

[0017] Furthermore, in the first aspect, for each of the normal image generated based on the charge accumulated during the normal accumulation period and the virtual light-shielding image generated based on the charge accumulated during the virtual light-shielding accumulation period, the signal processing unit may perform analog-to-digital (AD) conversion of the signal level based on the same reset level as a reference. This brings about the following effects: random noise based on CDS (correlated double sampling) can be reduced, and a normal image with reduced noise components caused by dark current can be generated.

[0018] Furthermore, in the first aspect, the power supply voltage applied to the lateral overflow storage capacitor during the virtual light shielding storage period can be made higher than the power supply voltage applied to the lateral overflow storage capacitor during the normal storage period. This brings about the effect of accelerating the generation of a virtual light shielding image containing a noise component equivalent to a noise component caused by dark current contained in a normal image.

[0019] Furthermore, in the first aspect, the pixel may include: a photodiode used as the photoelectric conversion unit; a transfer transistor that transfers the charge accumulated in the photodiode to the floating diffusion unit; a pass transistor that sets a path through which the charge accumulated in the lateral overflow storage capacitor is transferred to the floating diffusion unit; a reset transistor that resets the floating diffusion unit; an amplifier transistor that outputs a signal corresponding to the potential of the floating diffusion unit; and a selection transistor that selects the output of the amplifier transistor. This brings about the following effect: unlike the single reading of the charge accumulated in the photodiode, it is possible to realize the simultaneous reading of the charge accumulated in the photodiode and the charge accumulated in the lateral overflow storage capacitor.

[0020] Furthermore, in the first aspect, the pixel may further include: a switching transistor that switches the conversion efficiency in the amplifying transistor. This brings about an effect of being able to expand the dynamic range.

[0021] Furthermore, in the first aspect, when the charge obtained by the photoelectric conversion by the photoelectric conversion unit is not accumulated in the lateral overflow storage capacitor, the pass transistor can be turned off, and the transfer transistor, the reset transistor, and the switching transistor can be turned on. This brings about the following effects: the charge obtained by the photoelectric conversion by the photoelectric conversion unit can be prevented from overflowing into the lateral overflow storage capacitor, and the charge caused by the dark current is accumulated in the lateral overflow storage capacitor.

[0022] Furthermore, in the first aspect, during the virtual light shielding accumulation period, at the timing when the charge accumulated in the photoelectric conversion unit is read as a single body, the transfer transistor can be turned off. This brings about the effect that the charge accumulated in the photoelectric conversion unit can be prevented from being read during the virtual light shielding accumulation period.

[0023] In addition, in the first aspect, the imaging device may further include an overflow control transistor that controls the overflow of charge from the photoelectric conversion unit to the lateral overflow storage capacitor. This brings about the following effect: the overflow of charge from the photoelectric conversion unit to the lateral overflow storage capacitor can be controlled based on the voltage applied to the overflow control transistor.

[0024] Furthermore, in the first aspect, the transfer transistor may be driven in three values ​​between a level for enabling overflow from the photoelectric converter to the floating diffusion, a level for disabling overflow from the photoelectric converter to the floating diffusion, and a level for transferring charge from the photoelectric converter to the floating diffusion. This brings about the effect that the overflow of charge from the photoelectric converter to the lateral overflow storage capacitor can be controlled based on the voltage applied to the transfer transistor.

[0025] In the first aspect, the signal processing unit may determine whether to perform correction processing on the pixel signal based on the temperature around the pixel. This brings about the effect that the noise component caused by the dark current is small and the load related to the correction of the noise component is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 is a block diagram showing a configuration example of a camera to which the image pickup apparatus according to the first embodiment is applicable. Figure 2 is a block diagram showing a configuration example of a solid-state image pickup device according to the first embodiment. Figure 3 is a block diagram showing a circuit configuration example of a pixel provided in the solid-state image pickup device according to the first embodiment. Figure 4 : is a diagram showing an example of a charge discharge path in a virtual light shielding accumulation period of the solid-state imaging device according to the first embodiment. Figure 5 is a graph showing the relationship between the storage time and the dark current in the case where the power supply voltage of the lateral type overflow storage capacitor according to the first embodiment is changed. Figure 6 : is a diagram showing an example of potentials in an exposure period and a reading period at the time of normal accumulation of the solid-state image pickup device according to the first embodiment. Figure 7 : is a diagram showing an example of potentials in an exposure period and a reading period at the time of virtual light shielding accumulation of the solid-state imaging device according to the first embodiment. Figure 8 : is a timing chart showing an example of the reading operation at the time of normal accumulation of the solid-state image pickup device according to the first embodiment. Fig. 9 : is a timing chart showing an example of the reading operation at the time of virtual light shielding accumulation of the solid-state imaging device according to the first embodiment. Fig.10 is a block diagram showing a circuit configuration example of a pixel provided in the solid-state image pickup device according to the second embodiment. Fig.11 is a block diagram showing a circuit configuration example of a pixel provided in a solid-state image pickup device according to the third embodiment. Fig.12 is a block diagram showing a circuit configuration example of a pixel provided in a solid-state image pickup device according to a fourth embodiment. Fig.13 is a block diagram showing a circuit configuration example of a pixel provided in a solid-state image pickup device according to a fifth embodiment. Fig.14 : is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period and the correction processing of the solid-state image pickup device according to the sixth embodiment. Fig.15 : is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period and the correction processing of the solid-state image pickup device according to the seventh embodiment. Fig.16 : is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period and the correction processing of the solid-state image pickup device according to the eighth embodiment. Fig.17 : is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period and the correction processing of the solid-state image pickup device according to the ninth embodiment. Fig.18 10 is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period and the correction processing of the solid-state image pickup device according to the tenth embodiment. Fig.19 1 is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period and the correction processing of the solid-state image pickup device according to the eleventh embodiment. Fig. 20 : is a flowchart showing the correction process of the solid-state image pickup device according to the twelfth embodiment. Fig.21 is a flowchart showing a correction process of the solid-state image pickup device according to the thirteenth embodiment. Fig. 22 is a block diagram showing a configuration example of a solid-state image pickup device according to a fourteenth embodiment. Fig.23 is a block diagram showing a circuit configuration example of a pixel provided in a solid-state image pickup device according to a fifteenth embodiment. Fig.24 : is a diagram showing an example of the potential at the time of normal accumulation and at the time of virtual light-shielded accumulation of the solid-state imaging device according to the fifteenth embodiment. Fig.2515 is a timing chart showing the potential of a transfer signal in a normal accumulation period and a virtual light-shielded accumulation period of the solid-state imaging device according to the fifteenth embodiment. Fig.26 15 is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period of the solid-state imaging device according to the fifteenth embodiment, and the transmission signal. Fig. 27 is a block diagram showing a circuit configuration example of a pixel provided in a solid-state image pickup device according to a sixteenth embodiment. Fig.28 17 is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period of the solid-state imaging device according to the seventeenth embodiment, and the transmission signal. Fig.29 : is a diagram showing an example of the potential at the time of normal accumulation and at the time of virtual light-shielded accumulation of the solid-state imaging device according to the eighteenth embodiment. Fig.30 is a block diagram showing a schematic configuration example of a vehicle control system. Fig.31 1 is an explanatory diagram showing an example of the installation position of the imaging unit. DETAILED DESCRIPTION

[0027] Hereinafter, a scheme for implementing the present technology (hereinafter, referred to as an embodiment) will be described. The description will be given in the following order. 1. First Embodiment (Example of Correction Processing of Pixel Signals Read from Pixels Based on Virtual Light Shielding Signals Read from Lateral Overflow Storage Capacitors in a State Where Charges Photoelectrically Converted by Photodiodes Are Not Stored in Lateral Overflow Storage Capacitors) 2. Second Embodiment (Example of Removing Overflow Control Transistor from Pixel) 3. Third Embodiment (Example of Removing Switching Transistor from Pixel) 4. Fourth Embodiment (Example of Removing Overflow Control Transistor and Switching Transistor from Pixel) 5. Fifth Embodiment (Example in which Photodiodes Having Different Sizes Are Provided in Pixels) 6. Sixth Embodiment (Example of Implementing Pixel Signal Correction Processing for a Normal Image in a Different Frame by Using a Virtual Light-Shielding Image in a Frame) 7. Seventh Embodiment (Example of Implementing Pixel Signal Correction Processing for a Normal Image of the Frame by Using a Virtual Light-Shielding Image in the Frame) 8. Eighth Embodiment (Example of Implementing Pixel Signal Correction Processing on a Normal Image in Another Frame Different from Each Other by Using a Virtual Light-Shielding Image in One Frame) 9. Ninth Embodiment (Example of acquiring one normal image and one virtual light-shielded image in the same frame, and performing pixel signal correction processing on a plurality of normal images in mutually different frames by using the one virtual light-shielded image) 10. Tenth Embodiment (Example of Implementing Pixel Signal Correction Processing for a Normal Image in the Same Frame by Using a Virtual Light-Shielded Image in Which Dark Current Generation is Accelerated) 11. Eleventh Embodiment (Example of acquiring a normal image and a virtual light-shielded image in the same frame, and performing pixel signal correction processing on a normal image in another different frame by using such a plurality of virtual light-shielded images) 12. Twelfth Embodiment (Example of determining whether to implement pixel signal correction processing based on the temperature around the pixel) 13. Thirteenth Embodiment (Example of Determining Whether to Implement Correction Processing by Using a Virtual Light-Shielding Image Acquired in a Previous Frame Based on Temperature Changes Around a Pixel) 14. Fourteenth Embodiment (Example of Providing a Frame Memory for Implementing CDS Processing When Generating a Virtual Shaded Image) 15. Fifteenth Embodiment (Example of Ternarizing a Transmission Signal to Generate a Virtual Light-Shielding Image) 16. Sixteenth Embodiment (Example in which an overflow control transistor is added to a pixel for ternaryizing a transfer signal) 17. Seventeenth Embodiment (Example of Changing the Reading Frequency of the Solid-State Image Pickup Device During Virtual Light Shielding Storage) 18. Eighteenth Embodiment (Example of Changing the Substrate Potential to Generate a Virtual Light-Shielding Image)

[0028] <1. First Implementation Method> Figure 1 is a block diagram showing a configuration example of a camera to which the image pickup apparatus according to the first embodiment is applicable.

[0029] exist Figure 1 , the camera 100 includes an optical system 101, a solid-state imaging device 102, an imaging control section 103, an image processing section 104, a storage section 105, a display section 106, and an operation section 107. The imaging control section 103, the image processing section 104, the storage section 105, the display section 106, and the operation section 107 are connected to each other via a bus 108. Note that the camera 100 may be used alone, may be incorporated in a portable terminal such as a smartphone, or may be incorporated in an authentication device or a monitoring device.

[0030] The optical system 101 causes light from a subject to enter the solid-state imaging device 102, and forms an image of the subject on a light receiving surface of the solid-state imaging device 102. For example, the optical system 101 may include a focus lens, a zoom lens, an aperture, etc. The optical system 101 may include a plurality of lenses such as a wide-angle lens, a standard lens, and a telephoto lens.

[0031] The solid-state imaging device 102 converts light from the subject into electrical signals for each pixel, digitizes the electrical signals, and outputs them. For example, the solid-state imaging device 102 may be a complementary metal oxide semiconductor (CMOS) image sensor or a charge coupled device (CCD) image sensor.

[0032] The image capture control section 103 controls the image capture of the solid-state image capture device 102 according to the instruction from the operation section 107. At this time, the image capture control section 103 can control the exposure time, exposure amount, image capture timing, etc. of the solid-state image capture device 102.

[0033] The image processing section 104 performs image processing based on the output from the solid-state imaging device 102. For example, the image processing is gamma correction, white balance processing, sharpness processing, or grayscale conversion processing. The image processing section 104 may include a processor that performs processing based on software.

[0034] The storage unit 105 stores the captured images captured by the solid-state imaging device 102, and stores the imaging parameters of the solid-state imaging device 102. In addition, the storage unit 105 can store a program for operating the camera 10 based on software. The storage unit 105 can include a read only memory (ROM), a random access memory (RAM), and a memory card.

[0035] The display unit 106 displays the captured image and various information for assisting the image capturing operation. The display unit 106 may be a liquid crystal display or an organic electroluminescence (EL: electro luminescence) display.

[0036] The operation section 107 provides a user interface for operating the camera 100. For example, the operation section 107 may include buttons, dials, and switches provided on the camera 100. The operation section 107 may be configured by a touch panel together with the display section 106.

[0037] Figure 2 is a block diagram showing a circuit configuration example of the solid-state image pickup device according to the first embodiment.

[0038] exist Figure 2 In FIG. 1 , the solid-state imaging device 102 includes a pixel array section 111 , a vertical scanning circuit 112 , a column reading circuit 113 , a column signal processing section 114 , a horizontal scanning circuit 115 , and a control circuit 116 . The vertical scanning circuit 112 includes a flow control section 117 .

[0039] The pixel array section 111 includes a plurality of pixels 120. The pixels 120 are arranged in a matrix along a row direction (also referred to as a horizontal direction) and a column direction (also referred to as a vertical direction). Each pixel 120 includes a lateral overflow storage capacitor for storing charges overflowing from the photoelectric conversion section. When a signal is read out, each pixel 120 can form a source follower together with the column reading circuit 113. Each pixel 120 is connected to a horizontal drive line 131 in each row and to a vertical signal line 132 in each column. When a signal is read out from each pixel 120, the horizontal drive line 131 drives each pixel 120 in each row. The vertical signal line 132 transmits a potential corresponding to a current flowing when a signal is read out from the pixel 120 to the column signal processing section 114 in each column.

[0040] The vertical scanning circuit 112 scans the pixels 120 to be read in the column direction. The vertical scanning circuit 112 can be configured by using a vertical register.

[0041] The flow control section 117 can discharge the charges obtained by the photoelectric conversion of the photoelectric conversion section of each pixel 120 in such a manner that the charges are not accumulated in the lateral overflow storage capacitor. At this time, the flow control section 117 can set the charge discharge path according to the on / off of the pixel transistor provided in each pixel 120. Alternatively, the flow control section 117 can set the charge discharge path according to the control of the gate potential of the transfer transistor for transferring the charges from the photoelectric conversion section to the floating diffusion section. Or alternatively, the flow control section 117 can set the charge discharge path according to the control of the substrate potential of the semiconductor substrate on which the photoelectric conversion section is formed.

[0042] When reading out signals from each pixel 120, the column read circuit 113 can form a source follower together with each pixel 120. At this time, the column read circuit 113 can change the potential of the vertical signal line 132 based on the charge held in the pixel 120. The column read circuit 113 can also support constant current readout, or can support capacitive load readout.

[0043] The column signal processing unit 114 processes the signals transmitted from each pixel 120 in the column direction. For example, the column signal processing unit 114 may perform a correlated double sampling (CDS) process based on the signals transmitted from each pixel 120 in the column direction. In addition, the column signal processing unit 114 may perform an analog-to-digital (AD) conversion process based on the signals transmitted from each pixel 120 in the column direction to output an imaging signal Gout. In addition, the column signal processing unit 114 may perform a correction process on the pixel signal read out from the pixel based on a virtual light shielding signal read out from the lateral overflow storage capacitor. The virtual light shielding signal is a signal read out from the lateral overflow storage capacitor in a state where the charge obtained by the photoelectric conversion unit is not accumulated in the lateral overflow storage capacitor. At this time, the virtual light shielding signal may include a signal based on the charge generated by the dark current. Here, the column signal processing unit 114 may reduce the noise component caused by the dark current by subtracting the virtual light shielding signal from the pixel signal read out from the pixel. Note that the column signal processing section 114 is an example of a signal processing section described in the claims.

[0044] The horizontal scanning circuit 115 scans the pixels 120 to be read in the row direction. The horizontal scanning circuit 115 may include a horizontal register.

[0045] The control circuit 116 controls the vertical scanning circuit 112, the column reading circuit 113, the column signal processing section 114, and the horizontal scanning circuit 115. For example, the control circuit 116 can control the scanning timing in the column direction, the scanning timing in the row direction, the operation timing of the column reading circuit 113, and the processing timing of the column signal processing section 114.

[0046] Figure 3 is a block diagram showing a circuit configuration example of a pixel provided in the solid-state image pickup device according to the first embodiment, and Figure 4 : is a diagram showing an example of a charge discharge path in a virtual light shielding accumulation period of the solid-state imaging device according to the first embodiment.

[0047] exist Figure 3, the pixel 120 includes a photodiode 121, a transfer transistor 122, a reset transistor 123, an amplifier transistor 124, a selection transistor 125, and a floating diffusion portion FD. In addition, the pixel 120 includes a lateral overflow storage capacitor 126, a pass transistor 127, a switching transistor 128, and an overflow control transistor 129. The transfer transistor 122, the reset transistor 123, the amplifier transistor 124, the selection transistor 125, the pass transistor 127, the switching transistor 128, and the overflow control transistor 129 can be MOS (metal oxide semiconductor: metal oxide semiconductor) transistors. The lateral overflow storage capacitor 126 can be a MIM (metal-insulator-metal: metal insulation metal) capacitor, or can be a junction capacitor formed on a semiconductor substrate.

[0048] The photodiode 121 performs photoelectric conversion and accumulates charges obtained by the photoelectric conversion. Note that the photodiode 121 is an example of a photoelectric conversion unit described in the claims. The lateral overflow storage capacitor 126 accumulates charges overflowing from the photodiode 121. The lateral overflow storage capacitor 126 is shielded from light.

[0049] The transfer transistor 122 transfers the charge accumulated in the photodiode 121 to the floating diffusion FD. The reset transistor 123 resets the floating diffusion FD. The amplifier transistor 124 outputs a signal corresponding to the potential of the floating diffusion FD. The selection transistor 125 selects the output of the amplifier transistor 124. The path transistor 127 sets a path through which the charge accumulated in the lateral overflow storage capacitor 126 is transferred to the floating diffusion FD. The switching transistor 128 switches the conversion efficiency in the amplifier transistor 124. The overflow control transistor 129 controls the overflow of the charge from the photodiode 121 to the lateral overflow storage capacitor 126.

[0050] The amplifier transistor 124 and the selection transistor 125 are connected in series. The cathode of the photodiode 121 is connected to the floating diffusion FD via the transfer transistor 122. In addition, the floating diffusion FD is connected to the power supply voltage VDD via the switching transistor 128 and the reset transistor 123 in sequence. In addition, the power supply voltage VDD is connected to the vertical signal line 132 via the series circuit of the amplifier transistor 124 and the selection transistor 125. The gate of the amplifier transistor 124 is connected to the floating diffusion FD. The source of the selection transistor 125 is connected to the vertical signal line 132.

[0051] The overflow control transistor 129 is connected between the photodiode 121 and the lateral overflow storage capacitor 126. The power supply voltage MVDD is applied to the lateral overflow storage capacitor 126. The power supply voltage MVDD may be higher than the power supply voltage VDD. The pass transistor 127 is connected between the connection point between the lateral overflow storage capacitor 126 and the overflow control transistor 129 and the connection point between the switching transistor 128 and the reset transistor 123.

[0052] The transmission signal TGL is applied to the gate of the transmission transistor 122. The reset signal RST is applied to the gate of the reset transistor 123. The selection signal SEL is applied to the gate of the selection transistor 125. The path setting signal FCG is applied to the gate of the path transistor 127. The switching signal FDG is applied to the gate of the switching transistor 128. The overflow control signal OFG is applied to the gate of the overflow control transistor 129. The transmission signal TGL, the reset signal RST, the selection signal SEL, the path setting signal FCG, the switching signal FDG, and the overflow control signal OFG can be applied to the gate of the overflow control transistor 129. Figure 2 The signal is transmitted to each pixel 120 by the horizontal driving line 131 in the image.

[0053] The pixel 120 can implement normal reading and virtual light-shielded reading. In normal reading, single-body reading from the photodiode 121 and combined reading from the photodiode 121 and the lateral overflow storage capacitor 126 are performed. In virtual light-shielded reading, combined reading from the photodiode 121 and the lateral overflow storage capacitor 126 is performed without implementing single-body reading from the photodiode 121. At this time, in normal reading, the charge accumulated in a state where the charge can overflow from the photodiode 121 to the lateral overflow storage capacitor 126 is read. In virtual light-shielded reading, the charge accumulated in a state where the charge does not flow from the photodiode 121 into the lateral overflow storage capacitor 126 is read. Here, the lateral overflow storage capacitor 126 can store charges generated based on dark current. At this time, as Figure 4 As shown, the transfer transistor 122, the switching transistor 128, and the reset transistor 123 can all be turned on, thereby setting a discharge path R1 for the charges photoelectrically converted by the photodiode 121. As a result, the charges photoelectrically converted by the photodiode 121 can be prevented from being accumulated in the lateral overflow storage capacitor 126.

[0054] During normal reading, in single-unit reading from the photodiode 121 (hereinafter referred to as normal single reading), when the transfer transistor 122 is turned on, the charge accumulated in the photodiode 121 is transferred to the floating diffusion FD. Then, when the selection transistor 125 is turned on, the source potential of the amplifier transistor 124 changes according to the potential of the floating diffusion FD. Then, the source potential of the amplifier transistor 124 is applied to the vertical signal line 132 via the selection transistor 125, and is transmitted via the vertical signal line 132.

[0055] During normal reading, in collective reading from the photodiode 121 and the lateral overflow storage capacitor 126 (hereinafter referred to as normal collective reading), the transfer transistor 122, the pass transistor 127, and the switching transistor 128 are all turned on. At this time, the charge accumulated in the photodiode 121 and the lateral overflow storage capacitor 126 is transferred to the floating diffusion FD. Here, the charge accumulated in the photodiode 121 and the lateral overflow storage capacitor 126 includes: a photoelectric conversion component obtained by photoelectric conversion by the photodiode 121; and a dark current component accumulated in the lateral overflow storage capacitor 126. Then, when the selection transistor 125 is turned on, the source potential of the amplifier transistor 124 changes according to the potential of the floating diffusion FD. Then, the source potential of the amplifier transistor 124 is applied to the vertical signal line 132 via the selection transistor 125, and is transmitted via the vertical signal line 132.

[0056] During virtual light-shielding collective reading, in collective reading from the photodiode 121 and the lateral overflow storage capacitor 126 (hereinafter referred to as virtual light-shielding collective reading), the transfer transistor 122, the pass transistor 127, and the switching transistor 128 are all turned on. At this time, the charge accumulated in the photodiode 121 and the lateral overflow storage capacitor 126 is transferred to the floating diffusion FD. Here, the charge accumulated in the photodiode 121 and the lateral overflow storage capacitor 126 includes the dark current component accumulated in the lateral overflow storage capacitor 126, but does not include the photoelectric conversion component obtained by photoelectric conversion by the photodiode 121. Then, when the selection transistor 125 is turned on, the source potential of the amplifier transistor 124 changes according to the potential of the floating diffusion FD. Then, the source potential of the amplifier transistor 124 is applied to the vertical signal line 132 via the selection transistor 125, and is transmitted via the vertical signal line 132.

[0057] Here, in normal reading, a normal accumulation period for accumulating the charge read out by normal reading can be set. In virtual light-shielding reading, a virtual light-shielding accumulation period for accumulating the charge read out by virtual light-shielding reading can be set separately from the normal accumulation period. The normal accumulation period and the virtual light-shielding accumulation period can be set in the same frame or in different frames. At this time, if the virtual light-shielding accumulation period is set, it will lead to a reduction in the normal accumulation period. In order to suppress the reduction in the normal accumulation period, it is preferred that the virtual light-shielding accumulation period is shorter. Because the virtual light-shielding accumulation period is used to accumulate the charge caused by the dark current, the virtual light-shielding accumulation period can be shortened by accelerating the generation of the dark current. In order to accelerate the generation of the dark current, the power supply voltage MVDD applied to the lateral overflow storage capacitor 126 can be increased. In addition, each of the normal accumulation period and the virtual light-shielding accumulation period can have a timing for reading the charge accumulated in the photodiode 121 with different conversion efficiencies.

[0058] Figure 5 is a graph showing the relationship between the storage time and the dark current in the case where the power supply voltage of the lateral type overflow storage capacitor according to the first embodiment is changed.

[0059] exist Figure 5 In the embodiment of the present invention, the amount of charge accumulated due to the dark current is proportional to the accumulation time. When the MVDD voltage is high, the amount of charge per unit time accumulated in the lateral overflow accumulation capacitor 126 due to the dark current increases. At this time, by increasing the MVDD voltage used for light shielding accumulation relative to the MVDD voltage used for normal accumulation, the virtual light shielding accumulation time TA can be set so that the amount of charge accumulated due to the dark current in the normal accumulation time TB is equal to the amount of charge accumulated due to the dark current in the virtual light shielding accumulation time TA. This makes it possible to make the amount of charge accumulated due to the dark current in the virtual light shielding accumulation time TA equal in both the presence and absence of acceleration.

[0060] Figure 6 : is a diagram showing an example of potentials during exposure and reading in normal accumulation of the solid-state imaging device according to the first embodiment. Note that Figure 6 Graph a is a diagram showing an example of the potential during the exposure period in normal accumulation. Figure 6 b is a diagram showing an example of the potential after the floating diffusion FD is reset during the reading period at the time of normal accumulation. Here, Figure 6 c is a diagram showing an example of the potential after reading from a single body of the photodiode 121 in the reading period at the time of normal accumulation. Here, Figure 6d is a diagram showing an example of the potential when the photodiode 121 and the lateral overflow storage capacitor 126 are normally read together during the reading period at the time of normal storage. Here, Figure 6 1e is a diagram showing an example of the potential after the floating diffusion FD and the lateral overflow storage capacitor 126 are reset in the read period at the time of normal storage.

[0061] exist Figure 6 In a, during the exposure period in normal accumulation, the transfer transistor 122, the pass transistor 127, the switching transistor 128, and the reset transistor 123 are all turned off. The gate potential of the overflow control transistor 129 is set so that the charge EL1 accumulated in the photodiode 121 can overflow to the lateral overflow storage capacitor 126. At this time, the charge EL1 obtained by the photoelectric conversion by the photodiode 121 is accumulated in the photodiode 121, and the charge EL1 overflowing from the photodiode 121 overflows to the lateral overflow storage capacitor 126 and is accumulated in the lateral overflow storage capacitor 126. The charge EL2 generated by the dark current during the exposure period in normal accumulation is accumulated in the floating diffusion FD and the lateral overflow storage capacitor 126.

[0062] exist Figure 6 In b, after the floating diffusion FD is reset in the reading period at the time of normal accumulation, the charge EL2 generated and accumulated in the floating diffusion FD due to the dark current is discharged.

[0063] exist Figure 6 In c, after reading from the single body of the photodiode 121 in the reading period at the time of normal accumulation, the charge EL1 accumulated in the photodiode 121 is transferred to the floating diffusion FD.

[0064] exist Figure 6 In d, during the reading period at the time of normal accumulation, both the pass transistor 127 and the switching transistor 128 are turned on at the time of the normal combined reading from the photodiode 121 and the lateral overflow storage capacitor 126. At this time, the charge EL1 transferred from the photodiode 121 to the floating diffusion FD, the charge EL1 overflowing from the photodiode 121 to the lateral overflow storage capacitor 126, and the charge EL2 generated and stored in the lateral overflow storage capacitor 126 due to the dark current exist in combination.

[0065] exist Figure 6In the above, in the reading period at the time of normal accumulation, after the floating diffusion FD and the lateral overflow storage capacitor 126 are reset, the charge EL1 transferred from the photodiode 121 to the floating diffusion FD is discharged. In addition, the charge EL1 overflowing from the photodiode 121 to the lateral overflow storage capacitor 126 and the charge EL2 generated and stored in the lateral overflow storage capacitor 126 due to the dark current are also discharged.

[0066] Figure 7 : is a diagram showing an example of potentials during exposure and reading at the time of virtual light shielding accumulation of the solid-state imaging device according to the first embodiment. Note that, Figure 7 : a is a diagram showing an example of the potential during the exposure period when the virtual light shielding is accumulated. Here, Figure 7 b is a diagram showing an example of the potential after the floating diffusion FD is reset during the reading period when the virtual light shielding is accumulated. Figure 7 c is a diagram showing an example of the potential when the single-body reading from the photodiode 121 is not performed during the reading period during the virtual light shielding accumulation. Here, Figure 7 d is a diagram showing an example of the potential when reading from the photodiode 121 and the virtual light shielding of the lateral overflow storage capacitor 126 together in the reading period when the virtual light shielding is accumulated. Here, Figure 7 1e is a diagram showing an example of the potential after the floating diffusion FD and the lateral overflow storage capacitor 126 are reset in the reading period at the time of virtual light shielding storage.

[0067] exist Figure 7 In a, during the exposure period when the virtual light shielding is accumulated, the transfer transistor 122, the switching transistor 128, and the reset transistor 123 are all turned on, thereby setting the discharge path of the charge EL1 obtained by the photoelectric conversion by the photodiode 121. Therefore, the charge EL1 obtained by the photoelectric conversion by the photodiode 121 will not be accumulated in the photodiode 121, and the charge will not overflow from the photodiode 121 to the lateral overflow accumulation capacitor 126. At this time, the charge EL2 generated due to the dark current during the exposure period when the virtual light shielding is accumulated is accumulated in the lateral overflow accumulation capacitor 126. Here, the virtual light shielding accumulation period or the power supply voltage MVDD can be set so that the accumulation amount of the charge EL2 generated due to the dark current during the exposure period when the virtual light shielding is accumulated and the accumulation amount of the charge EL2 generated due to the dark current during the exposure period when the virtual light shielding is accumulated are equal to each other.

[0068] exist Figure 7 In b, after the floating diffusion FD is reset in the reading period at the time of virtual light shielding accumulation, the charge EL2 generated and accumulated in the floating diffusion FD due to the dark current is discharged.

[0069] exist Figure 7 In c, the single charge reading from the diode 121 is not performed in the reading period during the virtual light shielding accumulation. At this time, the transfer transistor 122 is turned off so that the charge EL1 accumulated in the photodiode 121 is not transferred to the floating diffusion FD.

[0070] exist Figure 7 In d, during the reading period when the virtual light shielding is accumulated, the pass transistor 127 and the switching transistor 128 are both turned on when the virtual light shielding is read from the photodiode 121 and the lateral overflow storage capacitor 126. At this time, the charge EL2 generated and accumulated by the dark current in the lateral overflow storage capacitor 126 flows into the floating diffusion FD.

[0071] exist Figure 7 In e, after the floating diffusion FD and the lateral overflow storage capacitor 126 are reset in the reading period at the time of the virtual light shielding storage, the charge EL2 generated and stored in the lateral overflow storage capacitor 126 due to the dark current is discharged.

[0072] Figure 8 1 is a timing chart showing an example of the reading operation at the time of normal accumulation of the solid-state imaging device according to the first embodiment. Note that the SH row represents a shutter row, and the RD row represents a reading row. After the SH row is executed, the RD row is executed. At this time, a reference for starting accumulation of the RD row can be set in the SH row. In addition, Figure 8 An example is shown in which CDS reading is performed in normal single-cell reading, and DDS (double data sampling) reading is performed in normal batch reading.

[0073] exist Figure 8 In the SH row, the selection signal SEL is set to a low level, and the selection transistor 125 is turned off. In the non-selection period K11, the transfer signal TGL, the reset signal RST, the switching signal FDG, and the path setting signal FCG are kept at a low level. Then, after the non-selection period K11 has passed, the low-efficiency normal P-phase monomer readout K12 is implemented. At this time, the transfer signal TGL, the reset signal RST, and the switching signal FDG rise, the charges of the photodiode 121 and the floating diffusion FD are discharged, and the conversion efficiency in the amplifier transistor 124 is reduced. In addition, the power supply voltage MVDD rises and is applied to the lateral overflow storage capacitor 126.

[0074] Thereafter, in the low-efficiency normal P-phase monomer readout K12, after the transfer signal TGL falls, the switching signal FDG falls, and then further, the reset signal RST falls. Then, after the switching signal FDG rises again, the AD conversion process is implemented. Here, by temporarily lowering the switching signal FDG before the reset signal RST falls, the floating diffusion FD can be coupled to the switching transistor 128. Therefore, the potential of the floating diffusion FD can be raised, and the charge can be easily transferred from the photodiode 121.

[0075] Next, high efficiency normal P phase single cell readout K13 is performed. At this time, AD conversion processing is performed while the transfer signal TGL, reset signal RST, switching signal FDG and path setting signal FCG are maintained at the same levels as those in low efficiency normal P phase single cell readout K12.

[0076] Next, a high-efficiency normal D-phase monomer readout K14 is implemented. At this time, the transfer signal TGL rises, and the charge of the photodiode 121 is discharged. Then, after the transfer signal TGL falls, the AD conversion process is implemented. Here, in the high-efficiency normal D-phase monomer readout K14, the reset signal RST is set to a low level. Therefore, the floating diffusion FD becomes a floating state, and the floating diffusion FD can be coupled to the transfer transistor 122. Therefore, the potential of the floating diffusion FD can be raised, and the charge can be easily taken out from the photodiode 121.

[0077] Next, low-efficiency normal D-phase single-cell readout K15 is performed. At this time, the reset signal RST rises, and the charge of the floating diffusion FD is discharged. Then, AD conversion processing is performed while maintaining the level of the reset signal RST.

[0078] Next, the normal D-phase batch reading K16 is performed. At this time, the path setting signal FCG rises, and the charge of the lateral overflow storage capacitor 126 is discharged. Then, the AD conversion process is performed while maintaining the level of the path setting signal FCG.

[0079] Next, after performing the normal P-phase batch reading K17, the process will proceed to the non-selection period K18. At this time, after the path setting signal FCG falls, the AD conversion process is performed. Thereafter, the power supply voltage MVDD falls, and then further, the reset signal RST and the switching signal FDG fall.

[0080] In the RD row, during the non-selection period K11, the selection signal SEL, the transfer signal TGL, the reset signal RST, the switching signal FDG, and the path setting signal FCG are maintained at a low level. Then, after the non-selection period K11 has passed, the low-efficiency normal P-phase monomer readout K12 is implemented. At this time, the reset signal RST and the switching signal FDG rise, the charge of the floating diffusion FD is discharged, and the conversion efficiency in the amplifier transistor 124 decreases.

[0081] Thereafter, in the low-efficiency normal P-phase monomer readout K12, after the switching signal FDG falls, the reset signal RST falls. Then, after the switching signal FDG rises again, the selection signal SEL rises, and then the AD conversion process is implemented. Here, by temporarily lowering the switching signal FDG before the reset signal RST falls, the floating diffusion FD can be coupled to the switching transistor 128. Therefore, the potential of the floating diffusion FD can be raised, and the charge can be easily transferred from the photodiode 121.

[0082] Next, high-efficiency normal P-phase single-body readout K13 is performed. At this time, after the switching signal FDG falls and the conversion efficiency in the amplifier transistor 124 increases, AD conversion processing is performed.

[0083] Next, a high-efficiency normal D-phase monomer readout K14 is implemented. At this time, the transfer signal TGL rises, and the charge of the photodiode 121 is transferred to the floating diffusion FD. Then, after the transfer signal TGL falls, the AD conversion process is implemented. Here, in the high-efficiency normal D-phase monomer readout K14, the reset signal RST is set to a low level. Therefore, the floating diffusion FD becomes a floating state, and the floating diffusion FD can be coupled to the transfer transistor 122. Therefore, the potential of the floating diffusion FD can be raised, and the charge can be easily taken out from the photodiode 121.

[0084] Next, the low-efficiency normal D-phase monomer readout K15 is implemented. At this time, the switching signal FDG rises, and the conversion efficiency in the amplifier transistor 124 decreases. Thereafter, the transfer signal TGL rises, and the charge of the photodiode 121 is transferred to the floating diffusion FD. Then, after the transfer signal TGL falls, the AD conversion process is implemented. Here, after the switching signal FDG rises, the transfer signal TGL is allowed to rise, thereby increasing the capacitance seen from the amplifier transistor 124. Therefore, the charge that can be received from the photodiode 121 can be increased, and the charge accumulated in the photodiode 121 can be easily taken out.

[0085] Next, the normal D-phase batch read K16 is performed. At this time, the power supply voltage MVDD rises and is applied to the lateral overflow storage capacitor 126. Thereafter, the path setting signal FCG rises, and the charge of the lateral overflow storage capacitor 126 is transferred to the floating diffusion FD. Then, the AD conversion process is performed while maintaining the level of the path setting signal FCG.

[0086] Next, after the normal P phase is read K17, the process will proceed to the non-selection period K18. At this time, the reset signal RST rises, and the charge of the lateral overflow storage capacitor 126 is discharged. Here, when the reset signal RST rises, the selection signal SEL falls. Thereafter, the path setting signal FCG falls, and then the switching signal FDG falls, then the reset signal RST falls, and then the switching signal FDG rises, then the selection signal SEL rises, and then the path setting signal FCG rises. Thus, after the path setting signal FCG rises, AD conversion processing is implemented. Thereafter, the path setting signal FCG falls, the power supply voltage MVDD falls, and then further, the reset signal RST and the switching signal FDG fall.

[0087] Here, the reset level in the normal D-phase read-together K16 is affected by the coupling based on the rise of the selection signal SEL. Therefore, in the normal P-phase read-together K17, similarly, in order to have the influence of the coupling based on the rise of the selection signal SEL, the selection signal SEL is temporarily lowered, and after the reset signal RST falls, the selection signal SEL rises again. As a result, even in the case where the reset signal RST temporarily rises in the normal P-phase read-together K17, the reset level in the normal D-phase read-together K16 can be made consistent with the reset level of the normal P-phase read-together K17. In addition, by temporarily lowering the switching signal FDG before the reset signal RST falls, the floating diffusion FD can be coupled to the switching transistor 128. Therefore, the potential of the floating diffusion FD can be raised, and the charge can be easily transferred from the photodiode 121 and the lateral overflow storage capacitor 126.

[0088] Fig. 9 : is a timing chart showing an example of the reading operation at the time of virtual light shielding accumulation of the solid-state imaging device according to the first embodiment.

[0089] exist Fig. 9In the reading operation of the SH row during virtual light shielding accumulation, except for the non-selection period K18, the reading operation of the SH row during virtual light shielding accumulation is similar to the reading operation of the SH row during normal accumulation. In the reading operation of the SH row during virtual light shielding accumulation, during the non-selection period K18, the transfer signal TGL, the switching signal FDG, and the reset signal RST are set to a high level. Therefore, the transfer transistor 122, the switching transistor 128, and the reset transistor 123 are all turned on, thereby setting the discharge path of the charge obtained by the photoelectric conversion by the photodiode 121.

[0090] Except for the non-selection period K11, the high-efficiency normal D-phase monomer readout K14, and the low-efficiency normal D-phase monomer readout K15, the reading operation of the RD row during virtual light-shielding accumulation is similar to the reading operation of the RD row during normal accumulation. In the reading operation of the RD row during virtual light-shielding accumulation, in the non-selection period K11, the transfer signal TGL, the switching signal FDG, and the reset signal RST are set to a high level. Therefore, the transfer transistor 122, the switching transistor 128, and the reset transistor 123 are all turned on, thereby setting the discharge path of the charge obtained by the photoelectric conversion by the photodiode 121. In the reading operation of the RD row during virtual light-shielding accumulation, in the high-efficiency normal D-phase monomer readout K14 and the low-efficiency normal D-phase monomer readout K15, the transfer signal TGL is set to a low level. Therefore, the transfer transistor 122 is turned off, and the reading of the charge obtained by the photoelectric conversion by the photodiode 121 is not implemented.

[0091] Here, in the reading operation of the RD line during virtual light shielding accumulation, the signal in the dotted line frame is not used. In addition, by subtracting the virtual light shielding signal based on the waveform in the dotted line frame of the RD line during virtual light shielding accumulation from the pixel signal based on the waveform in the dotted line frame of the RD line during normal accumulation, the noise component caused by the dark current can be reduced.

[0092] As described above, in the first embodiment, the discharge path of the charge obtained by the photoelectric conversion by the photodiode 121 is set so that, during the virtual light shielding accumulation, the charge obtained by the photoelectric conversion by the photodiode 121 is not accumulated in the lateral overflow accumulation capacitor 126. As a result, the charge caused by the dark current can be accumulated in the lateral overflow accumulation capacitor 126 without using the mechanical shutter, and the noise component caused by the dark current can be removed from the pixel signal obtained in the normal collective reading operation.

[0093] <2. Second Implementation Method> In the first embodiment described above, the overflow control transistor 129 is provided in the pixel 120, so that the charge overflowing from the photodiode 121 to the lateral overflow storage capacitor 126 can be adjusted. In the second embodiment, the overflow control transistor 129 is removed from the pixel 120.

[0094] Fig.10 is a block diagram showing a circuit configuration example of a pixel provided in the solid-state image pickup device according to the second embodiment.

[0095] exist Fig.10 In the pixel 220, the overflow control transistor 129 is removed from the pixel 120 of the first embodiment described above. The other configuration of the pixel 220 of the second embodiment is similar to that of the pixel 120 of the first embodiment described above.

[0096] In the pixel 220, the photodiode 121 and the lateral overflow storage capacitor 126 are connected without inserting the overflow control transistor 129 therebetween. At this time, a potential barrier may be provided between the photodiode 121 and the lateral overflow storage capacitor 126 so that the charge overflowing from the photodiode 121 can overflow to the lateral overflow storage capacitor 126.

[0097] Here, in the pseudo light shielding accumulation period, the transfer transistor 122 , the switching transistor 128 , and the reset transistor 123 may be turned on, thereby setting a discharge path R2 for the charges obtained by photoelectric conversion by the photodiode 121 .

[0098] As described above, in the above-described second embodiment, by removing the overflow control transistor 129 from the pixel 220 , the configuration of the pixel 220 can be simplified.

[0099] <3. Third Implementation Plan> In the second embodiment described above, the overflow control transistor 129 is removed from the pixel 120. In the third embodiment, the switching transistor 128 is removed from the pixel 120.

[0100] Fig.11 is a block diagram showing a circuit configuration example of a pixel provided in a solid-state image pickup device according to the third embodiment.

[0101] exist Fig.11 In the pixel 320, the switching transistor 128 is removed from the pixel 120 of the first embodiment described above. The other configuration of the pixel 320 of the third embodiment is similar to that of the pixel 120 of the first embodiment described above.

[0102] In pixel 320, reset transistor 123 and pass transistor 127 are connected to floating diffusion FD, and switching transistor 128 is not inserted between them. In this case, in pixel 320, switching of conversion efficiency by turning on / off switching transistor 128 is not performed.

[0103] Here, during the pseudo light shielding accumulation period, the transfer transistor 122 and the reset transistor 123 may be turned on, thereby setting a discharge path R3 for the charges obtained by photoelectric conversion by the photodiode 121 .

[0104] As described above, in the third embodiment described above, by removing the switching transistor 128 from the pixel 320 , the configuration of the pixel 320 can be simplified.

[0105] <4. Fourth Implementation Plan> In the second embodiment described above, the overflow control transistor 129 is removed from the pixel 120. In the fourth embodiment, the overflow control transistor 129 and the switching transistor 128 are removed from the pixel 120.

[0106] Fig.12 is a block diagram showing a circuit configuration example of a pixel provided in a solid-state image pickup device according to a fourth embodiment.

[0107] exist Fig.12 In the pixel 420, the overflow control transistor 129 and the switching transistor 128 are removed from the pixel 120 of the first embodiment described above. The other configuration of the pixel 420 of the fourth embodiment is similar to that of the pixel 120 of the first embodiment described above.

[0108] In the pixel 420, the photodiode 121 and the lateral overflow storage capacitor 126 are connected without inserting the overflow control transistor 129 therebetween. In addition, in the pixel 420, the reset transistor 123 and the pass transistor 127 are connected to the floating diffusion FD, without inserting the switching transistor 128 therebetween.

[0109] Here, during the pseudo light shielding accumulation period, the transfer transistor 122 and the reset transistor 123 may be turned on, thereby setting a discharge path R4 for the charges obtained by photoelectric conversion by the photodiode 121 .

[0110] As described above, in the above-described fourth embodiment, by removing the overflow control transistor 129 and the switching transistor 128 from the pixel 420 , the configuration of the pixel 420 can be simplified.

[0111] <5. Fifth Implementation Plan> In the above-described first embodiment, one photodiode 121 is provided in the pixel 120. In the fifth embodiment, two photodiodes having different sizes are provided in the pixel.

[0112] Fig.13 is a block diagram showing a circuit configuration example of a pixel provided in a solid-state image pickup device according to a fifth embodiment.

[0113] exist Fig.13 In the pixel 520, a photodiode 521, a transfer transistor 522, and a reset transistor 523 are added to the pixel 120 of the first embodiment described above. In addition, in the pixel 520, the overflow control transistor 129 is removed from the pixel 120 of the first embodiment described above. The other configurations of the pixel 520 of the fifth embodiment are similar to those of the pixel 120 of the first embodiment described above.

[0114] The size of the photodiode 521 may be smaller than that of the photodiode 121. The cathode of the photodiode 521 is connected to the lateral overflow storage capacitor 126 via the transfer transistor 522. In addition, the cathode of the photodiode 521 is also connected to the power supply voltage VDD via the reset transistor 523.

[0115] Here, during the virtual light shielding accumulation period, the transfer transistor 122, the switching transistor 128, and the reset transistor 123 can be turned on, thereby setting the discharge path R5 of the charge obtained by the photoelectric conversion by the photodiode 121. In addition, during the virtual light shielding accumulation period, the reset transistor 523 can be turned on, thereby setting the discharge path R6 of the charge obtained by the photoelectric conversion by the photodiode 521.

[0116] As described above, in the fifth embodiment, by providing the two photodiodes 121 and 521 having different sizes in the pixel 520 , the dynamic range can be expanded.

[0117] <6. Sixth Implementation Plan> In the first embodiment described above, the discharge path of the charge obtained by photoelectric conversion by the photodiode 121 is set so that, during the virtual light-shielding accumulation period, the charge obtained by photoelectric conversion by the light-emitting diode 121 is not accumulated in the lateral overflow accumulation capacitor 126. In the sixth embodiment, the normal accumulation period and the virtual light-shielding accumulation period are set in different frames, and the pixel signal obtained from the normal accumulation period in one frame is corrected based on the virtual light-shielding signal obtained from the virtual light-shielding accumulation period in one frame.

[0118] Fig.14: is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period and the correction processing of the solid-state image pickup device according to the sixth embodiment.

[0119] exist Fig.14 In the embodiment, the solid-state imaging device 102 can alternately set the virtual light shielding accumulation period VG and the normal accumulation period MG for each frame F1. For example, the frame rate can be set to 30fps. At this time, the interval between the shutter SH and the reading RD in each of the virtual light shielding accumulation period VG and the normal accumulation period MG can be set to t1. Then, the solid-state imaging device 102 performs a subtraction process SUB on the virtual light shielding signal obtained from the virtual light shielding accumulation period VG of the current frame F1 and the pixel signal obtained from the normal accumulation period MG of the next frame F1.

[0120] As described above, in the sixth embodiment, the pixel signal obtained from the normal accumulation period MG in one frame is corrected based on the virtual light shielding signal obtained from the virtual light shielding accumulation period VG in one frame. At this time, the time interval between the normal accumulation period MG and the virtual light shielding accumulation period VG for generating the signal when the subtraction process SUB is implemented can be shortened, and the temperature fluctuation can be suppressed during the normal accumulation period MG and the virtual light shielding accumulation period VG. Therefore, while maintaining the temperature fluctuation followability of the noise component caused by the dark current, the noise component caused by the dark current contained in the normal image can be reduced.

[0121] <7. Seventh Implementation Plan> In the sixth embodiment described above, the normal accumulation period MG and the virtual shading accumulation period VG are set in different frames F1, and the pixel signal obtained from the normal accumulation period MG of one frame is corrected based on the virtual shading signal obtained from the virtual shading accumulation period VG in one frame. In the seventh embodiment, the normal accumulation period MG and the virtual shading accumulation period VG are set in the same frame F1, and the pixel signal obtained from the normal accumulation period MG of the frame F1 is corrected based on the virtual shading signal obtained from the virtual shading accumulation period VG in the same frame F1.

[0122] Fig.15 : is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period and the correction processing of the solid-state image pickup device according to the seventh embodiment.

[0123] exist Fig.15In the embodiment, the solid-state imaging device 102 may set a virtual light shielding accumulation period VG and a normal accumulation period MG in each frame F1. At this time, the interval between the shutter SH and the reading RD in each of the virtual light shielding accumulation period VG and the normal accumulation period MG may be set to t1. Then, the solid-state imaging device 102 performs a subtraction process SUB on the virtual light shielding signal obtained from the virtual light shielding accumulation period VG of the current frame F1 and the pixel signal obtained from the normal accumulation period MG of the current frame F1.

[0124] As described above, in the seventh embodiment, the pixel signal obtained from the normal accumulation period MG of the frame F1 is corrected based on the virtual shading signal obtained from the virtual shading accumulation period VG in the same frame F1. As a result, the noise component due to the dark current contained in the normal image can be reduced while maintaining the temperature fluctuation followability of the noise component due to the dark current, and the reduction in the frame rate of the normal image can be suppressed.

[0125] <8. Eighth Implementation Plan> In the sixth embodiment described above, the normal accumulation period MG and the virtual shading accumulation period VG are set in different frames F1, and the pixel signal obtained from the normal accumulation period MG in one frame is corrected based on the virtual shading signal obtained from the virtual shading accumulation period VG in one frame. In the eighth embodiment, the normal accumulation period MG and the virtual shading accumulation period VG are set in different frames F1, and the pixel signal obtained from the normal accumulation period MG of a plurality of frames F1 is corrected based on the virtual shading signal obtained from the virtual shading accumulation period VG in one frame.

[0126] Fig.16 : is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period and the correction processing of the solid-state image pickup device according to the eighth embodiment.

[0127] exist Fig.16 In the embodiment, the solid-state imaging device 102 can set the virtual light-shielding accumulation period VG and the normal accumulation period MG respectively for each frame F1. Here, the solid-state imaging device 102 can allocate a plurality of frames F1 respectively set with the normal accumulation period MG for one frame F1 with the virtual light-shielding accumulation period VG set. At this time, the interval between the shutter SH and the reading RD in each of the virtual light-shielding accumulation period VG and the normal accumulation period MG can be set to t1. Then, the solid-state imaging device 102 performs a subtraction process SUB between the virtual light-shielding signal obtained from the virtual light-shielding accumulation period VG of the current frame F1 and the pixel signals respectively obtained from the normal accumulation periods MG of the plurality of subsequent frames F1.

[0128] As described above, in the eighth embodiment, pixel signals respectively obtained from the normal accumulation periods MG of the plurality of frames F1 are corrected based on the virtual shading signal obtained from the virtual shading accumulation period VG in one frame. As a result, it is possible to suppress the decrease in the frame rate of the normal image while also reducing the noise component caused by the dark current contained in the normal image.

[0129] <9. Ninth Implementation Plan> In the eighth embodiment described above, the normal accumulation period MG and the virtual shading accumulation period VG are set in different frames F1, and the pixel signals respectively obtained from the normal accumulation periods MG of the plurality of frames F1 are corrected based on the virtual shading signal obtained from the virtual shading accumulation period VG in one frame. In the ninth embodiment, the normal accumulation period MG and the virtual shading accumulation period VG are set in the same frame F1, and the pixel signals respectively obtained from the normal accumulation periods MG of the plurality of frames F1 are corrected based on the virtual shading signal obtained from the virtual shading accumulation period VG.

[0130] Fig.17 : is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period and the correction processing of the solid-state image pickup device according to the ninth embodiment.

[0131] exist Fig.17 In the embodiment, the solid-state imaging device 102 can set a virtual light-shielding accumulation period VG and a normal accumulation period MG in one frame F1, and can set the normal accumulation period MG in multiple frames F1 respectively. Here, the solid-state imaging device 102 can allocate multiple frames F1 in which the normal accumulation period MG is set for one frame F1 in which the virtual light-shielding accumulation period VG is set. At this time, the interval between the shutter SH and the reading RD in each of the virtual light-shielding accumulation period VG and the normal accumulation period MG can be set to t1. Then, the solid-state imaging device 102 performs a subtraction process SUB between the virtual light-shielding signal obtained from the virtual light-shielding accumulation period VG of the current frame F1 and the pixel signals respectively obtained from the normal accumulation periods MG of the current frame F1 and multiple subsequent frames F1.

[0132] As described above, in the ninth embodiment, the normal accumulation period MG and the virtual light shielding accumulation period VG are set in the same frame F1, and the pixel signals respectively obtained from the normal accumulation periods MG of the plurality of frames F1 are corrected based on the virtual light shielding signal obtained from the virtual light shielding accumulation period VG. As a result, it is possible to suppress the decrease in the frame rate of the normal image while also reducing the noise component caused by the dark current contained in the normal image.

[0133] <10. Tenth Implementation Plan> In the seventh embodiment described above, the normal accumulation period MG and the virtual light shielding accumulation period VG are set in the same frame F1, and the pixel signal obtained from the normal accumulation period MG of the frame F1 is corrected based on the virtual light shielding signal obtained from the virtual light shielding accumulation period VG in the same frame F1. In the tenth embodiment, the normal accumulation period MG and the virtual light shielding accumulation period VG in which the generation of dark current is accelerated are set in the same frame F2, and the pixel signal obtained from the normal accumulation period MG of the frame F2 is corrected based on the virtual light shielding signal obtained from the virtual light shielding accumulation period VG in the same frame F2.

[0134] Fig.18 10 is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period and the correction processing of the solid-state image pickup device according to the tenth embodiment.

[0135] exist Fig.18 In the embodiment, the solid-state imaging device 102 may set a virtual light shielding accumulation period VG and a normal accumulation period MG in each frame F2. In this case, in the virtual light shielding accumulation period VG, Figure 5 As shown, the power supply voltage MVDD can be set in such a way that the generation of dark current is accelerated. For example, the frame rate can be set to 40fps. At this time, the interval between the shutter SH and the reading RD in the normal accumulation period MG can be set to t1. The interval between the shutter SH and the reading RD in the virtual shading accumulation period VG can be set to t2. The interval t2 can be shorter than the interval t1. Then, the solid-state imaging device 102 performs a subtraction process SUB on the virtual shading signal obtained from the virtual shading accumulation period VG of the current frame F2 and the pixel signal obtained from the normal accumulation period MG of the current frame F2.

[0136] As described above, in the above-mentioned tenth embodiment, the normal accumulation period MG and the virtual light shielding accumulation period VG in which the generation of dark current is accelerated are set in the same frame F2. Then, the pixel signal obtained from the normal accumulation period MG of the frame F2 is corrected based on the virtual light shielding signal obtained from the virtual light shielding accumulation period VG in the same frame F2. As a result, the noise component caused by the dark current contained in the normal image can be reduced while maintaining the temperature fluctuation followability of the noise component caused by the dark current, and the reduction in the frame rate of the normal image can be suppressed.

[0137] <11. Eleventh Implementation Plan> In the seventh embodiment, the normal accumulation period MG and the virtual shading accumulation period VG are set in the same frame F1, and the pixel signal obtained from the normal accumulation period MG of the frame F1 is corrected based on the virtual shading signal obtained from the virtual shading accumulation period VG in the same frame F1. In the eleventh embodiment, the normal accumulation period MG and the virtual shading accumulation period VG are set in the same frame F1, and the pixel signals respectively obtained from the normal accumulation periods MG of the plurality of frames are corrected based on the average value of the virtual shading signals respectively obtained from the virtual shading accumulation periods VG of the plurality of frames.

[0138] Fig.19 1 is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period and the correction processing of the solid-state image pickup device according to the eleventh embodiment.

[0139] exist Fig.19 In the embodiment, the solid-state imaging device 102 may set a virtual light shielding accumulation period VG and a normal accumulation period MG in each frame F1. At this time, the interval between the shutter SH and the reading RD in each of the virtual light shielding accumulation period VG and the normal accumulation period MG may be set to t1. Then, the solid-state imaging device 102 calculates the average value AVE of the virtual light shielding signal obtained from the virtual light shielding accumulation period VG of the plurality of frames F1. Then, a subtraction process SUB is performed between the average value AVE of the virtual light shielding signal and the pixel signals obtained from the normal accumulation period MG of the plurality of subsequent frames F1.

[0140] As described above, in the above-mentioned eleventh embodiment, the normal accumulation period MG and the virtual shading accumulation period VG are set in the same frame F1. Then, the pixel signals respectively obtained from the normal accumulation periods MG of the plurality of frames are corrected based on the average value AVE of the virtual shading signals respectively obtained from the virtual shading accumulation periods VG of the plurality of frames. As a result, the noise component caused by the dark current contained in the normal image can be reduced while reducing the random noise in the normal image, and the reduction in the frame rate can be suppressed.

[0141] <12. Twelfth Implementation Plan> In the first embodiment, the virtual shielding signal for generating the virtual shielding image is subtracted from the normal image. In the twelfth embodiment, when the temperature around the solid-state imaging device 102 is higher than the set temperature, the virtual shielding signal for generating the virtual shielding image is subtracted from the normal image.

[0142] Fig. 20 : is a flowchart showing the correction process of the solid-state image pickup device according to the twelfth embodiment.

[0143] exist Fig. 20In the embodiment of the present invention, the solid-state imaging device 102 determines whether the ambient temperature thereof is higher than the set temperature (S111). When the ambient temperature is higher than the set temperature, the solid-state imaging device 102 acquires a virtual light-shielding image and acquires a normal image (S112, S113). Then, the solid-state imaging device 102 subtracts a virtual light-shielding signal for generating the virtual light-shielding image from the normal image (S114). On the other hand, when the ambient temperature is not higher than the set temperature, the solid-state imaging device 102 acquires a normal image (S115).

[0144] As described above, in the twelfth embodiment, when the ambient temperature is higher than the set temperature, the solid-state imaging device 102 subtracts the virtual light shielding signal for generating the virtual light shielding image from the normal image. As a result, it is possible to reduce the increase of the noise component due to the dark current contained in the normal image while reducing power consumption.

[0145] <13. Thirteenth Implementation Plan> In the twelfth embodiment, when the temperature around the solid-state imaging device 102 is higher than the set temperature, the virtual light shielding signal for generating the virtual light shielding image is subtracted from the normal image. In the thirteenth embodiment, when there is a predetermined temperature change around the solid-state imaging device 102, a new virtual light shielding image is acquired, and when there is no predetermined temperature change around the solid-state imaging device 102, the acquired virtual light shielding image is used.

[0146] Fig.21 is a flowchart showing a correction process of the solid-state image pickup device according to the thirteenth embodiment.

[0147] exist Fig.21 In the embodiment, the solid-state imaging device 102 determines whether the ambient temperature thereof is higher than the set temperature (S211). When the ambient temperature is higher than the set temperature, the solid-state imaging device 102 determines whether there is a predetermined temperature change from the time when the virtual light-shielding image up to the previous frame is acquired (S212). When there is a predetermined temperature change from the time when the virtual light-shielding image up to the previous frame is acquired, the solid-state imaging device 102 acquires the virtual light-shielding image and acquires the normal image (S213, S214). Then, the solid-state imaging device 102 subtracts the virtual light-shielding signal for generating the virtual light-shielding image from the normal image (S215).

[0148] On the other hand, in the case where there is no predetermined temperature change from the time when the virtual light shielding image until the previous frame is acquired, the solid-state imaging device 102 acquires a normal image (S216). Then, the solid-state imaging device 102 subtracts the virtual light shielding signal used to generate the acquired virtual light shielding image from the normal image (S217). On the other hand, in the case where the ambient temperature is not higher than the set temperature, the solid-state imaging device 102 acquires a normal image (S218).

[0149] As described above, in the above-mentioned thirteenth embodiment, in the case where there is a predetermined temperature change around the solid-state imaging device 102, a new virtual light-shielding image is acquired, and in the case where there is no predetermined temperature change around the solid-state imaging device 102, the acquired virtual light-shielding image is used. Here, in the case where there is no predetermined temperature change around the solid-state imaging device 102, the fluctuation of the dark current is suppressed, and even if the time difference between the time when the virtual light-shielding image is acquired and the time when the normal image is acquired increases, the difference in the noise component due to the dark current contained in these images is small. Therefore, even in the case where the acquired virtual light-shielding image is used when the virtual light-shielding signal is subtracted from the normal image, it is possible to reduce power consumption while suppressing the increase of the noise component due to the dark current contained in the normal image.

[0150] <14. Fourteenth Implementation Plan> In the first embodiment, DDS reading is performed in both normal batch reading and virtual light shielding batch reading. In the fourteenth embodiment, a frame memory is provided so that CDS processing can be performed in both normal batch reading and virtual light shielding batch reading.

[0151] Fig. 22 is a block diagram showing a configuration example of a solid-state image pickup device according to a fourteenth embodiment.

[0152] exist Fig. 22 In the solid-state imaging device 602, a frame memory 611 and a CDS processing section 612 are added to the solid-state imaging device 102 of the first embodiment described above. The other configuration of the solid-state imaging device 602 of the fourteenth embodiment is similar to that of the solid-state imaging device 102 of the first embodiment described above.

[0153] The frame memory 611 is used to store the P-phase image read by the DDS. For example, the frame memory 611 can store the P-phase image read together normally and the P-phase image read together with the virtual light shielding for each frame.

[0154] The CDS processing unit 612 performs CDS processing on the image read by the DDS. For example, the CDS processing unit 612 obtains the D-phase image that is normally read together and the D-phase image that is read together with the virtual light shielding from the column reading circuit 113 for each frame. In addition, the P-phase image that is normally read together and the P-phase image that is read together with the virtual light shielding are read out from the frame memory 611 for each frame. Then, a subtraction process is performed between the D-phase image that is normally read together and the P-phase image that is normally read together, and a subtraction process is performed between the D-phase image that is read together with the virtual light shielding and the P-phase image that is read together with the virtual light shielding.

[0155] As described above, in the fourteenth embodiment, the frame memory 611 and the CDS processing section 612 are provided in the solid-state imaging device 602. As a result, even when signals are read out from each pixel 120 by DDS reading, CDS processing can be performed to reduce random noise.

[0156] <15. Fifteenth Implementation Plan> In the first embodiment described above, during the virtual light shielding accumulation period, the transfer transistor 122, the switching transistor 128, and the reset transistor 123 are turned on, thereby setting the discharge path R1 of the charge obtained by the photoelectric conversion by the photodiode 121. In the fifteenth embodiment, the gate potential of the transfer transistor 122 is three-valued, and the gate potential of the transfer transistor 122 is set to a low level during the virtual light shielding accumulation period, thereby setting the discharge path of the charge obtained by the photoelectric conversion by the photodiode 121.

[0157] Fig.23 is a block diagram showing a circuit configuration example of a pixel provided in a solid-state image pickup device according to a fifteenth embodiment.

[0158] exist Fig.23 , in the pixel 620, the overflow control transistor 129 is removed from the pixel 120 of the above-described first embodiment. The other configuration of the pixel 620 of the fifteenth embodiment is similar to that of the pixel 120 of the above-described first embodiment.

[0159] Fig.24 : is a diagram showing an example of the potential at the time of normal accumulation and at the time of virtual light-shielded accumulation of the solid-state imaging device according to the fifteenth embodiment.

[0160] exist Fig.24 In a, the transfer signal TGL is set to a medium level to allow the charge EL1 accumulated in the photodiode 121 to overflow to the floating diffusion FD. At this time, the charge EL1 accumulated in the photodiode 121 can flow into the lateral overflow storage capacitor 126 via the floating diffusion FD.

[0161] exist Fig.24 In b, the transfer signal TGL is set to a low level while preventing the charge EL1 accumulated in the photodiode 121 from flowing into the lateral overflow storage capacitor 126. At this time, the charge EL1 accumulated in the photodiode 121 can be discharged via a path other than the inflow path to the lateral overflow storage capacitor 126.

[0162] Note that in the case of causing the charge EL1 accumulated in the photodiode 121 to be read out to the floating diffusion FD, the transfer signal TGL is set to a high level.

[0163] Fig.25 15 is a timing chart showing the potential of a transfer signal in a normal accumulation period and a virtual light-shielded accumulation period of the solid-state imaging device according to the fifteenth embodiment.

[0164] exist Fig.25 Here, in the normal shutter period K1, the transfer signal TGL rises from the middle level to the high level, and the shutter operation is performed.

[0165] Next, in the normal accumulation period MG, the transmission signal TGL falls from the high level to the middle level, and the normal accumulation operation is performed.

[0166] Next, in the normal read period K2 , the transfer signal TGL switches between the middle level and the high level, and the normal read operation is performed.

[0167] Next, in the virtual light-shielding shutter period K3 , the transmission signal TGL is maintained at a medium level, and the shutter operation is performed.

[0168] Next, in the virtual light shielding accumulation period VG, the transmission signal TGL falls from the middle level to the low level, and the virtual light shielding accumulation operation is carried out.

[0169] Next, in the dummy light-shielded reading period K4 , the transfer signal TGL rises from the low level to the middle level, and the dummy light-shielded reading operation is performed.

[0170] Fig.26 15 is a timing chart showing the relationship between the normal accumulation period and the virtual light shielding accumulation period of the solid-state imaging device according to the fifteenth embodiment and the transmission signal. Note that TGL1 to TGL4 represent the first to fourth rows of the pixel array section 111.

[0171] exist Fig.26In this embodiment, the normal accumulation period MG and the virtual light shielding accumulation period VG may be alternately set in each row of the pixel array section 111. At this time, the normal accumulation period MG and the virtual light shielding accumulation period VG may be set in the same frame or in different frames.

[0172] As described above, in the above-mentioned fifteenth embodiment, the gate potential of the transfer transistor 122 is ternary, and the gate potential of the transfer transistor 122 is set to a low level during the virtual light-shielding accumulation period VG. As a result, the discharge path of the charge obtained by the photoelectric conversion by the photodiode 121 can be set so that the charge does not flow into the lateral overflow accumulation capacitor 126, and the charge caused by the dark current during the virtual light-shielding accumulation period VG can be accumulated in the lateral overflow accumulation capacitor 126.

[0173] <16. Sixteenth Implementation Plan> In the above-mentioned fifteenth embodiment, in the virtual light shielding storage period VG, the gate potential of the transfer transistor 122 is set to a low level, and the discharge path of the charge obtained by the photoelectric conversion by the photodiode 121 is set so that the charge does not flow into the lateral overflow storage capacitor 126. In the sixteenth embodiment, a discharge transistor is provided in the pixel so that the discharge path of the charge obtained by the photoelectric conversion by the photodiode 121 is set so that the charge does not flow into the lateral overflow storage capacitor 126.

[0174] Fig. 27 is a block diagram showing a circuit configuration example of a pixel provided in a solid-state image pickup device according to a sixteenth embodiment.

[0175] exist Fig. 27 In the pixel 720, a discharge transistor 721 is added to the pixel 620 of the above-described fifteenth embodiment. The other configuration of the pixel 720 of the sixteenth embodiment is similar to the configuration of the pixel 620 of the above-described fifteenth embodiment.

[0176] The discharge transistor 721 is connected between the cathode of the photodiode 121 and the power supply voltage VDD. The discharge transistor 721 may be a MOS transistor. A discharge signal DFG is applied to the gate of the discharge transistor 721. Then, when the transmission signal TGL is set to a low level, the charge accumulated in the photodiode 121 may be discharged via the discharge transistor 721, so as not to flow into the lateral overflow storage capacitor 126.

[0177] When the discharge transistor 721 is provided, the transfer signal TGL can be driven in a binary manner to set a discharge path for the charge EL1 accumulated in the photodiode 121. At this time, by controlling the potential of the discharge signal DFG, the charge obtained by the photoelectric conversion by the photodiode 121 can be discharged without flowing into the lateral overflow storage capacitor 126.

[0178] As described above, in the sixteenth embodiment, the discharge transistor 721 is connected between the cathode of the photodiode 121 and the power supply voltage VDD. As a result, the discharge path of the charge obtained by the photoelectric conversion by the photodiode 121 can be set so that the charge does not flow into the lateral overflow storage capacitor 126.

[0179] <17. Seventeenth Implementation Plan> In the fifteenth embodiment, the normal accumulation period MG and the virtual light shielding accumulation period VG are alternately set in each row of the pixel array section 111. In the seventeenth embodiment, a plurality of normal accumulation periods MG are set between the virtual light shielding accumulation periods VG in each row of the pixel array section 111.

[0180] Fig.28 17 is a timing chart showing the relationship between the normal accumulation period and the virtual light-shielded accumulation period of the solid-state imaging device according to the seventeenth embodiment, and the transmission signal.

[0181] exist Fig.28 In the embodiment, one virtual light shielding accumulation period VG may be set for each row of the pixel array unit 111 for each of the plurality of normal accumulation periods MG. For example, the virtual light shielding accumulation period VG may be arranged every two normal accumulation periods MG or every three normal accumulation periods MG.

[0182] As described above, in the seventeenth embodiment, a plurality of normal accumulation periods MG are set between the virtual light shielding accumulation periods VG. As a result, it is possible to reduce the noise component due to the dark current in the normal image while suppressing the reduction of the normal accumulation period MG.

[0183] <18. Eighteenth Implementation Plan> In the above-mentioned fifteenth embodiment, during the virtual light-shielding accumulation period VG, the gate potential of the transfer transistor 122 is set to a low level, and the discharge path of the charge obtained by the photoelectric conversion by the photodiode 121 is set so that the charge does not flow into the lateral overflow storage capacitor 126. In the eighteenth embodiment, during the virtual light-shielding accumulation period VG, the substrate potential is changed, thereby setting the discharge path of the charge obtained by the photoelectric conversion by the photodiode 121 so that the charge does not flow into the lateral overflow storage capacitor 126.

[0184] Fig.29 : is a diagram showing an example of the potential at the time of normal accumulation and at the time of virtual light-shielded accumulation of the solid-state imaging device according to the eighteenth embodiment.

[0185] exist Fig.29 In the case where the charge EL1 accumulated in the photodiode 121 is prevented from flowing into the lateral overflow storage capacitor 126, the transmission signal TGL is set to a low level, and the substrate potential of the semiconductor substrate on which the photodiode 121 is formed is increased. At this time, the charge EL1 accumulated in the photodiode 121 can be discharged via a path other than the inflow path to the lateral overflow storage capacitor 126.

[0186] Here, when the charge EL1 accumulated in the photodiode 121 is discharged based on the substrate potential of the semiconductor substrate on which the photodiode 121 is formed, the pixels can be element-isolated row by row, and the substrate potential can be controlled row by row. In this case, full trench isolation (FTI) can be used as an element isolation structure.

[0187] As described above, in the eighteenth embodiment, the discharge path of the charge obtained by the photoelectric conversion by the photodiode 121 is set by changing the substrate potential. As a result, during the virtual light shielding accumulation period VG, the charge caused by the dark current can be accumulated in the lateral overflow accumulation capacitor 126, and the noise component caused by the dark current in the normal image can be reduced without using a mechanical shutter.

[0188] <15. Application examples of mobile objects> The technology disclosed herein (the present technology) can be applied to various products. For example, the technology disclosed herein can be implemented as a device mounted on any type of mobile body such as a car, an electric car, a hybrid car, a two-wheeled automatic vehicle, a bicycle, a personal mobility vehicle, an airplane, an unmanned aerial vehicle, a ship, a robot, etc.

[0189] Fig.30is a block diagram of a schematic configuration example of a vehicle control system as an example of a moving body control system to which the technology according to the present disclosure can be applied.

[0190] The vehicle control system 12000 includes a plurality of electronic control units interconnected via a communication network 12001. Fig.30 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside information detection unit 12030, an inside information detection unit 12040, and an integrated control unit 12050. In addition, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, a sound / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are shown.

[0191] The drive system control unit 12010 controls the operation of the devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 functions as a control device for various devices such as the following: a drive force generating device such as an internal combustion engine, a drive motor, etc. for generating a drive force for the vehicle; a drive force transmitting mechanism for transmitting the drive force to the wheels; a steering mechanism for adjusting the steering angle of the vehicle; and a braking device for generating a braking force for the vehicle.

[0192] The body system control unit 12020 controls the operation of various devices equipped on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for various devices such as the following: a keyless entry system; a smart key system; a power window device; or various lights such as headlights, taillights, brake lights, turn signals, fog lights, etc. In this case, radio waves or signals of various switches emitted from a portable device that replaces the key may be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals and controls the door lock device, power window device, lights, etc. of the vehicle.

[0193] The vehicle exterior information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, the vehicle exterior information detection unit 12030 is connected to the camera unit 12031. The vehicle exterior information detection unit 12030 causes the camera unit 12031 to capture an image of the vehicle exterior and receive the captured image. The vehicle exterior information detection unit 12030 can perform processing for detecting objects such as people, vehicles, obstacles, signs, text on the road surface, etc., or processing for detecting the distance to the object based on the received image.

[0194] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 may output the electrical signal as an image, or may output the electrical signal as distance measurement information. In addition, the light received by the imaging unit 12031 may be visible light, or may be non-visible light such as infrared rays.

[0195] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. For example, the in-vehicle information detection unit 12040 is connected to a driver state detection unit 12041 that detects the state of the driver. For example, the driver state detection unit 12041 includes a camera that takes a picture of the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or the driver's concentration level, or can determine whether the driver is dozing off.

[0196] Based on the information outside or inside the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, the microcomputer 12051 can calculate the control target value of the driving force generating device, the steering mechanism or the braking device, and output the control instruction to the driving system control unit 12010. For example, the microcomputer 12051 can perform coordinated control for realizing the functions of ADAS (Advanced Driver Assistance System), the functions of which include collision avoidance or impact mitigation of the vehicle, following driving based on vehicle-to-vehicle distance, vehicle constant speed driving, vehicle collision warning, vehicle lane departure warning, etc.

[0197] In addition, based on the information outside or inside the vehicle obtained by the external information detection unit 12030 or the internal information detection unit 12040, the microcomputer 12051 can perform coordinated control such as automatic driving to enable the vehicle to drive autonomously without relying on the driver's operation by controlling the driving force generating device, steering mechanism or braking device, etc.

[0198] In addition, based on the information outside the vehicle obtained by the vehicle exterior information detection unit 12030, the microcomputer 12051 can output a control instruction to the body system control unit 12020. For example, based on the position of the preceding vehicle or oncoming vehicle detected by the vehicle exterior information detection unit 12030, the microcomputer 12051 can perform coordinated control for achieving anti-glare, such as by controlling the headlights to switch from high beam to low beam.

[0199] The sound / image output unit 12052 sends an output signal of at least one of sound and image to an output device capable of visually or auditorily notifying the vehicle occupants or the outside of the vehicle of information. Fig.30 In the illustrated example, as output devices, an audio speaker 12061, a display portion 12062, and an instrument panel 12063 are illustrated. For example, the display portion 12062 may include at least one of an onboard display and a head-up display.

[0200] Fig.31 12031 is a diagram showing an example of the installation position of the camera unit 12031.

[0201] exist Fig.31 In the figure, the camera unit 12031 includes camera units 12101, 12102, 12103, 12104 and 12105.

[0202] For example, the camera units 12101, 12102, 12103, 12104 and 12105 are arranged at the front nose, side mirrors, rear bumper and trunk door of the vehicle 12100 and at the upper part of the windshield in the vehicle compartment. The camera unit 12101 arranged at the front nose and the camera unit 12105 arranged at the upper part of the windshield in the vehicle compartment mainly acquire images in front of the vehicle 12100. The camera units 12102 and 12103 arranged at the side mirrors mainly acquire images on the sides of the vehicle 12100. The camera unit 12104 arranged at the rear bumper or trunk door mainly acquires images behind the vehicle 12100. The camera unit 12105 arranged at the upper part of the windshield in the vehicle compartment is mainly used to detect vehicles in front, pedestrians, obstacles, signal lights, traffic signs, lanes, etc.

[0203] Notice, Fig.31 An example of the photographing range of the camera units 12101 to 12104 is shown. The photographing range 12111 indicates the photographing range of the camera unit 12101 provided at the front nose. The photographing ranges 12112 and 12113 respectively indicate the photographing ranges of the camera units 12102 and 12103 provided at the side mirrors. The photographing range 12114 indicates the photographing range of the camera unit 12104 provided at the rear bumper or the trunk door. For example, by superimposing the image data captured by the camera units 12101 to 12104, a bird's-eye view image of the vehicle 12100 viewed from above is obtained.

[0204] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0205] For example, based on the distance information obtained from the camera units 12101 to 12104, the microcomputer 12051 can obtain the distance to each solid object within the camera ranges 12111 to 12114 and the time change of the distance (relative speed to the vehicle 12100), thereby extracting the following solid object as the leading vehicle: it is particularly the closest solid object on the driving path of the vehicle 12100, and is a solid object that travels at a predetermined speed (for example, 0 km / h or more) in the same direction as the vehicle 12100. In addition, the microcomputer 12051 can set the inter-vehicle distance that should be ensured in advance with respect to the front of the leading vehicle, and can perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. Therefore, it is possible to perform coordinated control for realizing automatic driving, etc., which enables the vehicle to travel autonomously without relying on the driver's operation.

[0206] For example, based on the distance information obtained from the camera units 12101 to 12104, the microcomputer 12051 can classify the three-dimensional object data of the three-dimensional object into the three-dimensional object data of two-wheeled vehicles, ordinary cars, large vehicles, pedestrians, electric poles and other three-dimensional objects, extract the classified three-dimensional object data, and use the extracted three-dimensional object data to automatically avoid obstacles. For example, the microcomputer 12051 distinguishes the obstacles around the vehicle 12100 into obstacles that the driver of the vehicle 12100 can visually perceive and obstacles that the driver of the vehicle 12100 is difficult to visually perceive. Then, the microcomputer 12051 determines the collision risk used to represent the degree of danger of collision with each obstacle. In the case where the collision risk is equal to or greater than the set value and there is a possibility of collision, the microcomputer 12051 issues a warning to the driver via the audio speaker 12061 or the display unit 12062, or performs forced deceleration or evasive steering via the drive system control unit 12010. Therefore, the microcomputer 12051 can provide driving assistance for avoiding collisions.

[0207] At least one of the camera units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 may identify a pedestrian by determining whether there is a pedestrian in the image captured by the camera units 12101 to 12104. For example, such identification of a pedestrian is performed by the following process: a process of extracting feature points from the image captured by the camera units 12101 to 12104 as infrared cameras; and a process of performing pattern matching processing on a series of feature points representing the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that there is a pedestrian in the image captured by the camera units 12101 to 12104 and thus identifies the pedestrian, the sound / image output unit 12052 controls the display unit 12062 to display a square outline for emphasis in a superimposed manner on the identified pedestrian. The sound / image output unit 12052 may also control the display unit 12062 to display an icon or the like representing a pedestrian at a desired position.

[0208] An example of a vehicle control system to which the technology according to the present disclosure is applicable has been described above. The technology of the present disclosure can be applied to the camera section 12031 in the above-mentioned configuration. Specifically, for example, the above-mentioned solid-state camera devices 102 and 602 can be applied to the camera section 12031 of the vehicle control system 12000. By applying the technology according to the present disclosure to the vehicle control system 12000, it is possible to obtain a captured image while suppressing the influence of noise.

[0209] Note that the above-mentioned embodiments show examples for implementing the present technology, and the matters in the embodiments and the specific matters of the present invention in the claims have a corresponding relationship. Similarly, the specific matters of the present invention in the claims and the matters given the same name in the embodiments of the present technology have a corresponding relationship. However, the present technology is not limited to these embodiments, and can be implemented by implementing various modifications to the embodiments without departing from the gist of the present technology. In addition, the effects described in this specification are only examples, not restrictive, and other effects can also be provided.

[0210] Note that this technology can also have the following technical solutions. (1) A camera device comprising: a pixel provided with a lateral overflow storage capacitor for storing charges overflowing from a photoelectric conversion portion; and A signal processing unit performs correction processing on a pixel signal read out from the pixel based on a dummy light shielding signal read from the lateral overflow storage capacitor in a state where the charge obtained by the photoelectric conversion by the photoelectric conversion unit is not stored in the lateral overflow storage capacitor. (2) The imaging device according to (1), further comprising: A flow rate control unit is configured to discharge the charges obtained by photoelectric conversion in the photoelectric conversion unit so that the charges are not accumulated in the lateral overflow storage capacitor. (3) The imaging device according to (1) or (2), further comprising: A normal accumulation period: during which charges are accumulated in the photoelectric conversion portion in a state where the charges accumulated in the photoelectric conversion portion can overflow to the lateral overflow accumulation capacitor; and Pseudo light shielding storage period: During this period, charges based on dark current are stored in the lateral overflow storage capacitor in a state where charges obtained by photoelectric conversion in the photoelectric conversion unit are not stored in the lateral overflow storage capacitor. (4) The imaging device according to (3), wherein: The normal accumulation period and the virtual light shielding accumulation period each include: a timing at which the charge accumulated in the photoelectric conversion unit is read as a single body; and The timing at which the charge accumulated in the photoelectric conversion unit and the charge accumulated in the lateral overflow storage capacitor are read out together. (5) The imaging device according to (4), wherein: Each of the normal accumulation period and the virtual light-shielded accumulation period includes a timing for reading the charge accumulated in the photoelectric conversion portion at conversion efficiencies different from each other. (6) The imaging device according to (4) or (5), wherein: The normal accumulation period and the virtual light shielding accumulation period are set in the same frame. (7) The imaging device according to (4) or (5), wherein: The normal accumulation period and the virtual light shielding accumulation period are set in different frames. (8) The imaging device according to any one of (3) to (7), wherein: The signal processing unit performs correction processing on the pixel signal by using a virtual light-shielded image generated based on the charges accumulated in the virtual light-shielded accumulation period for a normal image generated based on the charges accumulated in the normal accumulation period. (9) The imaging device according to any one of (3) to (7), wherein: The signal processing unit performs correction processing on the pixel signal by using one virtual light-shielded image generated based on the charges accumulated in the virtual light-shielded accumulation period for a plurality of normal images generated based on the charges accumulated in the different normal accumulation periods. (10) The imaging device according to any one of (3) to (7), wherein: The signal processing unit performs correction processing on the pixel signal for one normal image generated based on the charges accumulated in the normal accumulation period by using a plurality of virtual light-shielded images generated based on the charges accumulated in the virtual light-shielded accumulation periods different from each other. (11) The imaging device according to any one of (3) to (10), wherein: The signal processing unit performs analog-to-digital (AD) conversion of signal levels of a normal image generated based on the charges accumulated in the normal accumulation period and a virtual light-shielding image generated based on the charges accumulated in the virtual light-shielding accumulation period, based on different reset levels. (12) The imaging device according to any one of (3) to (10), wherein: The signal processing unit performs analog-to-digital conversion of signal levels based on a common reset level for each of a normal image generated based on the charges accumulated in the normal accumulation period and a virtual light-shielding image generated based on the charges accumulated in the virtual light-shielding accumulation period. (13) The imaging device according to any one of (3) to (12), wherein: The power supply voltage applied to the lateral type overflow storage capacitor during the pseudo light shielding storage period is higher than the power supply voltage applied to the lateral type overflow storage capacitor during the normal storage period. (14) The imaging device according to any one of (3) to (13), wherein: The pixels include: a photodiode serving as the photoelectric conversion unit; A transfer transistor transfers the charge accumulated in the photodiode to a floating Dynamic diffusion unit; A pass transistor for setting a path, storing the overflow storage current in the lateral type The charge in the container is transferred to the floating diffusion via the passage; a reset transistor that resets the floating diffusion; an amplifying transistor that outputs a signal corresponding to the potential of the floating diffusion; and A selection transistor selects the output of the amplifying transistor. (15) The imaging device according to (14), wherein: The pixel further includes a switching transistor that switches the conversion efficiency in the amplifying transistor. (16) The imaging device according to (14) or (15), wherein: When the charge obtained by photoelectric conversion in the photoelectric conversion unit is not accumulated in the lateral overflow storage capacitor, the pass transistor is turned off, and the transfer transistor, the reset transistor, and the switching transistor are turned on. (17) The imaging device according to any one of (14) to (16), wherein: In the pseudo light shielding accumulation period, the transfer transistor is turned off at a timing when the charge accumulated in the photoelectric conversion unit is read as a single body. (18) The imaging device according to any one of (14) to (17), further comprising: The overflow control transistor controls the overflow of charges from the photoelectric conversion unit to the lateral overflow storage capacitor. (19) The imaging device according to any one of (14) to (18), wherein: The transfer transistor is driven in three levels between a level for enabling overflow from the photoelectric converter to the floating diffusion, a level for disabling overflow from the photoelectric converter to the floating diffusion, and a level for transferring charge from the photoelectric converter to the floating diffusion. (20) The imaging device according to any one of (3) to (19), wherein: The signal processing unit determines whether to perform correction processing on the pixel signal based on a temperature around the pixel. Reference numerals list

[0211] 100: Camera 101: Optical Systems 102: Solid-state imaging device 103: Camera control unit 104: Image processing unit 105: Storage 106: Display unit 107: Operation Department 108: Bus 111: Pixel array unit 112: Vertical scanning circuit 113: Column read circuit 114: Column signal processing unit 115: Horizontal scanning circuit 116: Control circuit 117: Flow Control Department 121: Photodiode 122: Pass transistor 123: Reset transistor 124: Amplifier transistor 125: Select transistor 126: Lateral overflow storage capacitor 127: Pass transistor 128: Switching transistor 129: Overflow control transistor FD: Floating Diffusion 131: Horizontal drive line 132: Vertical signal line

Claims

1. A camera device, comprising: a pixel provided with a lateral overflow storage capacitor for storing charges overflowing from the photoelectric conversion portion; and A signal processing unit performs correction processing on a pixel signal read out from the pixel based on a dummy light shielding signal read from the lateral overflow storage capacitor in a state where the charge obtained by the photoelectric conversion by the photoelectric conversion unit is not stored in the lateral overflow storage capacitor.

2. The camera device according to claim 1, further comprising: A flow rate control unit is configured to discharge the charges obtained by photoelectric conversion in the photoelectric conversion unit so that the charges are not accumulated in the lateral overflow storage capacitor.

3. The camera device according to claim 1, further comprising: Normal storage period: during this period, the charge is stored in the photoelectric conversion part in a state where the charge stored in the photoelectric conversion part can overflow to the lateral overflow storage capacitor; and Pseudo light shielding storage period: During this period, charges based on dark current are stored in the lateral overflow storage capacitor in a state where charges obtained by photoelectric conversion in the photoelectric conversion unit are not stored in the lateral overflow storage capacitor.

4. The imaging device according to claim 3, wherein: The normal accumulation period and the virtual light shielding accumulation period each include: a timing at which the charge accumulated in the photoelectric conversion unit is read as a single body; and The timing at which the charge accumulated in the photoelectric conversion unit and the charge accumulated in the lateral overflow storage capacitor are read out together.

5. The imaging device according to claim 4, wherein: Each of the normal accumulation period and the virtual light-shielded accumulation period includes a timing for reading the charge accumulated in the photoelectric conversion portion at conversion efficiencies different from each other.

6. The imaging device according to claim 4, wherein: The normal accumulation period and the virtual light shielding accumulation period are set in the same frame.

7. The imaging device according to claim 4, wherein: The normal accumulation period and the virtual light shielding accumulation period are set in different frames.

8. The imaging device according to claim 3, wherein: The signal processing unit performs correction processing on the pixel signal by using a virtual light-shielded image generated based on the charges accumulated in the virtual light-shielded accumulation period for a normal image generated based on the charges accumulated in the normal accumulation period.

9. The imaging device according to claim 3, wherein: The signal processing unit performs correction processing on the pixel signal by using one virtual light-shielded image generated based on the charges accumulated in the virtual light-shielded accumulation period for a plurality of normal images generated based on the charges accumulated in the different normal accumulation periods.

10. The imaging device according to claim 3, wherein: The signal processing unit performs correction processing on the pixel signal for one normal image generated based on the charges accumulated in the normal accumulation period by using a plurality of virtual light-shielded images generated based on the charges accumulated in the virtual light-shielded accumulation periods different from each other.

11. The imaging device according to claim 3, wherein: The signal processing unit performs analog-to-digital (AD) conversion of signal levels of a normal image generated based on the charges accumulated in the normal accumulation period and a virtual light-shielding image generated based on the charges accumulated in the virtual light-shielding accumulation period, based on different reset levels.

12. The imaging device according to claim 3, wherein: The signal processing unit performs analog-to-digital conversion of signal levels based on a common reset level for each of a normal image generated based on the charges accumulated in the normal accumulation period and a virtual light-shielding image generated based on the charges accumulated in the virtual light-shielding accumulation period.

13. The imaging device according to claim 3, wherein: The power supply voltage applied to the lateral type overflow storage capacitor during the pseudo light shielding storage period is higher than the power supply voltage applied to the lateral type overflow storage capacitor during the normal storage period.

14. The imaging device according to claim 1, wherein: The pixels include: a photodiode serving as the photoelectric conversion unit; a transfer transistor that transfers the charge accumulated in the photodiode to a floating diffusion; a pass transistor for setting a pass through which the charge accumulated in the lateral overflow storage capacitor is transferred to the floating diffusion; a reset transistor that resets the floating diffusion; an amplifying transistor that outputs a signal corresponding to the potential of the floating diffusion; and A selection transistor selects the output of the amplifying transistor.

15. The imaging device according to claim 14, wherein: The pixel further includes a switching transistor that switches the conversion efficiency in the amplifying transistor.

16. The imaging device according to claim 15, wherein: When the charge obtained by photoelectric conversion in the photoelectric conversion unit is not accumulated in the lateral overflow storage capacitor, the pass transistor is turned off, and the transfer transistor, the reset transistor, and the switching transistor are turned on.

17. The imaging device according to claim 15, wherein: In the pseudo light shielding accumulation period, the transfer transistor is turned off at a timing when the charge accumulated in the photoelectric conversion unit is read as a single body.

18. The camera device according to claim 15, further comprising: The overflow control transistor controls the overflow of charges from the photoelectric conversion unit to the lateral overflow storage capacitor.

19. The imaging device according to claim 14, wherein: The transfer transistor is driven in three levels between a level for enabling overflow from the photoelectric converter to the floating diffusion, a level for disabling overflow from the photoelectric converter to the floating diffusion, and a level for transferring charge from the photoelectric converter to the floating diffusion.

20. The imaging device according to claim 3, wherein: The signal processing unit determines whether to perform correction processing on the pixel signal based on a temperature around the pixel.

Images