A high-temperature fusion package pressure core and preparation method thereof

Abstract

The present invention discloses a high-temperature fusion packaged pressure core and a preparation method thereof, wherein the pressure core comprises a silicon piezoresistive chip and a sealing plate; a first cavity with an opening on one side is provided in the silicon piezoresistive chip, a pressure-sensitive diaphragm, a chip pad and a varistor are provided on the surface of the silicon piezoresistive chip, the pressure-sensitive diaphragm is located above the first cavity, and the varistor is located on the surface of the pressure-sensitive diaphragm; a second cavity with an opening on one side is provided in the sealing plate, and through lead holes are provided on both sides of the sealing plate, and the lead holes correspond to the chip pad; a sealing layer is printed on the surface of the silicon piezoresistive chip, and the silicon piezoresistive chip, the sealing layer and the sealing plate are connected by high-temperature sintering; when the silicon piezoresistive chip is sintered and connected to the sealing plate, the varistor is encapsulated in the second cavity. The present invention has the characteristics of compact structure, simple principle, stable operation and wide operating temperature range, which makes up for the shortcomings of wafer bonding and flip-chip welding.

Description

Technical Field

[0001] The invention belongs to the technical field of pressure sensors, and in particular relates to a high-temperature fusion packaged pressure core and a preparation method thereof. Background Art

[0002] At present, the silicon piezoresistive core is mainly packaged by welding the corrugated diaphragm and then filling it with oil. There are problems such as large packaging volume, high thermal impact of oil filling, and low operating temperature range. In order to reduce the packaging size of the silicon piezoresistive core, improve the core performance, and realize the miniaturized packaging of the pressure sensor, a leadless package of the pressure chip is proposed. It mainly adopts the method of bonding the wafer and the glass substrate, directly bonding the wafer and the glass substrate together by applying a certain pressure, and enhancing the bonding strength after treatment at high temperature to realize the bonding packaging of the wafer. This bonding packaging process has strict requirements on the cleanliness of the environment, the flatness and roughness of the bonding surface. The environmental cleanliness is required to be above the thousandth level, the flatness of the bonding surface is required to reach the micron level, and the surface roughness is required to reach the nanometer level. Otherwise, it will affect the yield and quality of the bonded packaged chip. The specific impact is that when the cleanliness is lower than the thousandth level, the size and number of particles in the environment increase significantly, and after being adsorbed to the bonding surface, they are clamped at the interface between the wafer and the glass substrate, which hinders the wafer and the glass substrate from bonding together and forms voids, reducing the yield rate of qualified chips of the wafer. Poor flatness will cause the wafer to warp and increase internal stress after bonding, affecting chip performance. Poor roughness is not conducive to complete bonding of the bonding surface, and large-area voids are easily formed after bonding.

[0003] In addition to wafer bonding technology, flip-chip soldering is another commonly used chip miniaturization packaging method, which combines the chip and substrate package together by soldering. Flip-chip soldering is affected by the melting point of solder, and the operating temperature is generally below 125°C. In addition, the solder material is relatively soft and has low strength, so it can only be used for small-range pressure measurement.

[0004] Truly reflecting the pressure state of the medium under high temperature is the basic requirement of the pressure sensor. However, due to the limitation of the materials used in manufacturing the sensor core, it can generally only work below 150°C. When testing the pressure of the medium at a higher temperature, the performance will be seriously degraded or even fail due to the influence of the material. Therefore, increasing the operating temperature of the sensor core is the key to solving the problem of high temperature operation of the sensor. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a high-temperature fusion packaging pressure core and a preparation method thereof with a compact structure, simple principle, stable operation and a wide operating temperature range, in view of the existing strict requirements on environmental cleanliness, bonding surface flatness and roughness of wafer and substrate bonding.

[0006] To achieve the above object, the present invention can adopt the following technical solutions:

[0007] A high-temperature fusion packaged pressure core comprises a silicon piezoresistive chip and a sealing plate; a first cavity with an opening on one side is provided in the silicon piezoresistive chip, a pressure-sensitive diaphragm, a chip pad and a varistor are provided on the surface of the silicon piezoresistive chip, the pressure-sensitive diaphragm is located above the first cavity, and the varistor is located on the surface of the pressure-sensitive diaphragm; a second cavity with an opening on one side is provided in the sealing plate, through lead holes are provided on both sides of the sealing plate, and the lead holes correspond to the chip pad; a sealing layer is printed on the surface of the silicon piezoresistive chip, and the silicon piezoresistive chip, the sealing layer and the sealing plate are connected by high-temperature sintering; when the silicon piezoresistive chip is sintered and connected to the sealing plate, the varistor is packaged in the second cavity.

[0008] As a further improvement of the present invention, a lead wire and a conductive adhesive are provided in the lead wire hole, and the lead wire is conductively connected to the chip pad through the conductive adhesive.

[0009] As a further improvement of the present invention, a conductor plating layer is provided on the surface of the lead hole.

[0010] As a further improvement of the present invention, the top of the second cavity is sealed, and when the silicon piezoresistive chip is sintered and connected with the sealing plate, the second cavity is isolated from the outside to form a vacuum.

[0011] As a further improvement of the present invention, a through vent hole is provided in the sealing plate, and the vent hole is connected with the top of the second cavity to achieve communication between the second cavity and the external atmospheric pressure.

[0012] As a further improvement of the present invention, the sealing plate is made of ceramic or glass material.

[0013] As a further improvement of the present invention, the varistor includes four resistors, and two resistors are arranged at the maximum strain position and the minimum strain position of the surface of the pressure-sensitive diaphragm to form a Wheatstone bridge.

[0014] As a general technical concept, the present invention also provides a method for preparing the pressure core based on the high temperature fusion packaging, comprising the following steps:

[0015] Step S1, setting a pressure-sensitive diaphragm, a first cavity, a chip pad and a varistor in a silicon piezoresistive chip;

[0016] Step S2, setting a second cavity and a lead hole in the sealing plate;

[0017] Step S3: Print a single sealing layer on the surface of the silicon piezoresistive chip, and combine the sealing plate and the silicon piezoresistive chip together during high-temperature sintering to form a seal.

[0018] As a further improvement of the present invention, in step S2, air holes are provided in the sealing plate to enable the second cavity to communicate with the external atmospheric pressure.

[0019] As a further improvement of the present invention, in step S2, leads and conductive glue are arranged in the lead holes, and the leads are conductively connected to the chip pads through the conductive glue.

[0020] Compared with the prior art, the advantages of the present invention are:

[0021] The high-temperature fusion packaging pressure core and preparation method thereof of the present invention adopt slurry printing and sintering technology. The slurry printing has low requirements on the flatness and roughness of the packaging bonding surface and the printing environment. The solid slurry after sintering has high strength and can withstand temperatures above 200°C for a long time, which effectively makes up for the shortcomings of wafer bonding and flip-chip welding. Bonding packaging can be performed in an environment below the thousand level, and low requirements are placed on the flatness and roughness of the bonding surface, thereby reducing production costs and improving the yield rate and quality of qualified chips bonded by wafers. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a schematic diagram of the structural principle of a high-temperature fusion packaging pressure core in a specific embodiment of the present invention;

[0023] Figure 2 It is a schematic diagram of the structural principle of the sealing plate in a specific embodiment of the present invention;

[0024] Figure 3 It is a schematic diagram of the structural principle of the sealing plate coating in a specific embodiment of the present invention;

[0025] Figure 4 It is a schematic diagram of the preparation process of the high temperature fusion packaging pressure core in a specific embodiment of the present invention.

[0026] Legend: 1. Silicon piezoresistive chip; 2. Pressure-sensitive diaphragm; 3. First cavity; 4. Chip pad; 5. Varistor; 6. Sealing layer; 7. Sealing plate; 8. Second cavity; 9. Lead hole; 10. Conductor plating; 11. Air hole; 12. Lead; 13. Conductive adhesive. DETAILED DESCRIPTION

[0027] The present invention is further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0028] In the description of the present invention, it should be understood that the terms "side", "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0029] In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "multiple" means two or more, unless otherwise clearly and specifically defined.

[0030] Example

[0031] like Figure 1 , Figure 2 and Figure 3 As shown, the high-temperature fusion packaged pressure core of the present invention includes a silicon piezoresistive chip 1 and a sealing plate 7. A first cavity 3 with an opening on one side is provided in the silicon piezoresistive chip 1, and a pressure-sensitive diaphragm 2, a chip pad 4 and a varistor 5 are provided on the surface of the silicon piezoresistive chip 1. The pressure-sensitive diaphragm 2 is located above the first cavity 3, and the varistor 5 is located on the surface of the pressure-sensitive diaphragm 2. A second cavity 8 with an opening on one side is provided in the sealing plate 7, and lead holes 9 are provided on both sides of the sealing plate 7, and the lead holes 9 correspond to the chip pad 4. A sealing layer 6 is printed on the surface of the silicon piezoresistive chip 1, and the silicon piezoresistive chip 1, the sealing layer 6 and the sealing plate 7 are connected by high-temperature sintering; when the silicon piezoresistive chip 1 is sintered and connected with the sealing plate 7, the varistor 5 is encapsulated in the second cavity 8.

[0032] In this embodiment, only a single-layer sealing layer 6 is printed on the surface of the silicon piezoresistive chip 1 to achieve sealing. In addition to sintering and sealing, the sealing layer 6 can also effectively isolate external water vapor, particles, stains, etc., so that the varistor 5 on the surface of the pressure-sensitive diaphragm 2 is not affected, thereby improving the reliability and stability of the core.

[0033] In this embodiment, the silicon piezoresistive chip 1 itself has the functions of pressure sensing and electrical signal output. In order to solve the problems of core packaging and high temperature operation, a sealing plate 7 packaging form is adopted to replace the conventional oil-filled packaging. The efficient and mature printing and sintering process is adopted. Compared with the wafer bonding technology, it has the advantages of low production cost investment, simple process and good quality controllability; compared with the flip-chip technology, the product has the advantages of high operating temperature, wide applicable pressure range and good reliability.

[0034] like Figure 1 As shown, a lead 12 and a conductive glue 13 are provided in the lead hole 9, and the lead 12 is connected to the chip pad 4 through the conductive glue 13, and the pressure electrical signal measured by the pressure sensing is transmitted to the back-end processing circuit through the lead 12. Through the graphic design of the sealing layer 6, the chip pad 4 is surrounded and isolated, which can prevent the conductive glue 13 from flowing and penetrating into other areas during filling and curing.

[0035] like Figure 3 As shown, a conductor plating layer 10 is provided on the surface of the lead hole 9 to enhance the bonding strength and the conductive performance of the conductive adhesive 13 and the lead hole 9, so that the pressure electrical signal can be led out more reliably.

[0036] In this embodiment, according to the pressure measurement requirements, the top of the second cavity 8 is sealed. After the silicon piezoresistive chip 1 is sintered and connected with the sealing plate 7, the second cavity 8 is isolated from the outside to form a vacuum, forming a pressure core for absolute pressure or sealed gauge pressure measurement.

[0037] In other embodiments, a through vent hole 11 may be provided in the sealing plate 7, and the vent hole 11 is connected to the top of the second cavity 8 to connect the second cavity 8 with the external atmospheric pressure, forming a pressure core for differential pressure or gauge pressure measurement.

[0038] In this embodiment, the design of the second cavity 8 is not only used to form different pressure measurement types such as absolute pressure, sealed gauge pressure, gauge pressure and differential pressure, but also provides space for the pressure-sensitive diaphragm 2 to be deformed under pressure, so as to prevent the pressure-sensitive diaphragm 2 from contacting the sealing plate 7 when deformed under pressure and affecting the pressure measurement.

[0039] In this embodiment, the sealing plate 7 is made of ceramic or glass material, which has the advantages of stable structure and insulation.

[0040] In this embodiment, the piezoresistors 5 include four resistors, and two are arranged at the maximum strain and minimum strain positions on the surface of the pressure-sensitive diaphragm 2 to form a Wheatstone bridge to achieve linear conversion of the pressure value electrical signal. After the Wheatstone bridge converts the pressure electrical signal, the electrical signal is output to the back-end processing circuit through the chip pad 4 and the lead 12 to complete the standard output conditioning of the sensor electrical signal.

[0041] like Figure 4As shown, this embodiment also provides a method for preparing a high-temperature fusion package pressure core, including the following steps:

[0042] Step S1 , arranging a pressure-sensitive diaphragm 2 , a first cavity 3 , a chip pad 4 and a varistor 5 in a silicon piezoresistive chip 1 .

[0043] Step S2, setting a second cavity 8 and a lead hole 9 in the sealing plate 7. The top of the second cavity 8 is set as a sealing structure to manufacture an absolute pressure type pressure core.

[0044] Step S3, print a single-layer sealing layer 6 on the surface of the silicon piezoresistive chip 1, and combine the sealing plate 7 with the silicon piezoresistive chip 1 during high-temperature sintering to form a seal. The sealing layer 6 is applied to the surface of the silicon piezoresistive chip 1 by printing, and then sintered under vacuum and high temperature to combine the sealing plate 7 with the silicon piezoresistive chip 1 to form a seal, so that the second cavity 8 becomes a vacuum state isolated from the external environment, and becomes a pressure core for absolute pressure measurement.

[0045] In other embodiments, the air holes 11 may also be provided in the sealing plate 7 to enable the second cavity 8 to communicate with the external atmospheric pressure, so as to manufacture a pressure core for differential pressure or gauge pressure measurement.

[0046] In step S2 of this embodiment, a lead 12 and a conductive glue 13 are arranged in the lead hole 9, and the lead 12 is conductively connected to the chip pad 4 through the conductive glue 13. After the conductive glue 13 is cured, the lead 12 can be firmly connected to the chip pad 4, and the pressure electrical signal measured by the pressure sensor can be transmitted to the back-end processing circuit through the lead 12.

[0047] In this embodiment, slurry printing and sintering technology are used. Slurry printing does not have high requirements on the flatness, roughness, and printing environment of the packaging bonding surface. The solid slurry after sintering has high strength and can withstand temperatures above 200°C for a long time, which effectively makes up for the shortcomings of wafer bonding and flip-chip bonding. Bonding packaging can be performed in an environment below grade 1000, and the flatness and roughness of the bonding surface are low, which reduces production costs and improves the yield and quality of qualified chips from wafer bonding.

[0048] Although the present invention is disclosed as above with preferred embodiments, it is not intended to limit the present invention. Any technician familiar with the art can use the above disclosed methods and technical contents to make many possible changes and modifications to the technical solutions of the present invention without departing from the spirit and technical solutions of the present invention, or modify them into equivalent embodiments of equivalent changes. Therefore, any simple modification, equivalent replacement, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solutions of the present invention still fall within the scope of protection of the technical solutions of the present invention.

Claims

1. A high temperature fusion packaged pressure core, characterized in that: The invention comprises a silicon piezoresistive chip (1) and a sealing plate (7); a first cavity (3) with an opening on one side is provided in the silicon piezoresistive chip (1); a pressure-sensitive diaphragm (2), a chip pad (4) and a varistor (5) are provided on the surface of the silicon piezoresistive chip (1); the pressure-sensitive diaphragm (2) is located above the first cavity (3); and the varistor (5) is located on the surface of the pressure-sensitive diaphragm (2); a second cavity (8) with an opening on one side is provided in the sealing plate (7); through lead holes (9) are provided on both sides of the sealing plate (7), and the lead holes (9) correspond to the chip pad (4); a sealing layer (6) is printed on the surface of the silicon piezoresistive chip (1); the silicon piezoresistive chip (1), the sealing layer (6) and the sealing plate (7) are connected by high-temperature sintering; when the silicon piezoresistive chip (1) and the sealing plate (7) are sintered and connected, the varistor (5) is encapsulated in the second cavity (8).

2. The high temperature fusion packaged pressure core according to claim 1, characterized in that: A lead wire (12) and a conductive adhesive (13) are provided in the lead wire hole (9), and the lead wire (12) is conductively connected to the chip pad (4) via the conductive adhesive (13).

3. The high temperature fusion packaged pressure core according to claim 2, characterized in that: A conductor plating layer (10) is provided on the surface of the lead hole (9).

4. The high temperature fusion packaged pressure core according to claim 3, characterized in that: The top of the second cavity (8) is sealed, and when the silicon piezoresistive chip (1) is sintered and connected to the sealing plate (7), the second cavity (8) is isolated from the outside to form a vacuum.

5. The high temperature fusion packaged pressure core according to claim 3, characterized in that: The sealing plate (7) is provided with a through vent hole (11), and the vent hole (11) is connected to the top of the second cavity (8) so as to realize the connection between the second cavity (8) and the external atmospheric pressure.

6. The high temperature fusion packaged pressure core according to any one of claims 1 to 5, characterized in that: The sealing plate (7) is made of ceramic or glass material.

7. The high temperature fusion packaged pressure core according to any one of claims 1 to 5, characterized in that: The varistor (5) comprises four resistors, and two resistors are arranged at the maximum strain position and the minimum strain position of the surface of the pressure-sensitive diaphragm (2) to form a Wheatstone bridge.

8. A method for preparing a high temperature fusion packaged pressure core according to any one of claims 1 to 7, characterized in that: The steps include: Step S1, arranging a pressure-sensitive diaphragm (2), a first cavity (3), a chip pad (4) and a varistor (5) in a silicon piezoresistive chip (1); Step S2, providing a second cavity (8) and a lead hole (9) in the sealing plate (7); Step S3: printing a single sealing layer (6) on the surface of the silicon piezoresistive chip (1), and combining the sealing plate (7) and the silicon piezoresistive chip (1) together during high-temperature sintering to form a seal.

9. The preparation method according to claim 8, characterized in that: In the step S2, a vent hole (11) is provided in the sealing plate (7) to enable the second cavity (8) to communicate with the external atmospheric pressure.

10. The preparation method according to claim 8, characterized in that: In the step S2, a lead wire (12) and a conductive adhesive (13) are arranged in the lead wire hole (9), and the lead wire (12) is conductively connected to the chip pad (4) via the conductive adhesive (13).

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