Dual-mode trimming circuit capable of pre-trimming

Abstract

The invention relates to a dual-mode trimming circuit capable of pre-trimming. A current trimming main unit comprises a current trimming main unit and a trimming reset control signal generation unit adaptively connected with the current trimming main unit; when current trimming is carried out based on the current trimming unit, the current trimming main unit is firstly used for carrying out pre-trimming, post-trimming is carried out after pre-trimming, during post-trimming, target trimming data is loaded to the current trimming main unit based on a current trimming target state signal, and a corresponding current trimming target state signal is output through the current trimming unit. And after the current trimming unit is powered on again, a trimming reset control signal is generated by using a trimming reset control signal generation unit, so that the current trimming main unit configures the generated trimming state signal into a corresponding current trimming target state signal under the trimming reset control signal. According to the invention, the output precision of the trimmed object and the flexibility of the trimming operation can be effectively improved.

Description

Technical Field

[0001] The invention relates to a trimming circuit, in particular to a pre-trimable dual-mode trimming circuit. Background Art

[0002] Trimming circuits are widely used in analog circuits such as reference circuits and power supply circuits. Due to process errors, it is difficult for untrimmed analog circuits to achieve very precise values. Therefore, reference circuits and power supply circuits generally need to be trimmed.

[0003] At present, when trimming analog circuits such as reference circuits and power supply circuits, laser trimming is mostly used to provide one or more non-volatile values ​​through the melting or unmelting state of polycrystalline to achieve the purpose of trimming. Of course, current trimming is also used to add some control circuits to the circuit to provide one or more non-volatile values ​​by controlling the current path to melt the top layer of aluminum.

[0004] For the above two conventional trimming methods, the fuse that should be trimmed is generally calculated theoretically based on the first test value, so that the output value of the trimmed object is closer to the ideal value. However, since the state of the trimmed fuse cannot be trimmed again after trimming, there may still be a certain error between the output value of the trimmed object and the ideal value. Therefore, how to effectively improve the trimming accuracy and reduce the trimming cost is a technical problem that needs to be solved at present. Summary of the invention

[0005] The purpose of the present invention is to overcome the deficiencies in the prior art and to provide a pre-adjustable dual-mode trimming circuit, which can effectively improve the output accuracy of the trimmed object after trimming and the flexibility of the trimming operation.

[0006] According to the technical solution provided by the present invention, a dual-mode trimming circuit capable of pre-trimming is provided, wherein the dual-mode trimming circuit comprises a plurality of dual-mode trimming units, and a corresponding dual-mode trimming state signal is generated by using a dual-mode trimming unit, wherein:

[0007] The dual-mode trimming unit at least includes a current trimming unit based on current trimming, wherein the current trimming main unit includes a current trimming main unit and a trimming reset control signal generating unit adaptively connected to the current trimming main unit;

[0008] When current trimming is performed based on the current trimming unit, pre-trimming is performed using the current trimming main unit first, and post-trimming is performed after the pre-trimming, wherein:

[0009] During pre-adjustment, the pre-adjustment data is loaded into the current adjustment main unit, so that the current adjustment main unit generates a pre-adjustment state signal corresponding to the pre-adjustment data;

[0010] Based on the pre-trim state signal generated by the pre-trim, determining the current trimming target state signal of the current trimming main unit during post-trim, wherein the state of the current trimming target state signal is a trimming effective state or a trimming invalid state;

[0011] During post-adjustment, based on the current adjustment target state signal, the target adjustment data is loaded into the current adjustment main unit, and the current adjustment unit outputs the corresponding current adjustment target state signal, and a dual-mode adjustment state signal is formed based on the current adjustment target state signal, wherein:

[0012] When the state of the current trimming target state signal is a trimming effective state, the polycrystalline fuse in the current trimming main unit is blown by a current blowing method based on the current trimming target state signal and the trimming enable signal in an effective state, so as to lock the current trimming target state signal output by the current trimming main unit after the polycrystalline fuse is blown;

[0013] After the current trimming unit is powered on again, the trimming reset control signal generating unit is used to generate a trimming reset control signal, so that the current trimming main unit configures the generated trimming state signal as a corresponding current trimming target state signal under the trimming reset control signal.

[0014] The current trimming main unit includes a DFF trigger, a polycrystalline fuse unit and a trimming reset unit, wherein:

[0015] The data terminal of the DFF trigger receives the pre-adjusted data or the target adjusted data, and the CLK terminal of the DFF trigger receives the clock signal CLK, so as to load the pre-adjusted data or the target adjusted data into the DFF trigger based on the clock signal CLK, wherein,

[0016] When the pre-trim data is loaded into the data terminal of the DFF flip-flop, a pre-trim status signal is generated through the Q terminal of the DFF flip-flop;

[0017] When the target trimming data is loaded into the data terminal of the DFF flip-flop, a current trimming target state signal is generated through the Q terminal of the DFF flip-flop;

[0018] The polycrystalline fuse is located in a polycrystalline fuse unit, and the polycrystalline fuse unit further includes a fuse current path unit adapted to be connected to the polycrystalline fuse, wherein:

[0019] The fuse current path unit receives the trimming enable signal and is connected to the Q terminal of the DFF trigger;

[0020] When the DFF trigger outputs a current trimming target state signal of a trimming effective state, and the trimming enable signal is also in an effective state, the fuse current path unit is driven to form an effective current path, and then the polycrystalline fuse is current-blown based on the fuse blowing voltage and the formed effective current path;

[0021] The trimming reset unit is adaptively connected to the poly fuse unit and the DFF trigger, generates a trimming reset control signal based on the trimming reset control signal generating unit, and configures the DFF trigger Q terminal to output a corresponding current trimming target state signal based on the received trimming reset control signal.

[0022] When the current trimming target state signal in the trimming effective state is in the high level state, the current trimming target state signal in the trimming ineffective state is in the low level state, wherein,

[0023] When the trimming enable signal is low level effective, the fuse current path unit includes a NOR gate NOR0 and an NMOS transistor N0 connected to the output end of the NOR gate NOR0, wherein:

[0024] The Q end of the DFF trigger is connected to one end of the NOR gate NOR0 through the inverter INV0, and the trimming enable signal is connected to the other end of the NOR gate NOR0;

[0025] The source terminal of the NMOS tube N0 is grounded, the drain terminal of the NMOS tube N0 is connected to the first terminal of the polycrystalline fuse, and the second terminal of the polycrystalline fuse is connected to the fuse breaking voltage;

[0026] When the NMOS tube N0 is in the on state based on the current trimming target state signal in the trimming effective state and the trimming enable signal of the low level, an effective current path is formed based on the NMOS tube N0.

[0027] The trimming and resetting unit includes a level state detection unit and a reset position signal generating unit adaptively connected to the level state detection unit, wherein:

[0028] The trimming and resetting control signal is loaded into the level state detection unit, and the level state detection unit obtains a fuse level state signal representing the blown state of the poly-fuse based on the trimming and resetting control signal;

[0029] Based on the trimmed reset control signal and the fuse level status signal, the reset position signal generating unit generates a reset position signal loaded into the DFF trigger, wherein:

[0030] When the fuse level state signal indicates that the polycrystalline fuse is in a blown state, the Q end of the DFF trigger is configured to output a current trimming target state signal of a trimming effective state based on the reset position signal;

[0031] When the fuse level state signal indicates that the poly fuse is in an unblown state, the Q end of the DFF trigger is configured based on the reset position signal to output a current trimming target state signal of a trimming invalid state.

[0032] The trimming reset control signal includes a preload control signal RE-LOAD, a low level detection control signal CFG-N and a high level detection control signal CFG-P, wherein:

[0033] After the current trimming unit is powered on again, the high level detection control signal CFG-P and the low level detection control signal CFG-N are immediately in the valid level state, and the preload control signal RE-LOAD is delayed to enter the valid level state, so that the reset position signal generating unit outputs the reset position signal of the invalid state based on the preload control signal RE-LOAD that is delayed to enter the valid level state;

[0034] When the preload control signal RE-LOAD enters the valid level state, the level state detection unit generates a fuse level state signal based on the preload control signal RE-LOAD, the low level detection control signal CFG-N and the high level detection control signal CFG-P.

[0035] When the preload control signal RE-LOAD and the low level detection control signal CFG-N are high level valid, and the high level detection control signal CFG-P is low level valid, the level state detection unit includes an NMOS tube N1, an NMOS tube N2 and a PMOS tube P0, the source end of the NMOS tube N2 is grounded, the drain end of the NMOS tube N2 is connected to the source end of the NMOS tube N1, the drain end of the NMOS tube N1 is connected to the drain end of the PMOS tube P0 and the reset position signal generating unit, and the source end of the PMOS tube P0 is connected to the first end of the polycrystalline fuse.

[0036] The gate terminal of the NMOS tube N1 is connected to the low level detection control signal CFG-N, the gate terminal of the NMOS tube N2 is connected to the preload control signal RE-LOAD, and the gate terminal of the PMOS tube P0 is connected to the high level detection control signal CFG-P.

[0037] The reset signal generating unit includes a PMOS tube P1 and a Schmitt trigger, wherein:

[0038] The source terminal of the PMOS tube P1 is connected to the power supply VDD, the gate terminal of the PMOS tube P1 is connected to the preload control signal RE-LOAD, and is connected to one end of the NAND gate NAND0 and one end of the NAND gate NAND1, and the drain terminal of the PMOS tube P1 is connected to the drain terminal of the PMOS tube P0, the drain terminal of the NMOS tube N1 and the input terminal of the Schmitt trigger;

[0039] The output end of the Schmitt trigger is connected to the other end of the NAND gate NAND0 and the input end of the inverter INV1, and the output end of the inverter INV1 is connected to the other end of the NAND gate NAND1;

[0040] The output end of the NAND gate NAND0 is connected to the set end of the DFF flip-flop, and the output end of the NAND gate NAND1 is connected to the reset end of the DFF flip-flop.

[0041] The trimming reset control signal generating unit at least comprises a trimming reset control signal generating main circuit, wherein:

[0042] After the current trimming unit is powered on again, a high-level effective power-on reset control pulse PRO is loaded to the trimming reset control signal generating main circuit;

[0043] Based on the power-on reset control pulse PRO, the reset control signal generation main circuit generates a preload control signal RE-LOAD, a low level detection control signal CFG-N and a high level detection control signal CFG-P at the same time, wherein:

[0044] The trim reset control signal generating main circuit includes a high level detection control signal generating unit, a low level detection control signal generating unit and a preload control signal generating unit.

[0045] Based on the power-on reset control pulse PRO, the high-level detection control signal generating unit synchronously generates a high-level detection control signal CFG-P in a low-level state;

[0046] Based on the high level detection control signal CFG-P, the low level detection control signal generation unit synchronously generates a high level low level detection control signal CFG-N;

[0047] Based on the low-level detection control signal CFG-N, the preload control signal generation unit delays and generates a preload control signal RE-LOAD in a high-level state, wherein a rising edge of the high-level state of the preload control signal RE-LOAD is located behind a corresponding rising edge of the low-level detection control signal CFG-N, and a falling edge of the preload control signal RE-LOAD is located in front of a corresponding falling edge of the low-level detection control signal CFG-N.

[0048] The dual-mode trimming unit also includes a laser trimming unit based on laser trimming, wherein:

[0049] The output end of the laser trimming unit and the output end of the current trimming unit are connected to the corresponding input end of the trimming unit or gate.

[0050] Outputting a laser trimming target state signal through an output end of the laser trimming unit;

[0051] Based on the laser trimming target state signal and / or the current trimming target state signal, a dual-mode trimming state signal is output through the output end of the trimming unit or gate.

[0052] The laser trimming unit includes a laser fuse, wherein:

[0053] The first end of the laser fuse is grounded, and the second end of the laser fuse is connected to the drain end of the PMOS tube P2, the gate end of the PMOS tube P2, the gate end of the PMOS tube P3, and the gate end of the NMOS tube N2;

[0054] The drain terminal of the PMOS tube P3 is connected to the gate terminal of the PMOS tube P4, the drain terminal of the NMOS tube N2, and the gate terminal of the NMOS tube N3.

[0055] The source terminals of the PMOS tube P2, the PMOS tube P3 and the PMOS tube P4 are all connected to the ground power supply VDD.

[0056] The source terminal of the NMOS tube N2 and the source terminal of the NMOS tube N3 are both grounded;

[0057] The drain terminal of the PMOS tube P4 and the drain terminal of the NMOS tube N4 are connected to each other to form an output terminal of the laser trimming unit.

[0058] The advantages of the present invention are as follows: the dual-mode image correction circuit may include a plurality of dual-mode correction units, each of which may include at least a current correction unit, and the current correction unit may be used to perform pre-correction and post-correction after pre-correction. The pre-correction may be used to determine the current correction target state signal that each current correction unit should output, and the current correction target state signal may be used as the dual-mode correction state signal, thereby effectively improving the output accuracy of the object to be corrected after the correction operation and the flexibility of the correction operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] Figure 1 The figure is a circuit schematic diagram of an embodiment of the dual-mode trimming circuit of the present invention.

[0060] Figure 2 The figure is a circuit diagram of an embodiment of the current trimming unit of the present invention.

[0061] Figure 3 The figure is a circuit diagram of an embodiment of the laser trimming unit of the present invention.

[0062] Figure 4 A circuit schematic diagram of an embodiment of a main circuit for generating a trimming and reset control signal of the present invention.

[0063] Figure 5 A timing diagram of an embodiment of the dual-mode trimming circuit of the present invention.

[0064] Explanation of the reference numerals: 1-power-on reset circuit, 2-main circuit for generating trimming reset control signal, 3-main current trimming unit, 4-laser trimming unit. DETAILED DESCRIPTION

[0065] The present invention will be further described below in conjunction with specific drawings and embodiments.

[0066] In order to effectively improve the output accuracy of the trimmed object after the trimming operation and the flexibility of the trimming operation, the present invention provides a dual-mode trimming circuit that can be pre-trim. Specifically, the dual-mode trimming circuit includes a plurality of dual-mode trimming units, so that a dual-mode trimming unit generates a corresponding dual-mode trimming state signal, wherein:

[0067] The dual-mode trimming unit at least includes a current trimming unit 3 based on current trimming, wherein the current trimming main unit 3 includes a current trimming main unit and a trimming reset control signal generating unit adaptively connected to the current trimming main unit;

[0068] When current trimming is performed based on the current trimming unit, pre-trimming is performed using the current trimming main unit first, and post-trimming is performed after the pre-trimming, wherein:

[0069] During pre-adjustment, the pre-adjustment data is loaded into the current adjustment main unit, so that the current adjustment main unit generates a pre-adjustment state signal corresponding to the pre-adjustment data;

[0070] Based on the pre-trim state signal generated by the pre-trim, determining the current trimming target state signal of the current trimming main unit during post-trim, wherein the state of the current trimming target state signal is a trimming effective state or a trimming invalid state;

[0071] During post-adjustment, based on the current adjustment target state signal, the target adjustment data is loaded into the current adjustment main unit, and the current adjustment unit outputs the corresponding current adjustment target state signal, and a dual-mode adjustment state signal is formed based on the current adjustment target state signal, wherein:

[0072] When the state of the current trimming target state signal is a trimming effective state, the polycrystalline fuse in the current trimming main unit is blown by a current blowing method based on the current trimming target state signal and the trimming enable signal in an effective state, so as to lock the current trimming target state signal output by the current trimming main unit after the polycrystalline fuse is blown;

[0073] After the current trimming unit is powered on again, the trimming reset control signal generating unit is used to generate a trimming reset control signal, so that the current trimming main unit configures the generated trimming state signal as a corresponding current trimming target state signal under the trimming reset control signal.

[0074] Specifically, the dual-mode trimming circuit should include one or more dual-mode trimming units. At this time, a dual-mode trimming unit can be used to generate a corresponding dual-mode trimming state signal, so as to perform a corresponding trimming operation using the corresponding dual-mode trimming state signal. Figure 1FIG. 4 shows an embodiment in which a dual-mode trimming circuit includes X+1 dual-mode trimming units. Figure 1 In the figure, FUSE[0]~FUSE[X] are X+1 dual-mode trimming status signals generated by the dual-mode trimming circuit.

[0075] It can be understood that a corresponding trimming operation can be performed using a dual-mode trimming status signal, and the dual-mode trimming status signals generated by the dual-mode trimming circuit are independent of each other, that is, the trimming operation performed by one dual-mode trimming status signal is independent of the trimming operations performed by other dual-mode trimming status signals, and the specific trimming operation is based on whether the required trimming can be performed on the trimming object, wherein the trimming object can be an analog circuit such as the above-mentioned reference circuit or power supply circuit.

[0076] Figure 1 An embodiment of using a dual-mode trimming state signal to perform a trimming operation is shown in FIG. Figure 1 In the example, the dual-mode trimming state signal FUSE[0] is loaded to the gate terminal of the NMOS tube NM0, and the source terminal and drain terminal of the NMOS tube N0 are connected to the two ends of the resistor R0. At this time, when the dual-mode trimming state signal FUSE[0] is at a high level, the NMOS tube NM0 is in the on state, and the resistor R0 can be short-circuited by the NMOS tube NM0. It can be understood that when the resistor R0 is short-circuited, the resistance of the resistor network where the resistor R0 is located can be adjusted, that is, the trimming operation is realized. Similarly, Figure 1 In the embodiment, the dual-mode trimming state signal FUSE[1] is loaded to the gate end of the NMOS tube NM1, and the dual-mode trimming state signal FUSE[X] is loaded to the gate end of the NMOS tube NMX. The method and process of using the dual-mode trimming state signal FUSE[1] and the dual-mode trimming state signal FUSE[X] to perform trimming operations can refer to the description of the dual-mode trimming state signal FUSE[0]. As can be seen from the above description, the corresponding level states of the dual-mode trimming state signal FUSE[0], the dual-mode trimming state signal FUSE[1], and the dual-mode trimming state signal FUSE[X] can be different, so as to achieve the purpose of different trimming operations.

[0077] As can be seen from the above description, the dual-mode trimming state signal can be a digital signal, and the dual-mode trimming state signal can be a high level state or a low level state. In order to obtain the dual-mode trimming state signal, the dual-mode trimming unit can at least include a current trimming unit 3. As can be seen from the background technology description, the current trimming unit 3 is a trimming method based on current to blow the polycrystalline fuse.

[0078] In one embodiment of the present invention, the current trimming unit 3 may include a current trimming main unit and a trimming reset control signal generating unit, wherein the current trimming function can be realized by utilizing the current trimming main unit, and the trimming reset control signal generating unit can be used to reset the output state of the current trimming main unit after power is re-on. The specific working mode and process of the current trimming main unit and the trimming reset control signal generating unit are specifically described below.

[0079] In specific implementation, when the current trimming is performed using the current trimming main unit, it may include a pre-trimester stage and a post-trimester stage, wherein, when the current trimming is performed, the pre-trimester may be performed first, and then the post-trimester may be performed after the pre-trimester. Specifically, the post-trimester is the actual trimming operation performed using the current trimming main unit after the pre-trimester. It can be seen that, during the pre-trimester, the polycrystalline fuse in the current trimming main unit is not used to perform current melting, and therefore, the functional state of the current trimming main unit will not be affected, but the current trimming target state of the current trimming main unit can be determined through the pre-trimester.

[0080] During pre-adjustment, a pre-adjustment data can be loaded into the current adjustment main unit. At this time, the current adjustment main unit can generate a pre-adjustment status signal corresponding to the pre-adjustment data. It should be noted that the pre-adjustment data can generally be "0" or "1", and the pre-adjustment status signal should be consistent with the dual-mode adjustment status signal mentioned above, that is, the pre-adjustment status signal can be a low level state or a high level state. For example, when the pre-adjustment data is "0", the pre-adjustment status signal can be a low level, and when the pre-adjustment data is "1", the pre-adjustment status signal can be a high level state.

[0081] Since the pre-adjustment state signal is consistent with the dual-mode adjustment state signal, the pre-adjustment state signal can be used to drive the above-mentioned NMOS tube. For example, when the dual-mode adjustment state signal FUSE[0] is at a high level, the pre-adjustment state signal generated by the corresponding current adjustment main circuit is at a high level. At this time, the dual-mode adjustment state signal can be simulated to perform the corresponding adjustment operation. It can be understood that when the object to be adjusted is pre-adjusted, the pre-adjustment state signals output by different current adjustment units will be adjusted until the output value of the object to be adjusted is consistent with the ideal output value, or close to the ideal output value. It can be seen that, compared with the theoretical calculation method used in the existing adjustment of the object to be adjusted, the method of determining the output value of the object to be adjusted by pre-adjustment can make the output value of the object to be adjusted closer to the ideal output value, and can improve the adjustment accuracy of the object to be adjusted. The method of determining the output value of the object to be adjusted can adopt the commonly used method in the prior art, which will not be repeated here.

[0082] As can be seen from the above description, during pre-adjustment, the pre-adjustment state signals generated by different current adjustment main units can be adjusted and combined until the output value of the adjusted object is close to the ideal output value. At this time, the pre-adjustment state signal output by each current adjustment main unit is used as the current adjustment target state signal. It can be understood that when all current adjustment main units generate corresponding current adjustment target state signals and use the current adjustment target state signals to perform adjustment operations on the adjusted object, the output value of the adjusted object will be close to the ideal output value.

[0083] It can be understood that the determined current trimming target state signal can be used as a dual-mode trimming state signal output by a current trimming unit; therefore, for the current trimming target state signal, there is: the state of the current trimming target state signal is a trimming effective state or a trimming invalid state, wherein the trimming effective state means that an actual trimming operation can occur, and the trimming invalid state means that an actual trimming operation will not occur. The trimming state of the current trimming target state signal is generally related to the object controlled by the current trimming target state signal. For example, when the current trimming target state signal is used to control the conduction or shutdown of the NMOS tube to perform a trimming operation, the current trimming target state signal in a high-level state can control the NMOS tube to be in a conducting state. At this time, for the current trimming target state signal, when the current trimming target state signal is in a high-level state, it is a trimming effective state, otherwise, it is a trimming invalid state; other situations can be referred to the description here, and no examples are given one by one.

[0084] When the current trimming target state signal that each current trimming unit 3 should output is determined through the above pre-adjustment, the target trimming data corresponding to the current trimming target state signal can be determined at the same time. As can be seen from the above pre-adjustment, when the current trimming target state signal is at a high level, the target trimming data can be "1". The corresponding relationship between the current trimming state signal and the target trimming data can be selected and determined according to actual needs, and will not be listed here one by one. After determining the target trimming data, the target trimming data can be loaded into the current trimming main unit. At this time, the current trimming main unit can output the corresponding current trimming target state signal.

[0085] In a specific implementation, when the state of the current trimming target state signal is the trimming effective state, the polycrystalline fuse in the current trimming main unit is blown by a current blowing method based on the current trimming target state signal and the trimming enable signal in the effective state, so as to lock the current trimming target state signal output by the current trimming main unit after the polycrystalline fuse is blown. It can be understood that after the current trimming target state signal output by the current trimming main unit is locked, the current current trimming unit 3 output can be kept in the trimming effective state, such as Figure 1 In the embodiment, the corresponding NMOS tube can be kept turned on and driven.

[0086] It is understandable that when the state of the current trimming target state signal is the trimming invalid state, it is not necessary to lock the current trimming main unit to output the current trimming target state signal. At this time, the polycrystalline fuse in the current trimming main unit is still in an unblown state.

[0087] Since both the trimming object and the trimming circuit of the present invention may experience power outages, when power is restored after power outages, the output of each current trimming unit 3 should be maintained at the corresponding current trimming target state so as not to affect the working state of the trimmed object after trimming.

[0088] In order to control the output state of each current trimming unit 3 after it is powered on again, in one embodiment of the present invention, a trimming reset control signal generating unit is used to cooperate with the current trimming main unit. Specifically, the trimming reset control signal generating unit is used to generate a trimming reset control signal, and the output of the current trimming main unit can be configured as a corresponding current trimming target state signal, wherein the corresponding current trimming target state signal specifically refers to the trimming state signal determined by the current trimming main unit after pre-trim and post-trim. It can be understood that after the output of the current trimming main unit is configured as the corresponding current trimming target state signal, the trimming state of the trimming object currently being trimmed using the current trimming target state signal of the current current trimming unit can be maintained, such as Figure 1 In the embodiment of the present invention, the NMOS tube NM0 is kept in the on-driving state.

[0089] In one embodiment of the present invention, the current trimming main unit includes a DFF trigger, a polycrystalline fuse unit and a trimming reset unit, wherein:

[0090] The data terminal of the DFF trigger receives the pre-adjusted data or the target adjusted data, and the CLK terminal of the DFF trigger receives the clock signal CLK, so as to load the pre-adjusted data or the target adjusted data into the DFF trigger based on the clock signal CLK, wherein,

[0091] When the pre-trim data is loaded into the data terminal of the DFF flip-flop, a pre-trim status signal is generated through the Q terminal of the DFF flip-flop;

[0092] When the target trimming data is loaded into the data terminal of the DFF flip-flop, a current trimming target state signal is generated through the Q terminal of the DFF flip-flop;

[0093] The polycrystalline fuse is located in a polycrystalline fuse unit, and the polycrystalline fuse unit further includes a fuse current path unit adapted to be connected to the polycrystalline fuse, wherein:

[0094] The fuse current path unit receives the trimming enable signal and is connected to the Q terminal of the DFF trigger;

[0095] When the DFF trigger outputs a current trimming target state signal of a trimming effective state, and the trimming enable signal is also in an effective state, the fuse current path unit is driven to form an effective current path, and then the polycrystalline fuse is current-blown based on the fuse blowing voltage and the formed effective current path;

[0096] The trimming reset unit is adaptively connected to the poly fuse unit and the DFF trigger, generates a trimming reset control signal based on the trimming reset control signal generating unit, and configures the DFF trigger Q terminal to output a corresponding current trimming target state signal based on the received trimming reset control signal.

[0097] In order to receive the pre-adjustment data or the target adjustment data, the current adjustment main unit may include a DFF trigger. Figure 2 An embodiment of the current trimming main unit is shown in FIG. In the figure, DFF0 is a DFF trigger. The DFF trigger can adopt an existing commonly used form. The DFF trigger generally has a CLK terminal and a data terminal. The data terminal of the DFF trigger can receive pre-trim data or target trim data, and the CLK terminal receives a clock signal CLK. Figure 5 In the illustrated embodiment, pre-trim data or target trim data can be loaded into the DFF flip-flop via the rising edge of the clock signal CLK, after which a pre-trim state signal or a current trim target state signal can be obtained at the Q end of the DFF flip-flop.

[0098] The polycrystalline fuse should be located in the polycrystalline fuse unit. When the polycrystalline fuse is blown, the current trimming target state signal of the trimming effective state can be locked and output through the Q end of the DFF trigger. In order to meet the blowing of the polycrystalline fuse, the polycrystalline fuse is located in the polycrystalline fuse unit and is adaptively connected to the fuse current path unit, wherein the fuse current path unit receives the trimming enable signal and is connected to the Q end of the DFF trigger. In specific implementation, when the DFF trigger outputs the current trimming target state signal of the trimming effective state, and the trimming enable signal is also in the effective state, the fuse current path unit is configured based on the current trimming target state signal and the trimming enable signal to form an effective current path, and thereafter, the polycrystalline fuse is current-blown based on the fuse blowing voltage and the effective current path formed.

[0099] In order to achieve power-on reset, the current trimming main unit should also include a trimming reset unit, wherein the trimming reset unit is adaptively connected to the polycrystalline fuse unit and the DFF trigger, and generates a trimming reset control signal based on the trimming reset control signal generating unit, and configures the DFF trigger Q end to output a corresponding current trimming target state signal based on the received trimming reset control signal. Specifically, the DFF trigger Q end outputs a corresponding current trimming target state signal. For details, please refer to the corresponding description above and will not be repeated here.

[0100] In one embodiment of the present invention, when the current trimming target state signal in the trimming effective state is in the high level state, the current trimming target state signal in the trimming ineffective state is in the low level state, wherein:

[0101] When the trimming enable signal is low level effective, the fuse current path unit includes a NOR gate NOR0 and an NMOS transistor N0 connected to the output end of the NOR gate NOR0, wherein:

[0102] The Q end of the DFF trigger is connected to one end of the NOR gate NOR0 through the inverter INV0, and the trimming enable signal is connected to the other end of the NOR gate NOR0;

[0103] The source terminal of the NMOS tube N0 is grounded, the drain terminal of the NMOS tube N0 is connected to the first terminal of the polycrystalline fuse, and the second terminal of the polycrystalline fuse is connected to the fuse breaking voltage;

[0104] When the NMOS tube N0 is in the on state based on the current trimming target state signal in the trimming effective state and the trimming enable signal of the low level, an effective current path is formed based on the NMOS tube N0.

[0105] When the current trimming target state signal in the trimming effective state is in the high level state, the current trimming main unit can use Figure 2 The illustrated embodiment, Figure 2 In the embodiment, the low level is used as the effective state of the trimming enable signal. Specifically, when the trimming enable signal is at a low level and the trimming effective state of the current trimming target state signal is at a high level, a high level can be output through the output end of the NOR gate NOR0, and at this time, the NMOS tube N0 can be turned on. At this time, the polycrystalline fuse forms a path to the ground through the NMOS tube N0, that is, an effective current path is formed based on the NMOS tube N0.

[0106] Figure 2 In the figure, Rfuse-poly is the polycrystalline fuse, and ENB-PGM is the trimming enable signal. When the polycrystalline fuse is blown by current blowing using the effective current path, a fuse blowing voltage should also be applied to the second end of the polycrystalline fuse. Figure 2 In the figure, Vf is the fuse blowing voltage. After the effective current path is formed, the fuse blowing voltage forms a loop to the bottom through the polycrystalline fuse and the NMOS tube N0, and the current flows through the polycrystalline fuse. The polycrystalline fuse can be blown by the flowing current. In the specific implementation, the tube size of the NMOS tube N0 should be designed to be relatively large, so that a sufficiently large current can pass when the polycrystalline fuse is blown. The size of the NMOS tube N0 can be selected and determined according to actual needs, so as to meet the current blowing requirements of the polycrystalline fuse.

[0107] Depend on Figure 2As described above, when the current trimming target state signal output from the Q end of the DFF trigger is in the trimming invalid state, it becomes a high level after passing through the inverter INV0. At this time, even if the trimming enable signal is in the valid low level state, the output of the NOR gate NOR0 remains at a low level. At this time, the NMOS tube N0 remains in the disconnected state and cannot form an effective current path.

[0108] In one embodiment of the present invention, the trimming and resetting unit includes a level state detection unit and a reset position signal generating unit adaptively connected to the level state detection unit, wherein:

[0109] The trimming and resetting control signal is loaded into the level state detection unit, and the level state detection unit obtains a fuse level state signal representing the blown state of the poly-fuse based on the trimming and resetting control signal;

[0110] Based on the trimmed reset control signal and the fuse level status signal, the reset position signal generating unit generates a reset position signal loaded into the DFF trigger, wherein:

[0111] When the fuse level state signal indicates that the polycrystalline fuse is in a blown state, the Q end of the DFF trigger is configured to output a current trimming target state signal of a trimming effective state based on the reset position signal;

[0112] When the fuse level state signal indicates that the poly fuse is in an unblown state, the Q end of the DFF trigger is configured based on the reset position signal to output a current trimming target state signal of a trimming invalid state.

[0113] Figure 2 In the DFF trigger shown in FIG, the DFF trigger also includes a set terminal and a reset terminal. In the figure, SEB is the set terminal of the DFF trigger, and RSB is the reset terminal of the DFF trigger. In a specific implementation, the fuse level state signal can be obtained by using the level state detection state, and the fuse level state signal can be used to indicate whether the polycrystalline fuse is blown. Thereafter, based on the trimmed reset control signal and the fuse level state signal, the reset position signal generation unit can generate a reset position signal. In a specific implementation, the reset position signal may include a reset drive signal and a set drive signal. At this time, the reset drive signal is loaded to the reset terminal of the DFF trigger, and the set drive signal is loaded to the set terminal of the DFF trigger.

[0114] right Figure 2In the embodiment of the DFF trigger shown in the figure, the set terminal and the reset terminal of the DFF trigger are both valid at a low level, that is, a reset or set operation will be performed only when a low level is received. If the set drive signal loaded to the set terminal is a low level, the DFF trigger is set. At this time, the Q terminal of the DFF trigger can output a high level, and the Q terminal of the DFF trigger can be set to a current trimming target state signal in a trimming valid state. If the reset drive signal loaded to the reset terminal is a low level, the DFF trigger is reset. At this time, the Q terminal of the DFF trigger can output a low level, and the Q terminal of the DFF trigger can be configured as a current trimming target state signal in a trimming invalid state.

[0115] In one embodiment of the present invention, the trimming reset control signal includes a preload control signal RE-LOAD, a low level detection control signal CFG-N and a high level detection control signal CFG-P, wherein:

[0116] After the current trimming unit is powered on again, the high level detection control signal CFG-P and the low level detection control signal CFG-N are immediately in the valid level state, and the preload control signal RE-LOAD is delayed to enter the valid level state, so that the reset position signal generating unit outputs the reset position signal of the invalid state based on the preload control signal RE-LOAD that is delayed to enter the valid level state;

[0117] When the preload control signal RE-LOAD enters the valid level state, the level state detection unit generates a fuse level state signal based on the preload control signal RE-LOAD, the low level detection control signal CFG-N and the high level detection control signal CFG-P.

[0118] Specifically, the trimming reset control signal includes a preload control signal RE-LOAD, a low level detection control signal CFG-N and a high level detection control signal CFG-P. It can be understood that when the current trimming main unit is pre-trim and post-trim, the preload control signal RE-LOAD, the low level detection control signal CFG-N and the high level detection control signal CFG-P should all be in an invalid level state. When the current trimming unit is powered on again, the high level detection control signal CFG-P and the low level detection control signal CFG-N are immediately in a valid level state, and the preload control signal RE-LOAD is delayed to enter the valid level state.

[0119] In specific implementation, based on the preload control signal RE-LOAD that delays entering the effective level state, the reset position signal generating unit outputs the reset position signal of the invalid state, that is, the reset drive signal and the set drive signal are both in the invalid state. As can be seen from the above description, when the reset drive signal and the set drive signal of the invalid state are at a high level, the DFF trigger will neither be set nor reset. Using the reset position signal of the invalid state, the level state detection unit can be waited for to obtain the fuse level state signal.

[0120] When the preload control signal RE-LOAD enters the valid level state, the level state detection unit generates a fuse level state signal based on the preload control signal RE-LOAD, the low level detection control signal CFG-N and the high level detection control signal CFG-P. Thereafter, a corresponding reset drive signal and a set drive signal can be generated based on the fuse level state signal to improve the reliability of resetting or setting the DFF trigger.

[0121] In one embodiment of the present invention, when the preload control signal RE-LOAD and the low-level detection control signal CFG-N are high-level valid, and the high-level detection control signal CFG-P is low-level valid, the level state detection unit includes an NMOS tube N1, an NMOS tube N2 and a PMOS tube P0, the source end of the NMOS tube N2 is grounded, the drain end of the NMOS tube N2 is connected to the source end of the NMOS tube N1, the drain end of the NMOS tube N1 is connected to the drain end of the PMOS tube P0 and the reset position signal generating unit, the source end of the PMOS tube P0 is connected to the first end of the polycrystalline fuse,

[0122] The gate terminal of the NMOS tube N1 is connected to the low level detection control signal CFG-N, the gate terminal of the NMOS tube N2 is connected to the preload control signal RE-LOAD, and the gate terminal of the PMOS tube P0 is connected to the high level detection control signal CFG-P.

[0123] Figure 5 , a timing diagram of the preload control signal RE-LOAD, the low level detection control signal CFG-N and the high level detection control signal CFG-P when the dual-mode trimming circuit is working is shown in the figure. In the figure, when the current trimming main unit is pre-trimmed and post-trimmed, the high level detection control signal CFG-P is in a high level state, and the preload control signal RE-LOAD and the low level detection control signal CFG-N are in a low level state. In the figure, after the dual-mode trimming circuit is powered off, the preload control signal RE-LOAD, the low level detection control signal CFG-N and the high level detection control signal CFG-P are all in a low level.

[0124] After power is restored, the high level detection control signal CFG-P remains at a low level, while the low level detection control signal CFG-N immediately becomes a high level, and the preload control signal RE-LOAD enters a high level again after becoming a high level, that is, the preload control signal RE-LOAD is extended relative to the low level detection control signal CFG-N to enter a high level state.

[0125] Figure 2 An embodiment of the level state detection unit is shown in FIG. 1 . When the high-level detection control signal CFG-P is in a low-level state, the PMOS tube P0 is in a conducting state, and when the low-level detection control signal CFG-N is in a high-level state, the NMOS tube N2 is in a conducting state. When the preload control signal RE-LOAD is in a low-level state, the NMOS tube N1 is in a turned-off state, and when the preload control signal RE-LOAD is in a high-level state, the NMOS tube N1 is in a conducting state.

[0126] Further, by Figure 5 It can be seen that when the power is turned on again, the fuse blowing voltage should also be loaded to the second end of the polycrystalline fuse at the same time. When working normally, the fuse blowing voltage needs to be removed; in the power-on again stage, the voltage value of the melting point voltage can be lower than the voltage value in the polycrystalline fuse blowing stage. In addition, in the pre-adjustment stage, the fuse blowing voltage does not need to be added to the second end of the polycrystalline fuse. In the post-adjustment stage, the fuse blowing voltage should be loaded to the second end of the polycrystalline fuse.

[0127] It can be understood that when the NMOS tube N1, the NMOS tube N2 and the PMOS tube P0 are all turned on and the fuse level state signal is obtained, then: when the polycrystalline fuse is not blown, the drain end of the PMOS tube P0 forms a path to the ground through the NMOS tube N1 and the NMOS tube N2, and the voltage at the drain end of the PMOS tube P0 is 0 level; when the polycrystalline fuse is in a blown state, when the drain end of the PMOS tube P0 is pulled up to the fuse blown voltage by the fuse blown voltage, at this time, the voltage at the drain end of the PMOS tube P0 is a high level.

[0128] In one embodiment of the present invention, the reset signal generating unit includes a PMOS tube P1 and a Schmitt trigger, wherein:

[0129] The source terminal of the PMOS tube P1 is connected to the power supply VDD, the gate terminal of the PMOS tube P1 is connected to the preload control signal RE-LOAD, and is connected to one end of the NAND gate NAND0 and one end of the NAND gate NAND1, and the drain terminal of the PMOS tube P1 is connected to the drain terminal of the PMOS tube P0, the drain terminal of the NMOS tube N1 and the input terminal of the Schmitt trigger;

[0130] The output end of the Schmitt trigger is connected to the other end of the NAND gate NAND0 and the input end of the inverter INV1, and the output end of the inverter INV1 is connected to the other end of the NAND gate NAND1;

[0131] The output end of the NAND gate NAND0 is connected to the set end of the DFF flip-flop, and the output end of the NAND gate NAND1 is connected to the reset end of the DFF flip-flop.

[0132] Figure 2 An embodiment of a reset position signal generating unit is shown in the figure. In the figure, SMIT-TRIGO is a Schmitt trigger. The Schmitt trigger can adopt an existing commonly used form. The Schmitt trigger can be used to achieve level deburring.

[0133] Depend on Figure 2 It can be seen from the reset signal generating unit in that when the preload control signal RE-LOAD is in an invalid state of a low level, a high level is output through the NAND gate NAND0 and the NAND gate NAND1. At this time, the set drive signal at the set end of the DFF trigger is a high level, and the reset drive signal at the reset end of the DFF trigger is also a high level. It can be seen from the above description that the DFF trigger currently undergoes neither a set operation nor a reset operation.

[0134] When the preload control signal RE-LOAD is at a high level, the PMOS tube P1 is in an off state, and the input voltage of the Schmitt trigger is only related to the voltage at the drain terminal of the PMOS tube P0. If the voltage at the drain terminal of the PMOS tube P0 is at a high level, the set drive signal output by the NAND gate NAND0 is a low level signal, and the reset drive signal output by the NAND gate NAND1 is a high level. At this time, the DFF trigger is set, and the Q end of the DFF trigger is a current trimming target state signal of a trimming effective state; if the voltage at the drain terminal of the PMOS tube P0 is at a low level, the set drive signal output by the NAND gate NAND0 is a high level signal, and the reset drive signal output by the NAND gate NAND1 is a low level. At this time, the DFF trigger is reset, and the Q end of the DFF trigger is a current trimming target state signal of a trimming invalid state.

[0135] The above shows a method of configuring the output of the Q end of the DFF trigger as a current trimming target state signal after power is restored. Of course, other methods can also be used to reset or set the output of the DFF trigger Q. The specific method is based on whether the output of the Q end of the DFF trigger can be configured as the corresponding current trimming target state signal, and they are not listed here one by one.

[0136] In one embodiment of the present invention, the trimming reset control signal generating unit at least comprises a trimming reset control signal generating main circuit, wherein:

[0137] After the current trimming unit is powered on again, a high-level effective power-on reset control pulse PRO is loaded to the trimming reset control signal generating main circuit;

[0138] Based on the power-on reset control pulse PRO, the reset control signal generation main circuit generates a preload control signal RE-LOAD, a low level detection control signal CFG-N and a high level detection control signal CFG-P at the same time, wherein:

[0139] The trim reset control signal generating main circuit includes a high level detection control signal generating unit, a low level detection control signal generating unit and a preload control signal generating unit.

[0140] Based on the power-on reset control pulse PRO, the high-level detection control signal generating unit synchronously generates a high-level detection control signal CFG-P in a low-level state;

[0141] Based on the high level detection control signal CFG-P, the low level detection control signal generation unit synchronously generates a high level low level detection control signal CFG-N;

[0142] Based on the low-level detection control signal CFG-N, the preload control signal generation unit delays and generates a preload control signal RE-LOAD in a high-level state, wherein a rising edge of the high-level state of the preload control signal RE-LOAD is located behind a corresponding rising edge of the low-level detection control signal CFG-N, and a falling edge of the preload control signal RE-LOAD is located in front of a corresponding falling edge of the low-level detection control signal CFG-N.

[0143] Specifically, the trimming reset control signal at least utilizes the trimming reset control signal to generate a main circuit, Figure 1 In the figure, an embodiment of the trimming reset control signal generating unit including the power-on reset circuit 1 is also shown, that is, the trimming reset control signal generating unit may include the power-on reset circuit 1 and the trimming reset control signal generating main circuit. At this time, the power-on reset circuit 1 can be used to generate a power-on reset control pulse PRO. At this time, based on the power-on reset control pulse PRO, the trimming reset control signal generating main circuit simultaneously generates a preload control signal RE-LOAD, a low level detection control signal CFG-N and a high level detection control signal CFG-P.

[0144] Figure 5 In the embodiment shown in FIG. 1 , the power-on reset control pulse PRO is in a high level state only after power is turned on again, and is in a low level state in other stages. Figure 5In the example, the power supply VDD provides corresponding voltage except when the power supply is turned off and the voltage is 0. In addition, the clock signal CLK and the DATA of the data terminal of the DFF trigger are valid in the pre-adjustment and post-adjustment stages, and are low level at other times.

[0145] Figure 4 An embodiment of a main circuit for generating a trimming reset control signal is shown in FIG. Figure 4 In the embodiment, the high-level detection control signal generating unit includes an inverter INV2, an inverter INV3, an inverter INV4, a NOR gate NOR1, a capacitor C1, a capacitor C2 and a capacitor C3, wherein:

[0146] The input end of the inverter INV2 receives the power-on reset control pulse PRO, and the power-on reset control pulse PRO is also loaded to the first input end of the NOR gate NOR1;

[0147] The output end of the inverter INV2 is connected to one end of the capacitor C1 and the input end of the inverter INV3, the output end of the inverter INV3 is connected to one end of the capacitor C2 and the input end of the inverter INV4, and the output end of the inverter INV4 is connected to one end of the capacitor C3 and the second input end of the NOR gate NOR1;

[0148] The other end of the capacitor C1, the other end of the capacitor C2 and the other end of the capacitor C3 are all grounded;

[0149] The output terminal of the NOR gate NOR1 outputs a high level detection control signal CFG-P.

[0150] Figure 4 In the figure, the low-level detection control signal generating unit includes an inverter INV5, and the input end of the inverter INV5 is connected to the output end of the NOR gate NOR1, that is, the high-level detection control signal CFG-P can be reversed by using the inverter INV5, thereby, the level state of the low-level detection control signal CFG-N is opposite to the level state of the high-level detection control signal CFG-P.

[0151] Figure 5 When the power is turned on again, the corresponding effective state durations of the low level detection control signal CFG-N and the high level detection control signal CFG-P are both shorter than the high level effective time of the power-on reset control pulse PRO.

[0152] Figure 4 In the embodiment, the preload control signal generating unit includes an inverter INV6, an inverter INV7, an inverter INV8, an inverter INV9, a NOR gate NOR2, an inverter INV10, a capacitor C4 and a capacitor C5, wherein:

[0153] The output end of the inverter INV5 is connected to the input end of the inverter INV6, the input end of the inverter INV6 is connected to one end of the capacitor C3, the input end of the inverter INV7 and the input end of the inverter INV8, and the output end of the inverter IINV7 is connected to the first input end of the NOR gate NOR2;

[0154] The output end of the inverter INV8 is connected to one end of the capacitor C5 and one end of the inverter INV9, the output end of the inverter INV9 is connected to the second input end of the NOR gate NOR2, the output end of the NOR gate NOR2 is connected to the input end of the inverter INV10, and the preload control signal RE-LOAD is generated through the output end of the inverter INV10.

[0155] When the preload control signal generating section adopts the above-mentioned form, the effective time of the preload control signal RE-LOAD is shorter than the effective time of the low-level detection control signal CFG-N.

[0156] In one embodiment of the present invention, the dual-mode trimming unit further comprises a laser trimming unit 4 based on laser trimming, wherein:

[0157] The output end of the laser trimming unit 4 and the output end of the current trimming unit 3 are connected to the corresponding input ends of the trimming unit or gate.

[0158] Outputting a laser trimming target state signal through an output end of the laser trimming unit 4;

[0159] Based on the laser trimming target state signal and / or the current trimming target state signal, a dual-mode trimming state signal is output through the output end of the trimming unit or gate.

[0160] Figure 1 , an embodiment is shown in which each dual-mode trimming unit also includes a laser trimming unit 4. It can be understood that the laser trimming unit 4 can be laser trimmed. At this time, each dual-mode trimming unit can be current trimmed or laser trimmed. At this time, the dual-mode trimming is current trimming and laser trimming. The trimming form adopted by the dual-mode trimming unit can be selected according to needs to meet the actual application needs. Of course, the current trimming unit 3 can also be used for pre-trimming, and the laser trimming unit 4 can be post-trimmed. For example, when the current trimming target state signal is in the trimming effective state, the laser trimming unit 4 can be laser modified without using current to blow the polycrystalline fuse in the current trimming unit 3.

[0161] When the dual-mode trimming unit includes a laser trimming unit 4 and a current trimming unit 3, the laser trimming unit 4 and the current trimming unit 3 should be connected via a trimming unit OR gate. Figure 1 In the figure, OR0, OR1, and ORX are corresponding trimming unit OR gates.

[0162] It should be noted that, according to the trimming state of the laser trimming unit 4, the output end of the laser trimming unit 4 can output a laser trimming target state signal. The difference between the two is only the different trimming methods. The situation of the laser trimming target state signal can refer to the description of the above-mentioned current trimming target state signal, which will not be repeated here.

[0163] When there is only the current trimming unit 3 in the dual-mode trimming unit, the dual-mode trimming state signal can be generated based on the current trimming target state signal; when the dual-mode trimming unit has both the current trimming unit 3 and the laser trimming unit 4, the dual-mode trimming state signal is output through the output end of the trimming unit or gate based on the laser trimming target state signal and / or the current trimming target state signal. Generally, for a dual-mode trimming unit, the trimmed object is trimmed through the current trimming unit 3 or the laser trimming unit.

[0164] Figure 1 In the illustrated embodiment, when there are multiple dual-mode trimming units in the dual-mode trimming circuit, in order to load data, the current trimming unit 3 is configured into a cascade state, such as the output end of one current trimming unit 3 is connected to the data end of the DFF trigger in the next current trimming unit 3. At this time, serial loading of data can be achieved.

[0165] In one embodiment of the present invention, the laser trimming unit 4 includes a laser fuse, wherein:

[0166] The first end of the laser fuse is grounded, and the second end of the laser fuse is connected to the drain end of the PMOS tube P2, the gate end of the PMOS tube P2, the gate end of the PMOS tube P3, and the gate end of the NMOS tube N2;

[0167] The drain terminal of the PMOS tube P3 is connected to the gate terminal of the PMOS tube P4, the drain terminal of the NMOS tube N2, and the gate terminal of the NMOS tube N3.

[0168] The source terminals of the PMOS tube P2, the PMOS tube P3 and the PMOS tube P4 are all connected to the ground power supply VDD.

[0169] The source terminal of the NMOS tube N2 and the source terminal of the NMOS tube N3 are both grounded;

[0170] The drain terminal of the PMOS tube P4 and the drain terminal of the NMOS tube N4 are connected to each other to form an output terminal of the laser trimming unit.

[0171] Figure 3An embodiment of the laser trimming unit 4 is shown in FIG. The fuse Rfuse-tm is a laser fuse, which is generally made of a top layer of aluminum and can be trimmed by laser. In actual applications, the laser fuse is located around the chip and has a precise coordinate position. Therefore, the laser automatic burning program is written according to the coordinate position of the laser fuse, and the laser fuse to be fused is irradiated by laser to fuse it.

[0172] After the laser fuse is blown, Figure 3 Point A in the circuit is pulled up to a higher potential, and D-F2 is the output end of the laser trimming unit. When node A is pulled up, D-F2 outputs a high level; when the laser fuse is not blown, node A is pulled down to a lower potential, and D-F2 outputs a low level. The gate terminal and drain terminal of the PMOS tube P3 are short-circuited. The PMOS tube P3 is used as a pull-up resistor to reduce static current. The size of the PMOS tube P3 is designed to be relatively small, and the specific size is based on whether it can meet the requirements of being a pull-up resistor.

Claims

1. A pre-adjustable dual-mode trimming circuit, characterized in that: The dual-mode trimming circuit includes a plurality of dual-mode trimming units, and a dual-mode trimming unit is used to generate a corresponding dual-mode trimming state signal, wherein: The dual-mode trimming unit at least includes a current trimming unit based on current trimming, wherein the current trimming main unit includes a current trimming main unit and a trimming reset control signal generating unit adaptively connected to the current trimming main unit; When current trimming is performed based on the current trimming unit, pre-trimming is performed using the current trimming main unit first, and post-trimming is performed after the pre-trimming, wherein: During pre-adjustment, the pre-adjustment data is loaded into the current adjustment main unit, so that the current adjustment main unit generates a pre-adjustment state signal corresponding to the pre-adjustment data; Based on the pre-trim state signal generated by the pre-trim, determining the current trimming target state signal of the current trimming main unit during post-trim, wherein the state of the current trimming target state signal is a trimming effective state or a trimming invalid state; During post-adjustment, based on the current adjustment target state signal, the target adjustment data is loaded into the current adjustment main unit, and the current adjustment unit outputs the corresponding current adjustment target state signal, and a dual-mode adjustment state signal is formed based on the current adjustment target state signal, wherein: When the state of the current trimming target state signal is a trimming effective state, the polycrystalline fuse in the current trimming main unit is blown by a current blowing method based on the current trimming target state signal and the trimming enable signal in an effective state, so as to lock the current trimming target state signal output by the current trimming main unit after the polycrystalline fuse is blown; After the current trimming unit is powered on again, the trimming reset control signal generating unit is used to generate a trimming reset control signal, so that the current trimming main unit configures the generated trimming state signal as a corresponding current trimming target state signal under the trimming reset control signal.

2. The pre-adjustable dual-mode trimming circuit according to claim 1, characterized in that: The current trimming main unit includes a DFF trigger, a polycrystalline fuse unit and a trimming reset unit, wherein: The data terminal of the DFF trigger receives the pre-adjusted data or the target adjusted data, and the CLK terminal of the DFF trigger receives the clock signal CLK, so as to load the pre-adjusted data or the target adjusted data into the DFF trigger based on the clock signal CLK, wherein, When the pre-trim data is loaded into the data terminal of the DFF flip-flop, a pre-trim status signal is generated through the Q terminal of the DFF flip-flop; When the target trimming data is loaded into the data terminal of the DFF flip-flop, a current trimming target state signal is generated through the Q terminal of the DFF flip-flop; The polycrystalline fuse is located in a polycrystalline fuse unit, and the polycrystalline fuse unit further includes a fuse current path unit adapted to be connected to the polycrystalline fuse, wherein: The fuse current path unit receives the trimming enable signal and is connected to the Q terminal of the DFF trigger; When the DFF trigger outputs a current trimming target state signal of a trimming effective state, and the trimming enable signal is also in an effective state, the fuse current path unit is driven to form an effective current path, and then the polycrystalline fuse is current-blown based on the fuse blowing voltage and the formed effective current path; The trimming reset unit is adaptively connected to the poly fuse unit and the DFF trigger, generates a trimming reset control signal based on the trimming reset control signal generating unit, and configures the DFF trigger Q terminal to output a corresponding current trimming target state signal based on the received trimming reset control signal.

3. The pre-adjustable dual-mode trimming circuit according to claim 2, characterized in that: When the current trimming target state signal in the effective state is in the high level state, the current trimming target state signal in the trimming invalid state is in the low level state, wherein, When the trimming enable signal is low level effective, the fuse current path unit includes a NOR gate NOR0 and an NMOS transistor N0 connected to the output end of the NOR gate NOR0, wherein: The Q end of the DFF trigger is connected to one end of the NOR gate NOR0 through the inverter INV0, and the trimming enable signal is connected to the other end of the NOR gate NOR0; The source terminal of the NMOS tube N0 is grounded, the drain terminal of the NMOS tube N0 is connected to the first terminal of the polycrystalline fuse, and the second terminal of the polycrystalline fuse is connected to the fuse breaking voltage; When the NMOS tube N0 is in the on state based on the current trimming target state signal in the trimming effective state and the trimming enable signal of the low level, an effective current path is formed based on the NMOS tube N0.

4. The pre-adjustable dual-mode trimming circuit according to claim 2, characterized in that: The trimming and resetting unit includes a level state detection unit and a reset position signal generating unit adaptively connected to the level state detection unit, wherein: The trimming and resetting control signal is loaded into the level state detection unit, and the level state detection unit obtains a fuse level state signal representing the blown state of the poly-fuse based on the trimming and resetting control signal; Based on the trimmed reset control signal and the fuse level status signal, the reset position signal generating unit generates a reset position signal loaded into the DFF trigger, wherein: When the fuse level state signal indicates that the poly-crystal fuse is in a blown state, the Q end of the DFF trigger is configured to output a current trimming target state signal of a trimming effective state based on the reset position signal; When the fuse level state signal indicates that the poly fuse is in an unblown state, the Q end of the DFF trigger is configured based on the reset position signal to output a current trimming target state signal of a trimming invalid state.

5. The pre-adjustable dual-mode trimming circuit according to claim 4, characterized in that: The trimming reset control signal includes a preload control signal RE-LOAD, a low level detection control signal CFG-N and a high level detection control signal CFG-P, wherein: After the current trimming unit is powered on again, the high level detection control signal CFG-P and the low level detection control signal CFG-N are immediately in the valid level state, and the preload control signal RE-LOAD is delayed to enter the valid level state, so that the reset position signal generating unit outputs the reset position signal of the invalid state based on the preload control signal RE-LOAD that is delayed to enter the valid level state; When the preload control signal RE-LOAD enters the valid level state, the level state detection unit generates a fuse level state signal based on the preload control signal RE-LOAD, the low level detection control signal CFG-N and the high level detection control signal CFG-P.

6. The pre-adjustable dual-mode trimming circuit according to claim 5, characterized in that: When the preload control signal RE-LOAD and the low level detection control signal CFG-N are high level valid, and the high level detection control signal CFG-P is low level valid, the level state detection unit includes an NMOS tube N1, an NMOS tube N2 and a PMOS tube P0, the source end of the NMOS tube N2 is grounded, the drain end of the NMOS tube N2 is connected to the source end of the NMOS tube N1, the drain end of the NMOS tube N1 is connected to the drain end of the PMOS tube P0 and the reset position signal generating unit, and the source end of the PMOS tube P0 is connected to the first end of the polycrystalline fuse. The gate terminal of the NMOS tube N1 is connected to the low level detection control signal CFG-N, the gate terminal of the NMOS tube N2 is connected to the preload control signal RE-LOAD, and the gate terminal of the PMOS tube P0 is connected to the high level detection control signal CFG-P.

7. The pre-adjustable dual-mode trimming circuit according to claim 6, characterized in that: The reset signal generating unit includes a PMOS tube P1 and a Schmitt trigger, wherein: The source terminal of the PMOS tube P1 is connected to the power supply VDD, the gate terminal of the PMOS tube P1 is connected to the preload control signal RE-LOAD, and is connected to one end of the NAND gate NAND0 and one end of the NAND gate NAND1, and the drain terminal of the PMOS tube P1 is connected to the drain terminal of the PMOS tube P0, the drain terminal of the NMOS tube N1 and the input terminal of the Schmitt trigger; The output end of the Schmitt trigger is connected to the other end of the NAND gate NAND0 and the input end of the inverter INV1, and the output end of the inverter INV1 is connected to the other end of the NAND gate NAND1; The output end of the NAND gate NAND0 is connected to the set end of the DFF flip-flop, and the output end of the NAND gate NAND1 is connected to the reset end of the DFF flip-flop.

8. The pre-adjustable dual-mode trimming circuit according to claim 6, characterized in that: The trimming reset control signal generating unit at least comprises a trimming reset control signal generating main circuit, wherein: After the current trimming unit is powered on again, a high-level effective power-on reset control pulse PRO is loaded to the trimming reset control signal generating main circuit; Based on the power-on reset control pulse PRO, the reset control signal generation main circuit generates a preload control signal RE-LOAD, a low level detection control signal CFG-N and a high level detection control signal CFG-P at the same time, wherein: The trim reset control signal generating main circuit includes a high level detection control signal generating unit, a low level detection control signal generating unit and a preload control signal generating unit. Based on the power-on reset control pulse PRO, the high-level detection control signal generating unit synchronously generates a high-level detection control signal CFG-P in a low-level state; Based on the high level detection control signal CFG-P, the low level detection control signal generation unit synchronously generates a high level low level detection control signal CFG-N; Based on the low-level detection control signal CFG-N, the preload control signal generation unit delays and generates a preload control signal RE-LOAD in a high-level state, wherein a rising edge of the high-level state of the preload control signal RE-LOAD is located behind a corresponding rising edge of the low-level detection control signal CFG-N, and a falling edge of the preload control signal RE-LOAD is located in front of a corresponding falling edge of the low-level detection control signal CFG-N.

9. The pre-adjustable dual-mode trimming circuit according to any one of claims 1 to 8, characterized in that: The dual-mode trimming unit also includes a laser trimming unit based on laser trimming, wherein: The output end of the laser trimming unit and the output end of the current trimming unit are connected to the corresponding input end of the trimming unit or gate. Outputting a laser trimming target state signal through an output end of the laser trimming unit; Based on the laser trimming target state signal and / or the current trimming target state signal, a dual-mode trimming state signal is output through the output end of the trimming unit or gate.

10. The pre-adjustable dual-mode trimming circuit according to claim 9, characterized in that: The laser trimming unit includes a laser fuse, wherein: The first end of the laser fuse is grounded, and the second end of the laser fuse is connected to the drain end of the PMOS tube P2, the gate end of the PMOS tube P2, the gate end of the PMOS tube P3, and the gate end of the NMOS tube N2; The drain terminal of the PMOS tube P3 is connected to the gate terminal of the PMOS tube P4, the drain terminal of the NMOS tube N2, and the gate terminal of the NMOS tube N3. The source terminals of the PMOS tube P2, the PMOS tube P3 and the PMOS tube P4 are all connected to the ground power supply VDD. The source terminal of the NMOS tube N2 and the source terminal of the NMOS tube N3 are both grounded; The drain terminal of the PMOS tube P4 and the drain terminal of the NMOS tube N4 are connected to each other to form an output terminal of the laser trimming unit.

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