A passivation layer structure and manufacturing method thereof
By using high radio frequency power and auxiliary gas H2 in plasma enhanced chemical vapor deposition method, Si impurities are suppressed from cracking in SiH4, which solves the problem of reduced intermolecular force of SiO2 and prone to cracking of the passivation layer, and improves device performance.
Patent Information
- Application Number
- CN202411970402.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-04-04
AI Technical Summary
In the prior art, Si impurities cause the reduction of SiO2 intermolecular forces, the passivation layer is prone to cracking, and the device performance is reduced.
Plasma enhanced chemical vapor deposition method is used to directly participate in the reaction with O2 at a radio frequency power of no less than 500W, inhibit SiH4 from cleavage to generate Si impurities, and auxiliary gas H2 is introduced into the reaction chamber to further inhibit SiH4 cleavage.
The adhesion of the SiO2 passivation layer is improved, the device performance is reduced, and the device stability and reliability are enhanced.
Smart Images
Figure CN119764160A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of semiconductors and relates to a passivation layer structure and a manufacturing method thereof. Background Art
[0002] In semiconductor devices, the passivation layer provides protection for the device on the one hand, and reduces the surface energy state density of the device on the other hand, which has an important impact on the stability and reliability of the device.
[0003] Silicon oxide is a commonly used passivation layer material, and the silicon oxide layer is usually formed by plasma enhanced chemical vapor deposition. Figure 1 As shown in FIG. 1 , it is a schematic diagram showing the change of RF power when silicon oxide is formed. After the reaction gases SiH4 and O2 are introduced into the reaction chamber and the pressure is stabilized, the RF is turned on, and a low-power heat engine is first performed, and then a high-power silicon oxide is deposited. When the low power is performed, a small amount of silicon oxide will be formed, and more SiH4 will be cracked at low power to produce Si impurities. When the high power is performed, SiH4 will directly participate in the reaction with O2 to form silicon oxide; Figure 2 As shown, the silicon oxide formed at low power is recorded as the first silicon oxide layer 01, and the silicon oxide formed at high power is recorded as the second silicon oxide layer 02. Since SiH4 decomposes to produce Si impurities at low power, the first silicon oxide layer 01 is a Si-rich oxide layer (Si-rich OX). The Si impurities will reduce the intermolecular force between the first silicon oxide layer 01 and the second silicon oxide layer 02, resulting in poor adhesion, which is easy to crack at the interface of the first silicon oxide layer 01 and the second silicon oxide layer 02, thereby reducing device performance. Summary of the invention
[0004] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a passivation layer structure and a method for manufacturing the same, so as to solve the problem in the prior art that Si impurities cause reduced intermolecular forces of SiO2 and easy cracking of the passivation layer.
[0005] To achieve the above-mentioned object and other related objects, the present invention provides a method for manufacturing a passivation layer structure, comprising the following steps:
[0006] Providing a substrate, and placing the substrate in a reaction chamber;
[0007] A reaction gas and an auxiliary gas are introduced into the reaction chamber, wherein the reaction gas includes SiH4 and O2, and the auxiliary gas includes H2, and a first passivation layer is formed on the substrate by plasma enhanced chemical vapor deposition, wherein the material of the first passivation layer includes silicon oxide;
[0008] The radio frequency is turned on, and the SiH4 and the O2 are excited into a plasma state and reacted at a target radio frequency power of not less than 500 W to form the first passivation layer, and the H2 is used to inhibit the decomposition of the SiH4.
[0009] Optionally, the target radio frequency power has a power range of 500W to 1200W.
[0010] Optionally, after the radio frequency is turned on, in the process of the radio frequency power increasing from 0 W to the target radio frequency power, the time for the radio frequency power to increase from 0 W to 200 W does not exceed 0.5 seconds.
[0011] Optionally, the flow rate range of the SiH4 is 1 to 500 sccm, the flow rate range of the O2 is 0 to 1000 sccm, and the flow rate range of the H2 is 0 to 300 sccm.
[0012] Optionally, after forming the first passivation layer, the method further includes introducing an inert gas into the reaction chamber to discharge deposition by-products.
[0013] Optionally, after forming the first passivation layer, the method further includes forming a second passivation layer on the first passivation layer, wherein the second passivation layer is made of silicon nitride.
[0014] Optionally, the base comprises a semiconductor substrate and a patterned metal layer located on the semiconductor substrate, wherein gaps in the patterned metal layer are filled with a dielectric layer.
[0015] Optionally, the number of the patterned metal layers is multiple layers, and adjacent patterned metal layers are electrically connected via conductive through-holes.
[0016] The present invention also provides a passivation layer structure, and the passivation layer structure is manufactured by the above-mentioned passivation layer structure manufacturing method.
[0017] As described above, in the passivation layer structure and the manufacturing method thereof of the present invention, high power is used to allow SiH4 to directly participate in the reaction with O2, thereby inhibiting the cracking of SiH4 to generate Si impurities and improving the adhesion of the SiO2 passivation layer; and, an auxiliary gas H2 is introduced into the reaction chamber to further inhibit the cracking of SiH4 to generate Si impurities and improve device performance. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 Shown is a schematic diagram of the change in RF power when forming silicon oxide.
[0019] Figure 2 A schematic diagram showing the cleavage of the first silicon oxide layer and the second silicon oxide layer at the interface.
[0020] Figure 3 Shown is a flow chart of a method for manufacturing a passivation layer structure in an embodiment of the present invention.
[0021] Figure 4 Shown is a schematic diagram of providing a substrate in an embodiment of the present invention.
[0022] Figure 5 It is a schematic diagram showing the formation of a first passivation layer in an embodiment of the present invention.
[0023] Figure 6 It is a schematic diagram showing the change of radio frequency power when forming the first passivation layer in an embodiment of the present invention.
[0024] Figure 7 It is a schematic diagram showing the formation of a second passivation layer in an embodiment of the present invention.
[0025] Component number description
[0026] 01 First silicon oxide layer
[0027] 02 Second silicon oxide layer
[0028] 1 Base
[0029] 100 Semiconductor Substrate
[0030] DETAILED DESCRIPTION
[0031] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0032] See also Figures 3 to 7 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0033] This embodiment provides a method for manufacturing a passivation layer structure. Figure 3 , including the following steps:
[0034] S1: providing a substrate, and placing the substrate in a reaction chamber;
[0035] S2: introducing reaction gas and auxiliary gas into the reaction chamber, wherein the reaction gas includes SiH4 and O2, and the auxiliary gas includes H2, and forming a first passivation layer on the substrate by plasma enhanced chemical vapor deposition, wherein the material of the first passivation layer includes silicon oxide.
[0036] In the method for manufacturing the passivation layer structure of the present embodiment, high power is used to allow SiH4 to directly react with O2, thereby suppressing the cracking of SiH4 to generate Si impurities and improving the adhesion of the SiO2 passivation layer; and, an auxiliary gas H2 is introduced into the reaction chamber to further suppress the cracking of SiH4 to generate Si impurities and improve device performance.
[0037] The method for manufacturing the passivation layer structure of this embodiment is described in detail below with reference to the specific drawings.
[0038] First, see Figure 4 , perform step S1: provide a substrate 1, and place the substrate 1 in a reaction chamber.
[0039] As an example, the base 1 includes a semiconductor substrate 100 and a patterned metal layer 101 located on the semiconductor substrate 100 , wherein the gaps in the patterned metal layer 101 are filled with a dielectric layer 102 .
[0040] As an example, the semiconductor substrate 100 can be any suitable semiconductor substrate, for example, it can be a silicon (Si) substrate, a germanium (Ge) substrate, a silicon germanium (SiGe) substrate, a gallium arsenide (GaAs) substrate, a silicon carbide (SiC) substrate, a gallium nitride (GaN) substrate, a diamond substrate or a silicon on insulator (SOI) substrate, etc., and can be selected according to needs.
[0041] As an example, the semiconductor substrate 100 has functional regions such as a well region, a source region, a drain region, and a channel region of the device formed therein. Ion implantation, diffusion, and other processes may be used to form the functional regions required by the device, and the process is selected according to the needs.
[0042] As an example, the semiconductor substrate 100 is usually divided into a plurality of cell regions, and adjacent cell regions are isolated by a shallow trench isolation structure (Shallow Trench Isolation, STI for short).
[0043] As an example, a gate structure 103 (planar gate) of the device is formed on the semiconductor substrate 100, and the gate structure 103 includes a gate dielectric layer 104 and a polysilicon gate 105 stacked from bottom to top; in another example, a trench is provided in the semiconductor substrate 100, and a gate structure (trench gate) of the device is formed in the trench, which is selected according to needs.
[0044] As an example, the patterned metal layer 101 is used to electrically lead out the source region, drain region and gate structure of the device. The patterned metal layer 101 is usually multi-layered, and adjacent patterned metal layers 101 are electrically connected through conductive vias, and the bottom layer of the patterned metal layer 101 is electrically connected to the source region, drain region and gate structure of the device through conductive vias; the material of the patterned metal layer 101 includes one or more conductive materials such as copper (Cu), gold (Au), platinum (Pt), silver (Ag), aluminum (Al), nickel (Ni), titanium (Ti), zinc (Zn), titanium nitride (TiN), etc., which are selected according to needs.
[0045] As an example, the dielectric layer 102 is filled in the gaps between the patterned metal layers 101 and between adjacent patterned metal layers 101. The material of the dielectric layer 102 includes insulating materials such as silicon oxide (SiO2), silicon nitride (SiN), borophosphosilicate glass (BPSG), and phosphosilicate glass (PSG), which are selected according to needs. Specifically, in this embodiment, the material of the dielectric layer 102 is silicon oxide.
[0046] Next, see Figure 5 , executing step S2: introducing reaction gas and auxiliary gas into the reaction chamber, the reaction gas includes SiH4 and O2, the auxiliary gas includes H2, and using plasma enhanced chemical vapor deposition to form a first passivation layer 2 on the substrate 1, the material of the first passivation layer 2 includes silicon oxide.
[0047] As an example, in the process of forming the first passivation layer 2 by plasma enhanced chemical vapor deposition (PECVD), the radio frequency is turned on, and the SiH4 and O2 are excited to a plasma state at a target radio frequency power of not less than 500W, and then a chemical reaction occurs to generate SiO2.
[0048] As an example, the first passivation layer 2 covers the topmost patterned metal layer 101 , and covers the dielectric layer 102 at the gap between the topmost patterned metal layer 101 .
[0049] As an example, as shown in Formula 1, the heat of reaction of SiH4 and O2 to form SiO2 is 362 kcal / mol.
[0050] SiH4+2O2→SiO2+2H2O, ΔH=-362kcal / mol······(1)
[0051] As an example, as shown in Equation 2, the heat of reaction of cracking SiH4 to produce Si and H2 is 8.2 kcal / mol.
[0052] SiH4→Si+2H2, ΔH=-8.2kcal / mol······(2)
[0053] Specifically, at low power, SiH4 will decompose to generate a large amount of Si, making the generated SiO2 rich in Si (Si-rich SiO2), and the Si impurities in SiO2 will reduce the intermolecular force between SiO2 and SiO2, resulting in poor adhesion, causing the first passivation layer 2 to crack; and in the present application, when generating the first passivation layer 2, a high power of not less than 500W is used. At high power, SiH4 directly participates in the reaction with O2 to generate SiO2, so as to reduce the Si impurities in SiO2 and improve the adhesion between SiO2 and SiO2.
[0054] As an example, in this embodiment, the power range of the target RF power is 500W to 1200W, for example, it can be 500W, 600W, 700W, 800W, 900W, 1000W, 1100W, 1200W, etc., and is selected according to needs. The greater the target RF power, the smaller the probability of SiH4 cracking to generate Si impurities.
[0055] As an example, see Figure 6 , turn on the radio frequency, when the SiH4 and the O2 are excited to a plasma state in the target radio frequency power, the time t for the radio frequency power to increase from 0 W to 200 W does not exceed 0.5 s; when the radio frequency power is below 200 W, SiH4 is prone to cracking, and by setting the time t for the radio frequency power to increase from 0 W to 200 W to not more than 0.5 s, the radio frequency power is quickly increased to the required high power, thereby avoiding the cracking of SiH4 at low power to produce Si impurities.
[0056] As an example, even at high power, a small amount of SiH4 will be cracked to generate Si and H2. By introducing auxiliary gas H2 into the reaction chamber to increase the H2 content in the reaction chamber, it is possible to further suppress the cracking of SiH4 to generate Si impurities.
[0057] As an example, the flow rate range of SiH4 is 1 to 500 sccm, the flow rate range of O2 is 1 to 1000 sccm, and the flow rate range of H2 is 1 to 300 sccm, which are selected according to needs.
[0058] As an example, after forming the first passivation layer 2, the step of introducing an inert gas into the reaction chamber is also included to discharge deposition by-products and prevent the deposition by-products from accumulating in the reaction chamber and affecting subsequent process steps and device performance; specifically, the inert gas introduced includes Ar, He, etc., which is selected according to needs.
[0059] As an example, see Figure 7 After forming the first passivation layer 2, the method further includes forming a second passivation layer 3 on the first passivation layer 2, wherein the material of the second passivation layer 3 is silicon nitride.
[0060] As an example, the passivation layer of the device is composed of SiO2 of the first passivation layer 2 and SiN of the second passivation layer 3. SiO2 as the lower layer structure can reduce stress, and SiN as the upper layer structure can provide better mechanical protection and chemical stability.
[0061] As an example, in another example, after forming the second passivation layer 3, a step of forming openings in the second passivation layer 3 and the first passivation layer 2 is also included, wherein the openings expose the topmost patterned metal layer 101 to form a source pad, a drain pad, a gate pad, etc. of the device.
[0062] This embodiment further provides a passivation layer structure, and the passivation layer structure is manufactured by the above-mentioned method for manufacturing the passivation layer structure.
[0063] In summary, in the passivation layer structure and manufacturing method of the present invention, high power is used to make SiH4 directly participate in the reaction with O2, inhibiting the cracking of SiH4 to generate Si impurities, and improving the adhesion of the SiO2 passivation layer; and, the auxiliary gas H2 is introduced into the reaction chamber to further inhibit the cracking of SiH4 to generate Si impurities, thereby improving the device performance. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.
[0064] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.
Claims
1. A method for manufacturing a passivation layer structure, characterized in that: The following steps are involved: Providing a substrate, and placing the substrate in a reaction chamber; A reaction gas and an auxiliary gas are introduced into the reaction chamber, wherein the reaction gas includes SiH4 and O2, and the auxiliary gas includes H2, and a first passivation layer is formed on the substrate by plasma enhanced chemical vapor deposition, wherein the material of the first passivation layer includes silicon oxide; The radio frequency is turned on, and the SiH4 and the O2 are excited into a plasma state and reacted at a target radio frequency power of not less than 500 W to form the first passivation layer, and the H2 is used to inhibit the decomposition of the SiH4.
2. The method for manufacturing a passivation layer structure according to claim 1, characterized in that: The target radio frequency power ranges from 500W to 1200W.
3. The method for manufacturing a passivation layer structure according to claim 2, characterized in that: After the radio frequency is turned on, in the process of the radio frequency power increasing from 0 W to the target radio frequency power, the time for the radio frequency power to increase from 0 W to 200 W does not exceed 0.5 seconds.
4. The method for manufacturing a passivation layer structure according to claim 1, characterized in that: The flow rate of SiH4 is in the range of 1 to 500 sccm, the flow rate of O2 is in the range of 1 to 1000 sccm, and the flow rate of H2 is in the range of 1 to 300 sccm.
5. The method for manufacturing a passivation layer structure according to claim 1, characterized in that: After forming the first passivation layer, the method further includes introducing an inert gas into the reaction chamber to discharge deposition byproducts.
6. The method for manufacturing a passivation layer structure according to claim 1, characterized in that: After forming the first passivation layer, the method further includes forming a second passivation layer on the first passivation layer, wherein the second passivation layer is made of silicon nitride.
7. The method for manufacturing a passivation layer structure according to claim 1, characterized in that: The base comprises a semiconductor substrate and a patterned metal layer located on the semiconductor substrate, wherein the gaps in the patterned metal layer are filled with a dielectric layer.
8. The method for manufacturing a passivation layer structure according to claim 7, characterized in that: The number of the patterned metal layers is multiple layers, and adjacent patterned metal layers are electrically connected via conductive through-holes.
9. A passivation layer structure, characterized in that: The passivation layer structure is manufactured by the method for manufacturing a passivation layer structure according to any one of claims 1 to 8.