A backflow prevention protection circuit

Abstract

The present invention provides an anti-backfeed protection circuit, comprising: a power supply, a startup module, a reference module, a comparison module, an anti-backfeed module, and an acquisition module; the anti-backfeed module comprises a first MOS transistor, a second MOS transistor, a third MOS transistor, a transistor, and a voltage-stabilizing diode; the drain of the first MOS transistor is connected to the power supply, the source of the first MOS transistor is connected to the source of the second MOS transistor, the drain of the second MOS transistor is connected to the negative electrode of the voltage-stabilizing diode, the gate of the first MOS transistor is respectively connected to the gate of the second MOS transistor, the positive electrode of the voltage-stabilizing diode, and the collector of the transistor, and together serve as the output end of the anti-backfeed module and are connected to the acquisition module; the base of the transistor is connected to the gate of the third MOS transistor and serves as the input end of the anti-backfeed module and is connected to the comparison module. The present invention has low power consumption, low heat dissipation, stable reference voltage, fast response speed, and strong noise resistance.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor technology, in particular to a reverse flow protection circuit. BACKGROUND

[0002] At present, the metal oxide semiconductor field effect transistor (MOSFET) is basically used to realize the reverse connection protection function of the high-power direct current switching power supply. The commonly used MOSFET realizes the reverse connection protection circuit. In the normal input condition, the MOSFET is turned on, and the on-resistance of the MOSFET is very small, and the loss is very small, so that the circuit can work normally. When the input is reversed, the MOSFET cannot be turned on, which effectively prevents the reverse connection of the circuit. However, in the normal working condition, if the input short circuit fault suddenly occurs, the input capacitor will be quickly discharged through the input terminal, causing the current to flow back.

[0003] The reverse flow protection circuit is commonly used to prevent the output current from flowing back to damage the power supply. The direct current output reverse flow protection circuit in the prior art realizes the reverse flow protection through a diode, and the circuit is as follows Figure 1 The direct current positive electrode is connected with the positive electrode of the diode D1, the negative electrode of the diode D1 is connected with the direct current output positive electrode. And the direct current output negative electrode is directly connected with the negative electrode of C1. Since the diode D1 can only flow in one direction, that is, the output current can only flow from the positive electrode of C1, through the positive electrode of D1, through the negative electrode of D1, and then flow to the direct current output positive electrode, and then flow to the direct current output negative electrode after passing through the electrical equipment, forming a loop. That is, a diode is connected in series in the output loop, which can prevent the current from flowing back.

[0004] However, when the output current is large, the power loss of the diode D1 is large, which results in the problem that the diode has large heat dissipation and it is difficult to dissipate heat, thereby the overall circuit has poor noise immunity. SUMMARY

[0005] The present application provides a reverse flow protection circuit, which aims to solve the problem of large heat dissipation and difficult heat dissipation of the existing power supply circuit, thereby the overall circuit has poor noise immunity.

[0006] The present application provides a reverse flow protection circuit, which includes a power supply, a starting module, a reference module, a comparison module, a reverse flow protection module and a collection module. The power supply is used to supply power to the starting module, the reference module, the comparison module, the reverse flow protection module and the collection module. The starting module is electrically connected with the reference module, the comparison module, the reverse flow protection module and the collection module in sequence, and the output end of the collection module is used to output to the load.

[0007] The anti-reflux module comprises a first MOS tube, a second MOS tube, a third MOS tube, a triode and a voltage stabilizing diode; the drain of the first MOS tube is connected to the power supply, the source of the first MOS tube is connected to the source of the second MOS tube, the drain of the second MOS tube is connected to the negative electrode of the voltage stabilizing diode, the gate of the first MOS tube is connected to the gate of the second MOS tube, the positive electrode of the voltage stabilizing diode and the collector of the triode respectively and is connected to the acquisition module as the output end of the anti-reflux module; the base of the triode is connected to the gate of the third MOS tube and is connected to the comparison module as the input end of the anti-reflux module; the emitter of the triode is grounded, and the source and the drain of the third MOS tube are grounded respectively.

[0008] Preferably, the starting module comprises a fourth MOS tube, a fifth MOS tube and a sixth MOS tube;

[0009] The source of the fourth MOS tube is connected to the power supply as the input end of the starting module, and the gate of the fourth MOS tube is used for connecting the output voltage of the reference module; the drain of the fourth MOS tube is connected to the drain of the fifth MOS tube and the gate of the fifth MOS tube respectively, the gate of the fifth MOS tube is also connected to the gate of the sixth MOS tube, the source of the fifth MOS tube and the source of the sixth MOS tube are grounded respectively; and the drain of the sixth MOS tube is connected to the input end of the reference module as the output end of the starting module.

[0010] Preferably, the reference module comprises a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube and a first resistor;

[0011] The source of the seventh MOS tube and the source of the eighth MOS tube are connected to the power supply respectively; the gate of the seventh MOS tube is connected to the gate of the eighth MOS tube, the drain of the sixth MOS tube and the drain of the eighth MOS tube respectively; the gate of the seventh MOS tube is also connected to the input end of the reference module; the drain of the seventh MOS tube is connected to the drain of the ninth MOS tube and the gate of the ninth MOS tube respectively, the gate of the ninth MOS tube is also connected to the gate of the tenth MOS tube, the drain of the tenth MOS tube is connected to the drain of the eighth MOS tube and is connected to the output end of the reference module; the source of the ninth MOS tube is grounded, and the source of the tenth MOS tube is connected to the first resistor and then grounded.

[0012] Preferably, the comparison module comprises an eleventh MOS tube, a twelfth MOS tube, a thirteenth MOS tube, a fourteenth MOS tube and a fifteenth MOS tube;

[0013] The source of the eleventh MOS is connected with the source of the twelfth MOS and is connected to the power supply; the gate of the eleventh MOS is connected with the gate of the twelfth MOS and the drain of the thirteenth MOS respectively, the drain of the eleventh MOS is connected with the drain of the thirteenth MOS, the gate of the thirteenth MOS is connected to the drain of the eighth MOS as the input of the comparison module; the source of the thirteenth MOS is connected with the source of the fourteenth MOS and the drain of the fifteenth MOS respectively, the gate of the fifteenth MOS is connected with the drain of the eighth MOS; the source of the fifteenth MOS is grounded; the drain of the fourteenth MOS is connected with the drain of the twelfth MOS and is the output of the comparison module, the gate of the fourteenth MOS is used to be connected to the acquisition module.

[0014] Preferably, the acquisition module comprises a sixteenth MOS, a second resistor, a third resistor and a fourth resistor.

[0015] The gate of the sixteenth MOS is connected with the first end of the fourth resistor and the anode of the voltage stabilizing diode respectively, the drain of the sixteenth MOS is connected with the second end of the fourth resistor and the cathode of the voltage stabilizing diode respectively; the source of the sixteenth MOS is connected with the first end of the third resistor, the second end of the third resistor is connected with the gate of the fourteenth MOS and the first end of the second resistor respectively, the second end of the second resistor is grounded; the drain of the sixteenth MOS and the second end of the second resistor are used to be connected to the load respectively.

[0016] Preferably, the first MOS and the second MOS are both PMOS.

[0017] Preferably, the third MOS is NMOS.

[0018] Compared with the prior art, the present application has the beneficial effect that by using a power supply to supply power to a starting module, a reference module, a comparison module, an anti-reflux module and a collection module respectively, the starting module is electrically connected to the reference module, the comparison module, the anti-reflux module and the collection module in sequence, the output end of the collection module is used to output to a load, the drain electrode of a first MOS tube of the anti-reflux module is connected to the power supply, the source electrode of the first MOS tube is connected to the source electrode of a second MOS tube, the drain electrode of the second MOS tube is connected to the negative electrode of a voltage stabilizing diode, the gate electrode of the first MOS tube is connected to the gate electrode of the second MOS tube, the positive electrode of the voltage stabilizing diode and the collector electrode of a triode respectively and is connected to the collection module as an output end of the anti-reflux module, the base electrode of the triode is connected to the gate electrode of a third MOS tube and is connected to the comparison module as an input end of the anti-reflux module, the emitter electrode of the triode is grounded, and the source electrode and the drain electrode of the third MOS tube are grounded respectively, so that the circuit has low power consumption and low heat dissipation, the reference voltage is stable, the response speed is fast, and the anti-noise capability is strong. BRIEF DESCRIPTION OF DRAWINGS

[0019] The present application will be described in detail below with reference to the drawings. The above or other aspects of the present application will become more apparent and more readily appreciated by referring to the following detailed description, taken in conjunction with the accompanying drawings, in which:

[0020] Figure 1 is a circuit diagram of a direct current output anti-reflux control circuit in the prior art;

[0021] Figure 2 is a module diagram of an anti-reflux protection circuit provided by the embodiment of the present application;

[0022] Figure 3 is a circuit diagram of an anti-reflux protection circuit provided by the embodiment of the present application.

[0023] In the figure, 1 is a starting module, 2 is a reference module, 3 is a comparison module, 4 is an anti-reflux module, 5 is a collection module, and 6 is a load. DETAILED DESCRIPTION

[0024] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and do not limit the present application.

[0025] In combination with the Figures 2-3As shown, the embodiment of the present application provides an anti-reflux protection circuit, comprising: a power supply VCC, a starting module 1, a reference module 2, a comparison module 3, an anti-reflux module 4 and an acquisition module 5; the power supply VCC is used for supplying power for the starting module 1, the reference module 2, the comparison module 3, the anti-reflux module 4 and the acquisition module 5 respectively; the starting module 1 is electrically connected with the reference module 2, the comparison module 3, the anti-reflux module 4 and the acquisition module 5 in sequence, and an output end of the acquisition module 5 is used for outputting to a load 6.

[0026] The anti-reflux module 4 comprises a first MOS tube M1, a second MOS tube M2, a third MOS tube M3, a triode Q1 and a voltage stabilizing diode D1; a drain of the first MOS tube M1 is connected with the power supply VCC, a source of the first MOS tube M1 is connected with a source of the second MOS tube M2, a drain of the second MOS tube M2 is connected with a negative electrode of the voltage stabilizing diode D1, a gate of the first MOS tube M1 is connected with a gate of the second MOS tube M2, a positive electrode of the voltage stabilizing diode D1 and a collector of the triode Q1 respectively and is connected with the acquisition module 5 as an output end of the anti-reflux module 4; a base of the triode Q1 is connected with a gate of the third MOS tube M3 and is connected with the comparison module 3 as an input end of the anti-reflux module 4; an emitter of the triode Q1 is grounded, and a source and a drain of the third MOS tube M3 are grounded respectively.

[0027] Specifically, the anti-reflux module 4 composed of the first MOS tube M1, the second MOS tube M2, the third MOS tube M3, the triode Q1 and the voltage stabilizing diode D1 is used for preventing the load 6 from being damaged due to overlarge voltage. The drain and the source of the third MOS tube M3 are grounded, the gate is connected with point c and is used as a capacitor to prevent the influence of instantaneous voltage fluctuation of point c on the triode Q1, causing false triggering. The base of the triode Q1 is connected with point c, the emitter is grounded, and the collector of the triode Q1 is connected with the gates of the first MOS tube M1 and the second MOS tube M2; the first MOS tube M1 is reversely connected in the circuit, the drain is connected with the power supply VCC, the source of the first MOS tube M1 is connected with the source of the second MOS tube M2, and the source of the first MOS tube M1 and the source of the second MOS tube M2 are reversely connected to reduce the influence of MOS tube body diode on the circuit. The voltage stabilizing diode D1 is used for protecting the first MOS tube M1. The third MOS tube M3 is an NMOS tube. The overall circuit has small power consumption, low heat dissipation, stable reference voltage, fast response speed and strong anti-noise capability.

[0028] In the embodiment, the starting module 1 comprises a fourth MOS transistor M4, a fifth MOS transistor M5 and a sixth MOS transistor M6; the source of the fourth MOS transistor M4 is connected to the power supply VCC as the input of the starting module 1, the gate of the fourth MOS transistor M4 is used for connecting the output voltage of the reference module 2; the drain of the fourth MOS transistor M4 is connected to the drain of the fifth MOS transistor M5 and the gate of the fifth MOS transistor M5 respectively, the gate of the fifth MOS transistor M5 is also connected to the gate of the sixth MOS transistor M6, the source of the fifth MOS transistor M5 and the source of the sixth MOS transistor M6 are grounded respectively; the drain of the sixth MOS transistor M6 is connected to the input of the reference module 2 as the output of the starting module 1.

[0029] In the embodiment, the reference module 2 comprises a seventh MOS transistor M7, an eighth MOS transistor M8, a ninth MOS transistor M9, a tenth MOS transistor M10 and a first resistor R1; the source of the seventh MOS transistor M7 and the source of the eighth MOS transistor M8 are connected to the power supply VCC respectively; the gate of the seventh MOS transistor M7 is connected to the gate of the eighth MOS transistor M8, the drain of the sixth MOS transistor M6 and the drain of the eighth MOS transistor M8 respectively; the gate of the seventh MOS transistor M7 is also used as the input of the reference module 2; the drain of the seventh MOS transistor M7 is connected to the drain of the ninth MOS transistor M9 and the gate of the ninth MOS transistor M9 respectively, the gate of the ninth MOS transistor M9 is also connected to the gate of the tenth MOS transistor M10, the drain of the tenth MOS transistor M10 is connected to the drain of the eighth MOS transistor M8 and used as the output of the reference module 2; the source of the ninth MOS transistor M9 is grounded, and the source of the tenth MOS transistor M10 is connected to the first resistor R1 and then grounded.

[0030] In the embodiment, the comparison module 3 comprises an eleventh MOS transistor M11, a twelfth MOS transistor M12, a thirteenth MOS transistor M13, a fourteenth MOS transistor M14 and a fifteenth MOS transistor M15; the source of the eleventh MOS transistor M11 is connected with the source of the twelfth MOS transistor M12 and connected to the power supply VCC; the gate of the eleventh MOS transistor M11 is connected with the gate of the twelfth MOS transistor M12 and the drain of the thirteenth MOS transistor M13 respectively, the drain of the eleventh MOS transistor M11 is connected with the drain of the thirteenth MOS transistor M13, and the gate of the thirteenth MOS transistor M13 is connected to the drain of the eighth MOS transistor M8 as the input of the comparison module 3; the source of the thirteenth MOS transistor M13 is connected with the source of the fourteenth MOS transistor M14 and the drain of the fifteenth MOS transistor M15 respectively, and the gate of the fifteenth MOS transistor M15 is connected to the drain of the eighth MOS transistor M8; the source of the fifteenth MOS transistor M15 is grounded; the drain of the fourteenth MOS transistor M14 is connected with the drain of the twelfth MOS transistor M12 and serves as the output of the comparison module 3, and the gate of the fourteenth MOS transistor M14 is connected to the acquisition module 5.

[0031] In the embodiment, the acquisition module 5 comprises a sixteenth MOS transistor M16, a second resistor R2, a third resistor R3 and a fourth resistor R4; the gate of the sixteenth MOS transistor M16 is connected with the first end of the fourth resistor R4 and the anode of the voltage stabilizing diode D1 respectively, and the drain of the sixteenth MOS transistor M16 is connected with the second end of the fourth resistor R4 and the cathode of the voltage stabilizing diode D1 respectively; the source of the sixteenth MOS transistor M16 is connected with the first end of the third resistor R3, the second end of the third resistor R3 is connected with the gate of the fourteenth MOS transistor M14 and the first end of the second resistor R2 respectively, and the second end of the second resistor R2 is grounded; the drain of the sixteenth MOS transistor M16 and the second end of the second resistor R2 are connected to the load 6.

[0032] Specifically, the second resistor R2, the third resistor R3, the fourth resistor R4 and the sixteenth MOS transistor M16 of the NMOS transistor constitute the acquisition module 5, acquire the e-point voltage Ve and transmit to the gate of the fourteenth MOS transistor M14 of the NMOS transistor of the comparison module 3; when no current backflow occurs, i.e. in normal state, the d-point voltage Vd is low, the sixteenth MOS transistor M16 is in the closed state, and the e-point voltage is low; when the current backflow occurs, the current backflows to the d-point through the fourth resistor R4, the d-point voltage rises, and the sixteenth MOS transistor M16 is opened; the e-point voltage is Ve ＝ R2*Vload / (R3+R2)……(1), from the above formula, it can be seen that the voltage of the load 6 rises, and the e-point voltage Ve also rises.

[0033] The fourth MOS transistor M4 of the PMOS transistor and the fifth MOS transistor M5 and the sixth MOS transistor M6 of the NMOS transistor constitute a starting module 1, the gate of the fourth MOS transistor M4 of the starting module 1 is connected to the point b of the reference module 2 and is driven by Vb, and the drain of the sixth MOS transistor M6 is connected to the point a.

[0034] The ninth MOS transistor M9 and the tenth MOS transistor M10 of the NMOS transistor, the seventh MOS transistor M7 and the eighth MOS transistor M8 of the PMOS transistor and the first resistor R1 constitute a reference module 2, the width-length ratio of the ninth MOS transistor M9 and the tenth MOS transistor M10 is the same, the width-length ratio of the seventh MOS transistor and the eighth MOS transistor is the same, and the output voltage V b of the reference module 2 is equal to 2(R1+r O10 ) / u n C ox (W / L)7R1R1……(2), from the above formula, the output voltage Vb of the point b is a fixed value and is not affected by the power supply VCC. Among them, ro10 represents the equivalent internal resistance of the tenth MOS transistor M10, un represents the electron mobility, Cox represents the MOS transistor gate oxide layer capacitance, and W / L represents the width-length ratio of the MOS transistor.

[0035] The thirteenth MOS transistor M13, the fourteenth MOS transistor M14 and the fifteenth MOS transistor M15 of the NMOS transistor and the eleventh MOS transistor M11 and the twelfth MOS transistor M12 of the PMOS transistor constitute a comparison module 3, which is a differential amplification circuit and can amplify and output the difference between the gate voltage Ve of the fourteenth MOS transistor M14 and the gate voltage Vb of the thirteenth MOS transistor M13 from the point c; the voltage of the point c is V c = g m14 (r O14 / / r O12 )(V b -V e )……(3), from the above formula, the voltage Ve of the point e is raised, and the voltage Vc of the point c is lowered. Among them, gm14 represents the transconductance of the fourteenth MOS transistor M14, ro14 represents the equivalent internal resistance of the fourteenth MOS transistor M14, and ro12 represents the equivalent internal resistance of the twelfth MOS transistor M12.

[0036] When the voltage of the load 6 is normal, the voltage e of the sampling module is low at this time, the output voltage Vd of the reference module 2 is fixed, from formula (3), the voltage of the point c is high at this time, the first tertiary tube Q1 is turned on, the voltage of the point d is low, the first MOS transistor M1 and the second MOS transistor M2 are turned on, the sixteenth MOS transistor M16 is turned off, and the VCC voltage provides voltage for the load 6 through the first MOS transistor M1 and the second MOS transistor M2.

[0037] When the load 6 voltage is too high, the current back-irrigation through the fourth resistor R4 back-irrigates to the d point, the d point voltage also rises, the sixteenth MOS tube M16 is turned on, the e point voltage rises, the reference module 2 output voltage Vd is unchanged, according to formula (3), the comparison module 3 output voltage c point voltage Vc drops, the triode Q1 is closed, the first MOS tube M1 and the second MOS tube M2 are both turned off, VCC does not provide voltage for the load 6, and the load 6 voltage is discharged to the ground through the sixteenth MOS tube M16, the second resistor R2 and the third resistor R3. When the load 6 voltage is discharged, the circuit returns to normal, and the power supply VCC supplies power to the load 6 circuit. Thus, the overall power consumption of the circuit is small, the heat dissipation is low, the reference voltage is stable, the response speed is fast, and the anti-noise ability is strong.

[0038] It should be noted that in this document, the terms "comprising", "including", or any other variant thereof are intended to cover a non-exclusive inclusion, such that a process, article, or apparatus that comprises a list of elements does not include only those elements recited, but can also include other elements not expressly listed or inherent to such process, article, or apparatus. Without more limitations, an element defined by the phrase "comprising a" does not exclude the existence of additional identical elements in the process, article, or apparatus that includes the element.

[0039] The embodiments of the present application are described above in conjunction with the drawings, and the disclosed are only the preferred embodiments of the present application, but the present application is not limited to the above specific embodiments, and the above specific embodiments are only illustrative, not restrictive, and those skilled in the art can make many equivalent changes without departing from the purpose of the present application and the scope of the claims, which are all within the protection of the present application.

Claims

1. An anti-backfeed protection circuit, characterized in that: include: Power supply, startup module, reference module, comparison module, anti-backflow module and acquisition module; The power supply is used to respectively power the starting module, the reference module, the comparison module, the anti-backflow module, and the acquisition module; the starting module is electrically connected to the reference module, the comparison module, the anti-backflow module, and the acquisition module in sequence, and the output end of the acquisition module is used to output to a load; The anti-backflow module includes a first MOS transistor, a second MOS transistor, a third MOS transistor, a transistor and a voltage-stabilizing diode; the drain of the first MOS transistor is connected to the power supply, the source of the first MOS transistor is connected to the source of the second MOS transistor, the drain of the second MOS transistor is connected to the cathode of the voltage-stabilizing diode, the gate of the first MOS transistor is respectively connected to the gate of the second MOS transistor, the anode of the voltage-stabilizing diode and the collector of the transistor, and together serve as the output end of the anti-backflow module and are connected to the acquisition module; the base of the transistor is connected to the gate of the third MOS transistor and is connected to the comparison module as the input end of the anti-backflow module; the emitter of the transistor is grounded, and the source and drain of the third MOS transistor are respectively grounded; The startup module includes a fourth MOS transistor, a fifth MOS transistor and a sixth MOS transistor; The source of the fourth MOS transistor is connected to the power supply as the input end of the startup module, and the gate of the fourth MOS transistor is used to connect to the output voltage of the reference module; the drain of the fourth MOS transistor is respectively connected to the drain and the gate of the fifth MOS transistor, and the gate of the fifth MOS transistor is also connected to the gate of the sixth MOS transistor. The source of the fifth MOS transistor and the source of the sixth MOS transistor are respectively grounded; the drain of the sixth MOS transistor is connected to the input end of the reference module as the output end of the startup module.

2. The anti-backfeed protection circuit according to claim 1, wherein: The reference module includes a seventh MOS transistor, an eighth MOS transistor, a ninth MOS transistor, a tenth MOS transistor and a first resistor; The source of the seventh MOS transistor and the source of the eighth MOS transistor are respectively connected to the power supply; the gate of the seventh MOS transistor is respectively connected to the gate of the eighth MOS transistor, the drain of the sixth MOS transistor, and the drain of the eighth MOS transistor; the gate of the seventh MOS transistor also serves as the input end of the reference module; the drain of the seventh MOS transistor is respectively connected to the drain of the ninth MOS transistor and the gate of the ninth MOS transistor, the gate of the ninth MOS transistor is also connected to the gate of the tenth MOS transistor, the drain of the tenth MOS transistor is connected to the drain of the eighth MOS transistor and serves as the output end of the reference module; the source of the ninth MOS transistor is grounded, and the source of the tenth MOS transistor is connected to the first resistor and then to ground.

3. The anti-backfeed protection circuit according to claim 2, wherein: The comparison module includes an eleventh MOS transistor, a twelfth MOS transistor, a thirteenth MOS transistor, a fourteenth MOS transistor and a fifteenth MOS transistor; The source of the eleventh MOS transistor is connected to the source of the twelfth MOS transistor and to the power supply; the gate of the eleventh MOS transistor is respectively connected to the gate of the twelfth MOS transistor and the drain of the thirteenth MOS transistor, the drain of the eleventh MOS transistor is connected to the drain of the thirteenth MOS transistor, and the gate of the thirteenth MOS transistor is connected to the drain of the eighth MOS transistor as the input end of the comparison module; the source of the thirteenth MOS transistor is respectively connected to the source of the fourteenth MOS transistor and the drain of the fifteenth MOS transistor, and the gate of the fifteenth MOS transistor is connected to the drain of the eighth MOS transistor; the source of the fifteenth MOS transistor is grounded; the drain of the fourteenth MOS transistor is connected to the drain of the twelfth MOS transistor and serves as the output end of the comparison module, and the gate of the fourteenth MOS transistor is used to be connected to the acquisition module.

4. The anti-backfeed protection circuit according to claim 3, wherein: The acquisition module includes a sixteenth MOS tube, a second resistor, a third resistor and a fourth resistor; The gate of the sixteenth MOS transistor is respectively connected to the first end of the fourth resistor and the anode of the voltage-stabilizing diode, and the drain of the sixteenth MOS transistor is respectively connected to the second end of the fourth resistor and the cathode of the voltage-stabilizing diode; the source of the sixteenth MOS transistor is connected to the first end of the third resistor, the second end of the third resistor is respectively connected to the gate of the fourteenth MOS transistor and the first end of the second resistor, and the second end of the second resistor is grounded; the drain of the sixteenth MOS transistor and the second end of the second resistor are respectively used to be connected to the load.

5. The anti-backfeed protection circuit according to claim 1, wherein: The first MOS transistor and the second MOS transistor are both PMOS transistors.

6. The anti-backfeed protection circuit according to claim 1, wherein: The third MOS transistor is an NMOS transistor.

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