A non-through active auxiliary full-range soft-switching inverter

Abstract

The present invention discloses a non-through active auxiliary full-range soft-switching inverter, which includes a DC voltage module, a power-frequency voltage commutation parallel resonant energy storage capacitor bridge arm connected to the DC voltage module and used for outputting a power-frequency AC square wave; a high-frequency SPWM modulation lag switch bridge arm connected to the power-frequency voltage commutation parallel resonant energy storage capacitor bridge arm and used for performing SPWM modulation on the power-frequency AC square wave voltage to output a high-frequency square wave; a filter network connected to the power-frequency voltage commutation parallel resonant energy storage capacitor bridge arm and the high-frequency SPWM modulation lag switch bridge arm and used for filtering the high-frequency square wave output by the high-frequency SPWM modulation lag switch bridge arm to obtain an output voltage; and a high-frequency auxiliary switch and junction capacitance energy storage and release network connected to the DC voltage module and the high-frequency SPWM modulation lag switch bridge arm and used for realizing soft switching of high-frequency switching tubes.

Description

Technical Field

[0001] The present invention relates to the technical field of power generation and transformation, and particularly to a non-through active auxiliary full-range soft-switching inverter. Background Art

[0002] With the rapid development of new energy grid-connected power generation, electric vehicles, and aerospace, inverters are increasingly widely used, and the requirements for high-frequency and miniaturization of inverters are also rapidly increasing. However, using high-frequency switches to miniaturize inverters will cause problems of increased losses. The above problems seriously hinder the improvement of the power density of inverters. Exploring new topologies and increasing the switching frequency by using soft-switching technology are the main solutions. Adopting a soft-switching scheme can improve the power density and solve the problems of large switching losses and electromagnetic interference EMI. Traditional full-bridge inverters have problems such as switch tube through-conduction and large switching losses, which reduce the stability and conversion efficiency of the inverter. Avoiding arm through-conduction by setting a dead time will restrict the high-frequency operation of the inverter and is not conducive to improving the power density of the inverter. Summary of the Invention

[0003] Technical Objective: Aiming at the defects in the prior art, the present invention discloses a non-through active auxiliary full-range soft-switching inverter. The control method is unipolar modulation. By controlling the leading conduction time of the auxiliary switch tube, full-range soft-switching of all high-frequency switch tubes is achieved, and the purpose of high efficiency, high power density, and high reliability is achieved on the premise of ensuring the working reliability of the inverter.

[0004] Technical Solution: To achieve the above technical objective, the present invention adopts the following technical solutions.

[0005] A non-through active auxiliary full-range soft-switching inverter includes:

[0006] A DC voltage module, including a positive output terminal and a negative output terminal, for providing an input voltage for the inverter;

[0007] A power-frequency voltage commutation parallel resonance energy storage capacitor arm, connected to the DC voltage module, including a power-frequency switch arm composed of two power-frequency switch tubes; for outputting a power-frequency AC square wave in the case of single-power input;

[0008] A high-frequency SPWM modulation lag switch arm, connected to the power-frequency voltage commutation parallel resonance energy storage capacitor arm, including a high-frequency switch arm composed of two high-frequency switch tubes, for performing SPWM modulation on the power-frequency AC square wave voltage output by the power-frequency voltage commutation parallel resonance energy storage capacitor arm, and outputting a high-frequency square wave after unipolar modulation;

[0009] A filtering network, connected to the power frequency voltage commutation parallel resonance energy storage capacitor arm and the high-frequency SPWM modulation lag switch arm, is used to filter the high-frequency square wave output by the high-frequency SPWM modulation lag switch arm to obtain the output voltage;

[0010] The high-frequency auxiliary switch and the junction capacitance energy storage and release network, connected to the DC voltage module and the high-frequency SPWM modulation lag switch arm, are used to achieve soft switching of the high-frequency switching tube.

[0011] Beneficial effects:

[0012] (1) The full-range soft-switching inverter control method proposed by the present invention has no dead-time limit, improving the reliability of the inverter operation.

[0013] (2) By controlling the leading conduction time of the auxiliary switching tubes, the third high-frequency switching tube S3 and the fourth high-frequency switching tube S4, the present invention provides the hardware circuit conditions for soft turn-on and soft turn-off of all switching tubes. The proposed active auxiliary network circuit structure of the present invention is simple, which is beneficial to improving the inverter efficiency and reducing losses while ensuring the reliability of the inverter. Description of the drawings

[0014] Figure 1 It is a structural topology diagram of a non-through active auxiliary full-range soft-switching inverter according to an embodiment of the present invention;

[0015] Figure 2 It is a timing diagram of drive signals, switching tube voltages and currents, energy storage capacitor voltages, resonant inductor currents, junction capacitance voltages, and filter inductor currents under SPWM leading conduction control of a non-through active auxiliary full-range soft-switching inverter according to an embodiment of the present invention;

[0016] Figures 3 to 10 It is a first-stage modal diagram of a non-through active auxiliary full-range soft-switching inverter according to an embodiment of the present invention;

[0017] Figures 11 to 18 It is a second-stage modal diagram of a non-through active auxiliary full-range soft-switching inverter according to an embodiment of the present invention;

[0018] Figures 19 to 26 It is a third-stage modal diagram of a non-through active auxiliary full-range soft-switching inverter according to an embodiment of the present invention;

[0019] Figures 27 to 34 It is a fourth-stage modal diagram of a non-through active auxiliary full-range soft-switching inverter according to an embodiment of the present invention. Detailed implementation manners

[0020] To enable those skilled in the art to better understand the solution of this application, the following will clearly and completely describe the technical solution in the embodiments of this application in combination with the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of this application.

[0021] The present invention proposes a non-through active auxiliary full-range soft-switching inverter. All its high-frequency switching tubes do not need to set dead zones. The energy of the switching tube junction capacitance is reduced to zero before each conduction of the switching tube to achieve full-range soft switching, reducing the switching loss of the switching tube. On this basis, the active auxiliary switching control method is simple.

[0022] As shown in the attached Figure 1 figures, a non-through active auxiliary full-range soft-switching inverter in this embodiment includes: a DC voltage module 1, a power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm 2, a filter network 3, a high-frequency SPWM modulation lag switch bridge arm 4, and a high-frequency auxiliary switch and junction capacitance energy storage and release network 5;

[0023] The DC voltage module 1 includes a positive output terminal and a negative output terminal, and is used to provide the input voltage U for the inverter i ;

[0024] The power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm 2 is connected to the DC voltage module 1 and includes a power-frequency switch bridge arm composed of two power-frequency switching tubes; it is used to output a power-frequency AC square wave under the condition of single-power supply input, realizing bipolar output and the energy storage and release direction change of the junction capacitance of the high-frequency switching tubes;

[0025] The power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm 2 includes a first power-frequency switching tube Q1 and a second power-frequency switching tube Q2. The drain of the first power-frequency switching tube Q1 is connected to the positive output terminal of the DC voltage module 1, that is, the positive pole of the input voltage U i . The drain of the first power-frequency switching tube Q1 serves as the first output terminal of the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm 2. The source of the first power-frequency switching tube Q1 is connected to the drain of the second power-frequency switching tube Q2. The midpoint of the resonance energy storage capacitors C1 and C2 is connected to the drain of the third high-frequency switching tube S3. The source of the second power-frequency switching tube Q2 is connected to the negative output terminal of the DC voltage module 1; the source of the second power-frequency switching tube Q2 serves as the second output terminal of the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm 2. The first output terminal and the second output terminal of the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm 2 output a power-frequency AC square wave;

[0026] The high-frequency SPWM modulation lagging switching bridge arm 4 is connected to the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm 2. It includes a high-frequency switching bridge arm composed of two high-frequency switching tubes, which is used to perform SPWM modulation on the power-frequency AC square wave voltage output by the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm 2, and outputs a high-frequency square wave after unipolar modulation. The switching tubes of the high-frequency SPWM modulation lagging switching bridge arm lag behind those of the high-frequency auxiliary switch and the junction capacitance energy storage and release network. Among them, the first high-frequency switching tube S1 lags behind the third high-frequency switching tube S3 in conduction; the second high-frequency switching tube S2 lags behind the fourth high-frequency switching tube S4 in conduction.

[0027] The high-frequency SPWM modulation lagging switching bridge arm 4 includes a first high-frequency switching tube S1 and a second high-frequency switching tube S2. The drain of the first high-frequency switching tube S1 serves as the first input terminal of the high-frequency SPWM modulation lagging switching bridge arm 4 and is connected to the first output terminal of the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm 2, that is, the drain of the first power-frequency switching tube Q1. The source of the first high-frequency switching tube S1 is connected to the drain of the second high-frequency switching tube S2, and the connection point is the midpoint of the high-frequency SPWM modulation lagging switching bridge arm 4 and also serves as the first output terminal of the high-frequency SPWM modulation lagging switching bridge arm 4. The source of the second high-frequency switching tube S2 serves as the second input terminal of the high-frequency SPWM modulation lagging switching bridge arm 4 and is connected to the second output terminal of the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm 2, that is, the source of the second power-frequency switching tube Q2. The equivalent junction capacitance of the first high-frequency switching tube S1 is the first switching tube equivalent junction capacitance C S1 , and the equivalent junction capacitance of the second high-frequency switching tube S2 is the second switching tube equivalent junction capacitance C S2 ; the cathode of the body diode D S1 of the first high-frequency switching tube S1 is connected to the positive output terminal of the DC voltage module 1, that is, the positive pole of the input voltage U i , and the anode of the body diode D S1 is connected to the drain of the second high-frequency switching tube S2, one end of the filter inductor L, and the high-frequency auxiliary switch and the junction capacitance energy storage and release network. The cathode of the body diode D S2 of the second high-frequency switching tube S2 is connected to one end of the filter inductor L and the high-frequency auxiliary switch and the junction capacitance energy storage and release network. The anode of the body diode D S2 of the second high-frequency switching tube S2 is connected to the negative output terminal of the DC voltage module 1, that is, the negative pole of the input voltage U i .

[0028] The filter network 3 is connected to the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm 2 and the high-frequency SPWM modulation lagging switching bridge arm 4, and is used to filter the high-frequency square wave output by the high-frequency SPWM modulation lagging switching bridge arm 4 to obtain the output voltage U o .

[0029] The filtering network 3 includes a filtering inductor L and a filtering capacitor C; one end of the filtering inductor L serves as the input end of the filtering network 3 and is connected to the first output end of the high-frequency SPWM modulation lagging switch bridge arm 4, the other end of the filtering inductor L is connected to one end of the filtering capacitor C, and the other end of the filtering capacitor C serves as the output end of the filtering network 3 and is connected to the first input end of the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm 2; both ends of the filtering capacitor C serve as the output ends of the inverter, and the output voltage is denoted as U o ;

[0030] The high-frequency auxiliary switch and the junction capacitance energy storage and release network 5 are connected to the DC voltage module 1 and the high-frequency SPWM modulation lagging switch bridge arm 4, and are used to realize the soft switching of the high-frequency switching tubes;

[0031] The high-frequency auxiliary switch and the junction capacitance energy storage and release network 5 include a third high-frequency switching tube S3, a fourth high-frequency switching tube S4, a resonance inductor L r , a resonance energy storage capacitor C1, and a resonance energy storage capacitor C2; one end of the resonance inductor L r serves as the third connection end of the high-frequency auxiliary switch and the junction capacitance energy storage and release network and is connected to the midpoint of the high-frequency SPWM modulation lagging switch bridge arm 4; the other end of the resonance inductor L r is connected to the drain of the fourth high-frequency switching tube S4, the source of the fourth high-frequency switching tube S4 is connected to the source of the third high-frequency switching tube S3, and the drain of the third high-frequency switching tube S3 is connected to the midpoint of the series-connected resonance energy storage capacitors C1 and C2; one end of the series-connected resonance energy storage capacitors C1 and C2 serves as the first connection end of the high-frequency auxiliary switch and the junction capacitance energy storage and release network and is connected to the positive output end of the DC voltage module 1, and the other end of the series-connected resonance energy storage capacitors C1 and C2 serves as the second connection end of the high-frequency auxiliary switch and the junction capacitance energy storage and release network and is connected to the negative output end of the DC voltage module 1;

[0032] In the high-frequency auxiliary switch and the junction capacitance energy storage and release network 5, C1 and C2 are used to store and release the junction capacitance energy of the main high-frequency switching tubes: realizing the soft switching of the first high-frequency switching tube S1, the second high-frequency switching tube S2, the third high-frequency switching tube S3, and the fourth high-frequency switching tube S4. The high-frequency auxiliary switch and the junction capacitance energy storage and release network 5 are used to control the third high-frequency switching tube S3 and the fourth high-frequency switching tube S4 to conduct and turn off ahead of the high-frequency SPWM modulation lagging switch bridge arm, so as to realize that when the main switches S1 and S2 of the high-frequency SPWM modulation are conducting, the junction capacitance energy between their drains and sources is released to zero.

[0033] The gates of the first high-frequency switching tube S1, the second high-frequency switching tube S2, the third high-frequency switching tube S3, and the fourth high-frequency switching tube S4 are connected to the SPWM signals.

[0034] In the present invention, the first power frequency switch tube, the first high-frequency switch tube, and the third high-frequency switch tube constitute the voltage output path for the positive half cycle of the inverter; the second power frequency switch tube, the second high-frequency switch tube, and the fourth high-frequency switch tube constitute the voltage output path for the negative half cycle of the inverter.

[0035] In the present invention, through the SPWM control mode in which the third high-frequency switch tube S3 and the fourth high-frequency switch tube S4 conduct ahead of the first high-frequency switch tube S1 and the second high-frequency switch tube S2, by transferring the energy of the junction capacitance of the high-frequency switch tubes to the energy storage capacitors C1 and C2, soft switching of all high-frequency switch tubes is achieved. During the positive half cycle of the output voltage, the first power frequency switch tube Q1 and the second high-frequency switch tube S2 are normally closed, the second power frequency switch tube Q2 and the third high-frequency switch tube S3 are normally on, and the first high-frequency switch tube S1 and the third high-frequency switch tube S3 perform high-frequency switching; during the negative half cycle, the second power frequency switch tube Q2 and the first high-frequency switch tube S1 are normally closed, the first power frequency switch tube Q1 and the third high-frequency switch tube S3 are normally on, and the second high-frequency switch tube S2 and the fourth high-frequency switch tube S4 perform high-frequency switching. Below, taking the ideal signal waveform Figure 2 , mode Figures 3 - 10 , Figures 11 - 18 , Figures 19 - 26 , Figures 27 - 34 , the working principle and the four-stage working mode of the soft-switching inverter of the present invention are specifically analyzed. Among them, in the first stage, the output voltage is greater than zero and the output current is greater than zero; in the second stage, the output voltage is less than zero and the output current is greater than zero; in the third stage, the output voltage is less than zero and the output current is less than zero; in the fourth stage, the output voltage is greater than zero and the output current is less than zero.

[0036] The first-stage working mode 1: Figure 3 The circuit shown corresponds to the interval [t0, t1] shown in Figure 2 . The second power frequency switch tube Q2, the third high-frequency switch tube S3, the fourth high-frequency switch tube S4, and the body diode of the second high-frequency switch tube S2 are conducting, and the first power frequency switch tube Q1, the first high-frequency switch tube S1, and the second high-frequency switch tube S2 are turned off. The current of the filter inductor L linearly decreases, and the current of the resonant inductor linearly increases, and the two are equal at the moment t1; the current of the body diode of the second high-frequency switch tube S2 decreases to 0, the filter inductor current is positive, and the output voltage is positive, and this stage ends.

[0037] The first-stage working mode 2: Figure 4 The circuit shown corresponds to Figure 2In the interval [t1, t2] as shown, the second power-frequency switching transistor Q2, the third high-frequency switching transistor S3, and the fourth high-frequency switching transistor S4 are turned on, while the first power-frequency switching transistor Q1, the first high-frequency switching transistor S1, and the second high-frequency switching transistor S2 are turned off. The purpose of this time interval is to discharge the parasitic capacitance Cs1 of the first high-frequency switching transistor S1 to 0 through the current of the resonant inductor and charge the parasitic capacitance Cs2 of the second high-frequency switching transistor S2 to the input voltage. The current of the filter inductor is positive and the output voltage is positive, and this stage ends.

[0038] The third working mode of the first stage: Figure 5 The circuit shown corresponds to Figure 2 In the interval [t2, t3] as shown, the second power-frequency switching transistor Q2, the third high-frequency switching transistor S3, the fourth high-frequency switching transistor S4, and the body diode of the first high-frequency switching transistor S1 are turned on, while the first power-frequency switching transistor Q1, the first high-frequency switching transistor S1, and the second high-frequency switching transistor S2 are turned off. After the parasitic capacitance Cs1 is discharged to 0, the first high-frequency switching transistor S1 is not turned on temporarily. The current of the resonant inductor flows through the body diode of the first high-frequency switching transistor S1, creating the ZVS (zero voltage switching) condition for the subsequent conduction of the first high-frequency switching transistor S1. The current of the filter inductor is positive and the output voltage is positive, and this stage ends.

[0039] The fourth working mode of the first stage: Figure 6 The circuit shown corresponds to Figure 2 In the interval [t3, t4] as shown, the second power-frequency switching transistor Q2, the first high-frequency switching transistor S1, the third high-frequency switching transistor S3, the fourth high-frequency switching transistor S4, and the body diode of the first high-frequency switching transistor S1 are turned on, while the first power-frequency switching transistor Q1 and the second high-frequency switching transistor S2 are turned off. At this time, the current of the first high-frequency switching transistor S1 starts to gradually rise from a negative value to zero, flowing through the main channel and the body diode. When the current rises to zero, the body diode of the first high-frequency switching transistor S1 turns off and enters the next mode. Since there is no overlap between the drain-source voltage and the current of the first high-frequency switching transistor S1 at this time, soft switching is achieved. The current of the filter inductor is positive and the output voltage is positive, and this stage ends.

[0040] The fifth working mode of the first stage: Figure 7 The circuit shown corresponds to Figure 2 In the interval [t4, t5] as shown, the second power-frequency switching transistor Q2, the first high-frequency switching transistor S1, the third high-frequency switching transistor S3, and the fourth high-frequency switching transistor S4 are turned on, while the first power-frequency switching transistor Q1 and the second high-frequency switching transistor S2 are turned off. In this mode, the current of the filter inductor flows through the first high-frequency switching transistor S1, and the current of the resonant inductor starts to linearly decrease from the maximum value to zero. The current of the filter inductor is positive and the output voltage is positive, and this stage ends.

[0041] The sixth working mode of the first stage: Figure 8 The circuit shown corresponds to Figure 2In the interval [t5, t6] as shown, the body diodes of the second power frequency switching transistor Q2, the first high-frequency switching transistor S1, the third high-frequency switching transistor S3, and the fourth high-frequency switching transistor S4 conduct, and the first power frequency switching transistor Q1 and the second high-frequency switching transistor S2 are turned off. During working modes 1 to 5, the energy storage capacitor C2 provides resonant energy. At the beginning of this stage, the capacitor C1 discharges to provide resonant energy, and the current of the resonant inductor charges the capacitor C2. The current of the filter inductor is positive, and the output voltage is positive. This stage ends.

[0042] The first-stage working mode 7: Figure 9 The circuit shown corresponds to Figure 2 In the interval [t6, t7] as shown, the second power frequency switching transistor Q2 conducts, and the first power frequency switching transistor Q1, the first high-frequency switching transistor S1, the second high-frequency switching transistor S2, the third high-frequency switching transistor S3, and the fourth high-frequency switching transistor S4 are turned off. Due to the existence of the energy storage capacitor C1, the voltage across the first high-frequency switching transistor S1 will slowly decrease to achieve ZVS turn-off. The current of the filter inductor charges the parasitic capacitor Cs1 of the first high-frequency switching transistor S1 to the input DC voltage and discharges the parasitic capacitor Cs2 of the second high-frequency switching transistor S2 to 0. The current of the filter inductor is positive, and the output voltage is positive. This stage ends.

[0043] The first-stage working mode 8: Figure 10 The circuit shown corresponds to Figure 2 In the interval [t7, t8] as shown, the second power frequency switching transistor Q2 conducts, and the first power frequency switching transistor Q1, the first high-frequency switching transistor S1, the second high-frequency switching transistor S2, the third high-frequency switching transistor S3, and the fourth high-frequency switching transistor S4 are turned off. The inductor current continues to flow through the body diode of the second high-frequency switching transistor S2. In the next mode, the third high-frequency switching transistor S3 starts to conduct. Since the resonant current has been zero, the third high-frequency switching transistor S3 and the fourth high-frequency switching transistor S4 can achieve ZCS conduction. The current of the filter inductor is positive, and the output voltage is positive. This stage ends.

[0044] The second-stage working mode 1: Figure 11 The circuit shown corresponds to Figure 2 In the interval [t0, t1] as shown, the first power frequency switching transistor Q1, the third high-frequency switching transistor S3, the fourth high-frequency switching transistor S4, and the body diode of the second high-frequency switching transistor S2 conduct, and the second power frequency switching transistor Q2, the first high-frequency switching transistor S1, and the second high-frequency switching transistor S2 are turned off. The current of the filter inductor linearly decreases, and the current of the resonant inductor linearly increases. At time t1, the two are equal, and the current of the body diode of the second high-frequency switching transistor S2 decreases to 0. The current of the filter inductor is positive, and the output voltage is negative. This stage ends.

[0045] The second-stage working mode 2: Figure 12 The circuit shown corresponds to Figure 2In the interval [t1, t2], the first power frequency switch Q1, the third high-frequency switch S3, and the fourth high-frequency switch S4 are turned on, while the second power frequency switch Q2, the first high-frequency switch S1, and the second high-frequency switch S2 are turned off. The purpose of this time interval is to discharge the parasitic capacitance Cs1 of the first high-frequency switch S1 to 0 and charge the parasitic capacitance Cs2 of the second high-frequency switch S2 to the input voltage using the resonant inductor current. The filter inductor current is positive and the output voltage is negative, and this stage ends.

[0046] The second-stage operating mode 3: Figure 13 The corresponding circuit shown Figure 2 In the interval [t2, t3], the first power frequency switch Q1, the third high-frequency switch S3, the fourth high-frequency switch S4, and the body diode of the first high-frequency switch S1 are turned on, while the second power frequency switch Q2, the first high-frequency switch S1, and the second high-frequency switch S2 are turned off. After the parasitic capacitance Cs1 is discharged to 0, the first high-frequency switch S1 is not yet turned on temporarily. The resonant inductor current flows through the body diode of the first high-frequency switch S1 to create a ZVS condition for the subsequent conduction of the first high-frequency switch S1. The filter inductor current is positive and the output voltage is negative, and this stage ends.

[0047] The second-stage operating mode 4: Figure 14 The corresponding circuit shown Figure 2 In the interval [t3, t4], the first power frequency switch Q1, the first high-frequency switch S1, the third high-frequency switch S3, the fourth high-frequency switch S4, and the body diode of the first high-frequency switch S1 are turned on, while the second power frequency switch Q2 and the second high-frequency switch S2 are turned off. At this time, the current of the first high-frequency switch S1 starts to gradually rise from a negative value to zero, flowing through the main channel and the body diode. When the current rises to zero, the body diode of the first high-frequency switch S1 turns off and enters the next mode. Since there is no overlap between the drain-source voltage and the current of the first high-frequency switch S1 at this time, soft switching is achieved. The filter inductor current is positive and the output voltage is negative, and this stage ends.

[0048] The second-stage operating mode 5: Figure 15 The corresponding circuit shown Figure 2 In the interval [t4, t5], the first power frequency switch Q1, the first high-frequency switch S1, the third high-frequency switch S3, and the fourth high-frequency switch S4 are turned on, while the second power frequency switch Q2 and the second high-frequency switch S2 are turned off. In this mode, the filter inductor current flows through the first high-frequency switch S1, and the resonant inductor current starts to linearly decrease from the maximum value to zero. The filter inductor current is positive and the output voltage is negative, and this stage ends.

[0049] The second-stage operating mode 6: Figure 16 The corresponding circuit shown Figure 2In the interval [t5, t6] as shown, the body diodes of the first power frequency switching transistor Q1, the first high-frequency switching transistor S1, the third high-frequency switching transistor S3, and the fourth high-frequency switching transistor S4 are conducting, and the second power frequency switching transistor Q2 and the second high-frequency switching transistor S2 are turned off. During the working modes 1 to 5, the energy storage capacitor C2 provides the resonant energy. At the beginning of this stage, the capacitor C1 discharges to provide the resonant energy, and the resonant inductor current charges the capacitor C2. The current direction in the output filter inductor L is downward, the filter inductor current is positive, and the output voltage is negative. This stage ends.

[0050] The second-stage working mode 7: Figure 17 The circuit shown corresponds to Figure 2 In the interval [t6, t7] as shown, the first power frequency switching transistor Q1 is conducting, and the second power frequency switching transistor Q2, the first high-frequency switching transistor S1, the second high-frequency switching transistor S2, the third high-frequency switching transistor S3, and the fourth high-frequency switching transistor S4 are turned off. Due to the existence of the energy storage capacitor C1, the voltage across the first high-frequency switching transistor S1 will slowly decrease to achieve ZVS turn-off. The filter inductor current charges the parasitic capacitor Cs1 of the first high-frequency switching transistor S1 to the input DC voltage, and discharges the parasitic capacitor Cs2 of the second high-frequency switching transistor S2 to 0. The filter inductor current is positive, and the output voltage is negative. This stage ends.

[0051] The second-stage working mode 8: Figure 18 The circuit shown corresponds to Figure 2 In the interval [t7, t8] as shown, the first power frequency switching transistor Q1 is conducting, and the second power frequency switching transistor Q2, the first high-frequency switching transistor S1, the second high-frequency switching transistor S2, the third high-frequency switching transistor S3, and the fourth high-frequency switching transistor S4 are turned off. The filter inductor current continues to flow through the body diode of the second high-frequency switching transistor S2. In the next mode, the third high-frequency switching transistor S3 starts to conduct. Since the resonant inductor current has become zero, the third high-frequency switching transistor S2 and the fourth high-frequency switching transistor S4 can achieve ZCS conduction. The filter inductor current is positive, and the output voltage is negative. This stage ends.

[0052] The third-stage working mode 1: Figure 19 The circuit shown corresponds to Figure 2 In the interval [t0, t1] as shown, the first power frequency switching transistor Q1, the third high-frequency switching transistor S3, the fourth high-frequency switching transistor S4, and the body diode of the first high-frequency switching transistor S1 are conducting, and the second power frequency switching transistor Q2, the first high-frequency switching transistor S1, and the second high-frequency switching transistor S2 are turned off. The filter inductor current decreases linearly, and the resonant inductor current increases linearly. At time t1, they are equal. The current in the body diode of the first high-frequency switching transistor S1 decreases to 0. The filter inductor current and the output voltage are negative. This stage ends.

[0053] The third-stage working mode 2: Figure 20 The circuit shown corresponds to Figure 2In the interval [t1, t2] as shown, the first power frequency switch tube Q1, the third high-frequency switch tube S3, and the fourth high-frequency switch tube S4 are turned on, while the second power frequency switch tube Q2, the first high-frequency switch tube S1, and the second high-frequency switch tube S2 are turned off. The purpose of this time interval is to charge the parasitic capacitance Cs1 of the first high-frequency switch tube S1 to the input voltage and discharge the parasitic capacitance Cs2 of the second high-frequency switch tube S2 to zero using the resonant inductor current. The filter inductor current and the output voltage are negative, and this stage ends.

[0054] The third stage, operating mode 3: Figure 21 The circuit shown corresponds to Figure 2 In the interval [t2, t3] as shown, the first power frequency switch tube Q1, the third high-frequency switch tube S3, the fourth high-frequency switch tube S4, and the body diode of the second high-frequency switch tube S2 are turned on, while the second power frequency switch tube Q2, the first high-frequency switch tube S1, and the second high-frequency switch tube S2 are turned off. After the parasitic capacitance Cs2 is discharged to 0, the second high-frequency switch tube S2 is not yet turned on temporarily. The resonant inductor current flows through the body diode of the second high-frequency switch tube S2 to create ZVS conditions for the subsequent conduction of the second high-frequency switch tube S2. The filter inductor current and the output voltage are negative, and this stage ends.

[0055] The third stage, operating mode 4: Figure 22 The circuit shown corresponds to Figure 2 In the interval [t3, t4] as shown, the first power frequency switch tube Q1, the second high-frequency switch tube S2, the third high-frequency switch tube S3, the fourth high-frequency switch tube S4, and the body diode of the second high-frequency switch tube S2 are turned on, while the second power frequency switch tube Q2 and the first high-frequency switch tube S1 are turned off. At this time, the current of the second high-frequency switch tube S2 starts to gradually rise from a negative value to zero, flowing through the main channel and the body diode. When the current rises to zero, the body diode of the second high-frequency switch tube S2 turns off and enters the next mode. Since there is no overlap between the drain-source voltage and the current of the second high-frequency switch tube S2 at this time, soft switching is achieved. The filter inductor current and the output voltage are negative, and this stage ends.

[0056] The third stage, operating mode 5: Figure 23 The circuit shown corresponds to Figure 2 In the interval [t4, t5] as shown, the first power frequency switch tube Q1, the second high-frequency switch tube S2, the third high-frequency switch tube S3, and the fourth high-frequency switch tube S4 are turned on, while the second power frequency switch tube Q2 and the first high-frequency switch tube S1 are turned off. In this mode, the filter inductor current flows through the second high-frequency switch tube S2, and the resonant inductor current starts to linearly decrease from the maximum value to zero. The filter inductor current and the output voltage are negative, and this stage ends.

[0057] The third stage, operating mode 6: Figure 24 The circuit shown corresponds to Figure 2In the interval [t5, t6] as shown, the body diodes of the first power frequency switch Q1, the second high-frequency switch S2, the third high-frequency switch S3, and the fourth high-frequency switch S4 conduct, and the second power frequency switch Q2 and the first high-frequency switch S1 are turned off. During the working modes 1 to 5, the energy storage capacitor C1 provides resonant energy. At the beginning of this stage, the capacitor C2 discharges to provide resonant energy, and the resonant inductor current charges the capacitor C1. The filter inductor current and the output voltage are negative, and this stage ends.

[0058] The third-stage working mode 7: Figure 25 The circuit shown corresponds to Figure 2 In the interval [t6, t7] as shown, the first power frequency switch Q1 conducts, and the second power frequency switch Q2, the first high-frequency switch S1, the second high-frequency switch S2, the third high-frequency switch S3, and the fourth high-frequency switch S4 are turned off. Due to the existence of the energy storage capacitor C2, the voltage across the first high-frequency switch S2 will slowly decrease to achieve ZVS turn-off. The filter inductor current charges the parasitic capacitor Cs2 of the second high-frequency switch S2 to the input DC voltage, and discharges the parasitic capacitor Cs1 of the first high-frequency switch S1 to zero. The filter inductor current and the output voltage are negative, and this stage ends.

[0059] The third-stage working mode 8: Figure 26 The circuit shown corresponds to Figure 2 In the interval [t7, t8] as shown, the first power frequency switch Q1 conducts, and the second power frequency switch Q2, the first high-frequency switch S1, the second high-frequency switch S2, the third high-frequency switch S3, and the fourth high-frequency switch S4 are turned off. The filter inductor current continues to flow through the body diode of the first high-frequency switch S1. In the next mode, the third high-frequency switch S3 starts to conduct. Since the resonant inductor current has been zero, the third high-frequency switch S3 and the fourth high-frequency switch S4 can achieve ZCS conduction. The filter inductor current and the output voltage are negative, and this stage ends.

[0060] The fourth-stage working mode 1: Figure 27 The circuit shown corresponds to Figure 2 In the interval [t0, t1] as shown, the body diodes of the second power frequency switch Q2, the third high-frequency switch S3, the fourth high-frequency switch S4, and the first high-frequency switch S1 conduct, and the first power frequency switch Q1, the first high-frequency switch S1, and the second high-frequency switch S2 are turned off. The filter inductor current decreases linearly, and the resonant inductor current increases linearly. At time t1, the two are equal. The current of the body diode of the first high-frequency switch S1 decreases to 0, the filter inductor current is negative, and the output voltage is positive, and this stage ends.

[0061] The fourth-stage working mode 2: Figure 28 The circuit shown corresponds to Figure 2In the interval [t1, t2], the second power-frequency switching transistor Q2, the third high-frequency switching transistor S3, and the fourth high-frequency switching transistor S4 are turned on, while the first power-frequency switching transistor Q1, the first high-frequency switching transistor S1, and the second high-frequency switching transistor S2 are turned off. The purpose of this time interval is to charge the parasitic capacitance Cs1 of the first high-frequency switching transistor S1 to the input voltage and discharge the parasitic capacitance Cs2 of the second high-frequency switching transistor S2 to zero using the resonant inductor current. The filter inductor current is negative and the output voltage is positive. This stage ends.

[0062] Fourth-stage operating mode 3: Figure 29 The circuit shown corresponds to Figure 2 In the interval [t2, t3], the second power-frequency switching transistor Q2, the third high-frequency switching transistor S3, the fourth high-frequency switching transistor S4, and the body diode of the second high-frequency switching transistor S2 are turned on, while the first power-frequency switching transistor Q1, the first high-frequency switching transistor S1, and the second high-frequency switching transistor S2 are turned off. After the parasitic capacitance Cs2 is discharged to 0, the second high-frequency switching transistor S2 is not yet turned on temporarily. The resonant inductor current flows through the body diode of the second high-frequency switching transistor S2, creating ZVS conditions for the subsequent conduction of the second high-frequency switching transistor S2. The filter inductor current is negative and the output voltage is positive. This stage ends.

[0063] Fourth-stage operating mode 4: Figure 30 The circuit shown corresponds to Figure 2 In the interval [t3, t4], the second power-frequency switching transistor Q2, the second high-frequency switching transistor S2, the third high-frequency switching transistor S3, the fourth high-frequency switching transistor S4, and the body diode of the second high-frequency switching transistor S2 are turned on, while the first power-frequency switching transistor Q1 and the first high-frequency switching transistor S1 are turned off. At this time, the current of the second high-frequency switching transistor S2 starts to gradually rise from a negative value to zero and flows through the main channel and the body diode. When the current rises to zero, the body diode of the second high-frequency switching transistor S2 turns off and enters the next mode. Since there is no overlap between the drain-source voltage and the current of the second high-frequency switching transistor S2 at this time, soft switching is achieved. The filter inductor current is negative and the output voltage is positive. This stage ends.

[0064] Fourth-stage operating mode 5: Figure 31 The circuit shown corresponds to Figure 2 In the interval [t4, t5], the second power-frequency switching transistor Q2, the second high-frequency switching transistor S2, the third high-frequency switching transistor S3, and the fourth high-frequency switching transistor S4 are turned on, while the first power-frequency switching transistor Q1 and the first high-frequency switching transistor S1 are turned off. In this mode, the filter inductor current flows through the second high-frequency switching transistor S2, and the resonant inductor current starts to linearly decrease from the maximum value to zero. The filter inductor current is negative and the output voltage is positive. This stage ends.

[0065] Fourth-stage operating mode 6: Figure 32 The circuit shown corresponds to Figure 2In the interval [t5, t6] as shown, the body diodes of the second power frequency switching transistor Q2, the second high-frequency switching transistor S2, the third high-frequency switching transistor S3, and the fourth high-frequency switching transistor S4 are conducting, and the first power frequency switching transistor Q1 and the first high-frequency switching transistor S1 are turned off. During operating modes 1 to 5, the energy storage capacitor C1 provides the resonant energy. At the beginning of this stage, the capacitor C2 discharges to provide the resonant energy, and the resonant inductor current charges the capacitor C1. The filter inductor current is negative and the output voltage is positive. This stage ends.

[0066] The fourth stage, operating mode 7: Figure 33 The circuit shown corresponds to Figure 2 In the interval [t6, t7] as shown, the second power frequency switching transistor Q2 is conducting, and the first power frequency switching transistor Q1, the first high-frequency switching transistor S1, the second high-frequency switching transistor S2, the third high-frequency switching transistor S3, and the fourth high-frequency switching transistor S4 are turned off. Due to the existence of the energy storage capacitor C2, the voltage across the first high-frequency switching transistor S2 will slowly decrease to achieve ZVS turn-off. The filter inductor current charges the parasitic capacitor Cs2 of the second high-frequency switching transistor S2 to the input DC voltage and discharges the parasitic capacitor Cs1 of the first high-frequency switching transistor S1 to zero. The filter inductor current is negative and the output voltage is positive. This stage ends.

[0067] The fourth stage, operating mode 8: Figure 34 The circuit shown corresponds to Figure 2 In the interval [t7, t8] as shown, the second power frequency switching transistor Q2 is conducting, and the first power frequency switching transistor Q2, the first high-frequency switching transistor S1, the second high-frequency switching transistor S2, the third high-frequency switching transistor S3, and the fourth high-frequency switching transistor S4 are turned off. The filter inductor current continues to flow through the body diode of the first high-frequency switching transistor S1. In the next mode, the third high-frequency switching transistor S3 starts to conduct. Since the resonant inductor current has become zero, the third high-frequency switching transistor S3 and the fourth high-frequency switching transistor S4 can achieve ZCS conduction. The filter inductor current is negative and the output voltage is positive. This stage ends.

[0068] Regarding the analysis of the operating modes of the inverter of the present invention, the circuit has the following advantages:

[0069] (1) The inverter uses fewer active and passive devices.

[0070] (2) The inverter's high-frequency switching transistors do not need to set dead zones.

[0071] (3) All high-frequency switching transistors can achieve full-range soft switching.

[0072] (4) The auxiliary high-frequency control method is to conduct ahead of the main switching transistor, and the control method is simple.

[0073] In the embodiments of the present application, the "first", "second" (if any) in names such as "the first" and "the second" are only used as name identifiers and do not represent the first and second in sequence.

[0074] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and modifications can be made, and these improvements and modifications should also be regarded as the protection scope of the present invention.

Claims

1. A non-direct-through active auxiliary full-range soft-switching inverter, characterized in that, Comprising: A DC voltage module, including a positive output terminal and a negative output terminal, for providing an input voltage to the inverter; A power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm, connected to the DC voltage module, including a power-frequency switch bridge arm composed of two power-frequency switch tubes; for outputting a power-frequency AC square wave in the case of single power supply input; A high-frequency SPWM modulation lag switch bridge arm, connected to the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm, including a high-frequency switch bridge arm composed of two high-frequency switch tubes, for performing SPWM modulation on the power-frequency AC square wave voltage output by the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm, and outputting a high-frequency square wave after single-polarity modulation; A filter network, connected to the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm and the high-frequency SPWM modulation lag switch bridge arm, for filtering the high-frequency square wave output by the high-frequency SPWM modulation lag switch bridge arm to obtain an output voltage; A high-frequency auxiliary switch and a junction capacitance energy storage and release network, connected to the DC voltage module and the high-frequency SPWM modulation lag switch bridge arm, for realizing soft switching of the high-frequency switch tubes; The high-frequency auxiliary switch and the junction capacitance energy storage and release network include a third high-frequency switch tube S3, a fourth high-frequency switch tube S4, a resonant inductor Lr, a resonant energy storage capacitor C1, and a resonant energy storage capacitor C2; one end of the resonant inductor Lr serves as the third connection terminal of the high-frequency auxiliary switch and the junction capacitance energy storage and release network, and is connected to the first output terminal of the high-frequency SPWM modulation lag switch bridge arm; the other end of the resonant inductor Lr is connected to the drain of the fourth high-frequency switch tube S4, the source of the fourth high-frequency switch tube S4 is connected to the source of the third high-frequency switch tube S3, and the drain of the third high-frequency switch tube S3 is connected to the midpoint of the series-connected resonant energy storage capacitor C1 and resonant energy storage capacitor C2; one end of the series-connected resonant energy storage capacitor C1 and resonant energy storage capacitor C2 serves as the first connection terminal of the high-frequency auxiliary switch and the junction capacitance energy storage and release network, and is connected to the positive output terminal of the DC voltage module, and the other end of the series-connected resonant energy storage capacitor C1 and resonant energy storage capacitor C2 serves as the second connection terminal of the high-frequency auxiliary switch and the junction capacitance energy storage and release network, and is connected to the negative output terminal of the DC voltage module.

2. The non-through active auxiliary full-range soft-switching inverter according to claim 1, wherein: The power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm includes a first power-frequency switch tube Q1 and a second power-frequency switch tube Q2. The drain of the first power-frequency switch tube Q1 is connected to the positive output terminal of the DC voltage module, that is, the positive pole of the input voltage Ui. The drain of the first power-frequency switch tube Q1 serves as the first output terminal of the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm. The source of the first power-frequency switch tube Q1 is connected to the drain of the second power-frequency switch tube Q2 and is grounded, and the connection point serves as the first input terminal of the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm; the gate of the first power-frequency switch tube Q1 is connected to the gate of the second power-frequency switch tube Q2; the source of the second power-frequency switch tube Q2 is connected to the negative output terminal of the DC voltage module; the source of the second power-frequency switch tube Q2 serves as the second output terminal of the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm, and the first output terminal and the second output terminal of the power-frequency voltage commutation parallel resonance energy storage capacitor bridge arm output a power-frequency AC square wave.

3. The non-through active auxiliary full-range soft-switching inverter according to claim 1, characterized in that: The high-frequency SPWM modulation lagging switch leg includes a first high-frequency switch tube S1 and a second high-frequency switch tube S2. The drain of the first high-frequency switch tube S1 serves as the first input terminal of the high-frequency SPWM modulation lagging switch leg and is connected to the first output terminal of the power-frequency voltage commutation parallel resonance energy storage capacitor leg; the source of the first high-frequency switch tube S1 is connected to the drain of the second high-frequency switch tube S2, and the connection point serves as the first output terminal of the high-frequency SPWM modulation lagging switch leg; the source of the second high-frequency switch tube S2 serves as the second input terminal of the high-frequency SPWM modulation lagging switch leg and is connected to the second output terminal of the power-frequency voltage commutation parallel resonance energy storage capacitor leg.

4. An active auxiliary full-range soft-switching inverter without direct connection according to claim 1, characterized in that: The filter network includes a filter inductor L and a filter capacitor C; one end of the filter inductor L serves as the input terminal of the filter network and is connected to the first output terminal of the high-frequency SPWM modulation lagging switch leg, the other end of the filter inductor L is connected to one end of the filter capacitor C, and the other end of the filter capacitor C serves as the output terminal of the filter network and is connected to the first input terminal of the power-frequency voltage commutation parallel resonance energy storage capacitor leg; both ends of the filter capacitor C serve as the output terminals of the inverter to output the voltage Uo.

5. The non-direct-through active auxiliary full-range soft-switching inverter according to claim 1, wherein: The first power-frequency switch tube in the power-frequency voltage commutation parallel resonance energy storage capacitor leg, the first high-frequency switch tube in the high-frequency SPWM modulation lagging switch leg, and the third high-frequency switch tube in the high-frequency auxiliary switch and junction capacitance energy storage and release network together constitute the positive half-cycle voltage output path of the inverter; the second power-frequency switch tube in the power-frequency voltage commutation parallel resonance energy storage capacitor leg, the second high-frequency switch tube in the high-frequency SPWM modulation lagging switch leg, and the fourth high-frequency switch tube in the high-frequency auxiliary switch and junction capacitance energy storage and release network together constitute the negative half-cycle voltage output path of the inverter.

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