Attenuator chip

Abstract

According to the attenuator chip, a first thin-film resistor, a second thin-film resistor, an input bonding pad and an output bonding pad are connected in series to form a main circuit, a third thin-film resistor and a fourth thin-film resistor are connected in parallel and grounded, and the four thin-film resistors jointly form a pure T-shaped resistance attenuation structure. On the basis of the structure of a traditional T-shaped attenuator, a traditional single grounding thin-film resistor is divided into two parallel grounding thin-film resistors, so that the T-shaped attenuator has better symmetry. The pure resistance attenuator structure has flat frequency response, can keep consistent attenuation effect in a broadband range, and is low in cost, simple in structure and wide in application. In addition, the grounding sheet and the grounding surface are conducted through the grounding through hole, and the structure enhances the symmetry of signals, thereby improving the stability of the signals. In addition, the transmission line connected with the thin-film resistor adopts a snakelike circuitous design, so that the performance is better ensured. The attenuator chip provided by the invention is more flexible to use, smaller in size and better in performance.

Description

Technical Field

[0001] The invention belongs to the technical field of attenuators, and in particular relates to an attenuator chip. Background Art

[0002] In modern communication systems and radio frequency circuits, signal power control is crucial. Attenuators, as a key passive component, are widely used in various electronic devices to adjust signal power, match impedance, and protect other circuit components. With the development of wireless communication technology, especially in high-frequency and millimeter-wave frequency bands, signal stability and precise control have become particularly important. Traditional attenuator structures face many challenges in modern high-integration circuits due to their large size and limited attenuation accuracy. Therefore, the research and development of attenuator chips with high integration, high precision and small footprint has become the focus of current technological development.

[0003] Most existing attenuator designs are based on a combination of discrete components, which are large in size and not conducive to application in highly integrated systems. In addition, these designs often face problems such as uneven signal attenuation caused by transmission line effects, parasitic effects, and impedance mismatch under high-frequency operation. These shortcomings not only limit the application scenarios of the attenuator, but also affect its performance in high-frequency, broadband communication systems. Therefore, it has become an urgent need for the industry to develop an attenuator chip that can maintain stable performance under high-frequency conditions while having precise control capabilities and high integration. Summary of the invention

[0004] In order to solve the deficiencies of the prior art, the purpose of the present invention is to provide an attenuator chip to solve the problems of the existing attenuator, such as inflexible use range, poor performance and large size.

[0005] In order to achieve the above-mentioned purpose, the technical solution adopted in the embodiment of the present invention is as follows: an attenuator chip is designed, characterized in that the chip includes a dielectric substrate and an attenuation unit arranged on the upper surface of the dielectric substrate, a ground plane is arranged on the back of the dielectric substrate, and the attenuation unit includes an input pad, an output pad, a first ground pad, a second ground pad, a third ground pad, a fourth ground pad, a first thin film resistor, a second thin film resistor, a third thin film resistor, a fourth thin film resistor, a first grounding sheet, a second grounding sheet, a third grounding sheet, a fourth grounding sheet, a fifth grounding sheet, a sixth grounding sheet, a first transmission line, a second transmission line, a third transmission line, a fourth transmission line, a fifth transmission line, a sixth transmission line, a seventh transmission line, an eighth transmission line, a ninth transmission line, a tenth transmission line, and an eleventh transmission line; The input pad, the first thin film resistor, the second thin film resistor, and the output pad are arranged in sequence in a horizontal state from left to right in the middle position of the upper surface of the dielectric substrate, wherein the input pad is directly opposite to the output pad, the first thin film resistor is arranged in the middle position close to the right side of the input pad, the second thin film resistor is arranged in the middle position close to the left side of the output pad, and the first thin film resistor is directly opposite to the second thin film resistor; the seventh transmission line is arranged in the middle position between the first thin film resistor and the second thin film resistor; the input pad is connected to the first thin film resistor through the first transmission line, and the first thin film resistor is connected to the seventh transmission line through the third transmission line; the output pad is connected to the second thin film resistor through the second transmission line, and the second thin film resistor is connected to the seventh transmission line through the fourth transmission line; The structure formed by the input pad, the first transmission line, the first thin film resistor, and the third transmission line is rotated 180° to the right around the midpoint of the seventh transmission line and overlaps with the structure formed by the fourth transmission line, the second thin film resistor, the second transmission line, and the output pad; The fifth grounding sheet, the third thin film resistor, the seventh transmission line, the fourth thin film resistor, and the second grounding sheet are arranged in sequence from top to bottom in a vertical state at the middle position of the upper surface of the dielectric substrate, wherein the fifth grounding sheet is connected to one end of the third thin film resistor through the fifth transmission line, and the other end of the third thin film resistor is connected to the seventh transmission line; one end of the fourth thin film resistor is connected to the second grounding sheet through the sixth transmission line, and the other end of the fourth thin film resistor is connected to the seventh transmission line; The structure formed by the fifth grounding plate, the fifth transmission line, and the third thin-film resistor is rotated 180° to the right around the midpoint of the seventh transmission line and overlaps with the structure formed by the second grounding plate, the sixth transmission line, and the fourth thin-film resistor; A fourth ground pad and a first ground pad are disposed at equal intervals on the upper surface of the dielectric substrate on both sides of the input pad, and a third ground pad and a second ground pad are disposed at equal intervals on the upper surface of the dielectric substrate on both sides of the output pad; A sixth grounding sheet is provided at a middle position of the upper surface of the dielectric substrate on the upper side of the fourth grounding pad, a fourth grounding sheet is provided at a middle position of the upper surface of the dielectric substrate on the upper side of the third grounding pad, a first grounding sheet is provided at a middle position of the upper surface of the dielectric substrate on the lower side of the first grounding pad, and a third grounding sheet is provided at a middle position of the upper surface of the dielectric substrate on the lower side of the second grounding pad; the lower side of the sixth grounding sheet is connected to the upper side of the fourth grounding pad via an eighth transmission line, the lower side of the fourth grounding sheet is connected to the upper side of the third grounding pad via a ninth transmission line, the upper side of the first grounding sheet is connected to the lower side of the first grounding pad via a tenth transmission line, and the upper side of the third grounding sheet is connected to the lower side of the second grounding pad via an eleventh transmission line; A grounding through hole is provided in the middle of the first grounding plate, the second grounding plate, the third grounding plate, the fourth grounding plate, the fifth grounding plate and the sixth grounding plate, and the grounding through hole penetrates to the back side of the dielectric substrate; a conductive cylinder is provided in each grounding through hole, so that each grounding plate is electrically connected to the grounding surface on the back side of the dielectric substrate.

[0006] Compared with the prior art, the beneficial effects of the present invention are as follows: the attenuator chip designed by the present invention is composed of a first thin film resistor, a second thin film resistor, an input pad, and an output pad connected in series to form a main circuit, a third thin film resistor and a fourth thin film resistor connected in parallel to the ground, and the four thin film resistors together constitute a pure T-type resistance attenuation structure. The pure resistance attenuator structure has a flat frequency response, can maintain a consistent attenuation effect within a wide frequency range, and is low-cost, simple in structure, and widely used. In the structure of the traditional T-type attenuator, the traditional single grounded thin film resistor is divided into two parallel-connected grounded thin film resistors, which has better symmetry. In addition, the grounding plate and the grounding surface are connected through a grounding through hole, and this structure enhances the symmetry of the signal, thereby improving the stability of the signal. In addition, a serpentine circuitous design is adopted on the transmission line connecting the thin film resistors to better ensure performance. The attenuator chip provided by the present invention has a more flexible scope of use, a smaller size, and better performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0008] Figure 1 This is a schematic diagram of the front structure of an attenuator chip according to an embodiment of the present invention.

[0009] Figure 2 The present invention provides a simulation curve of the attenuation value of an attenuator chip of an embodiment of the present invention when the attenuation is 1dB, 2dB, 3dB, 4dB, 5dB, 6dB, 7dB and 10dB.

[0010] Figure 3 The present invention provides a simulation curve of the input return loss of an attenuator chip according to an embodiment of the present invention when the attenuation is 1dB, 2dB, 3dB, 4dB, 5dB, 6dB, 7dB and 10dB.

[0011] Figure 4 The present invention provides a simulation curve of the output return loss of an attenuator chip according to an embodiment of the present invention when the attenuation is 1dB, 2dB, 3dB, 4dB, 5dB, 6dB, 7dB and 10dB. DETAILED DESCRIPTION

[0012] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0013] It should be noted that, in the present application, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features.

[0014] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate directions or positional relationships based on the accompanying drawings. Figure 1 The orientation or position relationship shown is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as limiting the present invention. The term "conduction" means that the two are electrically connected, and the specific implementation methods include direct contact and conduction through a conductive device, and conduction can also be achieved through technical means such as conductive glue or conductive wire.

[0015] like Figure 1 As shown, Figure 1 This is a schematic diagram of the front structure of the attenuator chip provided in an embodiment of the present invention. The attenuator chip refers to a chip circuit design that can realize the function, and does not include a packaging structure and an external pin part. The packaging structure and the external pin are only for the convenience of the application of the chip, and will not affect its function or hinder its normal use.

[0016] The present embodiment provides an attenuator chip, which includes a dielectric substrate and an attenuation unit arranged on the upper surface of the dielectric substrate, wherein a ground plane is arranged on the back of the dielectric substrate, and the attenuation unit includes an input pad IN, an output pad OUT, a first ground pad P1, a second ground pad P2, a third ground pad P3, a fourth ground pad P4, a first thin film resistor R1, a second thin film resistor R2, a third thin film resistor R3, a fourth thin film resistor R4, a first grounding plate B1, a second grounding plate B2, a third grounding plate B3, a fourth grounding plate B4, a fifth grounding plate B5, a sixth grounding plate B6, a first transmission line L1, a second transmission line L2, a third transmission line L3, a fourth transmission line L4, a fifth transmission line L5, a sixth transmission line L6, a seventh transmission line L7, an eighth transmission line L8, a ninth transmission line L9, a tenth transmission line L10, and an eleventh transmission line L11.

[0017] The input pad IN, the first thin film resistor R1, the second thin film resistor R2, and the output pad OUT are arranged in sequence in a horizontal state from left to right in the middle position of the upper surface of the dielectric substrate, wherein the input pad IN is directly opposite to the output pad OUT, the first thin film resistor R1 is arranged in the middle position close to the right side of the input pad IN, the second thin film resistor R2 is arranged in the middle position close to the left side of the output pad OUT, and the first thin film resistor R1 is directly opposite to the second thin film resistor R2; the seventh transmission line L7 is arranged in the middle position between the first thin film resistor R1 and the second thin film resistor R2; the input pad IN is connected to the first thin film resistor R1 through the first transmission line L1, and the first thin film resistor R1 is connected to the seventh transmission line L7 through the third transmission line L3; the output pad OUT is connected to the second thin film resistor R2 through the second transmission line L2, and the second thin film resistor R2 is connected to the seventh transmission line L7 through the fourth transmission line L4; The structure formed by the input pad IN, the first transmission line L1, the first thin film resistor R1, and the third transmission line L3 is rotated 180° to the right around the midpoint of the seventh transmission line L7 and overlaps with the structure formed by the fourth transmission line L4, the second thin film resistor R2, the second transmission line L2, and the output pad OUT.

[0018] The fifth grounding sheet B5, the third thin film resistor R3, the seventh transmission line L7, the fourth thin film resistor R4, and the second grounding sheet B2 are arranged in sequence from top to bottom in a vertical state at the middle position of the upper surface of the dielectric substrate, wherein the fifth grounding sheet B5 is connected to one end of the third thin film resistor R3 through the fifth transmission line L5, and the other end of the third thin film resistor R3 is connected to the seventh transmission line L7; one end of the fourth thin film resistor R4 is connected to the second grounding sheet B2 through the sixth transmission line L6, and the other end of the fourth thin film resistor R4 is connected to the seventh transmission line L7.

[0019] The structure formed by the fifth grounding plate B5, the fifth transmission line L5 and the third thin-film resistor R3 is rotated 180° to the right around the midpoint of the seventh transmission line L7 and overlaps with the structure formed by the second grounding plate B2, the sixth transmission line L6 and the fourth thin-film resistor R4.

[0020] A fourth grounding pad P4 and a first grounding pad P1 are arranged at equal intervals on the upper surface of the dielectric substrate on both sides of the input pad IN, and a third grounding pad P3 and a second grounding pad P2 are arranged at equal intervals on the upper surface of the dielectric substrate on both sides of the output pad OUT; A sixth grounding sheet B6 is provided at a middle position of the upper surface of the dielectric substrate on the upper side of the fourth grounding pad P4, a fourth grounding sheet B4 is provided at a middle position of the upper surface of the dielectric substrate on the upper side of the third grounding pad P3, a first grounding sheet B1 is provided at a middle position of the upper surface of the dielectric substrate on the lower side of the first grounding pad P1, and a third grounding sheet B3 is provided at a middle position of the upper surface of the dielectric substrate on the lower side of the second grounding pad P2; the lower side of the sixth grounding sheet B6 is connected to the upper side of the fourth grounding pad P4 through the eighth transmission line L8, the lower side of the fourth grounding sheet B4 is connected to the upper side of the third grounding pad P3 through the ninth transmission line L9, the upper side of the first grounding sheet B1 is connected to the lower side of the first grounding pad P1 through the tenth transmission line L10, and the upper side of the third grounding sheet B3 is connected to the lower side of the second grounding pad P2 through the eleventh transmission line L11; A grounding through hole is provided in the middle of the first grounding sheet B1, the second grounding sheet B2, the third grounding sheet B3, the fourth grounding sheet B4, the fifth grounding sheet B5 and the sixth grounding sheet B6, and the grounding through hole penetrates to the back side of the dielectric substrate; a conductive cylinder is provided in each grounding through hole, so that each grounding sheet is electrically connected to the grounding surface on the back side of the dielectric substrate; The grounding plate and the grounding plane are connected through the grounding through hole. This structure enhances the symmetry of the signal, thereby improving the stability of the signal.

[0021] The first thin film resistor R1 and the second thin film resistor R2 have the same material and size, and the third thin film resistor R3 and the fourth thin film resistor R4 have the same material and size; The third transmission line L3 and the fourth transmission line L4 have the same structure and size, and both are serpentine structures; as an embodiment, the third transmission line L3 includes a first horizontal rectangular strip, a first right-angled triangle piece, a second vertical rectangular strip, a second right-angled triangle piece, a second horizontal rectangular strip, a third right-angled triangle piece, a third vertical rectangular strip, a fourth right-angled triangle piece, and a third horizontal rectangular strip, a total of nine parts, and the above nine parts are connected in sequence from left to right, wherein the left end of the first horizontal rectangular strip is connected to the middle of the left side of the first thin-film resistor R1, the right end of the first horizontal rectangular strip and the bottom end of the second vertical rectangular strip are respectively connected to the two right-angled sides of the first right-angled triangle piece, and the hypotenuse of the first right-angled triangle piece is located at the second vertical rectangular strip. The top of the second vertical rectangular strip and the left end of the second horizontal rectangular strip are connected to the two right-angled sides of the second right-angled triangle piece, and the hypotenuse of the second right-angled triangle piece is located above the top of the second vertical rectangular strip; the right end of the second horizontal rectangular strip and the top of the third vertical rectangular strip are connected to the two right-angled sides of the third right-angled triangle piece, and the hypotenuse of the third right-angled triangle piece is located above the top of the third vertical rectangular strip; the bottom of the third vertical rectangular strip and the left end of the third horizontal rectangular strip are connected to the two right-angled sides of the fourth right-angled triangle piece, and the hypotenuse of the fourth right-angled triangle piece is located below the bottom of the third vertical rectangular strip; the right end of the third horizontal rectangular strip is connected to the middle of the left side of the seventh transmission line L7. The serpentine structure can ensure the best performance by calculating the characteristic impedance and electrical length tangent value of the simulated transmission line in a limited chip area. The vertical sides of the first horizontal rectangular strip, the second horizontal rectangular strip, and the third horizontal rectangular strip are equal in length, and are equal to the horizontal sides of the second vertical rectangular strip and the third vertical rectangular strip. The vertical sides of the second vertical rectangular strip and the third vertical rectangular strip are equal in length; the first right-angled triangle piece, the second right-angled triangle piece, the third right-angled triangle piece, and the fourth right-angled triangle piece are all isosceles right triangles, and the right-angled sides of the four are equal and equal in length to the vertical sides of the first horizontal rectangular strip.

[0022] The first thin film resistor R1, the second thin film resistor R2, the input pad IN, and the output pad OUT are connected in series to form a main circuit, the third thin film resistor R3 and the fourth thin film resistor R4 are connected in parallel to the ground, and the four thin film resistors R1 to R4 together form a pure T-type resistance attenuation structure. The pure resistance attenuator structure has a flat frequency response, can maintain a consistent attenuation effect within a wide frequency range, and is low-cost, simple in structure, and widely used.

[0023] In this embodiment, the chip is based on integrated circuit technology, with a gallium arsenide (GaAs) material with a dielectric constant of 12.9 as a dielectric substrate. The dielectric substrate has a thickness of 75 μm, and the back side of the GaAs substrate serves as a ground plane of the chip.

[0024] The fixed attenuator chip is a passive device, which mainly realizes signal attenuation through a built-in resistor network, so it does not require an external power supply when working. The ground plane of the chip is connected to the four GND pins of the external package through the first ground pad P1, the second ground pad P2, the third ground pad P3, and the fourth ground pad P4 through gold-plated bonding wires; the input pad IN and the output pad OUT are respectively connected to the external IN pin and OUT pin through gold-plated bonding wires; the external IN pin is connected to the 50-ohm RF source input, and the external OUT pin is connected to the 50-ohm RF source output, which is the output signal after the input signal is attenuated by the internal resistor network of the attenuator chip.

[0025] When the attenuation is 1dB, 5dB, 6dB, and 7dB, the third thin film resistor R3 and the fourth thin film resistor R4 use epitaxial resistors. When the attenuation is 2dB, 3dB, 4dB, and 10dB, the third thin film resistor R3 and the fourth thin film resistor R4 use tantalum nitride resistors. Due to the limitation of chip size, two types of resistors are selected for cross-use at different attenuations. The first thin film resistor and the second thin film resistor at all attenuations use tantalum nitride resistors; tantalum nitride resistors can maintain precise resistance values, but at larger resistance values, the length is too long and exceeds the chip area, so epitaxial resistors with slightly lower precision are needed to replace them. Epitaxial resistors can still maintain a smaller length at large resistance values ​​to ensure consistent chip sizes at different attenuations.

[0026] The thin film resistors R1 and R2 have the same size, and the thin film resistors R3 and R4 have the same size. The length and width of the thin film resistors are changed according to different attenuation values ​​to change the resistance value, thereby achieving a change in the attenuation amount. That is, different attenuation values ​​are achieved by using thin film resistors of different lengths and widths, and the performance of the attenuator is improved by adjusting the length and width of the first transmission line and the second transmission line.

[0027] The input pad, output pad and ground pad are all in square structure, and the ground through hole is in circular structure, the purpose of which is to realize reliable chip packaging in terms of process.

[0028] In this embodiment, the input pad IN, the output pad OUT, the first thin film resistor R1, and the second thin film resistor R2 are arranged in parallel in the horizontal direction to ensure the shortest path and minimum loss during signal transmission. The third thin film resistor R3, the fourth thin film resistor R4, the second grounding plate B2, and the fifth grounding plate B5 are arranged in parallel in the vertical direction to serve as a T-type grounding resistor.

[0029] In this embodiment, the horizontal length of the dielectric substrate is 660 μm, and the vertical length is 760 μm, thereby effectively limiting the area of ​​the chip, and having the characteristics of small area and wide application scenarios. In this embodiment, the first ground pad and the second ground pad of the attenuator chip are symmetrically distributed in the vertical direction, the first ground pad and the fourth ground pad are symmetrical in the horizontal direction, and the distances from the surrounding pads and ground through holes to the seventh transmission line are the same.

[0030] In this embodiment, the center distance between the input pad and the output pad is 342.9 μm, the center distance between the first ground pad and the second ground pad, and the center distance between the third ground pad and the fourth ground pad is 342.9 μm, and the size of each pad is 100 μm × 100 μm, and the center distance between the first ground pad and the fourth ground pad, and the center distance between the second ground pad and the third ground pad is 300 μm.

[0031] The third transmission line and the fourth transmission line are equal in length and have a length range of 70 μm to 180 μm and a width range of 3.5 μm to 13 μm. The length here refers to the total length of the outer curve on the upper side or the lower side of the third transmission line, which includes the lengths of the horizontal sides of the first horizontal rectangular strip, the second horizontal rectangular strip, and the third horizontal rectangular strip, as well as the lengths of the vertical sides of the second vertical rectangular strip and the third vertical rectangular strip, and the lengths of the hypotenuses of the second right-angled triangle piece and the third right-angled triangle piece; the width refers to the length of the vertical side of the first horizontal rectangular strip.

[0032] The first transmission line and the second transmission line have the same size and are 25μm×40.2μm at 1dB attenuation and 25μm×30.2μm at other attenuations. The fifth transmission line and the sixth transmission line have lengths ranging from 30μm to 100μm. The width of the seventh transmission line in the horizontal direction is consistent with the width of the third thin-film resistor in the horizontal direction, and its length in the vertical direction varies with the length of the first thin-film resistor in the vertical direction at different attenuations (i.e., the length remains consistent), and its length in the vertical direction ranges from 35.4μm to 50.4μm.

[0033] Furthermore, the size of all grounding pads is 50 μm×50 μm.

[0034] In this embodiment, the simulation results show that Figure 2 It can be obtained that the attenuation error of the attenuator chip can be maintained at ±0.3dB at a frequency of DC ~30GHz, especially at 1 dB, 2 dB, 3 dB, and 4 dB, the attenuation accuracy is maintained at ±0.15dB. The higher the attenuation accuracy, the better the performance of the attenuator, and the more stable the attenuation can be at high frequencies.

[0035] Figure 3 , Figure 4The input return loss and output return loss of the attenuator are shown respectively. A higher return loss indicates less signal reflection, which means that the attenuator can effectively match the impedance of the system, thereby reducing the power loss and signal distortion caused by reflection. This is crucial to maintaining the signal integrity of the system and improving transmission efficiency. Through simulation, the input return loss and output return loss are both less than -15dB, especially the return loss is less than -20dB at 0~20GHz, and the input return loss is consistent with the output return loss curve, proving that the attenuator has good symmetry performance.

[0036] The above description is only a specific implementation of the present application, so that those skilled in the art can understand or implement the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest range consistent with the principles and novel features applied for herein.

[0037] Any matters not described in the present invention are applicable to the prior art.

Claims

1. An attenuator chip, characterized in that: The chip comprises a dielectric substrate and an attenuation unit arranged on the upper surface of the dielectric substrate, a ground plane is arranged on the back of the dielectric substrate, and the attenuation unit comprises an input pad, an output pad, a first ground pad, a second ground pad, a third ground pad, a fourth ground pad, a first thin film resistor, a second thin film resistor, a third thin film resistor, a fourth thin film resistor, a first grounding sheet, a second grounding sheet, a third grounding sheet, a fourth grounding sheet, a fifth grounding sheet, a sixth grounding sheet, a first transmission line, a second transmission line, a third transmission line, a fourth transmission line, a fifth transmission line, a sixth transmission line, a seventh transmission line, an eighth transmission line, a ninth transmission line, a tenth transmission line, and an eleventh transmission line; The input pad, the first thin film resistor, the second thin film resistor, and the output pad are arranged in sequence in a horizontal state from left to right in the middle position of the upper surface of the dielectric substrate, wherein the input pad is directly opposite to the output pad, the first thin film resistor is arranged in the middle position close to the right side of the input pad, the second thin film resistor is arranged in the middle position close to the left side of the output pad, and the first thin film resistor is directly opposite to the second thin film resistor; the seventh transmission line is arranged in the middle position between the first thin film resistor and the second thin film resistor; the input pad is connected to the first thin film resistor through the first transmission line, and the first thin film resistor is connected to the seventh transmission line through the third transmission line; the output pad is connected to the second thin film resistor through the second transmission line, and the second thin film resistor is connected to the seventh transmission line through the fourth transmission line; The structure formed by the input pad, the first transmission line, the first thin film resistor, and the third transmission line is rotated 180° to the right around the midpoint of the seventh transmission line and overlaps with the structure formed by the fourth transmission line, the second thin film resistor, the second transmission line, and the output pad; The fifth grounding sheet, the third thin film resistor, the seventh transmission line, the fourth thin film resistor, and the second grounding sheet are arranged in sequence from top to bottom in a vertical state at the middle position of the upper surface of the dielectric substrate, wherein the fifth grounding sheet is connected to one end of the third thin film resistor through the fifth transmission line, and the other end of the third thin film resistor is connected to the seventh transmission line; one end of the fourth thin film resistor is connected to the second grounding sheet through the sixth transmission line, and the other end of the fourth thin film resistor is connected to the seventh transmission line; The structure formed by the fifth grounding plate, the fifth transmission line, and the third thin-film resistor is rotated 180° to the right around the midpoint of the seventh transmission line and overlaps with the structure formed by the second grounding plate, the sixth transmission line, and the fourth thin-film resistor; A fourth ground pad and a first ground pad are disposed at equal intervals on the upper surface of the dielectric substrate on both sides of the input pad, and a third ground pad and a second ground pad are disposed at equal intervals on the upper surface of the dielectric substrate on both sides of the output pad; A sixth grounding sheet is provided at a middle position of the upper surface of the dielectric substrate on the upper side of the fourth grounding pad, a fourth grounding sheet is provided at a middle position of the upper surface of the dielectric substrate on the upper side of the third grounding pad, a first grounding sheet is provided at a middle position of the upper surface of the dielectric substrate on the lower side of the first grounding pad, and a third grounding sheet is provided at a middle position of the upper surface of the dielectric substrate on the lower side of the second grounding pad; the lower side of the sixth grounding sheet is connected to the upper side of the fourth grounding pad via an eighth transmission line, the lower side of the fourth grounding sheet is connected to the upper side of the third grounding pad via a ninth transmission line, the upper side of the first grounding sheet is connected to the lower side of the first grounding pad via a tenth transmission line, and the upper side of the third grounding sheet is connected to the lower side of the second grounding pad via an eleventh transmission line; A grounding through hole is provided in the middle of the first grounding plate, the second grounding plate, the third grounding plate, the fourth grounding plate, the fifth grounding plate and the sixth grounding plate, and the grounding through hole penetrates to the back side of the dielectric substrate; a conductive cylinder is provided in each grounding through hole, so that each grounding plate is electrically connected to the grounding surface on the back side of the dielectric substrate.

2. The attenuator chip according to claim 1, characterized in that: The first thin film resistor and the second thin film resistor have the same material and size, and the third thin film resistor and the fourth thin film resistor have the same material and size.

3. The attenuator chip according to claim 1, characterized in that: The third transmission line and the fourth transmission line have the same structure and size. The third transmission line L3 includes a first horizontal rectangular strip, a first right-angled triangle piece, a second vertical rectangular strip, a second right-angled triangle piece, a second horizontal rectangular strip, a third right-angled triangle piece, a third vertical rectangular strip, a fourth right-angled triangle piece, and a third horizontal rectangular strip, which are nine parts in total. The above nine parts are connected in sequence from left to right, wherein the left end of the first horizontal rectangular strip is connected to the middle of the left side of the first thin-film resistor R1, the right end of the first horizontal rectangular strip and the bottom end of the second vertical rectangular strip are respectively connected to the two right-angled sides of the first right-angled triangle piece, and the hypotenuse of the first right-angled triangle piece is located below the bottom end of the second vertical rectangular strip; The top of the second vertical rectangular strip and the left end of the second horizontal rectangular strip are respectively connected to the two right-angled sides of the second right-angled triangle piece, and the hypotenuse of the second right-angled triangle piece is located above the top of the second vertical rectangular strip; the right end of the second horizontal rectangular strip and the top of the third vertical rectangular strip are respectively connected to the two right-angled sides of the third right-angled triangle piece, and the hypotenuse of the third right-angled triangle piece is located above the top of the third vertical rectangular strip; the bottom end of the third vertical rectangular strip and the left end of the third horizontal rectangular strip are respectively connected to the two right-angled sides of the fourth right-angled triangle piece, and the hypotenuse of the fourth right-angled triangle piece is located below the bottom end of the third vertical rectangular strip; the right end of the third horizontal rectangular strip is connected to the middle of the left side of the seventh transmission line L7.

4. The attenuator chip according to claim 1, characterized in that: The dielectric substrate is a gallium arsenide material with a dielectric constant of 12.

9.

5. The attenuator chip according to claim 1, characterized in that: The dielectric substrate has a thickness of 75 μm, a horizontal length of 660 μm, and a vertical length of 760 μm.

6. The attenuator chip according to claim 1, characterized in that: When the attenuation is 1dB, 5dB, 6dB, and 7dB, the third thin film resistor and the fourth thin film resistor are epitaxial resistors, and when the attenuation is 2dB, 3dB, 4dB, and 10dB, the third thin film resistor and the fourth thin film resistor are tantalum nitride resistors.

7. The attenuator chip according to claim 1, characterized in that: The first thin film resistor and the second thin film resistor are both nitride resistors.

8. The attenuator chip according to claim 1, characterized in that: The input pad, output pad and ground pad are all square structures. The center distance between the input pad and the output pad is 342.9μm, the center distance between the first ground pad and the second ground pad, and the center distance between the third ground pad and the fourth ground pad is 342.9μm, and the size of each pad is 100μm×100μm, the center distance between the first ground pad and the fourth ground pad, and the center distance between the second ground pad and the third ground pad is 300μm; the size of all ground plates is 50μm×50μm.

9. The attenuator chip according to claim 1, characterized in that: The third transmission line and the fourth transmission line are equal in length and have a length range of 70 μm ~ 180 μm and a width range of 3.5 μm ~ 13 μm; the first transmission line and the second transmission line are equal in size and are 25 μm × 40.2 μm at 1 dB attenuation and 25 μm × 30.2 μm at other attenuations; the fifth transmission line and the sixth transmission line have a length range of 30 μm ~ 100 μm, the width of the seventh transmission line in the horizontal direction is consistent with the width of the third thin film resistor in the horizontal direction, and its length in the vertical direction varies with the length of the first thin film resistor in the vertical direction at different attenuations, and its length in the vertical direction ranges from 35.4 μm to 50.4 μm.

10. The attenuator chip according to claim 3, characterized in that: The vertical sides of the first horizontal rectangular strip, the second horizontal rectangular strip, and the third horizontal rectangular strip are equal in length, and are equal to the horizontal sides of the second vertical rectangular strip and the third vertical rectangular strip. The vertical sides of the second vertical rectangular strip and the third vertical rectangular strip are equal in length; the first right-angled triangle piece, the second right-angled triangle piece, the third right-angled triangle piece, and the fourth right-angled triangle piece are all isosceles right triangles, and the right-angled sides of the four are equal and equal in length to the vertical sides of the first horizontal rectangular strip.

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