Method for manufacturing circuit board with double-sided large-area-ratio gold plating bonding pad

Abstract

The invention discloses a method for manufacturing a circuit board with double-sided large-area-ratio gold plating pads, and the method comprises the steps: arranging a plurality of unit boards to form a jointed board structure, and enabling small pad patterns to be located on the front surface of the jointed board structure; the edge area of the jointed board structure is a process edge; drilling and electroplating the jointed board structure, and then manufacturing a circuit pattern including a small bonding pad pattern to form an outer circuit board; etching the plate edge to form a copper-free frame; etching a part of the process edge to form an etching windowing pattern; fixing a first insulating plate on the front surface of the jointed board structure in a non-contact manner, wherein the size of the first insulating plate covers the small bonding pad pattern; a second insulating plate is arranged at the bottom of the jointed board structure, and a to-be-electroplated structure is integrally formed; and then electrogilding and post-process processing are carried out to form the circuit board. By designing the jointed board structure and using the insulating board to cover the small bonding pad pattern, the contact density of the small bonding pad pattern and electroplating liquid medicine is reduced, the more uniform electroplating effect is achieved, the previous and later procedures are effectively matched, the reliability of the whole circuit board is improved, and the service life of the whole circuit board is prolonged.

Description

Technical Field

[0001] The invention relates to the field of circuit board manufacturing, and in particular to a method for manufacturing a circuit board with double-sided large-area electroplating gold pads. Background Art

[0002] For some high-frequency circuit boards, or some antenna circuit boards, there are large areas of board surface that require gold plating. According to application requirements, the other side of the circuit board is correspondingly designed with plug-in and press-type smaller gold pads. Therefore, both sides have pads that need gold plating, and the area of ​​the double-sided gold pads is relatively large.

[0003] For this type of circuit boards with pad patterns on both sides and an area ratio of more than 8:1, during the processing, the electroplating process of the small-area gold-plated pads is often more "intense", forming thicker electroplated gold, and the appearance appears whitish visually, while the electroplating process of the large-area gold-plated pads is more "weak", forming thinner electroplated gold, resulting in a large difference in the electroplated gold thickness of the pad patterns on both sides, affecting the reliability of the circuit board in the final application.

[0004] The manufacturing method of the prior art is: designing the arrangement of the pad pattern, arranging the large pad pattern and the small pad pattern alternately on the same surface, forming a balanced distribution of electric field lines, and improving the uniformity of electroplating gold; however, this method is more suitable for the case where the area ratio is less than 8:1. For the case of a larger area ratio, the problem of uneven electroplating gold will still occur.

[0005] Therefore, in order to solve the above-mentioned problems, it is necessary to provide a method for manufacturing a circuit board with double-sided large-area gold pads. Summary of the invention

[0006] The present invention aims to solve the comprehensive problems of uneven gold plating of pad patterns on both sides of the circuit board with large area ratio of double-sided electroplated gold pads made by the prior art, and proposes a method for manufacturing a circuit board with large area ratio of double-sided electroplated gold pads. The circuit board is processed by using a panel structure formed by splicing a plurality of unit boards. One side of the unit board is designed with a large pad pattern, and the other side is designed with a small pad pattern. The area ratio of the large pad pattern to the small pad pattern is greater than 8:1. The manufacturing method comprises the following steps: S10: Arrange a plurality of the unit boards to form the panel structure, and the small pad patterns are all located on the front of the panel structure; the edge area of ​​the panel structure is the process edge, and the area enclosed by the process edge is the pattern area; the process edge includes a clamping edge in the electroplating process, the edge opposite to the clamping portion is the bottom edge, and the other two edges are supporting edges; S20: drilling and electroplating the panel structure, and then making a circuit pattern to form an outer circuit board; the drilling includes drilling a positioning hole on the process edge; the circuit pattern includes the large pad pattern and the small pad pattern; the making of the circuit pattern includes etching the board edge to form a copper-free frame; etching off part of the process edge to form an etched window pattern; and also includes etching the positioning hole; S30: Take a first insulating plate and drill a through hole corresponding to the positioning hole; the first insulating plate is non-contactly fixed to the front surface of the panel structure through the positioning hole, and the size of the first insulating plate covers the small pad pattern in the panel structure; and a second insulating plate is arranged at the bottom of the panel structure to form a structure to be electroplated as a whole; S40: performing gold electroplating on the structure to be electroplated, and then performing post-processing to form the circuit board.

[0007] Furthermore, the circuit board is formed by arranging the front sides of several structures to be electroplated in the same direction, with the distance between two structures to be electroplated being greater than the distance between the insulating plate and the small pad pattern in a single structure, so that a multi-layer structure to be electroplated is formed as a whole, and then electroplating and post-processing are performed to form the circuit board.

[0008] Furthermore, the multi-layer structure to be electroplated includes an insulating plastic mesh plate arranged on the side where the large pad pattern is exposed.

[0009] Furthermore, the mesh number of the insulating plastic mesh is 35 to 71 meshes, preferably 45 meshes.

[0010] Furthermore, the distance between the first insulating plate and the small pad pattern in the structure to be electroplated is 5 mm to 20 mm.

[0011] Furthermore, the thickness of the first insulating plate is 1.0 mm to 10.0 mm, preferably 3.0 mm.

[0012] Furthermore, the drilling includes drilling fixing holes in the panel structure and the second insulating plate, and the second insulating plate and the panel structure are fixed through the fixing holes.

[0013] Furthermore, the length of the second insulating plate is 5 cm to 20 cm extending outward from the bottom edge, and the width is greater than or equal to the width of the size of the panel structure.

[0014] Furthermore, the etched window pattern is located on the supporting edge.

[0015] Furthermore, the width of the copper-free frame is 1 mm to 5 mm.

[0016] The technical solution of the present invention is to design the small pad patterns in the puzzle structure to be located on the same side, and use the first insulating plate to cover the small pad patterns to form a physical barrier to the disturbance of the electroplating solution, so as to effectively adjust the disturbance speed of the electroplating solution, reduce the exchange speed of the electroplating solution on the surface of the small pad pattern, make the electroplating gold thickness on the large pad and the small pad more uniform, reduce the phenomenon of uneven plating thickness caused by area difference, and finally achieve a more uniform electroplating effect, and solve the problem of uneven electroplating gold when making pad patterns with a large area ratio in the prior art; by arranging a second insulating plate at the bottom of the puzzle structure, it plays a role in replacing the floating frame to form an obstruction to the electroplating solution at the bottom of the puzzle structure, and can prevent the bottom of the puzzle structure from being stuck in the floating frame, avoid collision and adhesion between boards, ensure sufficient flow and contact of the electroplating solution, and avoid the problem of too thin electroplating gold or leakage; the front and rear processes form an effective coordination to form a uniform electroplating layer, which effectively improves the reliability and service life of the entire circuit board. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.

[0018] Figure 1 Schematic diagram of the process flow of an embodiment of the present invention; Figure 2 It is a schematic diagram of the reverse side of the panel structure according to the embodiment of the present invention; Figure 3 It is a front schematic diagram of a panel structure according to an embodiment of the present invention; Figure 4 It is a schematic diagram of the reverse side of the outer circuit board according to an embodiment of the present invention; Figure 5 A front schematic diagram of an outer circuit board according to an embodiment of the present invention; Figure 6 is a schematic plan view of a cover plate structure according to an embodiment of the present invention; Figure 7 A side schematic diagram of a cover plate structure according to an embodiment of the present invention; Figure 8 A schematic plan view of a structure to be electroplated according to an embodiment of the present invention; Fig. 9 A side schematic diagram of a structure to be electroplated according to an embodiment of the present invention; Fig.10 A schematic side view of a multi-layer structure to be electroplated according to an embodiment of the present invention; Fig.11 A schematic plan view of a large pad pattern according to an embodiment of the present invention; Fig.12 A schematic plan view of a small pad pattern according to an embodiment of the present invention.

[0019] Description of Figure Numbers:

[0020] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0022] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, inside, outside...) are only used to explain the relative position relationship, movement status, etc. between the components in a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0023] In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0024] In addition, the technical solutions between the various embodiments of the present invention can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0025] See also Figure 1 , Figure 1 Schematic diagram of the process flow of an embodiment of the present invention.

[0026] The circuit board of the embodiment of the present invention is processed using a panel structure 100 formed by splicing several unit boards. One side of the unit board is designed with a large pad pattern 1010, and the other side is designed with a small pad pattern 120. The area ratio of the large pad pattern 1010 to the small pad pattern 1020 is greater than 8:1.

[0027] The manufacturing process of the embodiment of the present invention includes using Figure 1 The following will implement the various steps in the process Figure 1 Each step in the process is further explained step by step.

[0028] See also Figure 2 and Figure 3 , Figure 2 It is a schematic diagram of the reverse side of the panel structure according to the embodiment of the present invention; Figure 3 It is a front schematic diagram of the puzzle structure according to an embodiment of the present invention.

[0029] S10: Arrange several unit boards to form a panel structure 10, and the small pad graphics 1020 are all located on the front of the panel structure 10; the edge area of ​​the panel structure 10 is the process edge 1030, and the area enclosed by the process edge 1030 is the graphic area; the process edge 1030 includes the clamping edge during the electroplating process, the edge opposite to the clamping part is the bottom edge, and the other two edges are supporting edges, which provide a plate basis for subsequent processing steps.

[0030] By designing to splice a number of unit panels to form a panel structure 10, a plurality of unit panels are processed simultaneously in a panel manner, thereby reducing the repetitive steps of processing a single panel.

[0031] See also Figure 4 and Figure 5 , Figure 4 It is a schematic diagram of the reverse side of the outer circuit board according to an embodiment of the present invention; Figure 5 It is a front schematic diagram of an outer circuit board according to an embodiment of the present invention.

[0032] S20: drilling and electroplating the panel structure 10, and then making a circuit pattern to form an outer circuit board 20; drilling includes drilling a positioning hole 2010 on the process edge 1030; the circuit pattern includes a large pad pattern 1010 and a small pad pattern 1020; making the circuit pattern includes etching the board edge to form a copper-free frame 2020; etching off part of the process edge to form an etched window pattern 2030; and also includes etching the positioning hole 2010.

[0033] In this embodiment, the positioning holes 2010 are drilled on the supporting edges on both sides of the panel structure 10. On the one hand, this provides a processing basis for fixing the first insulating plate 3010 through the positioning holes 2010 in the subsequent process. On the other hand, by avoiding drilling holes on the bottom edge, a larger processing space is provided for drilling fixing holes 4020 for setting the second insulating plate 4010 in the subsequent process.

[0034] Furthermore, in order to prevent the electroplating chuck 3030 from failing to clamp the conductive area and thus failing to form an electroplating effect, the copper-free frame 2020 needs to be made narrower, generally 1 mm to 5 mm.

[0035] Furthermore, the etched window pattern 2030 is located on the supporting edge, which prevents the vertical edge from forming more adsorption on the electric field lines, effectively avoiding the current shunting phenomenon caused by the contact of the fixture, so that the current can flow more concentratedly through the area to be plated, thereby improving the consistency and quality of the coating.

[0036] Optionally, the width of the etched window pattern 2030 is 5 mm to 20 mm. By reasonably setting the width of the etched window pattern 2030, it is possible to avoid interference with the electric field environment caused by some circuit conduction during the electroplating process to a large extent, thereby ensuring the formation of a high-quality flat coating.

[0037] See also Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Figure 6 is a schematic plan view of a cover plate structure according to an embodiment of the present invention; Figure 7 A side schematic diagram of a cover plate structure according to an embodiment of the present invention; Figure 8 A schematic plan view of a structure to be electroplated according to an embodiment of the present invention; Fig. 9 It is a side schematic diagram of a structure to be electroplated according to an embodiment of the present invention.

[0038] S30: Take the first insulating plate 3010 and drill a through hole corresponding to the positioning hole 2010; the first insulating plate 3010 is fixed to the front side of the panel structure 10 in a non-contact manner through the positioning hole 2010, and the size of the first insulating plate 3010 covers the small pad pattern 1020 in the panel structure 10; a cover plate structure 30 is formed, and a second insulating plate 4010 is set at the bottom of the panel structure 10, so that the structure to be electroplated 40 is formed as a whole.

[0039] Since the area of ​​the small pad pattern 1020 is smaller, the reaction with the gold electroplating solution is more intense. Therefore, the first insulating plate 3010 is designed in front of the small pad pattern 1020 to form a physical barrier to the gold electroplating solution, reduce the exchange intensity between the solution and the small pad pattern 1020, thereby reducing the reaction process of the gold electroplating, and forming an overall effect that the electroplating speed of the small pad pattern 1020 is much lower than the electroplating speed of the large pad pattern 1010, that is, by slowing down the electroplating reaction speed of the small pad pattern 1020, the electroplating completion time of the large pad pattern 1010 is close to the electroplating completion time of the small pad pattern 1020, and a uniform gold-plated surface layer is formed as a whole.

[0040] Optionally, the distance between the first insulating plate 3010 and the small pad pattern 1020 in the structure to be electroplated 40 is 5 mm to 20 mm. By controlling the distance between the first insulating plate 3010 and the small pad pattern 1010, the disturbance speed of the electroplating solution can be effectively adjusted, thereby reducing the exchange speed of the electroplating solution on the small pad surface, which helps to maintain stable chemical reaction conditions and ensure that metal ions can be deposited on the target surface at a stable rate to form an ideal coating.

[0041] Optionally, since the first insulating plate 3010 is not conductive during the gold plating process, the positioning hole 2010 has been etched in the previous process of making the circuit pattern, so the fixing buckle 3020 used to fix the first insulating plate cannot form a conductive loop, and the material is selected from insulating materials such as plastic bolts, plastic rivets or plastic pins.

[0042] Furthermore, the thickness of the first insulating plate 3010 is 1.0 mm to 10.0 mm, preferably 3.0 mm.

[0043] Optionally, the first insulating plate 3010 is made of PP, PVC, PTFE, epoxy resin or PET.

[0044] It is worth noting that the first insulating plate 3010 is in the direction of the clamping edge and the bottom edge, and the length of the distribution area of ​​the small pad pattern 1020 on one side is greater than or equal to 20 mm, ensuring that the small pad pattern 1020 can be fully covered, and the first insulating plate 3010 needs to make way for the electroplating chuck to ensure that the electroplating chuck can effectively clamp the panel structure 10.

[0045] In this embodiment, the drilling includes drilling fixing holes 4020 on the panel structure 10 and the second insulating plate 4010, and the second insulating plate 4010 is fixed to the panel structure 10 through the fixing holes 4020, that is, more than or equal to 2 copper-free fixing holes 4020 are correspondingly provided at the bottom of the panel structure 10 and the second insulating plate 4010, and the panel structure 10 and the second insulating plate 4010 are fixed by means of plastic rope binding, plastic pins, plastic bolts or plastic rivets.

[0046] Furthermore, providing a second insulating plate 4010 can prevent the bottom of the panel structure 10 from being stuck in the floating frame, avoid problems such as collision and adhesion between the panels, ensure sufficient flow and contact of the solution, and avoid problems such as too thin or leaking gold plating; further, the length of the second insulating plate 4010 is 5 cm to 20 cm extending outward from the bottom edge, and the width is greater than or equal to the width of the panel structure 10, thereby replacing the floating frame to form a barrier to the electroplating solution at the bottom of the panel structure 10.

[0047] Optionally, the material of the second insulating plate 4010 can be an insulating material such as PVC, epoxy resin or PTFE, or a scrapped copper-free surface plate can be used to achieve the recycling of plate resources and effectively reduce the processing cost.

[0048] Optionally, the thickness of the second insulating plate 4010 is 2.0 mm to 5.0 mm, preferably 2.0 mm or 3.0 mm.

[0049] See also Fig.10 , Fig.10 A schematic side view of a multi-layer structure to be electroplated according to an embodiment of the present invention.

[0050] In one implementation method, a circuit board is formed by arranging the front faces of a plurality of structures to be plated 40 in the same direction, with the distance between two structures to be plated 40 being greater than the distance between the first insulating plate 3010 and the small pad pattern 1020 in a single structure, so as to form a multi-layer structure to be plated 50 as a whole, and then performing electroplating and post-processing to form a circuit board, that is, first making an integral hanging plate structure 5010, and then making a conductive hole on the edge of the structure to be plated 40 near one end of the hook, and then fixing it with a conductive fixing tool, so that the fixed integral structure can be hung on the electroplating fixture through the integral hanging plate structure 5010, and then performing post-processing. Since the stacked structure is a multi-layer structure, even if the distance between the large gaps is large, it may cause certain obstacles to the disturbance and exchange of the solution. In order to balance the hindering effect of the solution exchange on the large pad pattern 1010 during the electroplating process, the multi-layer structure to be electroplated 50 includes an insulating plastic mesh 5020 set on the side where the large pad pattern 1010 is exposed, so that the disturbance and exchange of the solution on the side of the large pad pattern 1010 exposed on the outermost surface are hindered, so as to balance the electroplating effect of one side of all the large pad patterns 1010 in the overall multi-layer structure to be electroplated 50; by reasonably designing the shape and position of the insulating plastic mesh 5020, the concentration of the exchange solution can be controlled, thereby affecting the speed and direction of metal ion deposition and ensuring the consistency of the coating thickness.

[0051] It is worth noting that the distance between the insulating plastic mesh 5020 and the large pad pattern 1010 in the multi-layer structure to be plated 50 is less than or equal to the distance between two adjacent structures to be plated 40 .

[0052] Optionally, the mesh number of the insulating plastic mesh 5020 is 35 meshes to 71 meshes, preferably 45 meshes.

[0053] It is worth mentioning that in the actual processing process, in order to save processing costs and simplify the processing structure, the insulating beads can be strung together with metal ropes at intervals, so that the first insulating plate 3010 in each structure to be electroplated 40 and the puzzle structure 10 and the insulating plastic mesh 5020 are isolated from each other using insulating beads, replacing the hanging plate structure 5010. If a larger isolation distance is required, relatively more beads can be strung together, and then the metal rope is tied to the chuck of the electroplating fixture to complete the electroplating process. The metal rope forms an intermittent conductive effect according to the position of the beads, that is, the position of the beads is not conductive to the electroplating solution, while the position in contact with the conductive hole is conductive to the electroplating solution; similarly, the second insulating plate 4010 and the bottom of the puzzle structure 10 are fixed to each other, and can also be achieved by using an insulating rope combined with an intermittent string of insulating beads.

[0054] Please participate Fig.11 and Fig.12 , Fig.11 A schematic plan view of a large pad pattern according to an embodiment of the present invention; Fig.12 A schematic plan view of a small pad pattern according to an embodiment of the present invention.

[0055] S40: performing gold electroplating on the structure to be electroplated 40, and then performing post-processing to form a circuit board.

[0056] The structure 40 to be electroplated is placed in an electroplating tank containing a gold salt solution of appropriate concentration, and a certain voltage is applied to start the electroplating process.

[0057] After the electroplating is completed, the circuit board is taken out, cleaned and dried, and then subjected to detailed inspection and testing to confirm whether the quality of the coating has reached the predetermined target, and then continues with the post-processing and final molding.

[0058] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the inventive concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A method for manufacturing a circuit board with a double-sided large-area ratio electroplated gold pad, wherein the circuit board is processed using a panel structure formed by splicing a plurality of unit boards, one side of the unit board is designed with a large pad pattern, and the other side is designed with a small pad pattern, and the area ratio of the large pad pattern to the small pad pattern is greater than 8:1, characterized in that: The production method comprises the following steps: S10: arranging a plurality of the unit boards to form the panel structure, wherein the small pad patterns are all located on the front side of the panel structure; The edge area of ​​the panel structure is a process edge, and the area enclosed by the process edge is a graphic area; The process edge includes a clamping edge during the electroplating process, the edge opposite to the clamping portion is the bottom edge, and the other two edges are supporting edges; S20: drilling and electroplating the panel structure, and then making a circuit pattern to form an outer circuit board; The drilling includes drilling positioning holes at the process edge; The circuit pattern includes the large pad pattern and the small pad pattern; The circuit pattern making includes etching the board edge to form a copper-free frame; etching a portion of the process edge to form an etched window pattern; and etching the positioning hole; S30: Take the first insulating plate and drill through holes corresponding to the positioning holes; The first insulating plate is fixed to the front surface of the panel structure in a non-contact manner through the positioning hole, and the size of the first insulating plate covers the small pad pattern in the panel structure; A second insulating plate is arranged at the bottom of the panel structure to form a structure to be electroplated as a whole; S40: performing gold electroplating on the structure to be electroplated, and then performing post-processing to form the circuit board.

2. A method for manufacturing a circuit board with double-sided large-area gold pads as claimed in claim 1, characterized in that: The circuit board is formed by arranging the front faces of several structures to be electroplated in the same direction, with the distance between two structures to be electroplated being greater than the distance between the insulating plate and the small pad pattern in a single structure, so that a multi-layer structure to be electroplated is formed as a whole, and then electroplating and post-processing are performed to form the circuit board.

3. A method for manufacturing a circuit board with double-sided large-area gold pads as claimed in claim 2, characterized in that: The multi-layer structure to be electroplated includes an insulating plastic mesh plate arranged on a side where the large pad pattern is exposed.

4. A method for manufacturing a circuit board with double-sided large-area gold pads as claimed in claim 3, characterized in that: The mesh number of the insulating plastic mesh is 35 to 71 meshes, preferably 45 meshes.

5. A method for manufacturing a circuit board with double-sided large-area gold pads as claimed in claim 1 or 2, characterized in that: The distance between the first insulating plate and the small pad pattern in the structure to be electroplated is 5 mm to 20 mm.

6. A method for manufacturing a circuit board with double-sided large-area gold pads as claimed in claim 1 or 2, characterized in that: The thickness of the insulating plate is 1.0 mm to 10.0 mm, preferably 3.0 mm.

7. A method for manufacturing a circuit board with double-sided large-area gold pads as claimed in claim 1, characterized in that: The drilling includes drilling fixing holes on the panel structure and the second insulating plate, and the second insulating plate and the panel structure are fixed through the fixing holes.

8. A method for manufacturing a circuit board with double-sided large-area gold pads as claimed in claim 1 or 7, characterized in that: The length of the second insulating board is 5 cm to 20 cm extending outward from the bottom edge, and the width is greater than or equal to the width of the size of the panel structure.

9. A method for manufacturing a circuit board with double-sided large-area gold pads as claimed in claim 1, characterized in that: The etching window pattern is located on the supporting edge.

10. A method for manufacturing a circuit board with double-sided large-area gold pads as claimed in claim 1, characterized in that: The width of the copper-free frame is 1 mm to 5 mm.

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