Circuitry for assisting nerve sensing in implantable stimulator device in presence of stimulation artifacts

By designing circuits of differential amplifiers and comparator circuits in implantable stimulator devices, the problem of difficulty in sensing neural signals under stimulation artifacts is solved, and effective sensing and accuracy improvement of neural responses is achieved.

CN119770853APending Publication Date: 2025-04-08BOSTON SCI NEUROMODULATION CORP
View PDF 19 Cites 0 Cited by

Patent Information

Application Number
CN202510143574.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2019-03-29
Filing Date
2020-03-17
Publication Date
2025-04-08

AI Technical Summary

Technical Problem

In the presence of stimulation artifacts, it is difficult to effectively sense neural signals implantable in the stimulator device.

Method used

A circuit including a first electrode node, an amplifier, a comparator circuit and a logic circuit is designed to realize effective sensing of neural responses through the differential amplifier output and generation of enable signals.

Benefits of technology

This circuit can accurately sense neural responses while reducing the influence of stimulation artifacts, improving the sensing accuracy in the presence of artifacts.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119770853A_ABST
    Figure CN119770853A_ABST
Patent Text Reader

Abstract

A circuit for assisting nerve sensing in an implantable stimulator device in the presence of stimulation artifacts. A sense amplifier circuit is also disclosed that is particularly useful in sensing neural responses in an implantable pulse generator (IPG). The IPG includes a plurality of electrodes, one selected as a sensing electrode and another selected as a reference, to differentially sense the neural response in a manner that subtracts a common mode voltage (e.g., stimulation artifacts) from the measurement. These circuits include differential amplifiers that receive selected electrodes at their inputs, and comparator circuits for evaluating each differential amplifier input to determine whether its magnitude coincides with the input requirements of the differential amplifier. Based on these determinations, an enable signal is generated that notifies whether the output of the differential amplifier is effective to provide a neural response at any point in time. Further, a clamping circuit is connected to the differential amplifier inputs to clamp the magnitude of these inputs to prevent the differential amplifier from being damaged.
Need to check novelty before this filing date? Find Prior Art

Description

[0001] This application is a divisional application of the patent application with application number "202080021559.6", application date "March 17, 2020", and title "Circuitry for assisting neural sensing in an implantable stimulator device in the presence of stimulation artifacts". Technical Field

[0002] The present application relates to implantable medical devices (IMDs), and more particularly to circuits for assisting in sensing neural signals in implantable stimulator devices. Background Art

[0003] An implantable neurostimulator device is a device that generates and delivers electrical stimulation to the body's nerves and tissues to treat various biological disorders, such as pacemakers for treating cardiac arrhythmias, defibrillators for treating cardiac fibrillation, cochlear stimulators for treating deafness, retinal stimulators for treating blindness, muscle stimulators for producing coordinated limb movements, spinal cord stimulators for treating chronic pain, cortical and deep brain stimulators for treating movement and psychological disorders, other neurostimulators for treating urinary incontinence, sleep apnea, shoulder subluxation, etc. The following description generally focuses on the use of the present invention in a spinal cord stimulation (SCS) system, such as disclosed in U.S. Patent 6,516,227. However, the present invention may find application in any implantable neurostimulator device system.

[0004] SCS systems typically include Figure 1 1 and 1 . An implantable pulse generator (IPG) 10 is shown in FIG. 1 . The IPG 10 includes a biocompatible device housing 12 that houses circuitry and a battery 14 for providing power for operation of the IPG. The IPG 10 is coupled to tissue stimulation electrodes 16 via one or more electrode leads that form an electrode array 17. For example, one or more percutaneous leads 15 may be used that have an annular or open ring electrode 16 carried on a flexible body. In another example, a paddle lead 19 provides an electrode 16 positioned on one of its substantially flat surfaces. Lead wires 20 within the lead are coupled to the electrodes 16 and proximal contacts 21 in a lead connector 22 that may be inserted into a head 23 secured to the IPG 10, which head may include, for example, epoxy. Once inserted, the proximal contacts 21 are connected to head contacts 24 within the lead connector 22, which in turn are coupled to stimulation circuitry 28 within the housing 12 by feedthrough pins 25 through a housing feedthrough 26.

[0005] In the illustrated IPG 10, there are 32 electrodes (E1-E32), split between four percutaneous leads 15, or contained in a single paddle lead 19, and thus, the head 23 may include a 2x2 array of eight electrode lead connectors 22. However, the type and number of leads in the IPG and the number of electrodes are application specific and may therefore vary. The conductive housing 12 may also include electrodes (Ec). In SCS applications, one or more electrode leads are typically implanted in the spine near the dura mater in the patient's spinal cord, preferably across the left and right sides of the patient's spine. The proximal contacts 21 tunnel through the patient's tissue to a distal location, such as the buttocks where the IPG housing 12 is implanted, at which point they are coupled to the lead connectors 22. In other IPG examples designed for direct implantation at a site where stimulation is desired, the IPG may be leadless, with electrodes 16 instead appearing on the body of the IPG 10 for contacting the patient's tissue. In other solutions, one or more IPG leads may be integrated with the IPG 10 and permanently connected. The goal of SCS therapy is to provide electrical stimulation from electrodes 16 to relieve a patient's symptoms, such as chronic back pain.

[0006] The IPG 10 may include an antenna 27a to allow it to communicate bidirectionally with some external device used to program or monitor the IPG, such as a handheld patient controller or clinician programmer, as described, for example, in U.S. Patent Application Publication 2019 / 0175915. The antenna 27a as shown includes a conductive coil within the housing 12, although the coil antenna 27a may also be present in the head 23. When the antenna 27a is configured as a coil, communication with the external device preferably occurs using near-field magnetic induction. The IPG 10 may also include a radio frequency (RF) antenna 27b. Figure 1 , the RF antenna 27b is shown within the head 23, but it may also be within the housing 12. The RF antenna 27b may include a patch, a slot, or a wire, and may operate as a monopole or a dipole. The RF antenna 27b preferably communicates using far-field electromagnetic waves, and may operate according to any number of known RF communication standards such as Bluetooth, Zigbee, WiFi, MICS, and the like.

[0007] Stimulation in the IPG 10 is typically provided by pulses, each of which may include multiple phases, such as 30a and 30b, as shown in FIG. Figure 2AThe stimulation parameters typically include amplitude (current I, although voltage amplitude V may also be used); frequency (F); pulse width (PW) of the pulse or its independent phase; electrodes 16 selected to provide stimulation; and the polarity of these selected electrodes, i.e., whether they act as anodes that pull (source) current to the tissue or cathodes that sink (sink) current from the tissue. These and possibly other stimulation parameters together comprise a stimulation program that the stimulation circuit 28 in the IPG 10 can execute to provide therapeutic stimulation to the patient.

[0008] exist Figure 2A In the example of , electrode E4 has been selected as the anode (during its first phase 30a), and thus provides a pulse that pulls a positive current of amplitude +I to the tissue. Electrode E5 has been selected as the cathode (also during the first phase 30a), and thus provides a pulse that sinks a corresponding negative current of amplitude -I from the tissue. This is an example of bipolar stimulation, in which only two lead-based electrodes are used to provide stimulation to the tissue (one anode, one cathode). However, more than one electrode may be selected to act as an anode at a given time, and more than one electrode may be selected to act as a cathode at a given time.

[0009] As mentioned, the IPG 10 includes stimulation circuitry 28 to create prescribed stimulation at the patient's tissue. Figure 3 An example of a stimulation circuit 28 is shown, which includes one or more current pulling circuits 40 i and one or more current sink circuits 42 i . Pull circuit 40 i And irrigation circuit 42 i Digital-to-analog converters (DACs) may be included and may be referred to as PDAC 40i and NDAC 42i based on the positive (sourcing, anode) and negative (sinking, cathode) currents they source, respectively. In the example shown, NDAC / PDAC 40i / 42i i The pairing is dedicated (hardwired) to a specific electrode node ei 39. For reasons explained below, each electrode node ei 39 is connected to electrode Ei16 via a DC blocking capacitor Ci38. The stimulation circuit 28 in this example also supports the selection of the conductive housing 12 as the electrode (Ec12), which is typically selected for monopolar stimulation. PDAC 40 i and NDAC 42 i A voltage source may also be included.

[0010] About PDAC 40 i and NDAC 42 iProper control of allows any electrode 16 to act as an anode or cathode to create a current through the patient's tissue R, hopefully with a good therapeutic effect. In the example shown ( Figure 2A ), and during the first phase 30a (wherein electrodes E4 and E5 are selected as anode and cathode, respectively), PDAC 404 and NDAC 425 are activated and digitally programmed to generate the desired current I with the correct timing (e.g., at the specified frequency F and pulse width PWa). During the second phase 30b (PWb), PDAC 405 and NDAC 424 will be activated to reverse the polarity of the current. More than one anode electrode and more than one cathode electrode can be selected at the same time, and thus current can flow through the tissue R between two or more electrodes 16.

[0011] Power for the stimulation circuit 28 is provided by a compliance voltage VH. As described in further detail in U.S. Patent Application Publication 2013 / 0289665, the compliance voltage VH may be generated by a compliance voltage generator 29, which may include circuitry for boosting the voltage (Vbat) of the battery 14 to a voltage VH sufficient to drive a prescribed current I through the tissue R. The compliance voltage generator 29 may include an inductor-based boost converter as described in the '665 publication, or may include a capacitor-based charge pump. Because the resistance of the tissue is variable, VH may also be variable, and in one example may be as high as 18 volts.

[0012] Other stimulation circuits 28 may also be used in the IPG 10. In an example not shown, the switch matrix may include one or more PDACs 40. i and electrode node ei 39, and one or more NDACs 42 are interposed i Between the electrode nodes. The switch matrix allows one or more of the PDACs or one or more of the NDACs to be connected to one or more anode or cathode electrode nodes at a given time. Various examples of stimulation circuits can be found in U.S. Patents 6,181,969, 8,606,362, 8,620,436 and U.S. Patent Application Publications 2018 / 0071520 and 2019 / 0083796. Figure 3 Many of the stimulus circuits 28 (including the PDAC 40 i and NDAC 42 i, switch matrix (if present), and electrode nodes ei 39) can be integrated on one or more application specific integrated circuits (ASICs), such as described in U.S. Patent Application Publications 2012 / 0095529, 2012 / 0092031, and 2012 / 0095519. As explained in these references, one or more ASICs may also include other circuits useful in IPG 10, such as telemetry circuits (for interfacing off-chip with telemetry antennas 27a and / or 27b), compliance voltage generator 29, various measurement circuits, etc.

[0013] Figure 3 Also shown is a DC blocking capacitor Ci 38 placed in series in the electrode current path between electrode node ei 39 and each of the electrodes Ei 16 (including the housing electrode Ec 12). The DC blocking capacitor 38 acts as a safety measure to prevent DC current from being injected into the patient, such as might occur if there is a circuit fault in the stimulation circuit 28. The DC blocking capacitor 38 is typically provided off-chip (outside of one or more ASICs), and may alternatively be provided in or on a circuit board in the IPG 10 used to integrate its various components, as explained in US Patent Application Publication 2015 / 0157861.

[0014] Although not shown, the circuits in the IPG 10 including the stimulation circuit 28 may also be included in an external trial stimulator (ETS) device that is used to simulate the operation of the IPG during a trial period and before the IPG 10 is implanted. The ETS device is typically used after the electrode array 17 has been implanted in the patient. The proximal ends of the leads in the electrode array 17 pass through the patient's incision and are connected to an externally worn ETS, allowing the ETS to provide stimulation to the patient during the trial period. More details about the ETS device are described in USP9,259,574 and US Patent Application Publication 2019 / 0175915.

[0015] Reference again Figure 2A, the stimulation pulses shown are biphasic, wherein each pulse at each electrode includes a first phase 30a followed by a second phase 30b of opposite polarity. The biphasic pulses help to actively restore any charge that may be stored on capacitive elements in the electrode current path, such as a DC blocking capacitor 38, an electrode / tissue interface, or within the tissue itself. In order to restore all charge (Vc4=Vc5=0V) at the end of the second pulse phase 30b of each pulse, the first phase 30a and the second phase 30b are preferably charge balanced at each electrode, wherein the phases include an equal amount of charge but opposite polarity. In the example shown, this charge balance is achieved by using the same pulse width (PWa=PWb) and the same amplitude (|+I|=|-I|) for each of the pulse phases 30a and 30b. However, as is known, the pulse phases 30a and 30b can also be charge balanced if the product of the amplitude and pulse width of the two phases 30a and 30b is equal.

[0016] Figure 3 The stimulation circuit 28 is shown to include a passive recovery switch 41 i , which is further described in U.S. Patent Application Publications 2018 / 0071527 and 2018 / 0140831. Passive recovery switch 41 i The passive recovery switch 41 may be attached to each of the electrode nodes 39 and used to passively restore any charge remaining on the DC blocking capacitor Ci 38 after the second pulse phase 30b is delivered - that is, to restore the charge without actively driving current using the DAC circuit. Passive charge recovery may be prudent because non-idealities in the stimulation circuit 28 may result in pulse phases 30a and 30b that are not completely charge balanced. By closing the passive recovery switch 41 i , passive charge recovery typically occurs during at least a portion 30c of the quiet period between pulses ( Figure 2A ) period. Figure 3 As shown in FIG. 1 , switch 41 is not coupled to electrode node 39. i The other end of is connected to a common reference voltage, which in this example comprises the voltage Vbat of the battery 14, although another reference voltage may be used. As explained in the reference cited above, passive charge recovery tends to balance the charge on the DC blocking capacitor 38 and other capacitive elements by placing capacitors in parallel between the reference voltage (Vbat) and the patient's tissue. Note that passive charge recovery is Figure 2A The period 30c in FIG. 3 is shown as a small exponential decay curve, which may be positive or negative, depending on whether pulse phase 30a or 30b has charge dominance at a given electrode. Summary of the invention

[0017] An implantable medical device is disclosed, which may include: a first electrode node, which is coupleable to a first electrode configured to make electrical contact with patient tissue, and a second electrode node, which is coupleable to a second electrode configured to make electrical contact with the patient tissue, wherein the first electrode node is configured to receive a tissue signal from the patient tissue via the first electrode; an amplifier, which has a first input connected to the first electrode node and has a second input connected to the second electrode node, wherein the amplifier generates an amplifier output indicating the tissue signal; a first comparator circuit, which is configured to receive the first input and generate a first output indicating whether the first input meets the input requirements of the amplifier; a second comparator circuit, which is configured to receive the second input and generate a second output indicating whether the second input meets the input requirements of the amplifier; and a first logic circuit, which is configured to receive the first output and the second output and generate an enable signal, wherein the enable signal indicates whether the amplifier output indicating the tissue signal is valid or invalid.

[0018] In one example, the first electrode node and the second electrode node include two of a plurality of electrode nodes, and wherein the first electrode and the second electrode include two of a plurality of electrodes, wherein each of the plurality of electrode nodes can be coupled to a different one of the plurality of electrodes, wherein the plurality of electrodes are configured to make electrical contact with the tissue of the patient. In one example, the implantable medical device further includes a selector circuit configured to select the first electrode node and the second electrode node from the plurality of electrode nodes. In one example, the implantable medical device further includes a stimulation circuit configured to generate stimulation in the tissue via a selected electrode of the plurality of electrodes, wherein the tissue signal is generated in the tissue of the patient in response to the stimulation. In one example, the second electrode includes a conductive housing of the implantable medical device. In one example, the implantable medical device further includes a lead, wherein the lead includes the first electrode and the second electrode. In one example, a first DC blocking capacitor is interposed between the first electrode node and the first electrode, and wherein a second DC blocking capacitor is interposed between the second electrode node and the second electrode. In one example, the tissue signal includes a neural response. In one example, the implantable medical device further comprises: a first clamp circuit configured to prevent the voltage at the first input from exceeding a first value; and a second clamp circuit configured to prevent the voltage at the second input from exceeding the first value. In one example, the first clamp circuit is also configured to prevent the voltage at the first input from being lower than a second value, and wherein the second clamp circuit is also configured to prevent the voltage at the second input from being lower than a second value. In one example, the implantable medical device further comprises: a first DC level shift circuit configured to set a DC voltage reference at the first input; and a second DC level shift circuit configured to set the DC voltage reference at the second input. In one example, the amplifier comprises a first input transistor having a first control terminal for receiving the first input, and a second input transistor having a second control terminal for receiving the second input, wherein the first input transistor and the second input transistor comprise threshold voltages that must be exceeded at the first input and the second input, respectively, to turn on the first transistor and the second transistor. In one example, the first comparator circuit includes a first comparator configured to indicate at the first output whether the voltage at the first input exceeds the threshold voltage, and wherein the second comparator circuit includes a second comparator configured to indicate at the second output whether the voltage at the second input exceeds the threshold voltage.In one example, the first comparator circuit includes: a first comparator configured to indicate whether the voltage at the first input exceeds a first voltage, a second comparator configured to indicate whether the voltage at the first input is lower than a second voltage, and a second logic circuit configured to receive the outputs of the first and second comparators and generate the first output, wherein the first output indicates whether the voltage at the first input is between the first and second voltages; and wherein the second comparator circuit includes: a third comparator configured to indicate whether the voltage at the second input exceeds the first voltage, a fourth comparator configured to indicate whether the voltage at the second input is lower than the second voltage, and a second logic circuit configured to receive the outputs of the third and fourth comparators and generate the second output, wherein the second output indicates whether the voltage at the second input is between the first and second voltages. In one example, the first voltage includes a threshold voltage of an input transistor in the amplifier, and wherein the second voltage includes a supply voltage of the amplifier. In one example, the implantable medical device further includes a control circuit configured to receive an amplifier output indicative of the tissue signal, wherein the control circuit is programmed with an algorithm configured to analyze the amplifier output, wherein the operation of the algorithm is controlled by the enable signal.

[0019] An implantable medical device is disclosed, which may include: a first electrode node, which is coupleable to a first electrode configured to make electrical contact with patient tissue, wherein the first electrode node is configured to receive a tissue signal from the patient tissue via the first electrode; an amplifier having a first input connected to the first electrode node and a second input connectable to a reference voltage, wherein the amplifier generates an amplifier output indicative of the tissue signal; and a comparator circuit, which is configured to receive the first input and generate an enable signal indicating whether the first input meets an input requirement of the amplifier, wherein the enable signal indicates whether the amplifier output indicative of the tissue signal is valid or invalid.

[0020] In one example, wherein the first electrode node comprises one of a plurality of electrode nodes, and wherein the first electrode comprises one of a plurality of electrodes, wherein each of the plurality of electrode nodes may be coupled to a different one of the plurality of electrodes, wherein the plurality of electrodes are configured to make electrical contact with tissue of the patient. In one example, the implantable medical device further comprises a selector circuit configured to select the first electrode node from the plurality of electrode nodes. In one example, the implantable medical device further comprises a stimulation circuit configured to generate stimulation in the tissue via a selected electrode of the plurality of electrodes, wherein the tissue signal is generated in the tissue of the patient in response to the stimulation. In one example, the reference voltage comprises a DC voltage. In one example, the implantable medical device further comprises a lead, wherein the lead comprises the first electrode. In one example, a first DC blocking capacitor is interposed between the first electrode node and the first electrode. In one example, the tissue signal comprises a neural response. In one example, the implantable medical device further comprises a clamp circuit configured to prevent a voltage at the first input from exceeding a first value. In one example, the clamp circuit is further configured to prevent a voltage at the first input from being lower than a second value. In one example, the implantable medical device further comprises a DC level shift circuit configured to set a DC voltage reference at the first input. In one example, the amplifier includes a first input transistor having a first control terminal for receiving the first input, and a second input transistor having a second control terminal for receiving the second input, wherein the first input transistor and the second input transistor include threshold voltages that must be exceeded at the first input and the second input, respectively, to turn on the first transistor and the second transistor. In one example, the comparator circuit includes a comparator configured to indicate at an enable signal whether the voltage at the first input exceeds the threshold voltage. In one example, the comparator circuit includes: a first comparator configured to indicate whether the voltage at the first input exceeds a first voltage, a second comparator configured to indicate whether the voltage at the first input is less than a second voltage, and a logic circuit configured to receive the outputs of the first comparator and the second comparator and generate the enable signal, wherein the enable signal indicates whether the voltage at the first input is between the first voltage and the second voltage. In one example, the first voltage includes a threshold voltage of an input transistor in the amplifier, and wherein the second voltage includes a supply voltage of the amplifier. In one example, the implantable medical device further includes a control circuit configured to receive an amplifier output indicative of the tissue signal, wherein the control circuit is programmed with an algorithm configured to analyze the amplifier output, wherein operation of the algorithm is controlled by the enable signal.

[0021] An implantable medical device is disclosed, which may include: a first electrode node, which is coupleable to a first electrode configured to make electrical contact with patient tissue, and a second electrode node, which is coupleable to a second electrode configured to make electrical contact with the patient tissue, wherein the first electrode node is configured to receive a tissue signal from the patient tissue via the first electrode; an amplifier, which has a first input connected to the first electrode node and has a second input connected to the second electrode node, wherein the amplifier generates a first amplifier output and a second amplifier output, which together include a differential amplifier output indicating the tissue signal; a comparator circuit, which is configured to determine a first comparator output indicating whether the first input meets the input requirements of the amplifier from the first amplifier output, and to determine a second comparator output indicating whether the second input meets the input requirements of the amplifier from the second amplifier output; and a logic circuit, which is configured to receive the first comparator output and the second comparator output and generate an enable signal, wherein the enable signal indicates whether the differential amplifier output indicating the tissue signal is valid or invalid.

[0022] In one example, the first electrode node and the second electrode node include two of a plurality of electrode nodes, and wherein the first electrode and the second electrode include two of a plurality of electrodes, wherein each of the plurality of electrode nodes can be coupled to a different one of the plurality of electrodes, wherein the plurality of electrodes are configured to make electrical contact with the tissue of the patient. In one example, the implantable medical device further includes a selector circuit configured to select the first electrode node and the second electrode node from the plurality of electrode nodes. In one example, the implantable medical device further includes a stimulation circuit configured to generate stimulation in the tissue via a selected electrode of the plurality of electrodes, wherein the tissue signal is generated in the tissue of the patient in response to the stimulation. In one example, the second electrode includes a conductive housing of the implantable medical device. In one example, the implantable medical device further includes a lead, wherein the lead includes the first electrode and the second electrode. In one example, a first DC blocking capacitor is interposed between the first electrode node and the first electrode, and wherein a second DC blocking capacitor is interposed between the second electrode node and the second electrode. In one example, the tissue signal includes a neural response. In one example, the implantable medical device further comprises: a first clamp circuit configured to prevent the voltage at the first input from exceeding a first value; and a second clamp circuit configured to prevent the voltage at the second input from exceeding the first value. In one example, the first clamp circuit is also configured to prevent the voltage at the first input from being lower than a second value, and wherein the second clamp circuit is also configured to prevent the voltage at the second input from being lower than the second value. In one example, the implantable medical device further comprises: a first DC level shift circuit configured to set a DC voltage reference at the first input; and a second DC level shift circuit configured to set the DC voltage reference at the second input. In one example, the amplifier comprises a first input transistor having a first control terminal for receiving the first input, and a second input transistor having a second control terminal for receiving the second input, wherein the first input transistor and the second input transistor comprise threshold voltages that must be exceeded at the first input and the second input, respectively, to turn on the first transistor and the second transistor. In one example, the amplifier further comprises a first resistor connected in series between the first input transistor and a power supply voltage, and a second resistor connected in series between the second input transistor and the power supply voltage, wherein the first amplifier output comprises a node between the first input transistor and the first resistor, and wherein the second amplifier output comprises a node between the second input transistor and the second resistor. In one example, the comparator circuit comprises: a first comparator configured to indicate whether a voltage at the first differential output is lower than a first voltage; and a second comparator configured to indicate whether a voltage at the second differential output is lower than the first voltage.In one example, the amplifier is powered by a supply voltage, and wherein the first voltage is less than the supply voltage. In one example, the implantable medical device further comprises a control circuit configured to receive a differential amplifier output indicative of a tissue signal, wherein the control circuit is programmed with an algorithm configured to analyze the amplifier output, wherein operation of the algorithm is controlled by the enable signal.

[0023] An implantable medical device is disclosed, which may include: a first electrode node, which is coupleable to a first electrode configured to make electrical contact with patient tissue, wherein the first electrode node is configured to receive a tissue signal from the patient tissue via the first electrode; an amplifier, which has a first input connected to the first electrode node and a second input connectable to a reference voltage, wherein the amplifier generates a first amplifier output and a second amplifier output, which together include a differential amplifier output indicative of the tissue signal; and a comparator circuit, which is configured to determine an enable signal from the first amplifier output indicating whether the first input meets input requirements of the amplifier, wherein the enable signal indicates whether the differential amplifier output indicative of the tissue signal is valid or invalid.

[0024] In one example, wherein the first electrode node comprises one of a plurality of electrode nodes, and wherein the first electrode comprises one of a plurality of electrodes, wherein each of the plurality of electrode nodes may be coupled to a different one of the plurality of electrodes, wherein the plurality of electrodes are configured to make electrical contact with tissue of the patient. In one example, the implantable medical device further comprises a selector circuit configured to select the first electrode node from the plurality of electrode nodes. In one example, the implantable medical device further comprises a stimulation circuit configured to generate stimulation in the tissue via a selected electrode of the plurality of electrodes, wherein the tissue signal is generated in the tissue of the patient in response to the stimulation. In one example, the reference voltage comprises a DC voltage. In one example, the implantable medical device further comprises a lead, wherein the lead comprises the first electrode. In one example, a first DC blocking capacitor is interposed between the first electrode node and the first electrode. In one example, the tissue signal comprises a neural response. In one example, the implantable medical device further comprises a clamp circuit configured to prevent a voltage at the first input from exceeding a first value. In one example, the clamp circuit is further configured to prevent a voltage at the first input from being lower than a second value. In one example, the implantable medical device further comprises a DC level shift circuit configured to set a DC voltage reference at the first input. In one example, the amplifier includes a first input transistor having a first control terminal for receiving the first input, and a second input transistor having a second control terminal for receiving the second input, wherein the first input transistor and the second input transistor include threshold voltages that must be exceeded at the first input and the second input, respectively, to turn on the first transistor and the second transistor. In one example, the amplifier also includes a first resistor connected in series between the first input transistor and a power supply voltage, and a second resistor connected in series between the second input transistor and the power supply voltage, wherein the first amplifier output includes a node between the first input transistor and the first resistor, and wherein the second amplifier output includes a node between the second input transistor and the second resistor. In one example, the comparator circuit includes: a comparator configured to indicate whether a voltage at a first differential output is lower than a first voltage. In one example, the amplifier is powered by a power supply voltage, and wherein the first voltage is less than the power supply voltage. In one example, the implantable medical device also includes a control circuit configured to receive a differential amplifier output indicating a tissue signal, wherein the control circuit is programmed with an algorithm configured to analyze the amplifier output, wherein the operation of the algorithm is controlled by the enable signal.

[0025] An implantable medical device is disclosed, which may include: a first electrode node, which is coupleable to a first electrode configured to make electrical contact with patient tissue, and a second electrode node, which is coupleable to a second electrode configured to make electrical contact with the patient tissue, wherein the first electrode node is configured to receive a tissue signal from the patient tissue via the first electrode; an amplifier having a first input connected to the first electrode node and having a second input connected to the second electrode node, wherein the amplifier generates an amplifier output indicative of the tissue signal; a first clamp circuit, which is configured to prevent a voltage at the first input from exceeding a first value; and a second clamp circuit, which is configured to prevent a voltage at the second input from exceeding the first value.

[0026] In one example, the first clamp circuit is further configured to prevent the voltage at the first input from being lower than a second value, and wherein the second clamp circuit is further configured to prevent the voltage at the second input from being lower than the second value. In one example, the first electrode node and the second electrode node include two of a plurality of electrode nodes, and wherein the first electrode and the second electrode include two of a plurality of electrodes, wherein each of the plurality of electrode nodes can be coupled to a different one of the plurality of electrodes, wherein the plurality of electrodes are configured to make electrical contact with the patient's tissue. In one example, the implantable medical device further includes a selector circuit configured to select the first electrode node and the second electrode node from the plurality of electrode nodes. In one example, the implantable medical device further includes a stimulation circuit configured to generate stimulation in the tissue via a selected electrode of the plurality of electrodes, wherein the tissue signal is generated in the patient's tissue in response to the stimulation. In one example, the second electrode includes a conductive housing of the implantable medical device. In one example, the implantable medical device further includes a lead, wherein the lead includes the first electrode and the second electrode. In one example, a first DC blocking capacitor is interposed between the first electrode node and the first electrode, and wherein a second DC blocking capacitor is interposed between the second electrode node and the second electrode. In one example, the tissue signal includes a neural response.

[0027] An implantable medical device is disclosed, which may include: a first electrode node, which is coupleable to a first electrode configured to make electrical contact with patient tissue, and a second electrode node, which is coupleable to a second electrode configured to make electrical contact with the patient tissue, wherein the first electrode node is configured to receive a tissue signal from the patient tissue via the first electrode; an amplifier having a first input connected to the first electrode node and having a second input connected to the second electrode node, wherein the amplifier generates an amplifier output indicative of the tissue signal; a first DC level shifting circuit, which is configured to set a DC voltage reference at the first input; and a second DC level shifting circuit, which is configured to set the DC voltage reference at the second input.

[0028] In one example, the first electrode node and the second electrode node include two of a plurality of electrode nodes, and wherein the first electrode and the second electrode include two of a plurality of electrodes, wherein each of the plurality of electrode nodes can be coupled to a different one of the plurality of electrodes, wherein the plurality of electrodes are configured to make electrical contact with the tissue of the patient. In one example, the implantable medical device further includes a selector circuit configured to select the first electrode node and the second electrode node from the plurality of electrode nodes. In one example, the implantable medical device further includes a stimulation circuit configured to generate stimulation in the tissue via a selected electrode of the plurality of electrodes, wherein the tissue signal is generated in the tissue of the patient in response to the stimulation. In one example, the second electrode includes a conductive housing of the implantable medical device. In one example, the implantable medical device further includes a lead, wherein the lead includes the first electrode and the second electrode. In one example, a first DC blocking capacitor is interposed between the first electrode node and the first electrode, and wherein a second DC blocking capacitor is interposed between the second electrode node and the second electrode. In one example, the tissue signal includes a neural response. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 An implantable pulse generator (IPG) according to the prior art is shown.

[0030] Figure 2A and Figure 2B Examples of stimulation pulses that may be generated by an IPG according to the prior art are shown.

[0031] Figure 3 A stimulation circuit that can be used for an IPG according to the prior art is shown.

[0032] Figure 4 An improved IPG is shown with neural response sensing and the ability to adjust stimulation depending on this sensing.

[0033] Figure 5A-5D Stimulation that produces a neural response is shown, and the neural response is sensed at at least one electrode of the IPG using a differential amplifier.

[0034] Fig. 6A and Figure 6B A first example of a sense amplifier circuit having a differential amplifier for sensing a neural response is shown, including a clamp circuit for an input of the differential amplifier, a comparator circuit for determining whether the magnitude of the input is too low, and a logic circuit for generating an enable signal that notifies when the output of the differential amplifier is valid.

[0035] Fig. 7A and Figure 7B Shows something like Fig. 6A and Figure 6B A second example of a sense amplifier circuit of FIG. 1 , but includes a comparator circuit for determining whether the magnitude of the input is too low or too high.

[0036] Figure 8 A third example of a sense amplifier circuit similar to that described above is shown, including a comparator circuit for determining whether the output of the differential amplifier is valid for sensing, and generating an enable signal notifying when the output of the differential amplifier is valid.

[0037] Fig. 9 Shows the combination Fig. 7A and Figure 8 A fourth example of a sense amplifier circuit of the method.

[0038] Fig. 10A and Fig. 10B Other examples of sense amplifier circuits used in a differential sensing mode are shown, where one of the inputs to the differential amplifier is set to a DC voltage. DETAILED DESCRIPTION

[0039] An increasingly interesting development in pulse generator systems, and particularly in spinal cord stimulator (SCS) pulse generator systems, is the addition of sensing capabilities to supplement the stimulation provided by such systems. For example, and as explained in U.S. Patent Application Publication 2017 / 0296823, it may be beneficial to sense neural responses in neural tissue that receives stimulation from an SCS pulse generator. One such neural response is the evoked compound action potential (ECAP). The ECAP comprises the cumulative response provided by the neural fibers recruited by the stimulation, and essentially comprises the sum of the action potentials of the recruited fibers as they "fire." The ECAP is Figure 4, and includes multiple peaks, which are conventionally labeled with P for positive peaks and N for negative peaks, where P1 includes the first positive peak, N1 includes the first negative peak, P2 includes the second positive peak, and so on. Note that not all ECAPs will have such Figure 4 The exact shape and number of peaks shown in is because the shape of the ECAP is a function of the number and type of nerve fibers that are recruited and involved in its conduction. The ECAP is typically a small signal and may have a peak-to-peak amplitude on the order of tens of microvolts to tens of millivolts.

[0040] Figure 4 Also shown in FIG. 1 is a circuit for an IPG 100 (or ETS) that is capable of providing stimulation and sensing the resulting ECAP or other neural responses or signals. The IPG 100 includes a control circuit 102 that may include a microcontroller, such as part number MSP430 manufactured by Texas Instruments, which is described in the data sheet at http: / / www.ti.com / lsds / ti / microcontroller / 16-bit_msp430 / overview.page?DCMP=MCU_other&HQS=msp430. Other types of controller circuits may also be used in place of a microcontroller, such as a microprocessor, FPGA, DSP, or a combination of these. The control circuit 102 may also be formed in whole or in part in one or more application specific integrated circuits (ASICs), such as those described previously.

[0041] The IPG 100 also includes a stimulation circuit 28 to generate stimulation at the electrode 16, which may include the stimulation circuit 28 ( Figure 3 ). Bus 118 provides one or more PDACs 40 i or NDAC 42 i Digital control signals from the control circuit 102 (and possibly from the ECAP algorithm 124, described below) are provided to generate current or voltage of a specified amplitude (I) for the stimulation pulse, and with the correct timing (PW,f). As previously mentioned, the DAC can be powered between the compliance voltage VH and ground. Also as previously mentioned, but not in Figure 4 As shown in FIG. 1 , a switch matrix may be interposed between the PDAC and the electrode node 39 and between the NDAC and the electrode node to route their outputs to one or more of the electrodes, including the conductive housing electrode 12 (Ec). The control signals for the switch matrix, if present, may also be carried by bus 118. Note that the current path to electrode 16 includes the previously described DC blocking capacitor 38, which provides safety by preventing inadvertent supply of DC current to the electrode and to the patient's tissue. A passive recovery switch 41 may also be present. i ( Figure 3), but not shown here for simplicity. Figure 4 Shown in.

[0042] IPG 100 also includes sensing circuitry 115, and may use one or more of electrodes 16 to sense neural responses, such as the ECAP described previously. In this regard, each electrode node 39 may also be coupled to a sense amplifier circuit 110. Under control of bus 114, multiplexer 108 may select one or more electrodes to operate as sensing electrodes by coupling one or more electrodes to sense amplifier circuitry 110 at a given time, as further explained below. Although Figure 4 Only one multiplexer 108 and sense amplifier circuit 110 is shown, but there may be more than one. For example, there may be four multiplexer 108 / sense amplifier circuit 110 pairs, each pairing operable within one of four timing channels supported by the IPG 100 to provide stimulus. The analog waveforms including the ECAP are preferably converted to digital signals by one or more analog-to-digital converters (ADC(s)) 112, which may sample the waveforms at, for example, 50 kHz. The ADC(s) 112 may also reside within the control circuit 102, particularly if the control circuit 102 has A / D inputs. The multiplexer 108 may also provide a reference voltage Vamp to the sense amplifier circuit 110, which may be useful in a single-ended sensing mode, as described later with reference to FIG. Fig. 10A and Fig. 10B Explained.

[0043] In order not to bypass the safety provided by the DC blocking capacitor 38, the input to the sense amplifier circuit 110 is preferably taken from the electrode node 39, and thus the DC blocking capacitor 38 is interposed between the electrode 16 where the ECAP is sensed and the electrode node 39. However, because the DC blocking capacitor 38 will pass the AC signal while blocking the DC component, the AC ECAP signal will pass the capacitor 38 and still be easily sensed by the sense amplifier circuit 110. In other examples, the ECAP can be sensed directly at the electrode 16 without passing through the intervening capacitor 38.

[0044] As shown, the ECAP algorithm 124 is programmed into the control circuit 102 to receive and analyze the digitized ECAP. Those skilled in the art will appreciate that the ECAP algorithm 124 may include instructions that may be stored on a non-transitory machine-readable medium, such as a magnetic, optical, or solid-state memory within the IPG 100 (e.g., stored in association with the control circuit 102).

[0045] exist Figure 4 In the example shown in FIG. 1 , ECAP algorithm 124 operates within IPG 100 to determine one or more ECAP features, which may include, but are not limited to:

[0046] The height of any peak present in the ECAP (e.g., H_N1);

[0047] The peak-to-peak height between any two peaks (such as H_PtoP from N1 to P2);

[0048] Peak height ratio (e.g., H_N1 / H_P2);

[0049] The peak width of any peak (e.g., the full width at half maximum of N1, FWHM_N1);

[0050] The area under any peak (e.g., A_N1);

[0051] Total area (A_tot), which includes the area under the positive peaks minus or plus the area under the negative peaks;

[0052] The length of any portion of the ECAP curve (e.g., the length of the curve from P1 to N2, L_P1toN2)

[0053] Any time that defines the duration of at least a portion of an ECAP (e.g., the time from P1 to N2, t_P1toN2);

[0054] The time delay from stimulation to the onset of the ECAP, which indicates the nerve conduction velocity of the ECAP, may vary in different types of neural tissue;

[0055] • Any mathematical combination or function of these variables (e.g., H_N1 / FWHM_N1 will typically specify the quality factor of peak N1).

[0056] Once the ECAP algorithm 124 determines one or more of these characteristics, it can adjust the stimulation provided by the IPG 100, such as by providing new data to the stimulation circuit 28 via the bus 118. This is further explained in U.S. Patent Application Publications 2017 / 0296823 and 2019 / 0099602. In a simple example, the ECAP algorithm 124 can check the height of the ECAP (e.g., its peak-to-peak voltage) and adjust the amplitude I of the stimulation current in a closed-loop manner to try to keep the ECAP at a desired value.

[0057] Figure 5A and Figure 5B A percutaneous lead 15 is shown, and Figure 2AAn example of a stimulation procedure is shown in which electrodes E4 and E5 are used to generate pulses in a bipolar stimulation mode, wherein (during a first phase 30a) E4 comprises an anode and E5 comprises a cathode, although other electrode arrangements (e.g., tripolar, etc.) may also be used. This stimulation generates an electromagnetic (EM) field 130 in the patient's tissue volume around the selected electrodes. Some of the nerve fibers within the EM field 130 will be recruited and ignited, particularly those near the cathode electrode E5. It is hoped that the sum of the nerve fiber ignitions will mask the signals indicating pain in the SCS application, thereby providing the desired treatment. The recruited nerve fibers collectively generate an ECAP, which can travel rostrally toward the brain and can travel caudally away from the brain. The ECAP travels through the spinal cord via neural conduction, with a speed that depends on the nerve fibers involved in the conduction. In one example, the ECAP can move at a speed of approximately 5 cm / 1 ms.

[0058] ECAP preferably uses two electrodes for differential sensing, and Figure 5A and Figure 5B Different examples are shown. Figure 5A , a single electrode E8 on lead 15 is used for sensing (S+) and another signal is used as a reference (S-). In this example, the sensing reference S- comprises a further electrode in electrode array 17 or (as shown) the housing electrode Ec. (However, the reference S- could also comprise a fixed voltage provided by IPG 100, such as ground, in which case the sensing can be said to be single-ended rather than differential.) Figure 5B In the example, two lead-based electrodes are used for sensing, and these electrodes are adjacent to each other or at least relatively close to each other. Specifically, in this example, electrode E8 is again used for sensing (S+), and the adjacent electrode E9 provides a reference (S-). This can also be reversed, with E8 providing a reference (S-) for the sensing at electrode E9 (S+). Sensing a given ECAP at different electrodes can allow the ECAP algorithm 124 to understand the time difference between the arrival of the ECAP at each of the electrodes. If the distance x between the electrodes is known, the ECAP algorithm 124 can calculate the speed of the ECAP. As mentioned above, the ECAP speed indicates the neural fibers involved in neural recruitment and conduction, which can be interesting to know in its own right, and this can be useful to the ECAP algorithm 124 in adjusting the stimulation provided by the stimulation circuit 28.

[0059] Figure 5CWaveforms of a stimulation procedure are shown, as well as signals that would appear in the tissue at the sensing electrode E8 (S+). In addition to the ECAP to be sensed, the signal at the sensing electrode S+ also includes a stimulation artifact 134. The stimulation artifact 134 includes a voltage formed in the tissue due to the stimulation, i.e., due to the EM field 130. As described in U.S. Patent Application Publication 2019 / 0299006, the PDAC and NDAC used to form a current in the tissue have a high output impedance. This causes the voltage in the tissue to vary between ground and the compliance voltage VH used to power the DAC, which, as mentioned earlier, can be a high voltage (e.g., up to 18V). The size of the stimulation artifact 134 at a given sensing electrode S+ or its reference S- can therefore be very high (e.g., several volts) and significantly higher than the size of the ECAP. The size of the stimulation artifact 134 at the sensing electrodes S+ and S- depends on many factors. For example, if the sensing electrode is closer to the electrodes (E4, E5) used to provide stimulation, the stimulation artifact 134 will be larger. The stimulation artifact 134 is also typically larger during the delivery of the pulse, although it may still exist even after the pulse (ie, the last phase 30b of the pulse) has ceased due to the capacitive properties of the tissue, which prevents the electric field 130 from immediately dissipating.

[0060] The relatively large signal background stimulation artifact 134 can make it difficult to resolve and sense the small signal ECAP at the sense amplifier circuit 110. To ameliorate this concern, it may be beneficial to use a sensing electrode S+ that is distant from the stimulation electrode. See, e.g., U.S. patent application Ser. No. 16 / 661,549, filed Oct. 23, 2019. This may be beneficial because the stimulation artifact 134 will be small at the distant sensing electrode and because the ECAP will pass through the distant sensing electrode (e.g., S+) at a later time when the stimulation artifact 134 may have dissipated. Figure 5C 2). However, it is not always possible or practical to use remote sensing electrodes. On the one hand, the electrode array 17 may simply not be large enough, and therefore no electrode may be appropriately far enough away from the stimulation electrode to ideally operate as a sensing electrode. Likewise, the size of the ECAP also decreases with increasing distance from the stimulation electrode, and therefore while the stimulation artifact 134 will be smaller at a more distant sensing electrode, the ECAP will also be smaller, again making sensing difficult.

[0061] It may also be easier to sense ECAP during periods when stimulation artifact 134 is small. Figure 5CAs shown in , during the time when the pulse (i.e., its phase) is being emitted (30a and 30b), the stimulation artifact 134 may be relatively large, making it particularly difficult to sense the ECAP (e.g., ECAP1) during this time. Then, when the stimulation artifact is small and decreasing (e.g., ECAP2), it may be desirable to sense the ECAP after the pulse stops. However, sensing the ECAP after the pulse stops is not always possible, depending on various factors. For example, if the sensing electrode S+ is close to the stimulation electrode, if the pulse width of the pulse (or its phase) is relatively long, or if the speed of the ECAP is relatively fast, it may not always be possible to sense the ECAP after the pulse stops. In addition, it may be necessary to use passive charge recovery after the pulse stops. As previously mentioned, passive charge recovery involves sensing the ECAP through a passive charge recovery switch 41 i ( Figure 3 ) shorts electrode node 39 to a reference voltage (e.g., Vbat). When the passive charge recovery switch is closed, ECAP sensing may be difficult because electrode node 39 carrying ECAP to sense amplifier circuit 110 will be shorted to the reference voltage during this time. Therefore, it may be necessary in some cases to sense ECAP during the provide pulse or one of its phases.

[0062] Differential sensing (where the reference electrode S- is also exposed to the tissue and thus at least to some extent to the stimulation artifact 134) can assist in ECAP resolution and in Figure 5D . A simple example of a sense amplifier circuit 110 is shown, which includes a differential amplifier 111. A simple example of the circuitry within the differential amplifier 111 is also shown, but it should be noted that many different differential amplifier circuits exist and may also be used. It should be understood that the multiplexer 108 ( Figure 4 ) or other selector circuits may be present between electrode node 39 and differential amplifier 111, but are not shown for simplicity. Figure 5D Shown in.

[0063] The sensing electrode S+ and the sensing reference electrode S- are coupled through a DC blocking capacitor 38 (if used) to derive signals X+ and X- at electrode nodes 39, which are presented to the positive and negative inputs of the differential amplifier 111. As previously mentioned, the signals X+ and X- will be substantially the same as the S+ and S- present at the selected sensing electrode, but with the DC signal component removed. X+ and X- are provided to the gates (control terminals) of transistors M+ and M- in the differential amplifier 111. The drains of transistors M+ and M- are connected to output terminals D+ and D-, which in turn are coupled to the amplifier's power supply voltage Vdd via resistors R+ and R-. The sources of transistors M+ and M- are connected to ground as another power supply voltage through a common bias transistor Mb, which sets a total current Ib that can be passed through each of the branches (I+, I-) of the differential amplifier in total. The resistors R+ and R- are equal and represented as simple resistors, although active devices (e.g., PMOS transistors) can also be used. The output Vo of amplifier 111 is equal to the voltage difference at output terminals D+ and D-, which in turn is affected by the difference in signals present at X+ and X-. Signals X+ and X- (if different) will turn on transistors M+ and M- to different degrees, resulting in different currents I+ and I- flowing through each branch. This will produce different voltage drops across resistors R+ and R-, and therefore different voltages at D+ and D-. In short, Vo = D+-D- = A(X+-X-), where A is the gain of the amplifier.

[0064] If stimulation artifact 134 is present at both the sense electrode S+ and the reference electrode S-, then differential amplifier 111 will subtract the stimulation artifact from the output as a common-mode voltage, ideally leaving only ECAP to be sensed at the output. Note that the magnitude of stimulation artifact 134 may not be exactly the same at the sense electrodes S+ and S-, which is not surprising since each must be located at a different distance from the stimulation electrode and thus common-mode removal of the stimulation artifact may not be perfect. However, differential sensing allows for at least some degree of removal of stimulation artifact 134, making it easier to resolve small signal ECAP.

[0065] However, if Figure 5DThe differential sensing shown in FIG. 1 can be problematic, particularly because of limitations inherent in the differential amplifier 111. As previously mentioned, the stimulation artifact 134 can vary by several volts in the tissue, and X+ and X- may exceed the input requirements of the differential amplifier 111. Note that the differential amplifier 111 is powered by a power supply Vdd. This power supply Vdd is typically approximately around 3.3V, allowing the differential amplifier 111 to be simply and conveniently made from standard low voltage transistors such as M+ and M-. Although the differential amplifier 111 can still operate if X+ and X- are slightly above Vdd, if X+ and X- are significantly higher, the amplifier operation will eventually be compromised, which may all depend on the environment. In addition, if X+ and X- are too high, the input transistors M+ and M- will be damaged, causing the differential amplifier 111 to not function.

[0066] X+ and X- may also be too low to allow accurate sensing. In this regard, the input transistors M+ and M- are NMOS transistors in this example, which have an inherent gate threshold voltage (e.g., Vtt = 0.7V), which means that X+ and X- at the gates of these transistors must be above Vtt to turn on the transistors and generate appreciable currents I+ and I- in each branch. If X+ or X- is below Vtt, I+ and I- will not flow to any great extent. This means that the ECAP present in X+ may not be detected, or the common mode voltage provided by the stimulus artifact 134 will not be properly subtracted by the differential amplifier 111.

[0067] In short, the inputs X+ and X- in the sense amplifier circuit 110 should be above the threshold voltage of the input transistors M+ and M-, and (preferably) below the supply voltage Vdd of the differential amplifier 111. Moreover, because X+ and X- could be high enough to damage the differential amplifier 111, further consideration is desirable in the sense amplifier circuit 110 to ensure that this does not occur.

[0068] Fig. 6A and Figure 6B A first example of a sense amplifier circuit 200 designed to address these issues is described, and includes additional circuitry to supplement the differential amplifier 111. In addition to providing an ECAP signal to the control circuit 102 / ECAP algorithm 124 for analysis at the output 145, the sense amplifier circuit 200 provides one or more enable signals (e.g., En) to inform the ECAP algorithm 124 when the magnitudes of X+ and X- are such that the ECAP algorithm 124 can consider the ECAP at the output 145 to be valid. As further explained below, the enable signal En is asserted when X+ and X- have magnitudes consistent with the input requirements of the differential amplifier 111.

[0069] As a preliminary matter, note that the differential amplifier 111 may provide its output to various processing circuits 147 before being presented to the control circuit 102 and the ECAP algorithm 124. For example, the differential outputs (D+ and D-) of the differential amplifier 111 may be provided to the inputs of another differential amplifier 146, and to yet another differential amplifier in series, and so on. This may help to increase the gain of the detected ECAP signal because the gain of each amplifier stage will be multiplied (A1*A2, etc.). Follower circuits or buffers may also be used in series as part of the processing circuit 147 between the differential amplifier 111 and the ADC 112, but such stages are not shown. In addition, the processing circuit 147 may include a low pass filter (LPF) 148 to remove high frequency components of the ECAP signal that are not of interest or inconsistent with the rate at which the ADC 112 will sample the signal. In one example, the LFP 148 removes frequency components of 25kHz or higher. The processing circuit 147 may be considered to be part of the control circuit 102.

[0070] In order to prevent damage or improper operation of the differential amplifier 111 (i.e., the first differential amplifier in series), the inputs X+ and X- are provided with clamp circuits 142+ and 142-, respectively. In the example shown, the clamp circuit 142+ includes diodes 144a and 144b connected in series, which are forward biased between a low clamp reference voltage reference (Vcl) and a high clamp reference voltage (Vch), and the signal X+ is connected to a node between the diodes. Vcl and Vch preferably include ground and a power supply voltage Vdd (e.g., 3.3V). In this example, it is assumed that the diodes 144a and 114b have a forward bias threshold voltage (Vtd) of 0.6V. If the voltage at X+ is less than -0.6 volts, the diode 144a will conduct (turn on). Since this conductance has a very low resistance, X+ is effectively clamped to a minimum value of Vmin=-0.6 volts. If Vdd = 3.3 V is assumed, then if X+ is greater than 3.9 V, diode 144b will conduct, which will clamp X+ to a maximum value of Vmax = 3.9 V. If the voltage at X+ is at or between -0.6 and 3.9 volts, neither diode 144a nor 144b in clamp circuit 142+ will conduct. Clamp circuit 142- is similar, but is connected to signal X-, and thus similarly clamps X- to a voltage at or between -0.6 and 3.9 volts.

[0071] In summary, the clamping circuits 142+ and 142- allow X+ and X- to pass to the input of the differential amplifier 111 without clamping (if they are between -0.6 and 3.9 volts), otherwise the voltage on these signals is clamped to not exceed 3.9 volts or not below -0.6 V. This protects the differential amplifier 111. As mentioned above, if the input X+ or X- is significantly higher than the power supply voltage Vdd, the input transistors M+ and M- may be damaged. In addition, if the input X+ or X- is too low, the amplifier 111 may also not work properly because the source of the drain of these transistors M+ and M- may begin to leak into the substrate of these transistors.

[0072] The clamping circuits 142+ and 142- may be modified to adjust the window of allowable voltages where clamping does not occur. For example, Vcl and Vch may be generated by their own generator circuits (similar to 141, discussed below) to produce unique values ​​different from ground and Vdd. More than two diodes may also be used in series; for example, four diodes may be used in series, and if X+ or X- is connected between the middle two diodes, this would extend the window voltage from -1.2V (ground - 2Vtd) to 4.5V (Vdd + 2Vtd). Zener diodes may also be used, which may break down and thus clamp X+ or X- at a specified reverse bias voltage.

[0073] The sense amplifier circuit 200 also includes DC level shift circuits 143+ and 143- to set the signals X+ and X- to a DC voltage reference consistent with the input requirements of the differential amplifier 111. As discussed above, the differential amplifier 111 can only operate reliably if the magnitude of the signals X+ and X- causes currents I+ and I- to flow in each branch of the amplifier. In this regard, to sense the small signal ECAP, X+ and X- should be above the threshold voltage of the amplifier input transistors M+ and M- (e.g., greater than Vtt=0.7V). It is further preferred that X+ and X- do not exceed the power supply voltage Vdd of the differential amplifier (e.g., Vdd=3.3V) for proper amplifier operation. Therefore, the signal provided to the differential amplifier 111 is preferably referenced relative to a DC voltage reference within this operating range. The reference may include 1 / 2Vdd (e.g., 1.65V), which includes the midpoint between Vdd and ground. More preferably, the DC voltage reference may comprise 1 / 2(Vdd-Vtt)+Vtt (e.g., 2.0V) because this value will be the midpoint within the operating range of 0.7V and 3.3V and thus allow X+ and X- to swing symmetrically + / -1.3V from the reference while still providing an input size suitable for operating the differential amplifier 111.

[0074] The magnitude of the DC voltage reference can be set at the signals X+ and X- via DC level shifting circuits 143+ and 143-. While such circuits can take different forms, in the example shown, they include a resistor ladder including resistors Ra and Rb biased in series between Vdd and ground, with the signals X+ and X- connected to the nodes between the resistors. This sets the DC voltage reference for X+ and X- to Ra / (Ra+Rb)*(Vdd-ground). Thus, by appropriately setting the values ​​of Ra and Rb, the DC voltage reference can be set to any desired value between Vdd and ground, such as 2.0V. The AC signal coupled to X+ and X- through capacitor 38 (such as ECAP and / or stimulus artifact 134) will then reference (and ride on top of) this DC voltage reference. In general, this allows the differential amplifier 111 to be affected by the ECAP at X+, because the superposition of the ECAP and the DC voltage reference will result in a change in the current I+. Preferably, Ra and Rb are large resistors, such as 1 megohm or higher.

[0075] Also present in the sense amplifier circuit 200 are comparator circuits 150+ and 150-, which are connected to the signals X+ and X-, respectively. The goal of the comparator circuits 150+ and 150-, respectively, is to determine whether the signals X+ and X- are of a reliable magnitude to sense ECAP, and indicate this to the ECAP algorithm 124 via the generation of an enable signal En. Even though a DC voltage reference (e.g., 2.0V) is established at X+ and X- by the DC level shift circuits 143+ and 143-, the AC nature of the stimulus artifact 134 can result in large variations from this baseline. The enable signal En may change from time to time depending on the voltages at X+ and X-, and therefore there are times ('0') when the enable signal indicates to the ECAP algorithm 124 that the output 145 is providing reliable ECAP data (which is valid for evaluation at the output 145), and times ('1') when it indicates that the output 145 is not producing reliable ECAP data and can be ignored.

[0076] Comparator circuit 150+ includes comparator 154+, which receives X+ at its negative input and receives a low sense reference voltage Vsl at its positive input. In one example, Vsl is set by voltage generator 141 to a value that ensures X+ is high enough to properly turn on transistor M+ in differential amplifier 111. Many different types of generator circuits can be used to generate Vsl, including bandgap generator circuits, but Fig. 6AThe use of a simple resistor in series with an adjustable current source to set Vsl to the correct value is shown. In one example, Vsl is equal to (or possibly slightly above) the threshold voltage of M+, i.e., Vsl=Vtt=0.7V. If X+ is above Vsl, comparator 154+ will output a '0' at signal Y+; in contrast, if X+ is below Vsl, the comparator will output a '1' at signal Y+. Comparator circuit 150- is similar in construction and operation to comparator circuit 150+, and includes comparator 154- to compare X- to Vsl and determine when X- is appropriately high (Y-='0') or too low (Y-='1').

[0077] Although the signals Y+ and Y- can be sent to the control circuit 102 / ECAP algorithm 124 to operate as separate enable signals, in a preferred example, these signals are provided to a logic circuit, such as an OR gate 158, which generates a single enable signal En. Therefore, if Y+ or Y- is equal to '1', which means that X+ or X- is too low to properly operate the differential amplifier, then En = '1'. Therefore, in this case, the ECAP algorithm 124 can ignore the ECAP reported at the output 145, and instead only treat it as a reported valid ECAP when En = '0', where both Y+ and Y- are '0'. Figure 6B The operation of the sense amplifier circuit 200 is summarized, showing the window in which X+ and X- are not clamped (between Vmax = 3.9 and Vmin = 0.6), and showing the window in which they are suitable for sensing (greater than Vsl = 0.7). Note that the sensing window is effectively limited at Vmax, since V+ and V- cannot exceed this value.

[0078] Note that the magnitude of Vsl, and possibly the operation of comparators 154+ and 154-, may depend on how differential amplifier 111 is constructed. For example, if transistors M+ and M- in differential amplifier 111 are PMOS transistors, Vsl may instead comprise a high sensing reference voltage Vsh (e.g., Vdd-Vtt) provided to the negative inputs of comparators 154+ and 154-, with X+ and X- provided to the positive inputs of the comparators. If X+ or X- is below Vsh in this case, which is necessary for normal differential amplifier 111 operation, comparator 154+ or 154- will output a '0', and En = '0', indicating to ECAP algorithm 124 that ECAP can be reliably sensed. If either X+ or X- is above Vsh, then En = '1', indicating otherwise.

[0079] Fig. 7A and Figure 7BA second example of a sense amplifier circuit 210 is described. Sense amplifier circuit 210 is similar to sense amplifier circuit 200 and includes clamp circuits 142+ and 142- and DC level shift circuits 143+ and 143-, as described previously. However, comparator circuits 150+ and 150- include additional comparators 152+ and 152-, respectively. While comparators 154+ and 154- are designed to notify when X+ and X- are too low for valid ECAP sensing, comparators 152+ and 152- are designed to notify when X+ and X- are too high for valid ECAP sensing. In this regard, even though clamp circuits 142+ and 142- would clamp X+ and X- to a maximum voltage Vmax (e.g., 3.9V), it may still be desirable to enable ECAP sensing only when X+ and X- are below this maximum value. As mentioned previously, high values ​​of X+ and X- can also adversely affect the operation of differential amplifier 111, even if such high values ​​do not risk damaging the amplifier. In addition, if X+ and X- are significantly high and cause diode 144b in clamp circuits 142+ and 142- to conduct, ECAP sensing will be unreliable.

[0080] In this regard, X+ and X- are sent to the positive input terminals of comparators 152+ and 152-. A high sensing reference voltage Vsh is provided for the negative input terminal. Like Vsl, Vsh can be set to different values ​​(using a generator circuit similar to 141), but in a preferred example, Vsh is set to a power supply voltage Vdd (e.g., 3.3V). In this way, if X+ or X- is greater than Vsh, comparators 152+ and 152- output '1' respectively. In comparator circuit 150+, the outputs of comparators 152+ and 154+ are provided to a logic circuit, such as an OR gate 156+ that outputs a signal Y+. Similarly, in comparator circuit 150-, the outputs of comparators 152- and 154- are provided to an OR gate 156- that outputs a signal Y-. Signal Y+ informs whether X+ is too high ('1'), too low ('1'), or suitable for ECAP sensing ('0'), and signal Y- similarly informs whether X- is too high ('1'), too low ('1'), or suitable for ECAP sensing ('0'). As in circuit 200 ( Fig. 6A ), these outputs Y+ and Y- are provided to an OR gate 158 to generate an enable signal En for ECAP sensing. Figure 7BThe operation of the sense amplifier circuit 210 is summarized, showing the window in which X+ and X- are not clamped (between Vmax=3.9 and Vmin=0.6), and showing the window in which they are suitable for sensing (between Vsl=0.7 and Vsl=3.3V). The sense amplifier circuit 210 is preferred because the sensing window is smaller than and within the window in which clamping does not occur. Thus, ECAP sensing is disabled (En='1') before X+ or X- becomes too large or too small to be clamped by their clamp circuits 142+ and 142-.

[0081] Comparator circuits 150+ and 150- do not have to include discrete comparators, such as 152+, 152-, 154+, and 154+. Instead, comparator circuits 150+ and 150- may include analog-to-digital converters (ADCs) to generate digital representations of X+ and X-, which may include discrete circuits, or they may include ADC inputs to control circuit 102. The digitized values ​​of X+ and X- may then be digitally compared to various thresholds (e.g., in control circuit 102) to determine whether they meet the input requirements of differential amplifier 111, for example, to see if X+ and X- are each between Vsl and Vsh. The results of these determinations may be represented as digital signals Y+ and Y- (e.g., again in control circuit 102), which are used by logic circuits (e.g., again in control circuit 102) to determine enable signal En. In this regard, note that comparator circuits 150+ and 150- may be formed at least partially in control circuit 102 or using other digital logic circuits.

[0082] Figure 8 Another example of a sense amplifier circuit 220 is shown. As with the other examples, the sense amplifier circuit 220 includes clamp circuits 142+ and 142- to clamp X+ and X- to a maximum value (Vmax) and preferably also a minimum value (Vmin) value. However, in the sense amplifier circuit 220, whether ECAP sensing is indicated and the value of the enable signal En are set by the comparator circuit 166, which is different from the comparator circuits 150+ and 150- described earlier. Instead, in the sense amplifier circuit 220, the comparator circuit 166 effectively measures the currents I+ and I- in each branch of the differential amplifier 111 to ensure that both branches produce the appropriate current indicating proper amplifier operation.

[0083] As previously mentioned, the differential amplifier 111 can only operate to sense ECAP if both transistors M+ and M- are turned on to produce significant currents I+ and I- in their branches. In this regard, the differential amplifier outputs D+ and D- can be evaluated by the comparator circuit 166 to verify whether such currents are flowing. In the example of the differential amplifier 111, the branch currents I+ and I- flow through resistors R+ and R- so that D+ equals Vdd-(I+*R+) and D- equals Vdd-(I-*R-). If significant currents I+ and I- are flowing, then D+ and D- are therefore low. If these currents are too small or insignificant, then D+ and D- will be too high.

[0084] Thus, comparator circuit 166 may include comparators 168+ and 168- to measure the magnitude of differential outputs D+ and D-, which, as just mentioned, are indicative of currents I+ and I- flowing through the differential amplifier branches and thus of the amplifier input requirements. Comparator 168+ receives D+ at its positive input, while comparator 168- receives D- at its positive input. The negative inputs of comparators 168+ and 168- are set to a reference voltage Vref by generator circuit 161. Again, the generator circuit may take different forms, but in general, the generator circuit may be used in a variety of ways. Figure 8 145 is shown as an adjustable current in series with resistor R. Vref is preferably slightly lower than the supply voltage Vdd, such as 150mV less than Vdd. These outputs Y+ and Y- can be sent to an OR gate 170 to generate an enable signal En, which informs the ECAP algorithm 124 whether the ECAP signal present at the output terminal 145 is valid for ECAP sensing. If both I+ or I- in the differential amplifier 111 are significant (because X+ and X- are significantly high), then both D+ or D- will be lower than Vref, and both comparators 168+ or 168- will output '0' for Y+ and Y-. The OR gate 170 then outputs the enable signal En as '0', indicating that the ECAP at the output terminal 145 is valid for sensing. In contrast, if either or both of I+ or I- in differential amplifier 111 are too small (because either or both of X+ or X- are too low), either or both of D+ or D- will be higher than Vref, and either or both of comparators 168+ or 168- will output '1'. OR gate 170 then outputs enable signal En as '1', thereby indicating to ECAP algorithm 124 that output 145 does not carry a valid and reliable ECAP signal, and therefore output 145 should be ignored.

[0085] Comparator circuit 166, like 150+ and 150-, need not necessarily include discrete comparators such as 168+ and 168-. Comparator circuit 166 may include an analog-to-digital converter (ADC) to generate digital representations of D+ and D-, which may include discrete circuits, or may include ADC inputs to control circuit 102. The digitized values ​​of D+ and D- may then be digitally compared to Vref (e.g., in control circuit 102). The results of these determinations may be expressed as digital signals Y+ and Y- (e.g., again in control circuit 102), which are used by logic circuits as above (e.g., again in control circuit 102) to determine enable signal En. Therefore, like comparator circuits 150+ and 150-, comparator circuit 166 may be formed at least partially in control circuit 102 or using other digital logic circuits.

[0086] As in other examples, sense amplifier circuit 220 may be modified depending on the type of differential amplifier 111 used.

[0087] The various examples of sense amplifier circuits can also be combined in various ways. For example, Fig. 9 The circuit includes a sense amplifier circuit 210 ( Fig. 7A ) and sense amplifier circuit 220 ( Figure 8 ) is a combination of the sense amplifier circuit 230 used in the method of FIG. As in circuit 220, comparators 168+ and 168- are used as part of comparator circuits 175+ and 175-, and evaluate the outputs D+ and D- of differential amplifier 111 by comparison with Vref to inform whether the inputs X+ and X- to differential amplifier 111 are too small to turn on both branches of the amplifier. In this regard, comparators 168+ and 168- essentially replace the comparator circuits 175+ and 175-. Fig. 7A Comparators 154+ and 154- in the circuits 150+ and 154-. Comparators 152+ and 152- are used as before to evaluate the inputs X+ and X- to ensure that they are not too large. The outputs of the comparators in each circuit 150+ and 150+ can again be logically ORed (156+ and 156-) to generate signals Y+ and Y-, which in turn are ORed (158) to produce the enable signal En.

[0088] When sensing tissue signals such as ECAP, it is preferred that the sense amplifier circuit be used in differential mode, where each input X+ and X- can be coupled to an electrode in contact with the patient tissue. As mentioned previously, this is intended to attempt to subtract the stimulus artifact 134 as a common mode voltage at the differential amplifier, thereby making it easier to sense the small signal ECAP.

[0089] However, this is not strictly necessary, and the disclosed sense amplifier circuit may alternatively be used in a single-ended mode, where one of the amplifier inputs (eg, X-) is set to a reference voltage Vamp, such as Fig. 10A and Fig. 10B This reference voltage may be a DC voltage, such as 1 / 2 Vdd, 2.0 V, and should be high enough to turn on the input transistor M- of the differential amplifier 111. Single-ended sensing may be used to sense other signals at the electrodes, such as the stimulation artifact 134 itself.

[0090] Fig. 10A A sense amplifier circuit 210 similar to that shown previously is shown. Fig. 7A ) of the single-ended sense amplifier circuit 240. Because X- is set to Vamp, the comparator circuit 150-, the clamp circuit 142-, and the DC level shift circuit 143- are unnecessary and are therefore not shown. In practice, these circuits may still exist in the sense amplifier circuit 240, but when Vamp (see multiplexer 108, Figure 4 ) is selected as the reference at input X-, these circuits will simply be disabled or disconnected from the circuit. Note that in this example, signal Y+ can operate as an enable signal that determines whether input X+ is valid, and OR gate 158 ( Figure 4 ) is unnecessary.

[0091] Fig. 10B A sense amplifier circuit 220 similar to that shown previously is shown. Figure 8 ) of the single-ended sense amplifier circuit 250. Since X- is set to Vamp, the clamp circuit 142- and the DC level shift circuit 143- are unnecessary and can be disabled or disconnected. Similarly, in the comparator circuit 166, the comparator 168- will be unnecessary (or disabled / disconnected), and the signal Y+ can again operate as the enable signal En.

[0092] As mentioned previously, ECAP is only one example of a neural response that may be sensed using the disclosed sense amplifier circuit. Not all neural responses that one may wish to sense are the result of stimulation, and in this regard, the disclosed sense amplifier circuit may be used with other neural responses that may not include stimulation circuit 28 ( Figure 4 ). In addition, the disclosed sense amplifier circuit can be used to sense other types of signals in tissue besides neural responses. For example, the sense amplifier circuit can be used to sense other types of signals, such as signals used to measure tissue field potential or tissue resistance.

Claims

1. An implantable medical device comprising: a first electrode node couplable to a first electrode configured to make electrical contact with patient tissue, and a second electrode node couplable to a second electrode configured to make electrical contact with patient tissue, wherein the first electrode node is configured to receive a tissue signal from the patient tissue via the first electrode; an amplifier having a first input connected to the first electrode node and having a second input connected to the second electrode node, wherein the amplifier produces a first amplifier output and a second amplifier output, the first amplifier output and the second amplifier output together comprising a differential amplifier output indicative of the tissue signal; The comparator circuit is configured as determining a first comparator output from the first amplifier output indicating whether the first input meets input requirements of the amplifier, and determining a second comparator output from the second amplifier output indicating whether the second input meets input requirements of the amplifier; as well as A logic circuit is configured to receive the first comparator output and the second comparator output and generate an enable signal, wherein the enable signal indicates whether a differential amplifier output indicative of the tissue signal is valid or invalid.

2. The implantable medical device according to claim 1, wherein The first electrode node and the second electrode node comprise two of a plurality of electrode nodes, and wherein the first electrode and the second electrode comprise two of a plurality of electrodes, wherein each of the plurality of electrode nodes is coupleable to a different one of the plurality of electrodes, wherein the plurality of electrodes are configured to make electrical contact with tissue of the patient.

3. The implantable medical device of claim 2, further comprising a selector circuit configured to select the first electrode node and the second electrode node from among the plurality of electrode nodes.

4. The implantable medical device of claim 2, further comprising a stimulation circuit configured to generate stimulation in the tissue via selected electrodes of the plurality of electrodes, wherein the tissue signal is generated in the tissue of the patient in response to the stimulation.

5. The implantable medical device of claim 1, wherein the second electrode comprises a conductive housing of the implantable medical device.

6. The implantable medical device of claim 1, further comprising a lead, wherein the lead comprises the first electrode and the second electrode.

7. The implantable medical device of claim 1, wherein a first DC blocking capacitor is interposed between the first electrode node and the first electrode, and wherein a second DC blocking capacitor is interposed between the second electrode node and the second electrode.

8. The implantable medical device of claim 1, wherein: The tissue signals include neural responses.

9. The implantable medical device of claim 1, further comprising: a first clamp circuit configured to prevent a voltage at the first input from exceeding a first value; and a second clamp circuit configured to prevent the voltage at the second input from exceeding the first value.

10. The implantable medical device of claim 9, wherein the first clamp circuit is further configured to prevent the voltage at the first input from falling below a second value, and wherein the second clamp circuit is further configured to prevent the voltage at the second input from falling below the second value.

11. The implantable medical device of claim 1 , further comprising: a first DC level shifting circuit configured to set a DC voltage reference at the first input; and a second DC level shift circuit configured to set the DC voltage reference at the second input.

12. The implantable medical device of claim 1, wherein the amplifier comprises: a first input transistor having a first control terminal for receiving the first input, and a second input transistor having a second control terminal for receiving the second input, Wherein the first input transistor and the second input transistor include threshold voltages that must be exceeded at the first input and the second input, respectively, to turn on the first transistor and the second transistor.

13. The implantable medical device according to claim 12, wherein: The amplifier also includes: a first resistor connected in series between the first input transistor and a power supply voltage, and a second resistor connected in series between the second input transistor and the power supply voltage, wherein the first amplifier output includes a node between the first input transistor and the first resistor, and wherein the second amplifier output includes a node between the second input transistor and the second resistor.

14. The implantable medical device of claim 1 , wherein the comparator circuit comprises: a first comparator configured to indicate whether the voltage at the first differential output is lower than a first voltage, and A second comparator is configured to indicate whether the voltage at the second differential output is lower than the first voltage.

15. The implantable medical device of claim 14, wherein: The amplifier is powered by a supply voltage, and wherein the first voltage is less than the supply voltage.

16. The implantable medical device of claim 1 , further comprising a control circuit configured to receive a differential amplifier output indicative of the tissue signal, Wherein the control circuit is programmed with an algorithm configured to analyze the amplifier output, wherein operation of the algorithm is controlled by the enable signal.

17. An implantable medical device comprising: a first electrode node couplable to a first electrode configured to make electrical contact with patient tissue, wherein the first electrode node is configured to receive a tissue signal from the patient tissue via the first electrode; an amplifier having a first input connected to the first electrode node and a second input connectable to a reference voltage, wherein the amplifier produces a first amplifier output and a second amplifier output, the first amplifier output and the second amplifier output together comprising a differential amplifier output indicative of the tissue signal; as well as A comparator circuit is configured to determine an enable signal from the first amplifier output indicating whether the first input meets input requirements of the amplifier, wherein the enable signal indicates whether a differential amplifier output indicative of the tissue signal is valid or invalid.

18. An implantable medical device according to claim 17, wherein the first electrode node comprises one of a plurality of electrode nodes, and wherein the first electrode comprises one of a plurality of electrodes, wherein each of the plurality of electrode nodes is coupleable to a different one of the plurality of electrodes, wherein the plurality of electrodes are configured to make electrical contact with tissue of the patient.

19. The implantable medical device of claim 18, further comprising a selector circuit configured to select the first electrode node from among the plurality of electrode nodes.

20. The implantable medical device of claim 18, further comprising a stimulation circuit configured to generate stimulation in the tissue via selected electrodes of the plurality of electrodes, wherein the tissue signal is generated in the tissue of the patient in response to the stimulation.

21. The implantable medical device of claim 17, wherein the reference voltage comprises a DC voltage.

22. The implantable medical device of claim 17, further comprising a lead, wherein the lead comprises the first electrode.

23. The implantable medical device of claim 17, wherein a first DC blocking capacitor is interposed between the first electrode node and the first electrode.

24. The implantable medical device of claim 17, wherein: The tissue signals include neural responses.

25. The implantable medical device of claim 17, further comprising a clamp circuit configured to prevent a voltage at the first input from exceeding a first value.

26. The implantable medical device of claim 25, wherein the clamp circuit is further configured to prevent the voltage at the first input from falling below a second value.

27. The implantable medical device of claim 17, further comprising a DC level shifting circuit configured to set a DC voltage reference at the first input.

28. The implantable medical device of claim 17, wherein the amplifier comprises: a first input transistor having a first control terminal for receiving the first input, and a second input transistor having a second control terminal for receiving the second input, Wherein the first input transistor and the second input transistor include threshold voltages that must be exceeded at the first input and the second input, respectively, to turn on the first transistor and the second transistor.

29. The implantable medical device of claim 28, wherein the amplifier further comprises: a first resistor connected in series between the first input transistor and a power supply voltage, and a second resistor connected in series between the second input transistor and the power supply voltage, wherein the first amplifier output includes a node between the first input transistor and the first resistor, and wherein the second amplifier output includes a node between the second input transistor and the second resistor.

30. The implantable medical device of claim 17, wherein the comparator circuit comprises a comparator configured to indicate whether the voltage at the first differential output is less than a first voltage.

31. The implantable medical device of claim 30, wherein: The amplifier is powered by a supply voltage, and wherein the first voltage is less than the supply voltage.

32. The implantable medical device of claim 17, further comprising a control circuit configured to receive a differential amplifier output indicative of the tissue signal, wherein the control circuit is programmed with an algorithm configured to analyze the amplifier output, wherein operation of the algorithm is controlled by the enable signal.

Citation Information

Patent Citations

  • Sample and Hold Circuitry for Monitoring Voltages in an Implantable Neurostimulator

    US20120092031A1

  • Monitoring Electrode Voltages in an Implantable Medical Device System Having Daisy-Chained Electrode-Driver Integrated Circuits

    US20120095519A1

  • Architectures for an Implantable Medical Device System Having Daisy-Chained Electrode-Driver Integrated Circuits

    US20120095529A1

  • Real Time Compliance Voltage Generation for an Implantable Stimulator

    US20130289665A1

  • Implantable Stimulator Device Having Components Embedded in a Circuit Board

    US20150157861A1