A method for preparing a scandium aluminum oxide high-k gate dielectric thin film transistor

Abstract

The invention discloses a method for preparing a scandium aluminum oxide high-k gate dielectric thin-film transistor, comprising the following steps: cleaning a glass substrate or a silicon substrate, and ultrasonically cleaning it in acetone, alcohol, and deionized water in sequence for 20 minutes to remove impurities on the substrate; blowing the cleaned substrate dry with nitrogen, and drying it in a 100°C oven for 10 minutes; preparing a 100nm thick Sc-Al-O gate dielectric film on the thin-film substrate by a magnetron sputtering method using a Sc-Al-O ceramic target; and annealing the prepared Sc-Al-O film in air or oxygen in a tube furnace at 300°C to 500°C for 0.5h to 2h to obtain a dense gate dielectric material. The Sc-Al-O gate dielectric proposed in the invention can not only effectively suppress the carrier tunneling effect caused by gate dielectric thinning and reduce heat loss, but also improve the gate control capability of a TFT device, reduce the operating voltage of the TFT device, and thus further reduce the device power consumption, which is of great significance for the application of ultra-low power display technologies such as wearable devices and electronic paper.

Description

Technical Field

[0001] The present invention belongs to the field of microelectronics and integrated circuits, and specifically relates to a gate dielectric material in a thin film transistor (TFT) device, a core basic unit of a flat panel display backplane, and more particularly to a novel composite high-k gate dielectric film and its preparation method and application. Background Art

[0002] Thin-film transistors (TFTs), as microelectronic switching devices, are primarily used in flat-panel displays and serve as core components of pixel circuits. They also hold great promise for applications in sensors. The rapid development of information display technology is placing higher demands on TFT devices. To meet the demands for large-size, ultra-high-resolution, and high-frame-rate displays, they require higher drive capabilities, which in turn requires increasing the mobility of the active layer or the per-unit-area capacitance of the gate dielectric. While research on increasing mobility is extensive, improvements in mobility are limited and often accompanied by stability degradation. Increasing the per-unit-area capacitance of the gate dielectric is a more feasible approach, but it has received less attention. This approach can significantly increase the drive current of TFT devices while also effectively reducing their operating voltage and power consumption. Increasing the per-unit-area capacitance of the gate dielectric requires either reducing the gate dielectric thickness or using a high-k gate dielectric. While reducing the thickness of currently mainstream low-k gate dielectrics, such as SiO2, can improve the gate control capability of TFT devices, excessively thinning the gate dielectric can lead to unacceptable leakage current, thermal dissipation, and stability issues. The use of high-k gate dielectrics not only improves TFT device performance and reduces power consumption, but also effectively addresses leakage issues caused by gate dielectric thinning. While there have been reports of several high-k gate dielectric materials, such as HfO2, Y2O3, and Ta2O5, most of these materials suffer from narrow band gaps, insufficient compressive strength, and easy crystallization. Therefore, the development of new high-k gate dielectric materials is crucial for advancing next-generation TFT backplane technology and the industry. Summary of the Invention

[0003] To solve the above technical problems, the present invention provides a technical solution: a method for preparing a scandium aluminum oxide high-k gate dielectric thin film transistor, comprising the following steps:

[0004] S1. Clean the glass substrate or Si substrate by ultrasonic cleaning in acetone, alcohol, and deionized water for 20 minutes in sequence to remove impurities on the substrate;

[0005] S2. Blow the cleaned substrate dry with nitrogen and dry it in an oven at 100°C for 10 minutes;

[0006] S3, using Sc-Al-O ceramic target material to prepare 100nm thick Sc-Al-O gate dielectric film on film substrate by magnetron sputtering method, wherein the Sc / Al molar ratio of Sc-Al-O ceramic target material is 1, recorded as ScAlO x The specific deposition conditions are local vacuum 5×10 -4 Pa, DC sputtering power 100W~160W, working pressure 0.3Pa~0.6Pa, sputtering atmosphere Ar / O2=50 / 0sccm~25sccm / 25sccm;

[0007] S4, annealing the prepared Sc-Al-O film in a tube furnace at 300° C. to 500° C. for 0.5 h to 2 h in air or oxygen conditions to obtain a dense gate dielectric material;

[0008] S5. In order to directly test the electrical properties of the gate dielectric material, a 100 nm thick patterned metal Al layer is deposited on the above film by magnetron sputtering combined with a shadow mask method as an electrode;

[0009] S6, preparing a TFT device based on the high-density ScAlOx material obtained in step S4; specifically, preparing a patterned InGaZnO (IGZO) semiconductor thin film as a channel layer of the TFT device by magnetron sputtering combined with a shadow mask method;

[0010] S7, annealing the IGZO film prepared above in air or oxygen in a tube furnace at 300° C. to 400° C. for 0.5 h to 2 h to obtain a channel layer material with low defect density;

[0011] S8, depositing a 100 nm thick layer of metal Al as an electrode on the IGZO film using a magnetron sputtering method combined with a shadow mask;

[0012] S9. Cut the gate dielectric layer at the edge to expose the underlying Si substrate serving as the gate for subsequent device performance testing.

[0013] Preferably, the deposition conditions of step S5 are: local vacuum 5×10 -4 Pa, DC sputtering power 120W, working pressure 0.4Pa, sputtering atmosphere is pure Ar = 50sccm.

[0014] Preferably, in step S6, the mass ratio of each component in the IGZO semiconductor film is In:Ga:Zn=1:1:1; and the deposition conditions are: local vacuum 5×10 -4 Pa, DC sputtering power 120W, working pressure 0.5Pa, sputtering atmosphere is Ar / O2=46sccm / 4sccm.

[0015] The advantages of the present invention compared with the prior art are:

[0016] (1) Compared with the currently mainstream SiO2 gate dielectric, the ScAlO x The gate dielectric has a higher k value (12.4), a higher gate capacitance per unit area (550nF / cm 2 ), a higher equivalent thickness of the dielectric layer (6.5nm), so it can not only effectively suppress the carrier tunneling effect caused by the thinning of the gate dielectric and reduce heat loss, but also improve the gate control capability of the TFT device and reduce the operating voltage of the TFT device, thereby further reducing the device power consumption, which is of great significance for the application of ultra-low power display technologies such as wearable devices and electronic paper.

[0017] (2) The ScAlO x The grating medium has ultra-high optical transmittance (≥96%) in the visible light range and has high application value in transparent display, augmented reality fusion, etc.

[0018] (3) Compared with other high-k gate dielectric materials represented by HfO2, the ScAlO x The gate dielectric has a high bandgap (5.6eV), which effectively suppresses thermal migration of carriers, thereby improving the thermal stability and reliability of TFT devices. In addition, the addition of oxide components effectively avoids leakage problems caused by the easy crystallization of simple oxides.

[0019] (4) The film prepared by this method has a high surface flatness and a surface roughness of only 0.8 nm, which is conducive to the rapid transport of carriers.

[0020] (5) The IGZO TFT device based on this gate dielectric has normal transfer characteristics and output characteristic curves, and its mobility, threshold voltage, subthreshold swing and on-off ratio are 7.2cm 2 / Vs, 1V, 67mV / dec and 10 7 The device also has high operating stability, with the threshold voltage drift being no more than 0.71V and -0.63V after 2000s of gate voltage stress at +2V and -2V, respectively.

[0021] In summary, the ScAlO x Gate dielectric is a new type of high-k gate dielectric material with great application potential. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 (a) optical transmittance and optical bandgap extraction, (b) current density, (c) capacitance per unit area, and (d) surface roughness results of the ScAlOx gate dielectric film in the present invention.

[0023] Figure 2 (a) transfer characteristic curve, (b) output characteristic curve, (c) positive bias stability and (d) negative bias stability results of the IGZO TFT device based on 20nm ScAlOx high-k gate dielectric in the present invention. DETAILED DESCRIPTION

[0024] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0025] In the description of the embodiments of the present invention, it should be noted that if the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the accompanying drawings, or the orientation or position relationship in which the product of the invention is usually placed when in use. It is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, it should not be understood as limiting the present invention. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description and should not be understood as indicating or implying relative importance.

[0026] Furthermore, the use of terms such as "horizontal," "vertical," and "overhanging" does not necessarily imply that the component must be absolutely horizontal or overhanging, but rather that it can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal than "vertical," not that the structure must be completely horizontal, but rather that it can be slightly tilted.

[0027] In the description of the embodiments of the present invention, "a plurality of" means at least two.

[0028] In the description of the embodiments of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "disposed," "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to internal connections between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances. Example

[0029] Combined with attachment Figure 1-2The present embodiment provides a method for preparing a scandium aluminum oxide high-k gate dielectric film, comprising the following steps:

[0030] S1. Clean the glass substrate or Si substrate by ultrasonic cleaning in acetone, alcohol, and deionized water for 20 minutes in sequence to remove impurities on the substrate;

[0031] S2. Blow the cleaned substrate dry with nitrogen and dry it in an oven at 100°C for 10 minutes;

[0032] S3. A 100 nm thick Sc-Al-O gate dielectric film is prepared on a film substrate by magnetron sputtering using a Sc-Al-O ceramic target, wherein the Sc / Al molar ratio of the Sc-Al-O ceramic target is in the range of 0.8 to 1.2; the Sc / Al molar ratio is preferably 1, which is denoted as ScAlO. x The specific deposition conditions are local vacuum 5×10 -4 Pa, DC sputtering power 100W~160W, working gas pressure 0.3Pa~0.6Pa, sputtering atmosphere Ar / O2=50 / 0sccm~25sccm / 25sccm.

[0033] S4, the above prepared ScAlO x The film is annealed in air or oxygen in a tube furnace at 300°C to 500°C for 0.5h to 2h to obtain a dense gate dielectric material;

[0034] S5. In order to directly test the electrical properties of the gate dielectric material, a 100 nm thick patterned metal Al layer was deposited on the above film using magnetron sputtering combined with a shadow mask as an electrode. The deposition conditions were: local vacuum 5×10 -4 Pa, DC sputtering power 120W, working pressure 0.4Pa, sputtering atmosphere pure Ar = 50sccm;

[0035] S6, the ScAlO obtained in step S4 x Test the effectiveness of TFT gate dielectric layer: high density ScAlO is obtained in step S4 x TFT devices were prepared based on the materials; specifically, a patterned IGZO semiconductor film was prepared as the channel layer of the TFT device by magnetron sputtering combined with a shadow mask method; the mass ratio of each component in the IGZO semiconductor film was In:Ga:Zn=1:1:1; its deposition conditions were: local vacuum 5×10 -4 Pa, DC sputtering power 120W, working pressure 0.5Pa, sputtering atmosphere is Ar / O2=46sccm / 4sccm.

[0036] S7, annealing the IGZO film prepared above in air or oxygen in a tube furnace at 300° C. to 400° C. for 0.5 h to 2 h to obtain a channel layer material with low defect density;

[0037] S8, depositing a 100 nm thick layer of metal Al as an electrode on the IGZO film using a magnetron sputtering method combined with a shadow mask;

[0038] S9, scratching the gate dielectric layer at the edge to expose the underlying Si substrate serving as the gate for subsequent device performance testing;

[0039] In the accompanying drawings, Figure 1 As shown:

[0040] Figure 1 (a) ScAlO prepared under different conditions x From the optical transmittance of the films, it can be seen that in the visible light range, all films have very high transmittance (≥96%), and the optical band gap is between 4.5 and 5.6 eV. With the increase of sputtered O2 content, the band gap gradually increases.

[0041] from Figure 1 It can be seen from the leakage current curve in (b) that with the increase of oxygen content in the sputtering atmosphere, the leakage current of ScAlO x The leakage current of the gate dielectric film is generally decreasing, and the maximum withstand voltage strength is about 4.4MV / cm.

[0042] from Figure 1 From the CV curve in (c), the 20nm thick ScAlO x C of gate dielectric ox About 550nF / cm 2 , EOT is about 6.5nm, and k value is about 12.4.

[0043] Finally from Figure 1 From the AFM image in (d), ScAlO x The surface flatness of the gate dielectric film is high, with a root mean square roughness of only 0.8nm.

[0044] like Figure 2 As shown:

[0045] (1) From the transfer characteristic curve, 20nm ScAlO x The IGZO TFT with thin film as gate dielectric exhibits good device switching characteristics, with low off-state current at the order of 10pA and an on-off ratio of 10 7 , the threshold voltage is around 1V, and it also has an ultra-low subthreshold swing (67mV / dec);

[0046] (2) From the output characteristic curve, the device still exhibits excellent gate control capability even at a low gate voltage, and no obvious current crowding phenomenon is observed;

[0047] (3) In terms of positive / negative bias stability, the device has good stability under 2000s and ±2V gate bias stress, and the threshold voltage drift is less than 0.7V.

[0048] The above description of the present invention and its embodiments is non-limiting. The drawings show only one embodiment of the present invention, and the actual structure is not limited thereto. In short, if a person skilled in the art is inspired by the above and, without departing from the purpose of the present invention, designs structures and embodiments similar to the technical solution without inventiveness, they shall fall within the scope of protection of the present invention.

Claims

1. A method for preparing a scandium aluminum oxide high-k gate dielectric thin film transistor, characterized in that: The following steps are involved: S1. Clean the glass substrate or Si substrate by ultrasonic cleaning in acetone, alcohol, and deionized water for 20 minutes in sequence to remove impurities on the substrate; S2. Blow the cleaned substrate dry with nitrogen and dry it in an oven at 100°C for 10 minutes; S3, using Sc-Al-O ceramic target material to prepare 100nm thick Sc-Al-O gate dielectric film on film substrate by magnetron sputtering method, wherein the Sc / Al molar ratio of Sc-Al-O ceramic target material is 1, recorded as ScAlO x The specific deposition conditions are local vacuum 5×10 -4 Pa, DC sputtering power 100W~160W, working pressure 0.3Pa~0.6Pa, sputtering atmosphere Ar / O2=50 / 0sccm~25sccm / 25sccm; S4, annealing the prepared Sc-Al-O film in a tube furnace at 300° C. to 500° C. for 0.5 h to 2 h in air or oxygen conditions to obtain a dense gate dielectric material; S5. In order to directly test the electrical properties of the gate dielectric material, a 100 nm thick patterned metal Al layer is deposited on the above film by magnetron sputtering combined with a shadow mask method as an electrode; S6, preparing a TFT device based on the high-density ScAlOx material obtained in step S4; specifically, preparing a patterned InGaZnO (IGZO) semiconductor thin film as a channel layer of the TFT device by magnetron sputtering combined with a shadow mask method; S7, annealing the IGZO film prepared above in air or oxygen in a tube furnace at 300° C. to 400° C. for 0.5 h to 2 h to obtain a channel layer material with low defect density; S8, depositing a 100 nm thick layer of metal Al as an electrode on the IGZO film using a magnetron sputtering method combined with a shadow mask; S9. Cut the gate dielectric layer at the edge to expose the underlying Si substrate serving as the gate for subsequent device performance testing.

2. The method for preparing a scandium aluminum oxide high-k gate dielectric thin film transistor according to claim 1, characterized in that: The deposition conditions of step S5 are: local vacuum 5×10 -4 Pa, DC sputtering power 120W, working pressure 0.4Pa, sputtering atmosphere is pure Ar = 50sccm.

3. The method for preparing a scandium aluminum oxide high-k gate dielectric thin film transistor according to claim 1, characterized in that: In step S6, the mass ratio of each component in the IGZO semiconductor film is In:Ga:Zn=1:1:1; its deposition conditions are: local vacuum 5×10 -4 Pa, DC sputtering power 120W, working pressure 0.5Pa, sputtering atmosphere is Ar / O2=46sccm / 4sccm.

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