Reading circuit, reading method and infrared detector
By using at least two reference cells to alternately operate in the readout circuit of infrared imaging technology, the problems of large on-chip area occupation and low noise cancellation efficiency caused by the large number of reference cells in the prior art are solved, and better noise suppression and image quality improvement are achieved.
Patent Information
- Application Number
- CN202411963320.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-27
- Publication Date
- 2025-04-08
AI Technical Summary
In the existing infrared imaging technology, the microbolometer focal plane array of the readout circuit requires a large number of reference cells, resulting in large area occupancy, low noise cancellation efficiency, and obvious impact on the transverse lines on the image.
By changing the number and arrangement of reference cells, at least two reference cells operate alternately to offset the noise generated by the detection cells, and when each row of detection cells is turned on, all detection cells are turned on simultaneously to output the detection signal.
It effectively reduces noise, improves image quality, reduces the impact of cross-border on the image, and reduces the area occupation and cost of the readout circuit by reducing the number of reference cells.
Smart Images

Figure CN119779489A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of infrared imaging technology, and in particular to a readout circuit, a readout method, and an infrared detector. Background Art
[0002] At present, infrared imaging technology has important applications in many fields. As the core of infrared imaging technology, the infrared focal plane array includes two parts: infrared detection and readout circuit. Among them, the microbolometer focal plane array (Focal Plane Array, FPA) has high sensitivity and is the most widely used infrared focal plane array. It detects the size of the infrared radiation signal by measuring the change of its resistance value.
[0003] In the prior art, the microbolometer focal plane array of the readout circuit is connected to a plurality of reference pixels, and one reference pixel is connected to a row of microbolometers. In this way, noise is offset and the effect of horizontal stripes on the image is reduced. However, this arrangement requires the use of a large number of reference pixels, which takes up a large amount of on-chip area. Summary of the invention
[0004] The invention provides a readout circuit, a readout method and an infrared detector. The readout circuit reduces noise and reduces the influence of horizontal stripes on an image by changing the number and arrangement of reference pixels.
[0005] In a first aspect, the present application provides a readout circuit. The readout circuit includes: a plurality of detection pixels arranged in an array, a plurality of reference pixels, a first control subcircuit, and a second control subcircuit; the number of reference pixels is less than the number of rows of the plurality of detection pixels; the first control subcircuit is connected to the plurality of reference pixels; the second control subcircuit is connected to the plurality of detection pixels; wherein the first control subcircuit is used to alternately and cyclically turn on the plurality of reference pixels; the second control subcircuit is used to, when a reference pixel is turned on, turn on a plurality of rows of detection pixels in sequence, and when each row of detection pixels is turned on, turn on each detection pixel in the row of detection pixels at the same time and output a detection signal.
[0006] Based on the above scheme, an embodiment of the present application provides a readout circuit, which offsets the noise generated by the detection pixels by alternating the operation of at least two reference pixels. When a row of detection pixels is working, a reference pixel is connected so that the output current does not change; after the detection pixels in this row have completed their work, they are disconnected from the reference pixel, and then when another row of detection pixels starts to work, another reference pixel is connected so that the output current does not change; then at least two reference pixels are alternately connected to a row of detection pixels to work until all pixels have completed their work and then stop. In this way, noise can be reduced by only using at least two pixels, and better matching can be achieved, thereby reducing the impact of horizontal stripes on the image.
[0007] In some embodiments, the first control subcircuit includes: a plurality of first switches; one of the first switches is correspondingly connected to one of the reference pixels.
[0008] In some embodiments, the second control subcircuit includes: a plurality of second switches; and one second switch is correspondingly connected to one detection pixel.
[0009] In some embodiments, the number of reference pixels is greater than or equal to 2.
[0010] In some embodiments, the number of rows of the detection pixels is N, N is greater than 4, and N is an even number, and the number of reference pixels is less than or equal to N / 2; or; the number of rows of the detection pixels is N, N is greater than 4, and N is an odd number, and the number of reference pixels is less than or equal to (N+1) / 2.
[0011] In some embodiments, the reference pixels are in X columns, and the X columns of reference pixels are connected in parallel.
[0012] In some embodiments, the size of the reference pixel is negatively correlated with the noise.
[0013] In some embodiments, the detection pixel includes a first resistor, and the reference pixel includes a second resistor; the resistance values of the first resistor and the second resistor decrease as the temperature increases.
[0014] In some embodiments, the first end of the bridge unit is electrically connected to the power supply end, the second end of the bridge unit is electrically connected to the power supply end, the third end of the bridge unit is electrically connected to one end of the first control subcircuit, the other end of the first control subcircuit is electrically connected to the first end of the reference pixel, the fourth end of the bridge unit is electrically connected to one end of the second control subcircuit, and the other end of the second control subcircuit is electrically connected to the first end of the detection pixel.
[0015] In some embodiments, the bridge unit includes: a first subunit and multiple second subunits, and the multiple second subunits are connected in parallel; the first end of the first subunit is electrically connected to the first end of the bridge unit, and the second end of the first subunit is electrically connected to the third end of the bridge unit; the first end of the second subunit is electrically connected to the second end of the bridge unit, and the second end of the first subunit is electrically connected to the fourth end of the bridge unit; the third end of the second subunit is electrically connected to the third end of the first subunit; the fourth end of the second subunit is electrically connected to the fourth end of the first subunit; wherein the second subunit is connected to a row of detection pixels.
[0016] In some embodiments, the first subunit includes: a third resistor, a first transistor, and a second transistor; the first end of the third resistor is electrically connected to the first end of the first subunit, and the second end of the third resistor is electrically connected to the first end of the first transistor; the control end of the first transistor is electrically connected to the third end of the first subunit, and the second end of the first transistor is electrically connected to the first end of the second transistor; the control end of the second transistor is electrically connected to the fourth end of the first subunit, the control end of the second transistor is also electrically connected to the first end of the second transistor, and the second end of the second transistor is electrically connected to the second end of the first subunit.
[0017] In some embodiments, the second subunit includes: a fourth resistor, a third transistor and a fourth transistor; the first end of the fourth resistor is electrically connected to the first end of the second subunit, and the second end of the fourth resistor is electrically connected to the first end of the third transistor; the control end of the third transistor is electrically connected to the third end of the second subunit, and the second end of the third transistor is electrically connected to the first end of the fourth transistor; the control end of the fourth transistor is electrically connected to the fourth end of the second subunit, and the second end of the fourth transistor is electrically connected to the second end of the second subunit.
[0018] In some embodiments, the readout circuit further includes: a signal processing subcircuit; an input end of the signal processing subcircuit is electrically connected to an output end of the detection pixel.
[0019] When one of the reference pixels is connected to a row of the detection pixels, the signal processing subcircuit is configured to integrate the detection pixels in a row, and after the detection pixels in a row are integrated, one of the reference pixels is disconnected from the detection pixels in a row. When another of the reference pixels is connected to another row of the detection pixels, the signal processing subcircuit is configured to integrate the detection pixels in another row, and after the detection pixels in another row are integrated, the other of the reference pixels is disconnected from the detection pixels in another row; the at least two detection pixels are configured to work alternately.
[0020] In the second aspect, the present application provides a readout method of a readout circuit, which is applied to the above-mentioned readout circuit; the first control subcircuit alternately and cyclically turns on the multiple reference pixels; when the second control subcircuit is turned on, multiple rows of detection pixels are turned on in sequence, and when each row of detection pixels is turned on, each detection pixel in the row of detection pixels is turned on at the same time, and the detection pixels output detection signals.
[0021] The beneficial effects that can be achieved by a readout method provided in some embodiments of the present application are the same as the beneficial effects that can be achieved by a readout circuit provided by the above technical solution, and will not be repeated here.
[0022] In some embodiments, when the first control subcircuit includes multiple first switches and the second control subcircuit includes at least two second switches; the first switch turns on the multiple reference pixels alternately and cyclically; when one of the reference pixels is turned on, the second switch turns on multiple rows of detection pixels in sequence, and when each row of detection pixels is turned on, each detection pixel in the row is turned on at the same time, and the detection pixels output detection signals.
[0023] In some embodiments, when the readout circuit further includes a signal processing subcircuit; when one of the reference pixels is connected to a row of the detection pixels, the signal processing subcircuit integrates a row of the detection pixels, and after a row of the detection pixels is integrated, one of the reference pixels is disconnected from a row of the detection pixels; when another of the reference pixels is connected to another row of the detection pixels, the signal processing subcircuit integrates another row of the detection pixels, and after another row of the detection pixels is integrated, another of the reference pixels is disconnected from another row of the detection pixels; wherein the plurality of detection pixels work alternately.
[0024] In a third aspect, the present application provides an infrared detector, comprising: the above-mentioned readout circuit.
[0025] The beneficial effects that can be achieved by an infrared detector provided by some embodiments of the present application are the same as the beneficial effects that can be achieved by a readout circuit provided by the above technical solution, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] The drawings described herein are used to provide a further understanding of the embodiments of the present disclosure and constitute a part of the embodiments of the present disclosure. The illustrative embodiments of the present disclosure and their descriptions are used to explain the present disclosure and do not constitute an improper limitation on the present disclosure. In the drawings:
[0027] Figure 1 is a schematic diagram of an existing readout circuit;
[0028] Figure 2 A schematic diagram of a readout circuit provided for some embodiments of the present disclosure;
[0029] Figure 3 A schematic diagram of another readout circuit provided for some embodiments of the present disclosure;
[0030] Figure 4 A schematic diagram of another readout circuit provided for some embodiments of the present disclosure;
[0031] Figure 5 A schematic diagram of another readout circuit provided for some embodiments of the present disclosure;
[0032] Figure 6 A circuit diagram of a readout circuit provided for some embodiments of the present disclosure;
[0033] Figure 7 A circuit diagram of another readout circuit provided for some embodiments of the present disclosure;
[0034] Figure 8 A circuit diagram of another readout circuit provided for some embodiments of the present disclosure;
[0035] Fig. 9 A switching timing diagram of a readout circuit provided for some embodiments of the present disclosure;
[0036] Fig.10 A schematic diagram of an infrared detector provided for some embodiments of the present disclosure.
[0037] Reference numerals
[0038] 1. First control subcircuit; 2. Second control subcircuit; 20. Bridge unit; 21. First subunit; 22. Second subunit; 3. Signal processing subcircuit; 100. Readout circuit; Pt. Detection pixel; Pc. Reference pixel; Pc1. First reference pixel; Pc2. Second reference pixel; Srs. First switch; Srsm. Second switch; Rs. First resistor; Rsm. Second resistor; Rdm. Third resistor; Rd. Fourth resistor; M1. First transistor; M2. Second transistor; M3. Third transistor; M4. Fourth transistor. DETAILED DESCRIPTION
[0039] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments provided by the present application, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present application.
[0040] Unless the context requires otherwise, throughout the specification and claims, the term "including" is to be interpreted as an open, inclusive meaning, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "examples" or "some examples" and the like are intended to indicate that specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present application. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics described may be included in any one or more embodiments or examples in any appropriate manner.
[0041] At present, infrared imaging technology has important applications in many fields. As the core of infrared imaging technology, the infrared focal plane array includes two parts: infrared detection and readout circuit. Among them, the microbolometer focal plane array (Focal Plane Array, FPA) has high sensitivity and is the most widely used infrared focal plane array. It detects the size of the infrared radiation signal by measuring the change of its resistance value.
[0042] Among them, microbolometers generally use cantilever beam microbridge structures made by micromachining technology. A layer of thermosensitive material with a high temperature coefficient of resistance (TCR) is deposited on the bridge deck, and the bridge deck is supported by two bridge legs with good mechanical properties and plated with conductive materials. The contact points between the bridge legs and the substrate are bridge piers, which are electrically connected to the silicon readout integrated circuit (ROIC) under the microbolometer. Through the bridge legs and bridge piers, the thermosensitive material is connected to the electrical channel of the readout circuit, forming a pixel unit that is sensitive to temperature and connected to the readout circuit.
[0043] In the prior art, the microbolometer focal plane array of the readout circuit is connected to a plurality of reference pixels, and one reference pixel is connected to a row of microbolometers. In this way, noise is offset and the effect of horizontal stripes on the image is reduced. However, this arrangement requires the use of a large number of reference pixels, which takes up a large amount of on-chip area.
[0044] For example, refer to Figure 1 , Figure 1 The resistor Rsmx in refers to the reference pixel mentioned above, and multiple resistors Rsx constitute the microbolometer focal plane array. There are n reference pixels in total, and the microbolometer focal plane array has n rows and m columns in total, that is, the number of reference pixels is the same as the number of rows of resistors Rsx, that is, one resistor Rsmx corresponds to one row of resistors Rsx, so that more resistors Rsmx are used, and the area occupied by the entire circuit is also larger.
[0045] At the same time, due to production problems, multiple resistors Rsmx are not exactly the same, so the greater the number of resistors Rsmx, the more likely it is that the horizontal stripes in the image will increase.
[0046] It should be noted that both resistors Rsmx and Rsx will change resistance under the influence of Joule heat. The higher the temperature, the lower the resistance value. In the traditional readout circuit, only resistor Rsx can be affected by Joule heat, which will make the readout circuit asymmetric, and the influence of power supply noise and circuit noise will be greatly increased. Therefore, the resistor Rsmx is replaced with a resistor of the same type as the resistor Rsx, so that it can be affected by Joule heat, so that the readout circuit can become symmetrical, offsetting the influence of power supply noise and circuit noise.
[0047] Based on this, some embodiments of the present application provide a readout circuit. Figure 2 As shown, the present application provides a readout circuit 100. The readout circuit 100 comprises: a plurality of detection pixels Pt arranged in an array, a plurality of reference pixels Pc, a first control subcircuit 1 and a second control subcircuit 2.
[0048] The number of reference pixels Pc is less than the number of rows of the plurality of detection pixels Pt.
[0049] The first control subcircuit 1 is connected to a plurality of reference pixels Pc; the second control subcircuit 2 is connected to a plurality of detection pixels Pt.
[0050] Among them, the first control subcircuit is used to alternately and cyclically turn on multiple reference pixels Pc; the second control subcircuit is used to turn on multiple rows of detection pixels Pt in sequence when one reference pixel Pc is turned on, and when each row of detection pixels Pt is turned on, each detection pixel Pt in a row of detection pixels Pt is turned on at the same time, and the detection pixels Pt output detection signals.
[0051] In some embodiments, Figure 3 As shown, the number of reference pixels Pc is greater than or equal to 2.
[0052] like Figure 3 As shown, when the number of reference pixels Pc is 2, the first control subcircuit 1 is used to alternately and cyclically turn on two reference pixels Pc; when the first control subcircuit 1 controls the first reference pixel Pc to be turned on, the second control subcircuit 2 makes each detection pixel Pt in the first row of detection pixels Pt turned on at the same time; then the first control subcircuit 1 controls the first reference pixel Pc to be turned off, and then controls the second reference pixel Pc to be turned on, the second control subcircuit 2 makes each detection pixel Pt in the second row of detection pixels Pt turned on at the same time; then the first control subcircuit 1 controls the second reference pixel Pc to be turned off, and then controls the first reference pixel Pc to be turned on, the second control subcircuit 2 makes each detection pixel Pt in the third row of detection pixels Pt turned on at the same time; and so on, until all the detection pixels Pt are turned on, and multiple detection pixels Pt in each row of detection pixels Pt output detection signals in sequence when they are turned on.
[0053] That is to say, only at least two reference pixels Pc are needed to enable all detection pixels Pt to output detection signals in sequence.
[0054] In some embodiments, the detection signal is current.
[0055] It should be noted that this cannot be achieved if there is only one reference pixel, because a reference pixel needs to release Joule heat after working, that is, it needs a period of cooling before it can continue to work, so at least two alternating operations are required.
[0056] When the readout circuit 100 is working, the internal temperature will gradually increase, that is, when the current passes through the detection pixel Pt, heat will be generated, which will affect the resistance value of the detection pixel Pt, and finally affect the size of the output current (detection signal), which will be different from the detected current, thus generating noise.
[0057] After the reference pixel Pc is connected to a row of detection pixels Pt, the characteristics of the reference pixel Pc and the detection pixel Pt are consistent, so the noise generated can be offset and the influence of horizontal stripes on the image can be reduced. In other words, when the detection pixel Pt is working, the reference pixel Pc is connected to offset the noise and then the detection signal is output.
[0058] After a row of detection pixels Pt is completed, the reference pixels Pc connected to it are disconnected, and then another row of detection pixels Pt is connected to another reference pixel Pc to offset the noise, and then the detection signal is output; at least two reference pixels Pc are required to work alternately to offset the noise generated by each row of detection pixels Pt.
[0059] Furthermore, the fewer the number of reference pixels Pc, the higher the matching degree, and the easier it is to cancel out the noise. At the same time, the area of the readout circuit 100 occupied is smaller, which can reduce the overall cost.
[0060] In some embodiments, when the number of reference pixels Pc is small, the size of the reference pixels Pc may be increased, thereby reducing 1 / f noise.
[0061] That is to say, the size of the reference pixel is negatively correlated with the noise. The larger the size of the reference pixel, the smaller the 1 / f noise.
[0062] 1 / f noise, also known as flicker noise or pink noise, is a type of noise that is common in electronic devices and circuits. Its characteristic is that the power spectrum density of the noise is inversely proportional to the frequency, that is, as the frequency decreases, the intensity of the noise increases. This noise is particularly significant at low frequencies and may have a certain impact on the performance of electronic equipment.
[0063] Methods to reduce 1 / f noise include selecting appropriate electronic components, optimizing circuit design, and applying noise suppression techniques. For example, using high-quality electronic components can reduce the impact of internal defects and impurities on noise; optimizing circuit design can reduce the impact of noise sources.
[0064] In the present application, the possibility of internal defects of electronic devices is reduced by reducing the number of reference pixels Pc and increasing the size of the reference pixels Pc, thereby reducing 1 / f noise.
[0065] like Figure 2 to Figure 5 As shown, in some embodiments, the detection pixel Pt is a first resistor Rs, and the reference pixel Pc is a second resistor Rsm; the resistance values of the first resistor Rs and the second resistor Rsm decrease as the temperature increases.
[0066] Based on the above scheme, an embodiment of the present application provides a readout circuit 100, which offsets the noise generated by the detection pixel Pt by alternating the operation of at least two reference pixels Pc. When a row of detection pixels Pt is working, a reference pixel Pc is connected so that the output current does not change; after the detection pixels Pt in the row complete their work, they are disconnected from the reference pixel Pc, and then when another row of detection pixels Pt starts to work, another reference pixel Pc is connected so that the output current does not change; then at least two reference pixels Pc are connected alternately with a row of detection pixels Pt to work until all detection pixels Pt have completed their work and then stop. In this way, noise can be reduced and better matching can be achieved by only using at least two reference pixels Pc, thereby reducing the impact of horizontal stripes on the image.
[0067] In some embodiments, when N is less than or equal to 4, the number of reference pixels Pc is 2.
[0068] For example, if N=2, there are only two rows of detection pixels Pt. At this time, the number of reference pixels Pc required is 2. When the first row of detection pixels Pt is working, it is connected to the first reference pixel Pc so that the output current does not change. After the first row of detection pixels Pt completes its work, it is disconnected from the first reference pixel Pc. Then, when the second row of detection pixels Pt starts working, it is connected to the second reference pixel Pc so that the output current does not change. In this way, noise can be reduced and better matching can be achieved by using only two reference pixels Pc, thereby reducing the influence of horizontal stripes on the image.
[0069] In some embodiments, the number of rows of detection pixels is N, N is greater than 4, and N is an even number, and the number of reference pixels is less than or equal to N / 2.
[0070] Reference Figure 4, when N is greater than 4 and N is an even number, the number of reference pixels Pc is less than or equal to N / 2; multiple reference pixels Pc are connected to a row of detection pixels Pt in sequence and work alternately.
[0071] For example, N=16, then the number of reference pixels Pc is less than or equal to 8.
[0072] If the number of reference pixels Pc = 8, when the first row of detection pixels Pt is working, the first reference pixel Pc is connected, so that the output current does not change; after the first row of detection pixels Pt completes its work, it is disconnected from the first reference pixel Pc, and then when the second row of detection pixels Pt starts to work, it is connected to the second reference pixel Pc, so that the output current does not change; after the second row of detection pixels Pt completes its work, it is disconnected from the second reference pixel Pc, and then when the third row of detection pixels Pt starts to work, it is connected to the third reference pixel Pc, so that the output current does not change; until the eighth row of detection pixels Pt completes its work.
[0073] Then, when the detection pixel Pt in the ninth row is working, it is connected to the first reference pixel Pc so that the output current does not change; and then it is connected to the detection pixel Pt in the tenth row through the second reference pixel Pc, until the detection pixel Pt in the sixteenth row completes its work.
[0074] That is to say, the number of reference pixels Pc can be increased continuously, that is, 2, 4, 6 and up to N / 2 (N is an integer multiple of 2). The more reference pixels Pc there are, the smaller the impact of non-ideal factors such as gradient differences caused by layout and routing parasitics, but the impact of 1 / f noise and horizontal stripes will become larger. Therefore, a compromise between performance and area needs to be made in actual design.
[0075] In some embodiments, the number of rows of detection pixels is N, N is greater than 4, and N is an odd number, and the number of reference pixels is less than or equal to (N+1) / 2.
[0076] Reference Figure 4 , when N is greater than 4 and N is an odd number, the number of reference pixels Pc is less than or equal to (N+1) / 2; multiple reference pixels Pc are connected to a row of detection pixels Pt in sequence and work alternately.
[0077] For example, N=9, then the number of reference pixels Pc is less than or equal to 5.
[0078] If the number of reference pixels Pc = 5, when the first row of detection pixels Pt is working, the first reference pixel Pc is connected, so that the output current does not change; after the first row of detection pixels Pt completes the work, it is disconnected from the first reference pixel Pc, and then when the second row of detection pixels Pt starts to work, the second reference pixel Pc is connected, so that the output current does not change; after the second row of detection pixels Pt completes the work, it is disconnected from the second reference pixel Pc, and then when the third row of detection pixels Pt starts to work, the third reference pixel Pc is connected, so that the output current does not change; until the eighth row of detection pixels Pt completes the work.
[0079] Then, when the detection pixels Pt in the ninth row are working, they are connected to the fifth reference pixel Pc so that the output current does not change.
[0080] like Figure 5 As shown, in some embodiments, the reference pixels Pc are arranged in X columns, and the X columns of reference pixels Pc are connected in parallel.
[0081] When N is less than or equal to 4, the number of reference pixels Pc is 2; when N is greater than 4, the number of reference pixels Pc is less than or equal to N / 2, and XN / 2 <N。
[0082] For example, X=4, N=32; the reference pixels Pc have 4 columns, the detection pixels Pt have 32 rows, the number of reference pixels Pc is less than or equal to 16, and XN / 2<16, that is, 2N<16, so the number of reference pixels Pc is less than 8; the number of reference pixels Pc can be: 2, 3, 4, 5, 6, 7.
[0083] like Figure 6 As shown, in some embodiments, the first control subcircuit 1 further includes: a plurality of first switches Srsm.
[0084] A first switch Srsm is connected to a second resistor Rsm correspondingly; when the first switch Srsm is turned on, the reference pixel Pc is turned on; when the first switch Srsm is turned off, the reference pixel Pc is turned off.
[0085] In some embodiments, the second control subcircuit 2 further includes: a plurality of second switches Srs.
[0086] A second switch Srs is connected to a first resistor Rs correspondingly; when the second switch Srs is turned on, the detection pixel Pt is turned on; when the second switch Srs is turned off, the detection pixel Pt is turned off.
[0087] The number of the first switches Srsm is the same as the number of the reference pixels Pc.
[0088] When the first switch Srsm and the second switch Srs are turned on, the reference pixel Pc is connected to the detection pixel Pt.
[0089] like Figure 6 , Figure 7 and Figure 8 As shown, in some embodiments, the readout circuit 100 further includes: a bridge unit 20 .
[0090] The first end of the bridge unit 20 is electrically connected to the power supply terminal VSK, the second end of the bridge unit 20 is electrically connected to the power supply terminal VSK, the third end of the bridge unit 20 is electrically connected to one end of the first control subcircuit 1, the other end of the first control subcircuit 1 is electrically connected to the first end of the reference pixel Pc, the fourth end of the bridge unit 20 is electrically connected to one end of the second control subcircuit 2, and the other end of the second control subcircuit 2 is electrically connected to the first end of the detection pixel Pt.
[0091] That is to say, the first control subcircuit 1 also controls the conduction or disconnection between the bridge unit 20 and the reference pixel Pc; the second control subcircuit 2 also controls the conduction or disconnection between the bridge unit 20 and the detection pixel Pt.
[0092] Among them, it should be noted that Figure 6 The corresponding one is the readout circuit diagram with only two reference pixels. Figure 7 The corresponding circuit diagram is the readout circuit diagram of at most N / 2 reference pixels. Figure 8 It is the readout circuit diagram of multiple columns of reference pixels.
[0093] like Figure 6 to Figure 8 As shown, the bridge unit 20 includes: a first subunit 21 and a plurality of second subunits 22, and the plurality of second subunits 22 are connected in parallel.
[0094] The first end of the first subunit 21 is electrically connected to the first end of the bridge unit 20 , and the second end of the first subunit 21 is electrically connected to the third end of the bridge unit 20 .
[0095] The first end of the second subunit 22 is electrically connected to the second end of the bridge unit 20, the second end of the first subunit 21 is electrically connected to the fourth end of the bridge unit 20; the third end of the second subunit 22 is electrically connected to the third end of the first subunit 21; the fourth end of the second subunit 22 is electrically connected to the fourth end of the first subunit 21.
[0096] The second subunit 22 is correspondingly connected to a row of detection pixels Pt.
[0097] The first subunit 21 includes: a third resistor Rdm, a first transistor M1 and a second transistor M2.
[0098] A first end of the third resistor Rdm is electrically connected to a first end of the first subunit 21 , and a second end of the third resistor Rdm is electrically connected to a first end of the first transistor M1 .
[0099] The control terminal of the first transistor M1 is electrically connected to the third terminal of the first subunit 21 , and the second terminal of the first transistor M1 is electrically connected to the first terminal of the second transistor M2 .
[0100] The control end of the second transistor M2 is electrically connected to the fourth end of the first subunit 21 , the control end of the second transistor M2 is also electrically connected to the first end of the second transistor M2 , and the second end of the second transistor M2 is electrically connected to the second end of the first subunit 21 .
[0101] The first subunit 21 includes: a fourth resistor Rd, a third transistor M3 and a fourth transistor M4.
[0102] A first end of the fourth resistor Rd is electrically connected to a first end of the second subunit 22 , and a second end of the fourth resistor Rd is electrically connected to a first end of the third transistor M3 .
[0103] The control end of the third transistor M3 is electrically connected to the third end of the second subunit 22 , and the second end of the third transistor M3 is electrically connected to the first end of the fourth transistor M4 .
[0104] The control terminal of the fourth transistor M4 is electrically connected to the fourth terminal of the second sub-unit 22 , and the second terminal of the fourth transistor M4 is electrically connected to the second terminal of the second sub-unit 22 .
[0105] It should be noted that the detection signal refers to the current output by the first transistor M1. The purpose of this application is to keep the current output by the first transistor M1 unchanged, so the reference pixel Pc is introduced to offset the current between the detection pixel Pt. When the detection pixel Pt is working, the resistance will decrease due to the influence of Joule heat, and the current flowing through the detection pixel Pt will increase, that is, the current output by the first transistor M1 will increase. In order to ensure that the current of the first transistor M1 remains unchanged, the bias voltage Vfid needs to be reduced synchronously; in order to synchronously reduce the bias voltage Vfid, the current output by the fourth transistor M4 needs to remain unchanged when the resistance of the reference pixel Pt decreases. Therefore, by turning on the reference pixel Pc, the bias voltage Vfid can be reduced, so that the current of the first transistor M1 remains unchanged.
[0106] Reference Figure 3 and Fig. 9, in the first first switch Srsm <1> When turned on, the first second switch Srs <1> Correspondingly, the first row of detection pixels Pt is connected to the first reference pixel Pc, and the second switch Srsm <2> When turned on, the second first switch Srs <2> Correspondingly, the second row detection pixel Pt is connected to the first reference pixel Pc, and the first second switch Srsm <1> When it is turned on again, the third first switch Srs <3> Correspondingly, the third row of detection pixels Pt are connected to the first reference pixel Pc, and so on, until all detection pixels Pt complete their work.
[0107] In some embodiments, Figure 6 to Figure 8 As shown, the readout circuit 100 further includes: a signal processing subcircuit 3 ; an input end of the signal processing subcircuit 3 is electrically connected to an output end of the bridge unit 20 .
[0108] When a reference pixel Pc is connected to a row of detection pixels Pt, the signal processing subcircuit is configured to integrate a row of detection pixels Pt. After the row of detection pixels Pt is integrated, a reference pixel Pc is disconnected from a row of detection pixels Pt.
[0109] When another reference pixel Pc is connected to another row of detection pixels Pt, the signal processing subcircuit is configured to integrate another row of detection pixels Pt. After the integration of another row of detection pixels Pt, the other reference pixel Pc is disconnected from another row of detection pixels Pt; at least two detection pixels Pt are configured to work alternately.
[0110] like Figure 3 and Figure 6 As shown, in some embodiments, at least two reference pixels Pc include: a first reference pixel Pc1 and a second reference pixel Pc2; the first reference pixel Pc1 corresponds to a resistor Rsm <1> , the second reference pixel Pc2 corresponds to the resistor Rsm <2> .
[0111] When the first reference pixel Pc1 is connected to a row of detection pixels Pt, the signal processing subcircuit 3 is configured to integrate a row of detection pixels Pt. After the row of detection pixels Pt is integrated, the first reference pixel Pc1 is disconnected from the row of detection pixels Pt; when the second reference pixel Pc2 is connected to another row of detection pixels Pt, the signal processing subcircuit 3 is configured to integrate the other row of detection pixels Pt. After the other row of detection pixels Pt is integrated, the other reference pixel Pc is disconnected from the other row of detection pixels Pt; the first reference pixel Pc1 is connected to the next row of detection pixels Pt; the first detection pixel Pt and the second detection pixel Pt are configured to work alternately.
[0112] Based on the above scheme, the embodiment of the present application provides a readout circuit 100, which offsets the noise generated by the detection pixel Pt by alternating the operation of at least two reference pixels Pc. When a row of detection pixels Pt is working, a reference pixel Pc is connected so that the output current does not change, and the current is transmitted to a signal processing subcircuit 3, and a signal processing subcircuit 3 converts the current into a voltage output; after the detection pixel Pt in the row completes the work, it is disconnected from the reference pixel Pc, and then when another row of detection pixels Pt starts working, another reference pixel Pc is connected so that the output current does not change, and the current is transmitted to another signal processing subcircuit 3, and another signal processing subcircuit 3 converts the current into a voltage output; then at least two reference pixels Pc are alternately connected to a row of detection pixels Pt to work until all detection pixels Pt have completed the work and then stop. In this way, noise can be reduced and better matching can be achieved by only using at least two reference pixels Pc, thereby reducing the influence of horizontal stripes on the image.
[0113] The readout method of the above readout circuit is specifically as follows:
[0114] S1. The first control subcircuit 1 turns on a plurality of reference pixels Pc in an alternating cycle.
[0115] For example, when the number of reference pixels Pc is 2, the first control subcircuit 1 is used to alternately and cyclically turn on two reference pixels Pc; the first control subcircuit 1 controls the first reference pixel Pc to turn on, and after each detection pixel Pt in the first row of detection pixels Pt is turned on at the same time and is turned on with the first reference pixel Pc; the first control subcircuit 1 then controls the first reference pixel Pc to be disconnected, and controls the second reference pixel Pc to be turned on, after each detection pixel Pt in the second row of detection pixels Pt is turned on at the same time and is turned on with the first reference pixel Pc; the first control subcircuit 1 controls the second reference pixel Pc to be disconnected, and then controls the first reference pixel Pc to be turned on, after each detection pixel Pt in the third row of detection pixels Pt is turned on at the same time and is turned on with the first reference pixel Pc; and so on, until all the detection pixels Pt are turned on, and multiple detection pixels Pt in each row of detection pixels Pt output detection signals in sequence when they are turned on.
[0116] S2. When a reference pixel Pc is turned on, the second control subcircuit 2 turns on multiple rows of detection pixels Pt in sequence, and when each row of detection pixels Pt is turned on, all detection pixels Pt in the row of detection pixels Pt are turned on at the same time, and the detection pixels Pt output detection signals.
[0117] For example, when the number of reference pixels Pc is 2, the first control subcircuit 1 is used to alternately and cyclically turn on two reference pixels Pc; when the first control subcircuit 1 controls the first reference pixel Pc to be turned on, the second control subcircuit 2 turns on each detection pixel Pt in the first row of detection pixels Pt at the same time; then the first control subcircuit 1 controls the first reference pixel Pc to be turned off, and then controls the second reference pixel Pc to be turned on, and the second control subcircuit 2 turns on each detection pixel Pt in the second row of detection pixels Pt at the same time; then the first control subcircuit 1 controls the second reference pixel Pc to be turned off, and then controls the first reference pixel Pc to be turned on, and the second control subcircuit 2 turns on each detection pixel Pt in the third row of detection pixels Pt at the same time; and so on, until all the detection pixels Pt are turned on, and multiple detection pixels Pt in each row of detection pixels Pt output detection signals in sequence when they are turned on.
[0118] In the case where the first control subcircuit 1 includes a plurality of first switches Srsm and the second control subcircuit 2 includes a plurality of second switches Srs:
[0119] S11. The first switch Srsm alternately and cyclically turns on a plurality of reference pixels Pc.
[0120] For example, when the number of reference pixels Pc is 2, the first switch Srsm is used to alternately and cyclically turn on two reference pixels Pc; the first switch Srsm controls the first reference pixel Pc to turn on, and after each detection pixel Pt in the first row of detection pixels Pt is turned on at the same time and is turned on with the first reference pixel Pc; the first switch Srsm then controls the first reference pixel Pc to turn off, and controls the second reference pixel Pc to turn on, after each detection pixel Pt in the second row of detection pixels Pt is turned on at the same time and is turned on with the first reference pixel Pc; the first switch Srsm controls the second reference pixel Pc to turn off, and then controls the first reference pixel Pc to turn on, after each detection pixel Pt in the third row of detection pixels Pt is turned on at the same time and is turned on with the first reference pixel Pc; and so on, until all the detection pixels Pt are turned on, and multiple detection pixels Pt in each row of detection pixels Pt output detection signals in sequence when they are turned on.
[0121] S21. When a reference pixel Pc is turned on, the second switch Srs turns on multiple rows of detection pixels Pt in sequence, and when each row of detection pixels Pt is turned on, each detection pixel Pt in the row of detection pixels Pt is turned on at the same time, and the detection pixels Pt output detection signals.
[0122] For example, when the number of reference pixels Pc is 2, the first switch Srsm is used to alternately turn on two reference pixels Pc; when the first switch Srsm controls the first reference pixel Pc to turn on, the second switch Srs makes each detection pixel Pt in the first row of detection pixels Pt turn on at the same time; then the first switch Srsm controls the first reference pixel Pc to turn off, and then controls the second reference pixel Pc to turn on, the second switch Srs makes each detection pixel Pt in the second row of detection pixels Pt turn on at the same time; then the first switch Srsm controls the second reference pixel Pc to turn off, and then controls the first reference pixel Pc to turn on, the second switch Srs makes each detection pixel Pt in the third row of detection pixels Pt turn on at the same time; and so on, until all the detection pixels Pt are turned on, and multiple detection pixels Pt in each row of detection pixels Pt output detection signals in sequence when they are turned on.
[0123] In the case where the readout circuit 100 further includes a signal processing subcircuit 3:
[0124] S101. When a reference pixel Pc is connected to a row of detection pixels Pt, the signal processing subcircuit 3 integrates a row of detection pixels Pt. After the row of detection pixels Pt is integrated, a reference pixel Pc is disconnected from a row of detection pixels Pt.
[0125] S102, when another reference pixel Pc is connected to another row of detection pixels Pt, the signal processing subcircuit 3 integrates another row of detection pixels Pt. After the integration of another row of detection pixels Pt, another reference pixel Pc is disconnected from another row of detection pixels Pt.
[0126] For example, when a row of detection pixels Pt is working, it is connected to a reference pixel Pc so that the output current does not change, and the current is transmitted to a signal processing subcircuit 3, and the signal processing subcircuit 3 converts the current into a voltage output; after the row of detection pixels Pt completes its work, it is disconnected from the reference pixel Pc, and then when another row of detection pixels Pt starts working, it is connected to another reference pixel Pc so that the output current does not change, and the current is transmitted to another signal processing subcircuit 3, and the other signal processing subcircuit 3 converts the current into a voltage output; then at least two reference pixels Pc are alternately connected to a row of detection pixels Pt to work until all detection pixels Pt complete their work and stop. In this way, noise can be reduced and better matching can be achieved by only using at least two reference pixels Pc, thereby reducing the influence of horizontal stripes on the image.
[0127] Some embodiments of the present application also provide an infrared detector, such as Fig.10 As shown, the infrared detector 200 includes: a readout circuit 100 .
[0128] Based on the above scheme, when the readout circuit in the infrared detector in the present application includes at least two reference pixels, the size of a single reference pixel can be increased, which is conducive to reducing 1 / f noise and reducing the influence of horizontal stripes on the image; when the number of reference pixels is expanded, the influence of non-ideal factors such as gradient differences caused by layout and routing parasitics can be reduced. And because there is no large area consumption of reference pixels, the reference pixels can be made into multiple columns, which is conducive to reducing 1 / f noise and thermal noise.
[0129] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. A readout circuit, characterized in that: include: A plurality of detection pixels arranged in an array; A plurality of reference pixels, wherein the number of the reference pixels is less than the number of rows of the plurality of detection pixels; A first control subcircuit connected to the plurality of reference pixels; A second control subcircuit connected to the plurality of detection pixels; Wherein, the first control subcircuit is used to alternately and cyclically turn on the multiple reference pixels; The second control subcircuit is used to, when one of the reference pixels is turned on, turn on multiple rows of detection pixels in sequence, and when each row of detection pixels is turned on, make all detection pixels in the row of detection pixels turn on simultaneously and output detection signals.
2. The readout circuit according to claim 1, characterized in that The first control subcircuit includes: a plurality of first switches; One of the first switches is connected to one of the reference pixels accordingly.
3. The readout circuit according to claim 1, characterized in that The second control subcircuit includes: a plurality of second switches; One of the second switches is connected to one of the detection pixels accordingly.
4. The readout circuit according to claim 1, characterized in that: The number of the reference pixels is greater than or equal to 2.
5. The readout circuit according to claim 4, characterized in that: The number of rows of the detection pixels is N, N is greater than 4, and N is an even number, and the number of the reference pixels is less than or equal to N / 2; or; The number of rows of the detection pixels is N, N is greater than 4, and N is an odd number, and the number of the reference pixels is less than or equal to (N+1) / 2.
6. The readout circuit according to claim 4, characterized in that: The reference pixels are in X columns, and the reference pixels in the X columns are connected in parallel.
7. The readout circuit according to claim 4, characterized in that: The size of the reference pixel is negatively correlated with the noise.
8. The readout circuit according to claim 1, characterized in that: The detection pixel comprises a first resistor, and the reference pixel comprises a second resistor; The resistance values of the first resistor and the second resistor decrease as the temperature increases.
9. The readout circuit according to any one of claims 1 to 8, characterized in that: The readout circuit further includes: a bridge unit; The first end of the bridge unit is electrically connected to the power supply end, the second end of the bridge unit is electrically connected to the power supply end, the third end of the bridge unit is electrically connected to one end of the first control subcircuit, the other end of the first control subcircuit is electrically connected to the first end of the reference pixel, the fourth end of the bridge unit is electrically connected to one end of the second control subcircuit, and the other end of the second control subcircuit is electrically connected to the first end of the detection pixel.
10. The readout circuit according to claim 9, characterized in that: The readout circuit further includes: a signal processing subcircuit; The input end of the signal processing subcircuit is electrically connected to the output end of the bridge unit; When one of the reference pixels is connected to a row of the detection pixels, the signal processing subcircuit is configured to integrate a row of the detection pixels, and after a row of the detection pixels is integrated, one of the reference pixels is disconnected from a row of the detection pixels; When another of the reference pixels is connected to another row of the detection pixels, the signal processing subcircuit is configured to integrate the detection pixels in another row, and after the detection pixels in another row are integrated, the other of the reference pixels is disconnected from the detection pixels in another row; At least two of the detection pixels are configured to work alternately.
11. A readout method of a readout circuit, characterized in that: Applicable to a readout circuit as claimed in any one of claims 1 to 10; The first control subcircuit alternately and cyclically turns on the plurality of reference pixels; When one of the reference pixels is turned on, the second control subcircuit turns on multiple rows of detection pixels in sequence, and when each row of detection pixels is turned on, turns on all detection pixels in the row of detection pixels at the same time, and the detection pixels output detection signals.
12. The reading method according to claim 11, characterized in that: In the case where the first control subcircuit includes a plurality of first switches and the second control subcircuit includes a plurality of second switches; The first switch turns on the plurality of reference pixels alternately and cyclically; When one of the reference pixels is turned on, the second switch turns on multiple rows of detection pixels in sequence, and when each row of detection pixels is turned on, each detection pixel in the row is turned on at the same time, and the detection pixels output detection signals.
13. The reading method according to claim 11 or 12, characterized in that: In the case where the readout circuit further comprises a signal processing subcircuit; When one of the reference pixels is connected to a row of the detection pixels, the signal processing subcircuit integrates a row of the detection pixels, and after a row of the detection pixels is integrated, one of the reference pixels is disconnected from a row of the detection pixels; When another of the reference pixels is connected to another row of the detection pixels, the signal processing subcircuit integrates the detection pixels in another row, and after the detection pixels in another row are integrated, another of the reference pixels is disconnected from the detection pixels in another row; Wherein, the multiple detection pixels work alternately.
14. An infrared detector, characterized in that: include: The readout circuit according to any one of claims 1 to 10.