A method and system for implementing Zynq device running on RAM
By setting up two random access memories in the Zynq device and using external Flash for code loading, the problem of external DDR devices increasing design complexity and power consumption is solved, and efficient and low-cost device operation and wide application are achieved.
Patent Information
- Application Number
- CN202411941434.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-04-08
AI Technical Summary
Existing Zynq devices require external DDR devices in hardware design, resulting in increased design complexity, increased cost and increased power consumption, limiting the widespread application of devices.
By setting up two random access memories in the Zynq device and connecting them with external Flash, clock system and power supply system, the direct loading and operation of startup code and running code is achieved, avoiding dependence on external DDR devices.
It realizes the rapid operation and efficient performance of Zynq devices, reduces design difficulty and cost, reduces power consumption, and greatly improves the wide range of devices.
Smart Images
Figure CN119782252A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of system chip control, and in particular relates to a method and a system for implementing a Zynq device running on a RAM. Background Art
[0002] Zynq devices are SoCs (system-on-chips) based on ARM processors, designed to provide the processing power and computing performance required for high-end embedded applications such as video surveillance, automotive driver assistance, and engineering automation. They have high performance, low power consumption, and multi-core processing capabilities. With their promotion in the market, the market share of this type of device continues to increase due to its excellent performance.
[0003] On the application side, this type of device has several hundred KB of RAM (Random Access Memory) inside, and also reserves space for expansion. During the application process, an external DDR device (Double Data Rate Synchronous Dynamic Random Access Memory) is required to expand the internal RAM, which can be expanded to 1G at most, for the operation of the Linux operating system. This method of reserving address space internally and connecting physical circuits externally greatly improves the performance of the device while also simplifying the design and manufacturing process of the device.
[0004] However, external DDR devices include DDR1 / DDR2 / DDR3. In the hardware design of such devices, factors such as terminal impedance, routing delay, routing impedance and topology need to be considered. This will greatly increase the hardware cost for users in hardware design, including external DDR devices, increased difficulty in PCB design and increased number of PCB layers; at the same time, external DDR devices will also increase overall power consumption. Therefore, on the application side, for customers who do not need to run the operating system and only need to use device resources and peripherals, external DDR devices seriously restrict the application of such devices and bring great inconvenience. Summary of the invention
[0005] The object of the present invention is to provide a method and system for implementing a Zynq device running on a RAM, so as to overcome the deficiencies of the prior art.
[0006] To achieve the above purpose, the technical solution adopted by the present invention is as follows: A system for implementing a Zynq device to run on a RAM comprises an external Flash, a clock system, a power supply system and a Zynq device. Two random access memories are arranged inside the Zynq device. The Zynq device is respectively connected to the external Flash, the clock system and the power supply system. The clock system is used to provide a clock for the entire system. The power supply system is used to provide power for the entire system. The external Flash is used to store a startup code, a running code and test data. After the system is powered on, the startup code is directly loaded into a random access memory in the Zynq device through the external Flash, and the running code and test data are loaded into another random access memory in the Zynq device.
[0007] Preferably, the startup code is the code that is first loaded and executed when the system starts, and is used to initialize the system hardware and software environment.
[0008] Preferably, the running code is the program code required for the normal operation of the system; the test data is used to test the system during the system development, debugging and verification stages.
[0009] Preferably, the Zynq device integrates a processor core, programmable logic, and input and output interfaces.
[0010] Preferably, the external Flash memory specifically adopts a QSPI module.
[0011] Preferably, the external Flash memory communicates with the Zynq device at high speed via a single-wire, dual-wire or quad-wire mode.
[0012] A method for implementing a Zynq device running on RAM, comprising the following steps: The startup code, running code and test data are stored in the external Flash. After power-on, the external Flash transfers the startup code to a random access memory in the Zynq device for execution, and transfers the running code and test data to another random access memory in the Zynq device for execution.
[0013] Preferably, the startup code is used to perform system initialization, including configuring hardware resources and establishing a software environment.
[0014] Preferably, the running code is the program code required for the normal operation of the system.
[0015] Preferably, the test data is used to test the system during the system development, debugging and verification stages.
[0016] Compared with the prior art, the present invention has the following beneficial technical effects: The present invention provides a system for realizing the operation of a Zynq device on a RAM, comprising an external Flash, a clock system, a power supply system and a Zynq device. Two random access memories are arranged inside the Zynq device. The Zynq device is respectively connected to the external Flash, the clock system and the power supply system. The clock system is used to provide a clock for the entire system, the power supply system is used to provide power for the entire system, the external Flash is used to store a startup code, an operating code and test data. After the system is powered on, the startup code is directly loaded into a random access memory in the Zynq device through the external Flash, and the operating code and the test data are loaded into another random access memory in the Zynq device, so that the Zynq device can be quickly operated. The present application does not require additional external DDR devices, the design difficulty is reduced, the number of PCB board layers is reduced, and the cost is reduced; at the same time, the corresponding DDR devices are reduced, the power consumption is reduced, and the application of the Zynq device can be greatly improved. In addition, the present invention is a highly integrated embedded system, which jointly supports the normal operation and high-efficiency performance of the system. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 Schematic diagram of a system for implementing a Zynq device running on a RAM in an embodiment of the present invention.
[0018] Figure 2 This is a schematic diagram of loading the startup code into RAM0 in an embodiment of the present invention.
[0019] Figure 3 This is a schematic diagram of loading ARM code into RAM1 in an embodiment of the present invention. DETAILED DESCRIPTION
[0020] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.
[0021] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0022] like Figure 1 As shown, the present invention provides a system for realizing Zynq device running on RAM, including external Flash, clock system, power supply system and Zynq device, two random access memories are arranged inside the Zynq device, the Zynq device is respectively connected with the external Flash, clock system and power supply system, the clock system is used to provide the clock of the whole system, the power supply system is used to provide the power of the whole system, the external Flash is used to store the startup code, the running code and the test data, after the system is powered on, the startup code is directly loaded into a random access memory in the Zynq device through the external Flash, the running code and the test data are loaded into another random access memory in the Zynq device, the fast running of the Zynq device can be realized, the application does not need additional external DDR devices, the design difficulty is reduced, the number of PCB board layers is reduced, and the cost is reduced; at the same time, the corresponding DDR devices are reduced, the power consumption is reduced, and the application of the Zynq device can be greatly improved, and the present invention is a highly integrated embedded system, which jointly supports the normal operation and high efficiency performance of the system.
[0023] In the specific implementation of the present application, the external Flash memory is used to store the startup code, the running code and the test data. The startup code is the code that is first loaded and executed when the system starts, and it is responsible for initializing the system hardware and software environment. The running code is the main program code required for the normal operation of the system. The test data is used to test the system during the system development, debugging and verification stages. The external Flash memory has high-speed reading and writing capabilities and long-term data retention capabilities, which ensures the reliability and stability of the system code.
[0024] The clock system is the heart of the entire system and is used to provide a stable clock signal. The clock signal is the basis for the synchronous operation of the processor and other digital circuits. The stability and accuracy of the clock system directly affects the performance and reliability of the system.
[0025] The power supply system provides a stable power supply for the entire system. The power supply system can ensure that each component of the system operates within the normal operating voltage range to prevent damage to the system caused by excessively high or low voltage. The power supply system usually uses multi-stage voltage stabilization and filtering circuits to ensure the stability and reliability of the power supply. The power supply system can ensure the stability and reliability of the system during long-term operation.
[0026] The Zynq device is the core processor of the system. The Zynq device integrates the processor core, programmable logic, and input and output interfaces. Two random access memories (RAMs) are set up inside the Zynq device, which are used to run the startup code, running code, and test data respectively. After the system is powered on, the startup code is first loaded into a RAM in the Zynq device through an external Flash memory, and then the startup code is executed to initialize the system. Next, the running code and test data are loaded from the external Flash memory into another RAM for execution. This design enables the Zynq device to quickly access and execute code, improving the performance of the system.
[0027] Compared with traditional embedded system design, this system has significant advantages. First, since no additional external DDR devices are required, the design difficulty of the system is greatly reduced, while the number of layers of the PCB board is reduced, reducing costs. Secondly, by reducing the use of DDR devices, the power consumption of the system is also reduced accordingly, which helps to extend the battery life of the system and improve energy efficiency. Finally, the high integration and flexibility of the system enable Zynq devices to be widely used in various embedded systems, including industrial automation, smart homes, medical equipment and other fields.
[0028] In summary, the system achieves high-performance, low-cost and low-power embedded system design by using the coordinated work of components such as external Flash memory, clock system, power supply system and Zynq device. This design not only improves the performance and reliability of the system, but also reduces the cost and power consumption, providing strong support for the wide application of embedded systems.
[0029] In a specific implementation of the present application, the external Flash memory specifically uses a QSPI (Queued Synchronous Peripheral Interface) module to communicate with the Zynq device at high speed through a single-wire, dual-wire or quad-wire mode.
[0030] In the specific implementation of the present application, a RAM0 and a RAM1 are set inside the Zynq device. After the system is powered on, the startup code is loaded from the external Flash memory into the RAM0 inside the Zynq device, and the ARM code is loaded from the external Flash memory into the RAM1 inside the Zynq device. Because only the code is run, the space of the internal RAM is sufficient for use. The specific mapping relationship is as follows: Figure 2 and Figure 3 shown.
[0031] In a specific embodiment of the present invention, a method for implementing a Zynq device running on a RAM is provided, which specifically includes the following steps: The startup code, running code and test data are stored in the external Flash. After power-on, the external Flash transfers the startup code to a random access memory in the Zynq device for execution, and transfers the running code and test data to another random access memory in the Zynq device for execution.
[0032] Storing the boot code, running code, and test data in the external Flash memory takes full advantage of the high density, non-volatility, and fast read characteristics of the external Flash memory, providing the system with a stable and reliable code and data storage solution. After the system is powered on, the entire initialization process will proceed in a preset order. First, the external Flash memory will quickly respond to the system's request and transfer the boot code stored in it to a random access memory (RAM) in the Zynq device. This RAM is specifically used to store and execute the boot code, and it usually has the characteristics of high-speed access, which can ensure the fast loading and execution of the boot code.
[0033] The main task of the boot code is to initialize the system, including configuring hardware resources and establishing the software environment. After the boot code is executed, it will be responsible for loading the running code and test data stored in the external Flash into another RAM in the Zynq device. This RAM is specifically used to store and run the main program code and test data of the system.
[0034] In order to ensure the consistency and integrity of data, the system will perform a series of verification and validation operations during the process of loading and running code and test data. These operations include data integrity checks, address boundary verification, etc. to ensure that the data loaded into RAM is correct.
[0035] Once the running code and test data are successfully loaded into RAM, the Zynq device can start executing the code. The running code will control the various parts of the system to work according to the preset logic and algorithm to achieve the various functions of the system. The test data is used to perform various tests and verifications during the system operation to ensure the stability and reliability of the system.
[0036] This design method of storing the startup code, running code and test data in the external Flash and loading them into the RAM on demand after the system starts has many advantages: it makes full use of the high-density storage capacity of the external Flash memory, allowing the system to store more code and data. Secondly, since RAM has the characteristics of high-speed access, it can significantly improve the operating speed and efficiency of the system. In addition, by storing the test data in the external Flash, various tests and verifications can be easily performed during the system operation, thereby improving the reliability and stability of the system.
[0037] The present invention stores the startup code, running code and test data in an external Flash and loads them into the RAM of the Zynq device as needed after the system is started. This is an efficient and reliable embedded system design method. This method can not only improve the storage capacity and running speed of the system, but also ensure the stability and reliability of the system, providing strong support for the wide application of embedded systems.
[0038] Compared with the existing DDR devices, the system running memory of the present invention is several hundred Kb, which greatly reduces the demand for running memory, and the number of test board layers is reduced from 12 to 4, saving costs; without DDR devices, the overall hardware design is simplified; the code runs in the internal RAM, without DDR devices, and the overall design power is reduced. By using this method, the reliability of the Zynq device is not affected, including the verification of the operation of the ARM core and the FPGA core, the electrical parameters and the module functions.
Claims
1. A system for implementing a Zynq device running on RAM, characterized in that: The invention comprises an external Flash, a clock system, a power supply system and a Zynq device. Two random access memories are arranged inside the Zynq device. The Zynq device is respectively connected to the external Flash, the clock system and the power supply system. The clock system is used to provide a clock for the whole system. The power supply system is used to provide power for the whole system. The external Flash is used to store a startup code, a running code and a test data. After the system is powered on, the startup code is directly loaded into a random access memory in the Zynq device through the external Flash, and the running code and the test data are loaded into another random access memory in the Zynq device.
2. A system for implementing Zynq device running on RAM according to claim 1, characterized in that: The startup code is the code that is first loaded and executed when the system starts up, and is used to initialize the system hardware and software environment.
3. A system for implementing Zynq device running on RAM according to claim 1, characterized in that: The running code is the program code required for the normal operation of the system; the test data is used to test the system during the system development, debugging and verification stages.
4. A system for implementing Zynq device running on RAM according to claim 1, characterized in that: Zynq devices integrate processor cores, programmable logic, and input and output interfaces.
5. The system for implementing Zynq device running on RAM according to claim 1, characterized in that: The external Flash memory specifically uses the QSPI module.
6. A system for implementing Zynq device running on RAM according to claim 5, characterized in that: External Flash memory communicates with the Zynq device at high speed through single-wire, dual-wire or quad-wire modes.
7. A method for implementing a Zynq device running on RAM, characterized in that: The following steps are involved: The startup code, running code and test data are stored in the external Flash. After power-on, the external Flash transfers the startup code to a random access memory in the Zynq device for execution, and transfers the running code and test data to another random access memory in the Zynq device for execution.
8. A method for implementing a Zynq device running on a RAM according to claim 7, characterized in that: The startup code is used to initialize the system, including configuring hardware resources and establishing the software environment.
9. A method for implementing a Zynq device running on a RAM according to claim 7, characterized in that: Running code is the program code required for the normal operation of the system.
10. The method for implementing a Zynq device running on a RAM according to claim 7, characterized in that: Test data is used to test the system during the system development, debugging, and verification phases.