Assessment method for digital integrated circuit power supply network in high-intensity magnetic field pulse environment

Abstract

The invention particularly relates to an evaluation method and device for a digital integrated circuit power supply network in a high-intensity magnetic field pulse environment. The method comprises the following steps: extracting power supply network data of a to-be-analyzed digital integrated circuit to obtain a corresponding two-dimensional power supply network model; based on an equivalent relationship between the time domain data and the frequency domain data, performing equivalent conversion processing on the high-intensity magnetic field pulse data to obtain corresponding frequency domain magnetic field data; applying a high-intensity magnetic field with uniform space to the digital integrated circuit based on the frequency domain magnetic field data, and obtaining the induced potential of the two-dimensional power supply network; a reduction value of the voltage tolerance is calculated based on the induced potential, and correction data of the voltage tolerance of the digital integrated circuit is determined based on the reduction value of the voltage tolerance. According to the scheme, the reliability of the digital integrated circuit power supply network can be evaluated by a non-test and non-destructive method.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a method and device for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment, a storage medium, a computer program product, and an electronic device. Background Art

[0002] In related technologies, with the continuous development of electronic technology, the complexity, miniaturization and high-speed trend of electronic systems have made the impact of electromagnetic environment on electronic components an issue that cannot be ignored. Electromagnetic environment may cause failure of electronic components, affect the normal operation of electronic systems, and even pose a serious threat to personal and equipment safety.

[0003] The reliability analysis method of digital integrated circuits in a strong magnetic field environment is traditionally conducted by injection method to study the reliability of digital integrated circuits. However, the injection method has the problems of expensive experimental equipment, damage to the device during experimental operation, and the need to produce the physical object before the reliability can be determined by testing. By using the method of the present invention, the cost of experimental equipment can be avoided, the device will not be damaged, and the reliability of the digital integrated circuit can be determined in advance of physical production.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0005] The present invention provides a method and device for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment, a storage medium, a computer program product, and an electronic device, which evaluate the induced potential of the power supply network in a strong magnetic field pulse, thereby overcoming the defects existing in the prior art to a certain extent.

[0006] Other features and advantages of the present invention will become apparent from the following detailed description, or may be learned in part by practice of the present invention.

[0007] According to a first aspect of the present invention, a method for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment is provided, the method comprising:

[0008] Extracting power network data from the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power network model;

[0009] Based on the equivalent relationship between time domain data and frequency domain data, the strong magnetic field pulse data is equivalently converted to obtain the corresponding frequency domain magnetic field data;

[0010] Apply a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data to obtain the induced potential of the two-dimensional power network;

[0011] A reduced value of a voltage margin is calculated based on the induced potential, and correction data of a voltage margin of the digital integrated circuit is determined based on the reduced value of the voltage margin.

[0012] In some exemplary embodiments, the two-dimensional power network model includes two-dimensional power loops and power strips.

[0013] In some exemplary embodiments, extracting power supply network data of the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power supply network model includes:

[0014] Extract the original power network model from the digital integrated circuit GDS file;

[0015] The original power supply network model is simplified to obtain a simplified three-dimensional power supply network model; the power supply network model includes: a power supply loop line and a power supply strip line;

[0016] The three-dimensional power network model is converted to obtain a two-dimensional power network model.

[0017] In some exemplary embodiments, the original power network model is simplified, including:

[0018] The signal lines and I / O ports of the original power network are removed, and several wiring layers corresponding to the power strip lines and power loop lines are retained to construct a three-dimensional power network model based on the several wiring layers.

[0019] In some exemplary embodiments, when applying a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data, the method further includes:

[0020] Configure the surface current density and ideal magnetic conductor conditions of digital integrated circuits.

[0021] In some exemplary embodiments, the step of calculating a reduced value of the voltage margin based on the induced potential includes:

[0022] A reduction value of the voltage margin is determined based on the amount of change in the imaginary voltage.

[0023] According to a second aspect of the present invention, there is provided a device for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment, comprising:

[0024] A two-dimensional power network model building module is used to extract power network data of the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power network model;

[0025] A magnetic field conversion module is used to perform equivalent conversion processing on the strong magnetic field pulse data based on the equivalent relationship between the time domain data and the frequency domain data to obtain the corresponding frequency domain magnetic field data;

[0026] A magnetic field application module is used to apply a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data to obtain the induced potential of the two-dimensional power supply network;

[0027] The correction data calculation module is used to calculate the reduced value of the voltage tolerance based on the induced potential, and determine the correction data of the voltage tolerance of the digital integrated circuit based on the reduced value of the voltage tolerance.

[0028] According to a third aspect of the present invention, there is provided a storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the above-mentioned method for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment is implemented.

[0029] According to a fourth aspect of the present invention, there is provided an electronic device, comprising:

[0030] Processor; and

[0031] A memory, configured to store executable instructions of the processor;

[0032] Wherein, the processor is configured to implement the above-mentioned evaluation method of the digital integrated circuit power supply network in a strong magnetic field pulse environment by executing the executable instructions.

[0033] According to a fifth aspect of the present invention, there is provided a computer program product having a computer program stored thereon, which implements the above-mentioned method for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment when the computer program is executed by a processor.

[0034] The method for evaluating the power supply network of a digital integrated circuit in a strong magnetic field pulse environment provided by the embodiment of the present invention obtains the corresponding two-dimensional power supply network model by extracting the power supply network data of the digital integrated circuit to be analyzed; based on the equivalent relationship between the time domain data and the frequency domain data, the strong magnetic field pulse data is equivalently converted to obtain the corresponding frequency domain magnetic field data; based on the frequency domain magnetic field data, a spatially uniform strong magnetic field is applied to the digital integrated circuit to obtain the induced potential of the two-dimensional power supply network; finally, the reduced value of the voltage tolerance is calculated based on the induced potential, and the corrected data of the voltage tolerance of the digital integrated circuit is determined based on the reduced value of the voltage tolerance. Thus, the reliability of the power supply network of the digital integrated circuit is evaluated by a non-test and non-destructive method, and the anti-magnetic interference capability of the power supply network can be quickly evaluated at the back-end stage of circuit design.

[0035] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The accompanying drawings herein are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present invention, and together with the specification are used to explain the principles of the present invention. Obviously, the accompanying drawings described below are only some embodiments of the present invention, and for those of ordinary skill in the art, other accompanying drawings can be obtained based on these accompanying drawings without creative work.

[0037] Figure 1 A schematic diagram schematically illustrates an exemplary embodiment of the present invention, a method for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment;

[0038] Figure 2 A schematic diagram schematically illustrates a digital integrated circuit GDS layout according to an exemplary embodiment of the present invention;

[0039] Figure 3 A schematic diagram schematically shows a power network composed of a power loop line and a strip line according to an exemplary embodiment of the present invention;

[0040] Figure 4 A schematic diagram schematically illustrates a simplified two-dimensional model of an exemplary embodiment of the present invention;

[0041] Figure 5 A schematic diagram schematically illustrates a magnetic field hyperbola according to an exemplary embodiment of the present invention;

[0042] Figure 6 A schematic diagram schematically illustrates a spatially uniform magnetic field according to an exemplary embodiment of the present invention;

[0043] Figure 7 A schematic diagram schematically shows a 2D model simulation voltage of a ground line at 16kHz according to an exemplary embodiment of the present invention;

[0044] Figure 8 A schematic diagram schematically shows a voltage simulation of a 2D model of a power line at 16kHz according to an exemplary embodiment of the present invention;

[0045] Fig. 9 A schematic diagram schematically illustrates an exemplary embodiment of the present invention, a device for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment;

[0046] Fig.10 The figure schematically shows the composition of an electronic device in an exemplary embodiment of the present invention. DETAILED DESCRIPTION

[0047] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that the present invention will be more comprehensive and complete and fully convey the concepts of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0048] In addition, the accompanying drawings are only schematic illustrations of the present invention and are not necessarily drawn to scale. The same reference numerals in the figures represent the same or similar parts, and their repeated description will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software form, or implemented in one or more hardware modules or integrated circuits, or implemented in different networks and / or processor devices and / or microcontroller devices.

[0049] In the related technology, the existing technology mainly measures the inductance, resistance, capacitance and other parameters of the integrated circuit port through experimental testing, and replaces the direct simulation of the chip power network with passive device simulation. There is a lack of a simulation evaluation method for the power network's resistance to strong magnetic fields in the early stage of design.

[0050] In view of the shortcomings and deficiencies of the prior art, this example embodiment provides a method for evaluating the power supply network of a digital integrated circuit in a strong magnetic field pulse environment. By evaluating the reliability of the power supply network of a digital integrated circuit by a non-test and non-destructive method, the anti-magnetic interference capability of the power supply network can be quickly evaluated in the back-end stage of circuit design.

[0051] In this example implementation, reference Figure 1 As shown in the figure, the strong magnetic field simulation evaluation method of the power supply network in the early stage of design can specifically include the following steps:

[0052] Step S11, extracting power network data of the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power network model;

[0053] Step S12, based on the equivalent relationship between the time domain data and the frequency domain data, performing equivalent conversion processing on the strong magnetic field pulse data to obtain corresponding frequency domain magnetic field data;

[0054] Step S13, applying a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data to obtain the induced potential of the two-dimensional power supply network;

[0055] Step S14, calculating a reduced value of the voltage margin based on the induced potential, and determining correction data of the voltage margin of the digital integrated circuit based on the reduced value of the voltage margin.

[0056] The steps of the method for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment in this exemplary implementation will be described in more detail below in conjunction with the accompanying drawings and embodiments.

[0057] In step S11 , power supply network data is extracted from the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power supply network model.

[0058] For example, a user can select a digital integrated circuit to be analyzed on a smart terminal device and create a corresponding circuit analysis task. The terminal device can send the corresponding task request to the server, which processes the task and generates a corresponding evaluation result to feed back to the terminal device. Alternatively, the task can be executed locally on the terminal device and a corresponding evaluation result can be generated.

[0059] Exemplarily, in the above step S11, extracting power network data of the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power network model includes:

[0060] Step S21, extracting the original power supply network model from the digital integrated circuit GDS file;

[0061] Step S22, simplifying the original power network model to obtain a simplified three-dimensional power network model; the power network model includes: a power loop line and a power strip line;

[0062] Step S23: convert the three-dimensional power supply network model to obtain a two-dimensional power supply network model.

[0063] Exemplarily, the two-dimensional power supply network model includes two-dimensional power supply loops and power supply strips.

[0064] Specifically, the digital integrated circuit to be analyzed can use the corresponding digital integrated circuit GDS (Graphic Data System) file. The digital integrated circuit GDS file includes the power supply lines, I / O ports and signal lines of the power network. In the power network, the power loop and power strip are the main and most important power supply networks. The power loop reduces the impedance of the power network through a ring structure to ensure that the voltage is basically the same everywhere on the chip. The power strip supplies power to the standard cells of the digital integrated circuit through a strip structure to ensure that the standard cells can be arranged at the highest density. Reference Figure 2 As shown, this is the GDS layout file of the open source LEON2 processor under 130nm process.

[0065] Exemplarily, in the above step S22, the original power supply network model is simplified, including: removing the signal lines and I / O ports of the original power supply network, retaining several wiring layers corresponding to the power strip lines and power loop lines, and constructing a three-dimensional power supply network model based on several wiring layers.

[0066] Specifically, in order to analyze the power network, the signal lines and I / O ports in the GDS file are removed, and the 1st, 5th, and 6th layer wiring representing the power line loop is retained to obtain the power network model. The power loops and lines in the power network are shown in the GDS layout file as follows: Figure 3 As shown in the figure, the power line and ground line structure of the power network are highly similar. For the ring line, the power line occupies the outer ring, while the ground line occupies the inner ring, and the two lines are arranged closely. In the power strip line, the power line and the ground line are arranged alternately to provide power between the two strip lines.

[0067] In digital integrated circuits, the power network is a highly planar structure. The length and width of the power network can exceed 1000um, while the height of each line is less than 1um, and the total height is less than 10um. In order to simplify the model calculation and reduce the difficulty of model analysis caused by the deformed structure, the influence of the through-hole is ignored, the power line and the ground line of the power network are separated, and only some power lines are retained and extracted as a 2D model; imported into the COMSOL tool, and the transition boundary condition of the COMSOL tool is used to simulate the power network model. The power line distribution of the simplified two-dimensional power network model is as follows: Figure 4 shown.

[0068] In step S12, based on the equivalent relationship between the time domain data and the frequency domain data, the strong magnetic field pulse data is equivalently converted to obtain corresponding frequency domain magnetic field data.

[0069] Specifically, in a power network with a certain loop area, the Faraday's law of electromagnetic induction can be expressed as:

[0070]

[0071] Where B represents the magnetic field strength, S represents the loop area, and t represents time.

[0072] From the above formula, it can be seen that the magnitude of the induced potential is proportional to the rate of change of the magnetic field strength ΔB / Δt. The maximum induced potential corresponds to the maximum value of the rate of change of the magnetic field strength.

[0073] Under magnetic field conditions above 1T, the magnetic field is generated by a large current passing through the coil, and the current can reach thousands of amperes. The circuit cannot withstand the heat caused by this current for a long time, so the magnetic field above 1T appears in the form of pulses.

[0074] In order to convert the magnetic field pulse in the time domain into the frequency domain and ensure the efficiency and accuracy of the evaluation, the frequency domain simulation with the same maximum value of the magnetic field intensity change rate can be used to replace the time domain simulation.

[0075] For example, in order to simplify the time domain waveform of the strong magnetic field pulse into the frequency domain for calculation, it is necessary to obtain the equivalent relationship between the maximum value in the time domain and the maximum value in the frequency domain. The maximum rate of change of the frequency domain waveform is converted:

[0076] B(t)=B0sin(ωt+φ)

[0077] Where t represents time, ω represents angular frequency, represents the phase and B0 represents the amplitude.

[0078] Since the cosine component of the signal can be represented by the real part of the frequency domain function, B(t) in the above formula can be written as the real part of the frequency domain function and represented by a vector. The specific formula may include:

[0079]

[0080] Where Re() represents the real part and j represents the imaginary unit. Derivative the formula.

[0081] By taking the derivative of this formula, we can get the derivative formula of magnetic field intensity B, including:

[0082]

[0083] Based on the above, the maximum value is taken at t = 0, and the expression of the maximum value of B(t) in the frequency domain can be:

[0084]

[0085] At t = 0, the maximum magnetic field change rate is:

[0086]

[0087] Through the above calculation, the maximum rate of change of the frequency domain magnetic field is 2πfB0. For a known strong magnetic field pulse, we can convert the maximum rate of change of the strong magnetic field pulse into the slope of a sinusoidal waveform with a maximum magnetic field of B0 and a frequency of f when t=0.

[0088] For the desired instance, the magnetic field is expressed as follows:

[0089] B = 1 × (e -1000t -e -100000t )

[0090] The corresponding expression curve is as follows Figure 5 According to the above conversion calculation, the maximum slope of the curve can be converted into a sinusoidal waveform with a maximum magnetic field of B0=1T and a frequency of 16kHz in the frequency domain.

[0091] Exemplarily, when applying a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data, the method further includes:

[0092] Configure the surface current density and ideal magnetic conductor conditions of digital integrated circuits.

[0093] Specifically, because the integrated circuit is small in size, in a strong magnetic field pulse radiation environment, it can be assumed that the magnetic field magnitude at all locations of the integrated circuit in space is the same. A uniform magnetic field in space can be generated by surface current density + ideal magnetic conductor conditions. After calculation, the surface current density is set on the annular boundary of the air domain as:

[0094]

[0095] Among them, J in the air domain S0 It needs to be written as a vector in the three directions of r-phi-a, with the unit of A / m. BX is the magnetic field that we want to generate here, and mu0_const is the magnetic permeability of vacuum, both of which are set to dimensionless numbers.

[0096] A uniform magnetic field of BX Tesla can be generated in the air domain. We set the upper and lower surfaces to ideal magnetic conductor conditions to ensure that the magnetic field passes vertically through the upper and lower surfaces of the air domain, and the generated spatial magnetic field is uniform, such as Figure 6 shown.

[0097] In step S14, a reduction value of the voltage margin is calculated based on the induced potential, and correction data of the voltage margin of the digital integrated circuit is determined based on the reduction value of the voltage margin.

[0098] Exemplarily, the calculating the reduced value of the voltage tolerance based on the induced potential includes: determining the reduced value of the voltage tolerance based on a change in the imaginary voltage.

[0099] For example, refer to Figure 7 The simulation results of the power network ground line model at 16kHz are shown. As can be seen from the figure, the maximum value of the imaginary voltage representing the induced potential is about 0.004V, and the minimum value is about -0.0038V. That is, the fluctuation of the power ground line has increased by 0.004V and decreased by 0.0038V at most. Figure 8 The simulation results of the power line model of the power network at 16kHz are shown. As can be seen from the figure, the imaginary voltage change symbolizing the induced electromotive force is reduced by 0.077V at most, and the voltage does not increase.

[0100] In summary, the minimum power supply voltage fluctuation of the circuit is 1.2V-0.077V-0.004V=1.119V, which is about 93% of the original power supply voltage. Through analysis, we determined that for this strong magnetic pulse, the digital integrated circuit power supply network design needs to increase the voltage tolerance by 7% to cope with the impact of this strong magnetic pulse.

[0101] Exemplary, for circuit back-end design applications, it may include:

[0102] S1: Extract the power network from the GDS layout, keep the model in two dimensions, and separate the power and ground lines.

[0103] S2: The strong magnetic field pulse is converted into the corresponding frequency domain magnetic field through the change formula of the maximum change rate of the frequency domain magnetic field 2πfB0.

[0104] S3: By setting the surface current density + ideal magnetic conductor conditions, COMSOL is used to simulate the induced potential of the power network.

[0105] S4: Based on the simulation results, the reduced value of the voltage tolerance is calculated, and the voltage tolerance margin that should be increased for the digital integrated circuit is proposed.

[0106] The method provided in the embodiment of the present invention effectively simplifies the complexity of calculation by converting the strong magnetic field pulse in the time domain into the magnetic field in the frequency domain for calculation. A spatially uniform magnetic field is generated by configuring the surface current density + ideal magnetic conductor condition, thereby ensuring the effectiveness of the strong magnetic field and the accuracy of the data. By measuring the maximum induced potential of the power supply network, it is determined whether the maximum induced potential will affect the circuit operation, thereby accurately evaluating the anti-magnetic interference ability of the power supply network.

[0107] This method evaluates the reliability of the power supply network of digital integrated circuits through a non-experimental and non-destructive simulation method. It can quickly evaluate the anti-magnetic interference capability of the power supply network in the back-end stage of circuit design, help designers improve and enhance the anti-interference capability of the power supply network, and help digital integrated circuits in the fields of medical magnetic resonance imaging, military electromagnetic guns, and industry to perform reliability evaluation during the design stage.

[0108] It should be noted that the above-mentioned figures are only schematic illustrations of the processes included in the method according to an exemplary embodiment of the present invention, and are not intended to be limiting. It is easy to understand that the processes shown in the above-mentioned figures do not indicate or limit the time sequence of these processes. In addition, it is also easy to understand that these processes can be performed synchronously or asynchronously, for example, in multiple modules.

[0109] For further reference, Fig. 9 As shown, in the embodiment of this example, there is also provided an evaluation device 90 for a digital integrated circuit power supply network in a strong magnetic field pulse environment, comprising:

[0110] A two-dimensional power network model building module 901 is used to extract power network data of the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power network model;

[0111] The magnetic field conversion module 902 is used to perform equivalent conversion processing on the strong magnetic field pulse data based on the equivalent relationship between the time domain data and the frequency domain data to obtain the corresponding frequency domain magnetic field data;

[0112] A magnetic field applying module 903 is used to apply a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data to obtain the induced potential of the two-dimensional power supply network;

[0113] The correction data calculation module 904 is used to calculate the reduced value of the voltage tolerance based on the induced potential, and determine the correction data of the voltage tolerance of the digital integrated circuit based on the reduced value of the voltage tolerance.

[0114] The functional implementation of each module in the evaluation device 90 has been explained in detail in the corresponding method embodiment, and will not be repeated here.

[0115] It should be noted that, although several modules or units of the equipment for action execution are mentioned in the above detailed description, this division is not mandatory. In fact, according to an embodiment of the present invention, the features and functions of two or more modules or units described above can be embodied in one module or unit. On the contrary, the features and functions of one module or unit described above can be further divided into being embodied by multiple modules or units.

[0116] Fig.10 A schematic diagram of an electronic device suitable for implementing an embodiment of the present invention is shown.

[0117] It should be noted that Fig.10 The electronic device 1000 shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present invention.

[0118] like Fig.10As shown, the electronic device 1000 includes a central processing unit (CPU) 1001, which can perform various appropriate actions and processes according to the program stored in the read-only memory (ROM) 1002 or the program loaded from the storage part 1008 to the random access memory (RAM) 1003. In the RAM 1003, various programs and data required for system operation are also stored. The CPU 1001, ROM 1002 and RAM 1003 are connected to each other through a bus 1004. An input / output (I / O) interface 1005 is also connected to the bus 1004.

[0119] The following components are connected to the I / O interface 1005: an input section 1006 including a keyboard, a mouse, etc.; an output section 1007 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker, etc.; a storage section 1008 including a hard disk, etc.; and a communication section 1009 including a network interface card such as a LAN (Local Area Network) card, a modem, etc. The communication section 1009 performs communication processing via a network such as the Internet. A drive 1010 is also connected to the I / O interface 1005 as needed. A removable medium 1011, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 1010 as needed, so that a computer program read therefrom is installed into the storage section 1008 as needed.

[0120] In particular, according to an embodiment of the present invention, the process described below with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present invention includes a computer program product, which includes a computer program carried on a storage medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication part 1009, and / or installed from a removable medium 1011. When the computer program is executed by a central processing unit (CPU) 1001, various functions defined in the system of the present application are executed.

[0121] It should be noted that the storage medium shown in the embodiment of the present invention may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory, an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present invention, a computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, device or device. In the present invention, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any storage medium other than computer-readable storage media, which may send, propagate, or transmit programs for use by or in conjunction with an instruction execution system, apparatus, or device. The program code contained on the storage medium may be transmitted using any appropriate medium, including but not limited to: wireless, wired, etc., or any suitable combination of the above.

[0122] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present invention. In this regard, each box in the flow chart or block diagram can represent a module, a program segment, or a part of a code, and the above-mentioned module, program segment, or a part of a code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flow chart, and the combination of the boxes in the block diagram or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0123] The units involved in the embodiments of the present invention may be implemented by software or hardware, and the units described may also be arranged in a processor. The names of these units do not, in some cases, limit the units themselves.

[0124] It should be noted that, as another aspect, the present application also provides a storage medium, which can be included in an electronic device; or it can exist independently without being installed in the electronic device. The above storage medium carries one or more programs, and when the above one or more programs are executed by an electronic device, the electronic device implements the method described in the following embodiments. For example, the electronic device can implement the following Figure 1 The individual steps of the method are shown.

[0125] In one embodiment, the present application provides a computer program product, including a computer program, which implements the steps in the above-mentioned method embodiments when executed by a processor.

[0126] In addition, the above-mentioned figures are only schematic illustrations of the processes included in the method according to an exemplary embodiment of the present invention, and are not intended to be limiting. It is easy to understand that the processes shown in the above-mentioned figures do not indicate or limit the time sequence of these processes. In addition, it is also easy to understand that these processes can be performed synchronously or asynchronously, for example, in multiple modules.

[0127] Other embodiments of the invention will readily occur to those skilled in the art after considering the specification and practicing the invention herein. This application is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art that are not disclosed by the present invention. The specification and examples are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the claims.

[0128] It should be understood that the present invention is not limited to the exact construction that has been described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.

Claims

1. A method for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment, characterized in that: The method comprises: Extracting power network data from the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power network model; Based on the equivalent relationship between time domain data and frequency domain data, the strong magnetic field pulse data is equivalently converted to obtain the corresponding frequency domain magnetic field data; Apply a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data to obtain the induced potential of the two-dimensional power network; A reduced value of a voltage margin is calculated based on the induced potential, and correction data of a voltage margin of the digital integrated circuit is determined based on the reduced value of the voltage margin.

2. The method according to claim 1, characterized in that: The two-dimensional power supply network model includes two-dimensional power supply loops and power supply strips.

3. The method according to claim 1, characterized in that Extracting power supply network data from the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power supply network model includes: Extract the original power network model from the digital integrated circuit GDS file; The original power supply network model is simplified to obtain a simplified three-dimensional power supply network model; the power supply network model includes: a power supply loop line and a power supply strip line; The three-dimensional power network model is converted to obtain a two-dimensional power network model.

4. The method according to claim 3, characterized in that The original power network model is simplified, including: The signal lines and I / O ports of the original power network are removed, and several wiring layers corresponding to the power strip lines and power loop lines are retained to construct a three-dimensional power network model based on the several wiring layers.

5. The method according to claim 1, characterized in that When applying a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data, the method further comprises: Configure the surface current density and ideal magnetic conductor conditions of digital integrated circuits.

6. The method according to claim 1, characterized in that The step of calculating the reduced value of the voltage tolerance based on the induced potential comprises: A reduction value of the voltage margin is determined based on the amount of change in the imaginary voltage.

7. An evaluation device for a digital integrated circuit power supply network in a strong magnetic field pulse environment, characterized in that: The device comprises: A two-dimensional power network model building module is used to extract power network data of the digital integrated circuit to be analyzed to obtain a corresponding two-dimensional power network model; A magnetic field conversion module is used to perform equivalent conversion processing on the strong magnetic field pulse data based on the equivalent relationship between the time domain data and the frequency domain data to obtain the corresponding frequency domain magnetic field data; A magnetic field application module is used to apply a spatially uniform strong magnetic field to the digital integrated circuit based on the frequency domain magnetic field data to obtain the induced potential of the two-dimensional power supply network; The correction data calculation module is used to calculate the reduced value of the voltage tolerance based on the induced potential, and determine the correction data of the voltage tolerance of the digital integrated circuit based on the reduced value of the voltage tolerance.

8. A storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment according to any one of claims 1 to 6 is implemented.

9. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the method for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment according to any one of claims 1 to 6 is implemented.

10. An electronic device, characterized in that: include: processor; as well as A memory, configured to store executable instructions of the processor; The processor is configured to execute the method for evaluating a digital integrated circuit power supply network in a strong magnetic field pulse environment according to any one of claims 1 to 6 by executing the executable instructions.

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