Insulating conductive substrate and manufacturing method thereof

Abstract

The present application discloses an insulating-based conductive substrate and a manufacturing method thereof, comprising a conductive silicon column and an insulating organic adhesive layer; the conductive silicon column is arranged inside the insulating organic adhesive layer; a window is arranged on the insulating organic adhesive layer, and the conductive silicon column is exposed; a first wiring circuit is arranged on the upper surface of the insulating organic adhesive layer, and the first wiring circuit is interconnected with one end of the conductive silicon column through the window; a second wiring circuit is arranged on the lower surface of the insulating organic adhesive layer, and the second wiring circuit is interconnected with the other end of the conductive silicon column; the present application redesigns the insulating-based conductive substrate and the corresponding structural layout, and provides the corresponding manufacturing process and method, adopts an integrated manufacturing structure and process, avoids the influence of the device in the prior art that is easy to form voids on the product, greatly improves the reliability of the product, meets the production needs of the enterprise, and enhances the competitiveness of the enterprise.

Description

Technical Field

[0001] The present invention relates to the technical field related to three-dimensional integrated packaging, and in particular to an insulating-based conductive substrate and a manufacturing method thereof. Background Art

[0002] With the rise of communication electronics, people have an increasing demand for miniaturized and highly sensitive modules or systems, and the requirements for signal quality are becoming more and more stringent; high-density integration technologies, such as system-in-package (SiP) and other technologies have been rapidly developed, but the miniaturized integrated packaging of mixed-signal multi-chip systems has become one of the technical difficulties in this field; new 3D packaging technologies represented by system-in-package, in addition to three-dimensional chip stacking (Stacked Diepackage) and package stacking (Pop on Package) technologies, the application of some new materials and new technologies has brought opportunities for packaging miniaturization, such as flexible substrates, through silicon via (TSV) adapter board technology and through glass via (TGV) adapter board technology, which have become one of the hot research directions of vertical 3D interconnection.

[0003] Through Silicon Via (TSV): a through hole is formed inside a silicon wafer by plasma etching, and then a metal material (usually copper metal is electroplated) is filled in the through hole by electroplating, thereby achieving electrical connection between the upper and lower sides of the silicon wafer; and Through Glass Via (TGV): a through hole is formed inside a glass wafer by laser sintering + chemical solution etching, and then a metal material (usually copper metal is electroplated) is filled in the through hole by electroplating, thereby achieving electrical connection between the upper and lower sides of the glass wafer; the existing patent "TGV deep hole filling method" provides a TGV deep hole filling method, by corroding the glass substrate and the glass through hole, the surface of the glass substrate and the glass through hole becomes rough, the friction coefficient between the seed layer and the glass substrate and the glass through hole is increased, the adhesion strength of the seed layer can be enhanced, and in the subsequent activation and electroplating process, the seed layer can be prevented from falling off to a certain extent, thereby ensuring the effect of electroplating; the patent "Glass interposer, glass interposer preparation method and preparation equipment" discloses A glass interposer, a preparation method and a preparation device for a glass interposer. This patent mainly uses inkjet printing to fill the filling holes with metal to form a metal filling layer, replacing the traditional electroplating method of filling through holes in TGV, thereby reducing the overall preparation time and reducing the loss in the preparation process. The patent "A process for processing TGV using a femtosecond laser combined with HF wet etching" proposes a process for processing TGV using a femtosecond laser combined with HF wet etching. This invention uses a femtosecond laser combined with HF wet etching to etch a perforated glass carrier in two steps. The overall strength is minimally affected and can still withstand the stress during grinding. The coated surface is smooth. The femtosecond laser deconstructs the glass structure bonds around the hole, greatly reducing the processing area and improving the efficiency, allowing for double-sided processing.

[0004] The existing TSV and TGV technologies both require forming a through hole first and then filling the through hole with metal material. Since the through hole has a relatively large aspect ratio, it is difficult to completely fill the hole with metal, and voids are easily formed, which affects the reliability of the device.

[0005] In order to solve the above problems, a new insulating-based conductive substrate and a manufacturing method were developed and designed. Summary of the invention

[0006] The object of the present invention is to provide an insulating conductive substrate and a manufacturing method thereof, so as to solve the problem in the prior art that metal materials filled in through holes cause adverse effects on devices.

[0007] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0008] An insulating conductive substrate comprises: a conductive silicon column and an insulating organic glue layer;

[0009] The conductive silicon column is arranged inside the insulating organic glue layer;

[0010] A window is provided on the insulating organic glue layer, and the conductive silicon column is exposed;

[0011] A first wiring circuit is disposed on the upper surface of the insulating organic glue layer, and the first wiring circuit is interconnected with one end of the conductive silicon column through a window;

[0012] A second wiring circuit is arranged on the lower surface of the insulating organic glue layer, and the second wiring circuit is interconnected with the other end of the conductive silicon column.

[0013] In a preferred solution, an insulating support substrate is bonded to the lower surface of the insulating organic glue layer via an organic bonding layer.

[0014] In a preferred embodiment, a third wiring circuit is provided on the upper surface of the insulating support substrate; and the third wiring circuit is interconnected with the second wiring circuit.

[0015] In a preferred solution, a fourth wiring circuit is provided on the upper surface of the insulating support substrate; and the fourth wiring circuit is interconnected with the second wiring circuit.

[0016] In a preferred solution, a fifth wiring line is provided on the lower surface of the insulating support substrate, and the fifth wiring line is connected to the fourth wiring line through a metal filler.

[0017] In a preferred embodiment, the insulating organic glue layer is made of organic material and has a thickness of 100-1000 um.

[0018] In a preferred solution, the conductive silicon column is N-doped or P-doped silicon, and its resistivity is 0.00001-1Ω·cm; the conductive silicon column is embedded in the insulating organic glue layer, and the height difference between the two is 0-20um.

[0019] In a preferred solution, both the first wiring line and the second wiring line are made of metal laminated materials, with a bottom layer being an ohmic contact adhesion layer, a middle layer being a buffer layer, and a top layer being an etched contact layer.

[0020] In a preferred embodiment, the insulating support substrate is an insulating organic or inorganic material with a thickness of 100-1000 um.

[0021] In addition, the present application also proposes a method for manufacturing an insulating conductive substrate, comprising the following steps:

[0022] S1, providing a P-doped or N-doped silicon wafer, which includes an A surface and a B surface opposite to each other;

[0023] S2, etching away part of the silicon wafer on the A side of the wafer by photolithography, etching, and degumming to form a silicon wafer column, i.e., a conductive silicon column;

[0024] S3, spin coating a layer of organic glue on the wafer A side by spin coating, and curing;

[0025] S4, grinding and polishing is performed on the B side of the wafer to remove part of the silicon and expose the organic glue;

[0026] S5, etching away the organic glue on the top of the conductive silicon column by photolithography, etching, and stripping to form an organic glue window;

[0027] S6, manufacturing a first wiring line on the organic glue by photolithography, evaporation, and stripping, wherein the first wiring line is interconnected with the conductive silicon pillar through the organic glue window;

[0028] S7, a second wiring line is made on the organic adhesive surface B by photolithography, evaporation, and stripping, and the second wiring line is interconnected with the other side of the conductive silicon column.

[0029] Due to the application of the above technical solution, the beneficial effects of the present application compared with the prior art are:

[0030] The present application provides an insulating-based conductive substrate and a manufacturing method. By redesigning the insulating-based conductive substrate and the corresponding structural layout, and providing the corresponding manufacturing process and method, the problems existing in the existing TSV or TGV technology are well solved. For example, a through hole needs to be formed first, and then a metal material is filled in the through hole. Since the through hole has a relatively large aspect ratio, it is difficult to completely fill the hole with metal, forming a void, which affects the reliability of the device. The present application adopts an integrated manufacturing structure and process, avoiding the influence of the easy formation of voids in the device in the existing technology on the product, greatly improving the reliability of the product, meeting the production needs of the enterprise, and enhancing the competitiveness of the enterprise. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0032] Figure 1 This is a schematic structural diagram of an insulating conductive substrate according to the first embodiment of the present invention;

[0033] Figure 2 This is a schematic structural diagram of an insulating conductive substrate according to a second embodiment of the present invention;

[0034] Figure 3 A schematic diagram of the structure of an insulating conductive substrate according to the third embodiment of the present invention

[0035] Figure 4 It is a flow chart of a method for manufacturing an insulating-based conductive substrate of the present invention;

[0036] Figure 5 It is a structural schematic diagram of step S1 in the manufacturing method of embodiment 4 of the present invention;

[0037] Figure 6 It is a structural schematic diagram of step S2 in the manufacturing method of embodiment 4 of the present invention;

[0038] Figure 7 It is a structural schematic diagram of step S3 in the manufacturing method of embodiment 4 of the present invention;

[0039] Figure 8 It is a structural schematic diagram of step S4 in the manufacturing method of embodiment 4 of the present invention;

[0040] Fig. 9 It is a structural schematic diagram of step S5 in the manufacturing method of embodiment 4 of the present invention;

[0041] Fig.10 It is a structural schematic diagram of step S6 in the manufacturing method of embodiment 4 of the present invention;

[0042] Fig.11 It is a structural schematic diagram of step S7 in the manufacturing method of embodiment 4 of the present invention;

[0043] Among them, 1. conductive silicon column; 2. insulating organic glue layer; 3. first wiring line; 4. second wiring line; 5. organic bonding layer; 6. insulating support substrate; 7. third wiring line; 8. metal filler; 9. fourth wiring line; 10. fifth wiring line. DETAILED DESCRIPTION

[0044] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0045] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0046] In the present application, the terms "upper", "lower", "left", "right", "front", "back", "top", "bottom", "inner", "outer", "middle", "vertical", "horizontal", "lateral", "longitudinal" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings. These terms are mainly used to better describe the present invention and its embodiments, and are not used to limit the indicated devices, elements or components to have a specific orientation, or to be constructed and operated in a specific orientation.

[0047] In addition, some of the above terms may be used to express other meanings in addition to indicating orientation or positional relationship. For example, the term "on" may also be used to express a certain dependency or connection relationship in some cases. For those skilled in the art, the specific meanings of these terms in the present invention can be understood according to specific circumstances.

[0048] In addition, the terms "installed", "set", "provided with", "connected", "connected", and "socketed" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be an internal connection between two devices, elements, or components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0049] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0050] Embodiment 1

[0051] See also Figure 1 , the present application provides an insulating conductive substrate, comprising: a conductive silicon column 1 and an insulating organic glue layer 2;

[0052] The conductive silicon column 1 is arranged inside the insulating organic glue layer 2;

[0053] The insulating organic glue layer 2 is provided with a window, and the conductive silicon column 1 is exposed; the window on the insulating organic glue layer 2 is required to penetrate from the top to the surface of the conductive silicon column 1, and its shape can be circular, elliptical, square, diamond, etc.; its bottom surface size is required to be smaller than the size of the corresponding conductive silicon column 1, and the width between the two is 1-8um, preferably 2-6um, and more preferably 3-5um, and its aperture size is required to gradually increase from the bottom surface to the top surface;

[0054] A first wiring line 3 is provided on the upper surface of the insulating organic glue layer 2, and the first wiring line 3 is interconnected with one end of the conductive silicon column 1 through a window;

[0055] A second wiring line 4 is disposed on the lower surface of the insulating organic glue layer 2 , and the second wiring line 4 is interconnected with the other end of the conductive silicon column 1 .

[0056] The insulating organic adhesive layer 2 is made of organic material, such as PI, epoxy resin, silicone, etc., and has a thickness of 100-1000um, preferably 200-800um, and more preferably 400-600um.

[0057] The conductive silicon column 1 is N-doped or P-doped silicon, and its resistivity is 0.00001-1Ω·cm, the lower the better; the conductive silicon column 1 is embedded in the insulating organic glue layer 2, and the height difference between the two is 0-20um, preferably 0-10um, and more preferably 0-5um.

[0058] The first wiring line 3 and the second wiring line 4 are both made of metal stacking materials, the bottom layer of which is an ohmic contact adhesion layer, which can be a metal material such as Ni, Cr, etc.; the middle layer is a buffer layer, which can be a metal material such as Al, Au, etc.; the top layer is an etched contact layer, which can be a metal material such as Ti, Pt, Ni, Cr, etc.; they are interconnected through the window on the insulating organic glue layer 2 and the conductive silicon column 1, thereby realizing electrical connection between the two.

[0059] Embodiment 2

[0060] See also Figure 2, which is another structure of the first embodiment, the lower surface of the insulating organic glue layer 2 is bonded with an insulating support substrate 6 through an organic bonding layer 5; the upper surface of the insulating support substrate 6 is provided with a third wiring line 7; the third wiring line 7 is interconnected with the second wiring line 4; the insulating support substrate 6 is an insulating organic or inorganic material, such as PI, epoxy resin, silicone, glass, sapphire, etc., with a thickness of 100-1000um, preferably 200-800um, and more preferably 400-600um; wherein the third wiring line 7 is provided on the upper surface of the insulating support substrate 6 ... provided on the upper surface of the insulating support substrate 6; the third wiring line 7 is interconnected with the second wiring line 4; the third wiring line 7 is provided on the upper surface of the insulating support substrate 6; the third wiring line 7 is provided on the upper surface of the insulating support substrate 6; the third wiring line 7 is provided on the upper surface of the insulating support substrate 6; the third wiring line 7 is provided on the upper surface of the insulating support substrate 6; the third wiring line 7 is provided on the upper surface of the insulating support substrate 6; the third wiring line 7 is provided on the upper surface of the insulating support substrate 6; the third wiring line 7 is provided on the upper surface of the insulating support substrate 6; the third wiring line 7 is provided on the upper surface of the insulating support substrate 6; the third wiring line 7 is provided on the upper surface of the insulating support substrate 6; the third wiring line 7 is provided on the The three wiring lines 7 are made of metal laminated materials, the bottom layer is an ohmic contact adhesion layer, which can be made of metal materials such as Ni and Cr, the middle layer is a buffer layer, which can be made of metal materials such as Al and Au, and the top layer is an etching contact layer, which can be made of metal materials such as Ti, Pt, Ni, and Cr; the organic bonding layer 5 is an organic material such as PI, epoxy resin, and silicone; the second wiring line 4 and the third wiring line 7 are bonded by hot pressing or laser bonding, and the insulating support substrate 6 and the insulating organic adhesive layer 2 are bonded by hot pressing bonding.

[0061] Embodiment 3

[0062] See also Figure 3 , which is another structure of the first embodiment, the lower surface of the insulating organic glue layer 2 is bonded with an insulating support substrate 6 through an organic bonding layer 5; the upper surface of the insulating support substrate 6 is provided with a fourth wiring line 9; the fourth wiring line 9 is interconnected with the second wiring line 4; the lower surface of the insulating support substrate 6 is provided with a fifth wiring line 10, and the fifth wiring line 10 is connected to the fourth wiring line 9 through a metal filler 8; wherein the insulating support substrate 6 is an insulating organic or inorganic material, such as PI, epoxy resin, silicone, glass, sapphire, etc., with a thickness of 100-1000um, preferably 200-800um, and more preferably 400-600um. m; wherein the fourth wiring line 9 and the fifth wiring line 10 are both metal laminate materials, the bottom layer is an ohmic contact adhesion layer, which can be a metal material such as Ni, Cr, etc., the middle layer is a buffer layer, which can be a metal material such as Al, Au, etc., and the top layer is an etching contact layer, which can be a metal material such as Ti, Pt, Ni, Cr, etc.; wherein the metal filler 8 is Cu or an alloy of Cu, which is filled into the through hole by electroplating; wherein the organic bonding layer 5 is an organic material such as PI, epoxy resin, silicone, etc.; the second wiring line 4 and the fourth wiring line 9 are bonded by hot pressing or laser bonding, and the insulating support substrate 6 and the insulating organic adhesive layer 2 are bonded by hot pressing bonding.

[0063] Embodiment 4

[0064] Please refer to Figure 4-11. In addition, the present application also proposes a method for manufacturing an insulating conductive substrate, comprising the following steps:

[0065] S1, providing a P-doped or N-doped silicon wafer, which includes an A surface and a B surface opposite to each other, such as Figure 5 The structure shown;

[0066] S2, by means of photolithography, etching, and degumming, a portion of the silicon wafer is etched away on the A side of the wafer to form a silicon wafer column, i.e., a conductive silicon column, such as Figure 6 The structure shown;

[0067] S3, by spin coating, a layer of organic glue is spin coated on the A side of the wafer and cured, such as Figure 7 The structure shown;

[0068] S4, grinding and polishing are performed on the B side of the wafer to remove part of the silicon and expose the organic glue, such as Figure 8 The structure shown;

[0069] S5, etching away the organic glue on the top of the conductive silicon column by photolithography, etching, and stripping to form an organic glue window, such as Fig. 9 The structure shown;

[0070] S6, by means of photolithography, evaporation, and stripping, a first wiring line is formed on the organic glue, and the first wiring line is interconnected through the organic glue window and the conductive silicon column, such as Fig.10 The structure shown;

[0071] S7, by means of photolithography, evaporation, and stripping, a second wiring line is formed on the organic resin surface B, and the second wiring line is interconnected with the other side of the conductive silicon column, such as Fig.11 The structure shown.

[0072] The present application provides an insulating-based conductive substrate and a manufacturing method. By redesigning the insulating-based conductive substrate and the corresponding structural layout, and providing the corresponding manufacturing process and method, the problems existing in the existing TSV or TGV technology are well solved. For example, a through hole needs to be formed first, and then a metal material is filled in the through hole. Since the through hole has a relatively large aspect ratio, it is difficult to completely fill the hole with metal, forming a void, which affects the reliability of the device. The present application adopts an integrated manufacturing structure and process, avoiding the influence of the easy formation of voids in the device in the existing technology on the product, greatly improving the reliability of the product, meeting the production needs of the enterprise, and enhancing the competitiveness of the enterprise.

[0073] Finally, it should be noted that the above are only preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, it is still possible for those skilled in the art to modify the technical solutions described in the aforementioned embodiments, or to make equivalent substitutions for some of the technical features therein. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. An insulating conductive substrate, characterized in that: include: Conductive silicon pillars and insulating organic adhesive layers; The conductive silicon column is arranged inside the insulating organic glue layer; A window is provided on the insulating organic glue layer, and the conductive silicon column is exposed; A first wiring circuit is disposed on the upper surface of the insulating organic glue layer, and the first wiring circuit is interconnected with one end of the conductive silicon column through a window; A second wiring circuit is arranged on the lower surface of the insulating organic glue layer, and the second wiring circuit is interconnected with the other end of the conductive silicon column.

2. The insulating conductive substrate according to claim 1, wherein: An insulating support substrate is bonded to the lower surface of the insulating organic glue layer via an organic bonding layer.

3. The insulating conductive substrate according to claim 2, wherein: A third wiring circuit is provided on the upper surface of the insulating support substrate; the third wiring circuit is interconnected with the second wiring circuit.

4. The insulating conductive substrate according to claim 2, wherein: A fourth wiring circuit is provided on the upper surface of the insulating support substrate; the fourth wiring circuit is interconnected with the second wiring circuit.

5. The insulating conductive substrate according to claim 4, characterized in that: A fifth wiring line is provided on the lower surface of the insulating support substrate, and the fifth wiring line is connected to the fourth wiring line through a metal filler.

6. The insulating conductive substrate according to claim 1, wherein: The insulating organic glue layer is made of organic material and has a thickness of 100-1000um.

7. The insulating conductive substrate according to claim 1, wherein: The conductive silicon column is N-doped or P-doped silicon, and its resistivity is 0.00001-1Ω·cm; the conductive silicon column is embedded in the insulating organic glue layer, and the height difference between the two is 0-20um.

8. The insulating conductive substrate according to claim 1, wherein: The first wiring line and the second wiring line are both made of metal stacked materials, with a bottom layer being an ohmic contact adhesion layer, a middle layer being a buffer layer, and a top layer being an etched contact layer.

9. The insulating conductive substrate according to any one of claims 2 to 5, characterized in that: The insulating support substrate is an insulating organic or inorganic material, and its thickness is 100-1000um.

10. A method for manufacturing an insulating conductive substrate, characterized in that: The steps include: S1, providing a P-doped or N-doped silicon wafer, which includes an A surface and a B surface opposite to each other; S2, etching away part of the silicon wafer on the A side of the wafer by photolithography, etching, and degumming to form a silicon wafer column, i.e., a conductive silicon column; S3, spin coating a layer of organic glue on the wafer A side by spin coating, and curing; S4, grinding and polishing is performed on the B side of the wafer to remove part of the silicon and expose the organic glue; S5, etching away the organic glue on the top of the conductive silicon column by photolithography, etching, and stripping to form an organic glue window; S6, manufacturing a first wiring line on the organic glue by photolithography, evaporation, and stripping, wherein the first wiring line is interconnected with the conductive silicon pillar through the organic glue window; S7, a second wiring line is made on the organic adhesive surface B by photolithography, evaporation, and stripping, and the second wiring line is interconnected with the other side of the conductive silicon column.

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