Power supply control method, uninterruptible power supply parallel system and storage medium
By introducing the second thyristor and the third thyristor into the uninterruptible power grid system and connecting the main power supply branches of multiple uninterruptible power grids together, the problem of low guarantee coefficient of the uninterruptible power grid system is solved, and a high-reliability dynamic power supply switching is achieved.
Patent Information
- Application Number
- CN202411964076.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-04-08
AI Technical Summary
The guarantee coefficient of the uninterruptible power supply parallel system is relatively low, and it is impossible to effectively deal with abnormal power supply on the main circuit.
The second thyristor and the third thyristor are introduced into the uninterruptible power supply parallel system, and the main power supply branches of the multiple uninterruptible power supply are connected in series through the third thyristor to realize dynamic power supply switching and avoid affecting the system reliability due to battery power exhaustion.
Through dynamic power supply switching, the response speed and reliability of the uninterruptible power supply system are improved, and the reliability of the system is avoided due to battery exhaustion.
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Figure CN119787598A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of uninterruptible power supply, and more specifically to a power supply control method, an uninterruptible power supply parallel system and a storage medium. Background Art
[0002] When the uninterruptible power supply (UPS) is in normal working mode, when the main power supply is abnormal, it switches to battery inverter power supply. When the battery power decreases to a certain level, if the bypass power supply is normal, it switches to bypass power supply. If the bypass power supply is abnormal, the system will be powered off directly.
[0003] Similarly, in the uninterruptible power supply parallel system, each uninterruptible power supply unit switches to battery inverter power supply after the main power supply is abnormal. Only when the battery power of all uninterruptible power supply units in the parallel system drops to the minimum power will it switch to the bypass power supply of the parallel system. The power supply sequence is basically the same as that of the uninterruptible power supply unit. However, in the above uninterruptible power supply parallel system, due to the use of three-level power supply guarantees, namely main inverter power supply, battery inverter power supply and bypass power supply, the guarantee coefficient is relatively low. Summary of the invention
[0004] The technical problem to be solved by the present invention is to provide a power supply control method, an uninterruptible power supply parallel system and a storage medium in view of the relatively low security factor of the above-mentioned uninterruptible power supply parallel system.
[0005] The technical solution of the present invention to solve the above technical problems is to provide a power supply control method, which is applied to an uninterruptible power supply parallel system, wherein the uninterruptible power supply parallel system includes N uninterruptible power supplies, wherein N is an integer greater than or equal to 2, and each of the uninterruptible power supplies includes a main power supply branch, a bypass power supply branch, a first thyristor, a second thyristor and a third thyristor, and the first thyristor is connected in series in the bypass power supply branch, and the output ends of the main power supply branch and the bypass power supply branch are connected to each other and then connected to the output end of the uninterruptible power supply parallel system via the second thyristor, and the output ends of the main power supply branches of the N uninterruptible power supplies are connected in series to form a closed loop via N third thyristors; the method comprises:
[0006] When the load rate of the uninterruptible power supply parallel system is lower than a preset value, some uninterruptible power supplies are in working state and other uninterruptible power supplies are in standby state, and the uninterruptible power supplies in working state control the first thyristor and the third thyristor of the machine to be disconnected and the second thyristor to be turned on, and the uninterruptible power supply in standby state controls the first thyristor, the second thyristor and the third thyristor of the machine to be disconnected;
[0007] When the rear end of the uninterruptible power supply in the standby state and the main power supply branch of the uninterruptible power supply in the working state fail, the uninterruptible power supply in the working state controls the third thyristor of the local machine to turn on, and connects the main power supply branch of the uninterruptible power supply in the standby state at the front end to the output end of the uninterruptible power supply parallel system via the second thyristor of the local machine.
[0008] As a further improvement of the present invention, the method includes: after the main power supply branch of the uninterruptible power supply at the front end is connected to the output end of the uninterruptible power supply parallel system via the third thyristor and the second thyristor of the uninterruptible power supply at the rear end, the uninterruptible power supply parallel system turns on the second thyristor of the uninterruptible power supply at the front end and disconnects the third thyristor and the second thyristor of the uninterruptible power supply at the rear end.
[0009] As a further improvement of the present invention, the method comprises:
[0010] When the rear end of the uninterruptible power supply in working state and the main power supply branch of the uninterruptible power supply in working state fail, the uninterruptible power supply controls the first thyristor of the local machine to turn on, and after at least one uninterruptible power supply in standby state switches to working state, the uninterruptible power supply controls the first thyristor of the local machine to turn off.
[0011] As a further improvement of the present invention, when a preset rotation time is reached, all uninterruptible power supplies in the standby state are switched to the working state, and an equal number of uninterruptible power supplies in the working state are switched to the standby state.
[0012] As a further improvement of the present invention,
[0013] Each of the uninterruptible power supplies records the accumulated working time when in working state;
[0014] When the preset rotation time is reached, one or more uninterruptible power supplies that are in working state and have the longest cumulative working time are switched to standby state.
[0015] As a further improvement of the present invention, when the load at the output end of the uninterruptible power supply parallel system is less than (M+1)×a×G and greater than (M-1)×a×G, M is an integer less than N, a is a preset load rate, and 1>a>0.5, G is the output power of a single uninterruptible power supply, and the uninterruptible power supply parallel system enables M uninterruptible power supplies to be in working state, and the other NM uninterruptible power supplies to be in standby state.
[0016] As a further improvement of the present invention, a is 0.8.
[0017] As a further improvement of the present invention, the method includes: when all uninterruptible power supplies that are not faulty are in working state, if a main power supply circuit of any uninterruptible power supply in working state fails, the uninterruptible power supply controls the first thyristor of the uninterruptible power supply to turn on.
[0018] The present invention also provides an uninterruptible power supply parallel system, the uninterruptible power supply parallel system includes N uninterruptible power supplies, N is an integer greater than or equal to 2; each of the uninterruptible power supplies includes a main power supply branch, a bypass power supply branch, a first thyristor, a second thyristor, a third thyristor and a single-machine control unit, and the first thyristor is connected in series in the bypass power supply branch, the output ends of the main power supply branch and the bypass power supply branch are connected and then connected to the output end of the uninterruptible power supply parallel system via the second thyristor, and the output ends of the main power supply branches of the N uninterruptible power supplies are connected in series to form a closed loop via N third thyristors; each of the single-machine control units includes a processor and a memory, the memory stores a computer program that can be executed by the processor, and the processor implements the steps of the power supply control method as described above when executing the computer program.
[0019] The present invention also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the power supply control method described above are implemented.
[0020] The present invention has the following technical effects: by adding a second thyristor and a third thyristor in an uninterruptible power supply, and connecting the output ends of the main power supply branches of multiple uninterruptible power supplies in series through the third thyristor, when the main power supply branch of a certain uninterruptible power supply fails, the uninterruptible power supply controls the third thyristor of the machine to be turned on, and connects the main power supply branch of the uninterruptible power supply in the front end in a standby state to the output end of the main power supply branch of the machine, without switching to battery power supply, while not affecting the response speed and avoiding the reliability of the parallel system being affected by battery exhaustion. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 The present invention is a schematic diagram of an uninterruptible power supply parallel system integrated with the power supply control method provided by an embodiment of the present invention.
[0022] Figure 2 It is a flow chart of a power supply control method provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0023] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0024] The power supply control method provided by the present invention can be applied to Figure 1 The uninterruptible power supply parallel system shown includes three uninterruptible power supplies (single units), wherein each uninterruptible power supply includes a main power supply branch, a bypass power supply branch, a first thyristor SCR_n_1 (n is the serial number of the single uninterruptible power supply in the uninterruptible power supply parallel system, the same below), a second thyristor SCR_n_2, a third thyristor SCR_n_3 and a single unit control unit. In the above uninterruptible power supply parallel system, one of the uninterruptible power supplies is the host, and the other uninterruptible power supplies are slaves, and the host and the slaves are connected to a communication bus (such as a CAN bus), thereby realizing the synchronous operation of each uninterruptible power supply unit. The other structures of each uninterruptible power supply unit in the uninterruptible power supply parallel system and the connection method between each uninterruptible power supply can adopt the conventional technology in the field, which will not be repeated here. In a specific application, the first thyristor SCR_n_1 , the second thyristor SCR_n_2 , and the third thyristor SCR_n_3 may also be replaced by other semiconductor switch elements.
[0025] In each uninterruptible power supply, the main power supply branch is used to connect the main power supply (such as the mains), and includes a rectifier, an inverter, a power supply battery, etc. The bypass power supply branch is used to connect the bypass power supply, and the first thyristor SCR_n_1 is connected in series in the bypass power supply branch. After the output ends of the main power supply branch and the bypass power supply branch are connected, they are connected to the output end of the uninterruptible power supply parallel system (i.e., the output interface for connecting the load) via the second thyristor SCR_n_2. The output ends of the main power supply branches of the three uninterruptible power supplies are connected in series to form a closed loop via three third thyristors SCR_n_3, that is, the two ends of the third thyristor SCR_2_3 of the 2# uninterruptible power supply 12 are respectively The two ends of the third thyristor SCR_2_3 of the 2# uninterruptible power supply 12 are respectively connected to the output end of the main power supply branch of the 1# uninterruptible power supply 11 and the output end of the main power supply branch of the machine, the two ends of the third thyristor SCR_3_3 of the 3# uninterruptible power supply 13 are respectively connected to the output end of the main power supply branch of the 2# uninterruptible power supply 12 and the output end of the main power supply branch of the machine, and the two ends of the third thyristor SCR_1_3 of the 1# uninterruptible power supply 11 are respectively connected to the output end of the main power supply branch of the 3# uninterruptible power supply 13 and the output end of the main power supply branch of the machine. In practical applications, the number of single uninterruptible power supplies in the uninterruptible power supply parallel system can be adjusted as needed, as long as it is greater than or equal to 3.
[0026] like Figure 2 FIG. 1 is a flow chart of a power supply control method provided by an embodiment of the present invention. The power supply control method can be executed by a single control unit of each uninterruptible power supply in an uninterruptible power supply parallel system, and the method includes the following steps:
[0027] Step S21: When the load of the uninterruptible power supply parallel system is lower than the preset value (for example, the difference between the total power of the parallel system and the total load is greater than the power of a single unit), each uninterruptible power supply in the uninterruptible power supply parallel system makes some uninterruptible power supplies in working state and other uninterruptible power supplies in standby state according to the load state (for example, load rate), and the uninterruptible power supplies in working state control the first thyristor and the third thyristor of the local unit to be disconnected and the second thyristor to be turned on through the single unit control unit of the local unit, and the uninterruptible power supply in standby state controls the first thyristor, the second thyristor and the third thyristor of the local unit to be disconnected. That is, the uninterruptible power supply in working state converts the AC power of the main power supply into the AC power of the frequency and voltage required by the load through its main power supply branch, and outputs it through the second thyristor; and the main power supply branch of the uninterruptible power supply in standby state also converts the AC power of the main power supply into the AC power of the frequency and voltage required by the load, and is ready to output at any time.
[0028] Each uninterruptible power supply in the uninterruptible power supply parallel system can confirm whether all uninterruptible power supplies need to work, or confirm how many uninterruptible power supplies need to work alone, according to the state of the load, to meet the power demand of the load. Specifically, each uninterruptible power supply in the uninterruptible power supply parallel system sends the working state to the communication bus respectively, and calculates the total power according to the working state of each uninterruptible power supply obtained from the communication bus, and after comparing the total load, determines whether the machine enters the working state or the standby state. The control of each thyristor can adopt the conventional technology in this field, which will not be repeated here.
[0029] Each uninterruptible power supply in the uninterruptible power supply parallel system can also synchronize its own status (such as working status, standby status, etc.) to other uninterruptible power supplies, so that each uninterruptible power supply can confirm whether the uninterruptible power supply connected to its third thyristor is in the standby state.
[0030] Step S22: When the rear end of the uninterruptible power supply in the standby state and the main power supply branch of the uninterruptible power supply in the working state fail, the uninterruptible power supply in the working state controls (through its single-machine control unit) the third thyristor of the local machine to turn on, and connects the main power supply branch of the uninterruptible power supply in the standby state at the front end to the output end of the uninterruptible power supply parallel system via the second thyristor of the local machine.
[0031] Specifically, the front end of the uninterruptible power supply refers to another uninterruptible power supply to which the third thyristor of the uninterruptible power supply is connected, and the uninterruptible power supply is the back end of another uninterruptible power supply. Figure 1 As shown in , the third thyristor SCR_2_3 of the 2# uninterruptible power supply 12 is connected to the 1# uninterruptible power supply 11, the 2# uninterruptible power supply 12 is at the rear end of the 1# uninterruptible power supply 11, and the 1# uninterruptible power supply 11 is at the front end of the 2# uninterruptible power supply 12.
[0032] Since the uninterruptible power supply with a main power supply branch failure directly controls the third thyristor of the local unit to conduct through its single-unit control unit, so that the main power supply branch of the front-end uninterruptible power supply outputs voltage through the second thyristor of the local unit, compared with the other uninterruptible power supplies switching to the working state after the local unit reports the fault to the communication bus, its switching speed is greatly accelerated, avoiding the system instability caused by communication delay. The above power supply control method adds the second thyristor and the third thyristor in the uninterruptible power supply, and connects the output ends of the main power supply branches of multiple uninterruptible power supplies in series through the third thyristor, so that when the main power supply branch of a certain uninterruptible power supply fails, the uninterruptible power supply controls the third thyristor of the local unit to conduct, and connects the main power supply branch of the uninterruptible power supply in the front-end standby state to the output end of the main power supply branch of the local unit, without switching to battery power supply, while not affecting the response speed, avoiding the reliability of the parallel system affected by battery exhaustion.
[0033] For example, when Figure 1 After the uninterruptible power supply parallel system shown is connected to the load, the 1# uninterruptible power supply and the 2# uninterruptible power supply are in working state, and the 3# uninterruptible power supply is in standby state. If the main power supply branch of the 1# uninterruptible power supply fails, the 1# uninterruptible power supply (after confirming the failure) immediately controls the third thyristor SCR_1_3 of the unit to turn on, so that the main power supply branch of the 3# uninterruptible power supply is output through the third thyristor SCR_1_3 and the second thyristor SCR_1_2, so that the output power of the uninterruptible power supply parallel system remains unchanged.
[0034] In one embodiment of the present invention, the power supply control method further includes: after the main power supply branch of the uninterruptible power supply at the front end is connected to the output end of the uninterruptible power supply parallel system via the third thyristor and the second thyristor of the uninterruptible power supply at the back end, the uninterruptible power supply parallel system turns on the second thyristor of the uninterruptible power supply at the front end, and disconnects the third thyristor and the second thyristor of the uninterruptible power supply at the back end. That is, after quickly completing the power supply switching, the uninterruptible power supply parallel system restores each uninterruptible power supply to a normal working state, and disconnects the uninterruptible power supply with a main power supply branch failure, thereby avoiding confusion in the states of each uninterruptible power supply, which is not conducive to subsequent control.
[0035] For example, when Figure 1 In the process, after the main power supply branch of the 3# uninterruptible power supply is output through the third thyristor SCR_1_3 and the second thyristor SCR_1_2, the 3# uninterruptible power supply turns on its second thyristor SCR_3_2, and at the same time controls the 1# uninterruptible power supply to disconnect its third thyristor SCR_1_3 and the second thyristor SCR_1_2, and records the fault status of the 1# uninterruptible power supply.
[0036] In one embodiment of the present invention, when the rear end of the uninterruptible power supply in the working state and the main power supply branch of the uninterruptible power supply in the working state fails, the uninterruptible power supply controls the first thyristor of the local machine to be turned on, and after at least one uninterruptible power supply in the standby state is switched to the working state, the uninterruptible power supply controls the first thyristor of the local machine to be turned off. Specifically, the uninterruptible power supply reports the fault state of the local machine to the communication bus while controlling the first thyristor of the local machine to be turned on, and one of the uninterruptible power supplies in the standby state is switched to the working state.
[0037] For example, when Figure 1 After the uninterruptible power supply parallel system shown is connected to the load, the 1# uninterruptible power supply and the 2# uninterruptible power supply are in working state, and the 3# uninterruptible power supply is in standby state. If the main power supply branch of the 2# uninterruptible power supply fails, the 2# uninterruptible power supply (after confirming the failure) immediately controls the first thyristor SCR_2_1 of the unit to conduct, so that the bypass power supply branch of the 2# uninterruptible power supply replaces its main power supply branch and outputs through the second thyristor SCR_2_2, so that the output power of the uninterruptible power supply parallel system remains unchanged. At the same time, the 2# uninterruptible power supply (after confirming the failure) reports the fault state to the communication bus, the 3# uninterruptible power supply switches to the working state, and the 2# uninterruptible power supply disconnects its first thyristor SCR_2_1 and the second thyristor SCR_2_2.
[0038] In one embodiment of the present invention, when some of the uninterruptible power supplies in the uninterruptible power supply parallel system are in working state and other uninterruptible power supplies are in standby state, when a preset rotation time is reached (the preset rotation time can be set in advance for each uninterruptible power supply), all the uninterruptible power supplies in standby state are switched to working state, and an equal number of uninterruptible power supplies in working state are switched to standby state.
[0039] Through the above-mentioned method, it can be avoided that some uninterruptible power supplies in the uninterruptible power supply parallel system work alone for a long time, which affects their service life.
[0040] In specific implementation, each uninterruptible power supply records the accumulated working time when it is in working state; when the preset rotation time is reached, each uninterruptible power supply switches one or more uninterruptible power supplies in working state and with the longest accumulated working time to standby state according to the accumulated working time (the number of uninterruptible power supplies switched from working state to standby state is determined according to the number of uninterruptible power supplies switched from standby state to working state). Through the above-mentioned rotation method, the phenomenon of aging of an uninterruptible power supply under long-term load can be effectively avoided, so that the working time of each uninterruptible power supply in the uninterruptible power supply parallel system is relatively balanced.
[0041] For example, for Figure 1In the uninterruptible power supply parallel system, when a single uninterruptible power supply can meet the power required by the load, the uninterruptible power supply parallel system can adopt a single rotation power supply mode to power the load. Take the 3# uninterruptible power supply 13 for power supply and the 1# and 2# uninterruptible power supplies 11 and 12 for standby as an example to illustrate the power supply logic in this mode. The following is a list of normal power supply states in this mode:
[0042]
[0043] That is, in a normal state, the main power supply branch of the 3# uninterruptible power supply 13 supplies power to the load through the second thyristor SCR_2_2. Once the main power supply branch of the 3# uninterruptible power supply fails, the 3# uninterruptible power supply 13 controls the third thyristor SCR_3_3 to be turned on, and the output of the main power supply branch of the 2# uninterruptible power supply 12 is supplied to the load; after the 2# uninterruptible power supply 12 is transferred to a normal working state (i.e., the second thyristor SCR_2_2 is turned on), if the main power supply branch of the 2# uninterruptible power supply 12 fails, the third thyristor SCR_2_3 is controlled to be turned on, and the output of the main power supply branch of the 1# uninterruptible power supply 11 is supplied to the load; if the main power supply branch of the 1# uninterruptible power supply 11 fails again after the 1# uninterruptible power supply 11 is transferred to a normal working state, the first thyristor SCR_1_1 of the 1# uninterruptible power supply 11 is controlled to be turned on, and the output of the bypass power supply branch of the 1# uninterruptible power supply 11 is supplied to the load.
[0044] From the above power supply logic, it can be seen that for the case of an uninterruptible power supply parallel system with three uninterruptible power supplies, the output can only carry the full load of one machine, that is, 100%. The corresponding load capacity has decreased, but in terms of reliability, it has increased by 3 times, which is much higher than the reliability of a single uninterruptible power supply.
[0045] In one embodiment of the present invention, when the load at the output end of the uninterruptible power supply parallel system is less than (M+1)×a×G and greater than (M-1)×a×G, M is an integer less than N, a is a preset load rate, and 1>a>0.5, G is the output power of a single uninterruptible power supply, and the uninterruptible power supply parallel system puts M uninterruptible power supplies in working state, and the other NM uninterruptible power supplies are in standby state.
[0046] In particular, the above a is 0.8. For example, when the load rate is less than 80% (after a certain period of time), the single unit rotation mode is entered to improve the reliability of power supply; and when the load rate is greater than 80% and less than 160% (after a certain period of time), the 2 parallel working mode is entered, otherwise it is converted to the 3 parallel working mode.
[0047] In the above power supply control method, when all uninterruptible power supplies that are not faulty are in working condition, if the main power supply circuit of any working uninterruptible power supply fails, the uninterruptible power supply controls the first thyristor of the uninterruptible power supply to turn on, that is, the uninterruptible power supply outputs power through its bypass power supply branch.
[0048] The present invention also provides an uninterruptible power supply parallel system, the uninterruptible power supply parallel system includes N uninterruptible power supplies, N is an integer greater than or equal to 2; each of the uninterruptible power supplies includes a main power supply branch, a bypass power supply branch, a first thyristor, a second thyristor, a third thyristor and a single-machine control unit, and the first thyristor is connected in series in the bypass power supply branch, the output ends of the main power supply branch and the bypass power supply branch are connected and then connected to the output end of the uninterruptible power supply parallel system via the second thyristor, and the output ends of the main power supply branches of the N uninterruptible power supplies are connected in series to form a closed loop via N third thyristors; each of the single-machine control units includes a processor and a memory, the memory stores a computer program that can be executed by the processor, and the processor implements the steps of the power supply control method as described above when executing the computer program.
[0049] The DC power supply in this embodiment is the same as the above Figure 1-2 The power supply control method in the corresponding embodiment belongs to the same concept, and its specific implementation process is detailed in the corresponding method embodiment, and the technical features in the method embodiment are applicable to the DC power supply embodiment, which will not be repeated here.
[0050] The present invention also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the power supply control method described above are implemented.
[0051] The computer-readable storage medium in this embodiment is the same as the above Figure 1-2 The power supply control method in the corresponding embodiment belongs to the same concept, and its specific implementation process is detailed in the corresponding method embodiment, and the technical features in the method embodiment are applicable in the storage medium embodiment, which will not be repeated here.
[0052] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.
[0053] Those skilled in the art can clearly understand that, for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In actual applications, the above-mentioned functions can be assigned to different functional units and modules as needed. The functional units and modules in the embodiments can be integrated into a processor, or each unit can exist physically separately, or two or more units can be integrated into one unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.
[0054] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0055] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.
[0056] In the embodiments provided in the present application, it should be understood that the disclosed power supply control method and uninterruptible power supply parallel system can be implemented in other ways. For example, the uninterruptible power supply parallel system embodiments described above are only illustrative.
[0057] In addition, each functional unit in each embodiment of the present application may be integrated into one processor, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above integrated unit may be implemented in the form of hardware or in the form of software functional units.
[0058] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or interface switching device that can carry the computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal and software distribution medium, etc.
[0059] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.
Claims
1. A power supply control method, applied to an uninterruptible power supply parallel system, wherein the uninterruptible power supply parallel system includes N uninterruptible power supplies, wherein N is an integer greater than or equal to 2, and wherein: Each of the uninterruptible power supplies comprises a main power supply branch, a bypass power supply branch, a first thyristor, a second thyristor and a third thyristor, and the first thyristor is connected in series in the bypass power supply branch, the output ends of the main power supply branch and the bypass power supply branch are connected to each other and then connected to the output end of the uninterruptible power supply parallel system via the second thyristor, and the output ends of the main power supply branches of N uninterruptible power supplies are connected in series to form a closed loop via N third thyristors; the method comprises: When the load rate of the uninterruptible power supply parallel system is lower than a preset value, some uninterruptible power supplies are in working state and other uninterruptible power supplies are in standby state, and the uninterruptible power supplies in working state control the first thyristor and the third thyristor of the machine to be disconnected and the second thyristor to be turned on, and the uninterruptible power supply in standby state controls the first thyristor, the second thyristor and the third thyristor of the machine to be disconnected; When the rear end of the uninterruptible power supply in the standby state and the main power supply branch of the uninterruptible power supply in the working state fail, the uninterruptible power supply in the working state controls the third thyristor of the local machine to turn on, and connects the main power supply branch of the uninterruptible power supply in the standby state at the front end to the output end of the uninterruptible power supply parallel system via the second thyristor of the local machine.
2. The power supply control method according to claim 1, characterized in that: The method comprises: after the main power supply branch of the uninterruptible power supply at the front end is connected to the output end of the uninterruptible power supply parallel system via the third thyristor and the second thyristor of the uninterruptible power supply at the rear end, the uninterruptible power supply parallel system turns on the second thyristor of the uninterruptible power supply at the front end and turns off the third thyristor and the second thyristor of the uninterruptible power supply at the rear end.
3. The power supply control method according to claim 1, characterized in that: The method comprises: When the rear end of the uninterruptible power supply in working state and the main power supply branch of the uninterruptible power supply in working state fail, the uninterruptible power supply controls the first thyristor of the local machine to turn on, and after at least one uninterruptible power supply in standby state switches to working state, the uninterruptible power supply controls the first thyristor of the local machine to turn off.
4. The power supply control method according to claim 1, characterized in that: The method comprises: when a preset rotation time is reached, all uninterruptible power supplies in a standby state are switched to a working state, and an equal number of uninterruptible power supplies in a working state are switched to a standby state.
5. The power supply control method according to claim 4, characterized in that: The method comprises: Each of the uninterruptible power supplies records the accumulated working time when in working state; When the preset rotation time is reached, one or more uninterruptible power supplies that are in working state and have the longest cumulative working time are switched to standby state.
6. The power supply control method according to claim 1, characterized in that: The method includes: when the load at the output end of the uninterruptible power supply parallel system is less than (M+1)×a×G and greater than (M-1)×a×G, M is an integer less than N, a is a preset load rate, and 1>a>0.5, G is the output power of a single uninterruptible power supply, the uninterruptible power supply parallel system puts M uninterruptible power supplies in working state and the other NM uninterruptible power supplies in standby state.
7. The power supply control method according to claim 6, characterized in that: The a is 0.
8.
8. The power supply control method according to claim 1, characterized in that: The method comprises: when all the uninterruptible power supplies that are not in fault are in working state, if the main power supply circuit of any uninterruptible power supply in working state fails, the uninterruptible power supply controls the first thyristor of the uninterruptible power supply to be turned on.
9. An uninterruptible power supply parallel system, characterized in that: The uninterruptible power supply parallel system includes N uninterruptible power supplies, where N is an integer greater than or equal to 2; each of the uninterruptible power supplies includes a main power supply branch, a bypass power supply branch, a first thyristor, a second thyristor, a third thyristor and a single-machine control unit, and the first thyristor is connected in series in the bypass power supply branch, and the output ends of the main power supply branch and the bypass power supply branch are connected to each other and then connected to the output end of the uninterruptible power supply parallel system via the second thyristor, and the output ends of the main power supply branches of the N uninterruptible power supplies are connected in series to form a closed loop via N third thyristors; each of the single-machine control units includes a processor and a memory, and the memory stores a computer program executable by the processor, and when the processor executes the computer program, the steps of the power supply control method as described in any one of claims 1 to 8 are implemented.
10. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by the processor, the steps of the power supply control method according to any one of claims 1 to 8 are implemented.