Hysteresis current type soft switching grid-connected converter and its harmonic suppression method
By using a DSP control unit in a hysteresis current type soft switching grid-connected converter to generate the upper and lower envelopes of the hysteresis band and drive the power switch tube, the harmonic suppression problem of the hysteresis current type soft switching grid-connected converter under non-ideal power grid is solved, and low-cost and efficient grid adaptability and power quality improvement are achieved.
Patent Information
- Application Number
- CN202411984629.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-09-26
- Estimated Expiration
- 2044-12-31
AI Technical Summary
Hysteresis current type soft-switching grid-connected converters are difficult to effectively suppress harmonic currents under non-ideal grid conditions. Existing control strategies are ineffective and lack adaptability.
A control method for a hysteresis current-type soft-switching grid-connected converter is implemented on a low-cost microcontroller unit. The hysteresis band upper and lower envelopes are generated by a DSP control unit, and a comparator subsystem is used to generate a modulation signal to drive the power switch tube to achieve harmonic suppression.
Significantly suppresses grid current harmonics, enhances grid adaptability, has good dynamic performance, is low cost, requires no additional hardware, and improves power quality.
Smart Images

Figure CN119787786B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of power electronics technology, in particular to the field of control technology of power electronic converters, and particularly relates to a hysteresis current type soft switching grid-connected converter and a harmonic suppression method thereof. Background Art
[0002] Grid-connected converters are key components in photovoltaic applications. Utilizing critical conduction mode (CRM) to achieve zero voltage switching (ZVS) in grid-connected inverters can significantly improve their efficiency and power density. Hysteresis current-based soft-switching control methods, by designing the inductor current hysteresis band envelope, can achieve full-range ZVS for power switches. These methods offer advantages such as simplicity, fast dynamic response, and inherent peak current limiting, making them a key technology for many grid-connected converters.
[0003] In addition, when a grid-connected converter is connected to a non-ideal public grid, if the voltage at the common coupling point is distorted, it will disturb the control loop of the grid-connected inverter and generate a large amount of current harmonics. For traditional continuous current mode (CCM) grid-connected converters, the grid voltage feedforward (GVF) strategy is often used, that is, the voltage at the common coupling point is fed forward to the control loop to eliminate the current harmonics caused by grid voltage distortion. For example, the existing technical document "Timbus A, Liserre M, Teodorescu R, et al. Evaluation of current controllers for distributed power generation systems [J]. IEEE Transactions on Power Electronics, 2009, 4 (3)" realizes the transformation of the harmonic admittance of the grid-connected converter by modifying the proportional coefficient of the grid voltage feedforward, thereby enhancing the anti-interference ability of the grid-connected converter's grid current to the grid voltage harmonic components. In addition, the technical paper "H.Zhang,X.Ruan,Z.Lin,L.Wu,Y.Ding and Y.Guo,Capacitor Voltage Full Feedback Scheme for LCL-Type Grid-Connected Inverterto Suppress Current Distortion Due to Grid Voltage Harmonics[J].IEEETransactions on Power Electron,2021,36(3)" proposes a control strategy based on capacitor voltage full feedback. By performing an equivalent transformation on the control model, the harmonics caused by the grid voltage in the grid current are suppressed without measuring the voltage at the common coupling point.
[0004] However, the time-varying switching frequency of hysteresis current-mode soft-switching grid-connected converters makes it difficult to establish an accurate s-domain model. This results in the failure of traditional harmonic suppression strategies for CCM grid-connected converters in hysteresis current-mode soft-switching grid-connected converters. Currently, there is a lack of control strategies for hysteresis current-mode soft-switching grid-connected converters that can suppress harmonic currents in distorted grids. Therefore, it is necessary to develop an easily implementable harmonic suppression method for hysteresis current-mode soft-switching grid-connected converters to improve their grid adaptability. Summary of the Invention
[0005] In order to solve the above technical problems, the present invention proposes a hysteresis current type soft switching grid-connected converter and a harmonic suppression method thereof. The present invention can realize the current harmonic suppression of the hysteresis current type soft switching grid-connected converter under non-ideal power grid on a low-cost microcontroller unit (MCU) without using any hardware auxiliary circuit.
[0006] In order to achieve the above technical objectives, the technical solution of the present invention is:
[0007] A hysteresis current type soft switching grid-connected converter, the hysteresis current type soft switching grid-connected converter includes a DC bus filter capacitor module, a power conversion module and a filter module, the DC bus filter capacitor module includes a first DC voltage dividing capacitor and a second DC voltage dividing capacitor, the first DC voltage dividing capacitor and the second DC voltage dividing capacitor are connected in series and then in parallel with a DC power supply; the power conversion module includes a first power switch tube, a second power switch tube, a third power switch tube and a fourth power switch tube, the filter module includes an inverter side filter inductor, an AC filter capacitor and a grid side filter inductor; the first end of the first power switch tube is connected to the positive electrode of the DC power supply, the second end of the first power switch tube is connected to the first end of the fourth power switch tube, and the second end of the fourth power switch tube is connected a negative electrode of a DC power supply, a first end of the second power switching tube connected to a common end of the first DC voltage-dividing capacitor and the second DC voltage-dividing capacitor, a second end of the second power switching tube connected to the second end of the third power switching tube, the second end of the first power switching tube, the first end of the third power switching tube, and the first end of the fourth power switching tube connected and connected to one end of the inverter-side filter inductor, the other end of the inverter-side filter inductor connected to the AC filter capacitor and one end of the grid-side filter inductor, the other end of the AC filter capacitor connected to the common end of the first DC voltage-dividing capacitor and the second DC voltage-dividing capacitor, the other end of the grid-side filter inductor connected to the first end of the AC grid, and the second end of the AC grid connected to the other end of the AC filter capacitor;
[0008] It also includes a DSP control unit, which includes a gate, a comparator subsystem, a first scaler, a first multiplier, a second operator, a third operator, a fourth operator, a fifth operator, a first subtractor, and a third scaler. The gate outputs a voltage sampling value and inputs it into the first scaler and the third scaler. The output of the first scaler is connected to one end of the first multiplier, the output of the third scaler is connected to the positive input end of the first subtractor, the grid voltage sampling value is connected to the negative input end of the first subtractor, the output end of the first subtractor is connected to the other end of the first multiplier, the output end of the first multiplier is connected to the input end of the second operator, the output end of the second operator is connected to the input end of the third operator, the output end of the third operator is connected to the input end of the fourth operator, the output end of the fourth operator is connected to the input end of the fifth operator, and the output end of the fifth operator outputs the lower envelope of the hysteresis band and inputs it into the comparator subsystem.
[0009] The DSP control unit also includes a digital differentiator, a first operator, a first adder, a second scaler, a second adder, a voltage outer loop controller, a second multiplier, a phase lock and a third multiplier. The gate outputs a voltage sampling value and inputs it into the input end of the voltage outer loop controller. The output end of the voltage outer loop controller is connected to one end of the second multiplier. The compensation coefficient k z and the switching period T s Input ports 1 and 2 of the digital differentiator are respectively input, output port 3 of the digital differentiator is connected to one input of the third multiplier, grid voltage sampling values are respectively input to the other input of the third multiplier and the input of the phase-locked unit, the output of the phase-locked unit is connected to the other end of the second multiplier, the output of the second multiplier is connected to one input of the second adder as an inductor current reference value, the output of the third multiplier is connected to the other input of the second adder, the output of the second adder is connected to the input of the second scaler, the output of the second scaler is connected to one input of the first adder, the lower envelope of the hysteresis band is connected to the input of the first operator, the output of the first operator is connected to the other input of the first adder, and the output of the first adder outputs the upper envelope of the hysteresis band and inputs it into the comparator subsystem.
[0010] The DSP control unit also includes a comparator subsystem, which includes a first analog comparator and a second analog comparator. The inductor current sampling value is connected to the positive input terminal of the first analog comparator and the negative input terminal of the second analog comparator, respectively. The upper envelope of the hysteresis band is connected to the negative input terminal of the first analog comparator, and the lower envelope of the hysteresis band is connected to the positive input terminal of the second analog comparator. The output terminal of the first analog comparator is output port No. 4 of the comparator subsystem, and the output terminal of the second analog comparator is output port No. 5 of the comparator subsystem.
[0011] The DSP control unit further includes a modulator, wherein input port 1 and input port 2 of the modulator are connected to output port 5 and output port 4 of the comparator subsystem respectively, and output port 3 of the modulator outputs the first drive signal to the fourth drive signal;
[0012] When the AC power grid connected to the hysteresis current type soft switching grid-connected converter is in the positive half cycle, the first drive signal is consistent with the input signal of input port 1 of the modulator, the second drive signal is always at a high level, the third drive signal is consistent with the input signal of input port 2 of the modulator, and the fourth drive signal is always at a low level; when the AC power grid connected to the hysteresis current type soft switching grid-connected converter is in the negative half cycle, the first drive signal is always at a low level, the second drive signal is consistent with the input signal of input port 2 of the modulator, the third drive signal is always at a high level, and the fourth drive signal is consistent with the input signal of input port 1 of the modulator.
[0013] The gate sends the corresponding input signal to the input end of the first proportional device, the input end of the third proportional device and the input end of the voltage outer loop controller according to the polarity of the current AC grid voltage. The specific process is as follows:
[0014] When the AC grid voltage is in the positive half cycle, the voltage sampling value of the first DC voltage dividing capacitor is sent to the input end of the first proportional device, the input end of the third proportional device, and the input end of the voltage outer loop controller; when the AC grid voltage is in the negative half cycle, the voltage sampling value of the second DC voltage dividing capacitor is sent to the input end of the first proportional device, the input end of the third proportional device, and the input end of the voltage outer loop controller.
[0015] The hysteresis current-type soft-switching grid-connected converter further includes a sampling and driving circuit, which includes a bus voltage sampling unit, a driving circuit, an inductor current sampling unit, and a grid voltage sampling unit. The bus voltage sampling unit samples the voltage of the first DC voltage-dividing capacitor and the voltage of the second DC voltage-dividing capacitor. The inductor current sampling unit samples the current of the inverter-side filter inductor. The grid voltage sampling unit samples the voltage of the AC grid. The driving circuit receives the PWM signal output by the DSP control unit and outputs it respectively between the gate and source of the first to fourth power switch tubes.
[0016] The gain k1 of the first scaler is twice the AC filter capacitance C f The capacitance value is divided by the inductance value l1 of the inverter side filter inductor L1, that is, The gain k2 of the second scaler is a constant of 2; the gain k3 of the third scaler is a constant of 0.5.
[0017] For the first operator, its output is the absolute value of the input; for the second operator, its output is the arithmetic square root of the input; for the third operator, its output is the opposite of the input; for the fourth operator, its output is the real part of the input; for the fifth operator, its output is the minimum value of the input compared with the constant 0.
[0018] The generation formula of the digital differentiator is:
[0019]
[0020] The present invention also provides a harmonic suppression method for a hysteresis current type soft switching grid-connected converter, which is applied to the above-mentioned hysteresis current type soft switching grid-connected converter, comprising:
[0021] Step S1: The bus voltage sampling unit samples the voltage of the first DC voltage-dividing capacitor and the voltage of the second DC voltage-dividing capacitor, the inductor current sampling unit samples the current of the inverter-side filter inductor, and the grid voltage sampling unit samples the voltage of the AC grid;
[0022] Step S2, calculating the hysteresis current envelope compensation value;
[0023] Step S3, generating the upper envelope of the hysteresis band and the lower envelope of the hysteresis band, and inputting the same together with the current of the inverter-side filter inductor into the comparator subsystem;
[0024] Step S4, the comparator subsystem obtains the modulation signal required for harmonic suppression through the first analog comparator and the second analog comparator and outputs the modulation signal to the modulator;
[0025] Step S5, obtaining the first drive signal to the fourth drive signal in the modulator and sending them to the first power switch tube to the fourth power switch tube in the hysteresis current type soft switching grid-connected converter, ending this control cycle and waiting for the next control cycle.
[0026] The beneficial effects of adopting the above scheme are:
[0027] (1) The present invention can significantly suppress the harmonics contained in the grid-connected current of a hysteresis current type soft-switching grid-connected converter when it is connected to a non-ideal public grid, thereby enhancing the grid adaptability of the hysteresis current type soft-switching grid-connected converter;
[0028] (2) The present invention can implement all the control methods described above on a low-cost microcontroller unit (MCU) without adding additional hardware costs, thus having the technical advantage of low cost;
[0029] (3) The control method described in the present invention enables the grid-connected current to have good dynamic performance, and provides an economical and effective solution for improving the power quality of the hysteresis current type soft-switching grid-connected converter. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1 This is a circuit diagram and control block diagram of the hysteresis current type soft switching grid-connected converter of the present invention.
[0031] Figure 2 This is the Bode diagram of the digital differentiator proposed in the present invention.
[0032] Figure 3 The present invention is a flowchart of a specific implementation of a method for suppressing harmonics in a hysteresis current type soft-switching grid-connected converter.
[0033] FIG4( a ) is a discrete domain control block diagram of the present invention using the proposed harmonic suppression method in a hysteresis current type soft switching grid-connected converter.
[0034] Figure 4(b) shows the system pole diagram with different grid-side filter inductance values l2.
[0035] Figure 5 These are the experimental results of the grid-connected converter and control method of the present invention under half-load and full-load conditions.
[0036] Figure 6 The experimental comparison results of the grid-connected converter using the control method proposed in this paper and the traditional harmonic-free compensation method. DETAILED DESCRIPTION
[0037] To make the purpose and technical solutions of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the described embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0038] Figure 1 The circuit diagram and control block diagram of the hysteresis current type soft switching grid-connected converter of the present invention are shown in FIG. Figure 1 As shown, the hysteresis current type soft switching grid-connected converter 1 includes a DC bus filter capacitor module 11, a power conversion module 12 and a filter module 13, wherein the input end of the DC bus filter capacitor module 11 is connected in parallel with a DC power supply U dc The output end of the DC bus filter capacitor module 11 is connected in parallel to the input end of the power conversion module 12, the output end of the power conversion module 12 is connected in parallel to the input end of the filter module 13, and the output end of the filter module 13 is connected in parallel to the AC grid u g .
[0039] The DC bus filter capacitor module 11 includes a first DC voltage dividing capacitor C1 and a second DC voltage dividing capacitor C2. The first DC voltage dividing capacitor C1 and the second DC voltage dividing capacitor C2 are connected in series and then in parallel to the DC power supply U dc The power conversion module 12 includes a first power switch tube S1, a second power switch tube S2, a third power switch tube S3 and a fourth power switch tube S4. The filter module 13 includes an inverter side filter inductor L1, an AC filter capacitor C f The first end of the first power switch tube S1 is connected to the DC power supply U dc The positive electrode of the first power switch tube S1, the second end of the first power switch tube S4 is connected to the first end of the fourth power switch tube S4, and the second end of the fourth power switch tube S4 is connected to the DC power supply U dc The first end of the second power switch tube S2 is connected to the common end of the first DC voltage dividing capacitor C1 and the second DC voltage dividing capacitor C2, the second end of the second power switch tube S2 is connected to the second end of the third power switch tube S3, the second end of the first power switch tube S1, the first end of the third power switch tube S3 and the first end of the fourth power switch tube S4 are connected and connected to one end of the inverter side filter inductor L1, and the other end of the inverter side filter inductor L1 is connected to the AC filter capacitor C f Connected to one end of the grid-side filter inductor L2, AC filter capacitor C f The other end of the grid-side filter inductor L2 is connected to the common end of the first DC voltage-dividing capacitor C1 and the second DC voltage-dividing capacitor C2, and the other end of the grid-side filter inductor L2 is connected to the AC grid u g The first end, AC grid ug The second end is connected to the AC filter capacitor C f the other end.
[0040] like Figure 1 As shown, the control circuit part of the present invention includes a sampling and driving circuit 2 and a DSP control unit 3.
[0041] The sampling and driving circuit 2 includes a bus voltage sampling unit 21, a driving circuit 22, an inductor current sampling unit 23 and a grid voltage sampling unit 24, wherein the bus voltage sampling unit 21 samples the voltage U of the first DC voltage dividing capacitor C1. dc1 and the voltage U of the second DC voltage dividing capacitor C2 dc2 The inductor current sampling unit 23 samples the current of the inverter side filter inductor L1, and the grid voltage sampling unit 24 samples the AC grid u g The driving circuit 22 receives the PWM signal output by the DSP control unit 3 and outputs it to the gate and source of the power switch tubes S1 to S4 respectively.
[0042] The DSP control unit 3 includes a selector 31, a modulator 32, a comparator subsystem 33, a digital differentiator 34, a first operator 35, a first adder 36, a first scaler 37, a first multiplier 38, a second operator 39, a third operator 310, a fourth operator 311, a fifth operator 312, a second scaler 313, a first subtractor 314, a third scaler 315, a second adder 316, a voltage outer loop controller 317, a second multiplier 318, a phase lock 319 and a third multiplier 320.
[0043] For the gate 31, according to the current AC grid voltage u g The polarity of the corresponding input signal is sent to the input end of the first proportional device 37, the input end of the third proportional device 315 and the input end of the voltage outer loop controller 317. The specific process is as follows:
[0044] When the AC grid voltage is in the positive half cycle, the AC filter capacitor C f The voltage at the common end of the inverter side filter inductor L1 and the grid side filter inductor L2 is greater than the AC filter capacitor C f When the voltage at the common terminal of the first DC voltage dividing capacitor C1 and the second DC voltage dividing capacitor C2 is compared, the voltage sampling value U of the first DC voltage dividing capacitor C1 is dc1 The voltage is sent to the input end of the first proportional device 37, the input end of the third proportional device 315 and the input end of the voltage outer loop controller 317; when the AC grid voltage is in the negative half cycle, the AC filter capacitor C f The voltage at the common end of the inverter side filter inductor L1 and the grid side filter inductor L2 is less than the AC filter capacitor C fWhen the voltage at the common terminal of the first DC voltage dividing capacitor C1 and the second DC voltage dividing capacitor C2 is compared, the voltage sampling value U of the second DC voltage dividing capacitor C2 is dc2 The voltage is sent to the input end of the first proportional device 37 , the input end of the third proportional device 315 and the input end of the voltage outer loop controller 317 .
[0045] The control circuit of the present invention generates a current hysteresis band envelope based on the collected bus voltage, inductor current, and grid voltage of the grid-connected converter, including the hysteresis band upper envelope i L_top , hysteresis band lower envelope i L_low .
[0046] Furthermore, the hysteresis band lower envelope i L_low The specific generation process is as follows:
[0047] The gate 31 outputs the voltage sampling value U dcx , voltage sampling value U dcx It can be the voltage sampling value U of the first DC voltage dividing capacitor C1 dc1 Or the voltage sampling value U of the second DC voltage dividing capacitor C2 dc2 , and input to the first scaler 37 and the third scaler 315, the output of the first scaler 37 is connected to one end of the first multiplier 38, the output of the third scaler 315 is connected to the positive input end of the first subtractor 314, the grid voltage sampling value u g The output terminal of the first subtractor 314 is connected to the negative input terminal of the first subtractor 314, the output terminal of the first subtractor 314 is connected to the other terminal of the first multiplier 38, the output terminal of the first multiplier 38 is connected to the input terminal of the second operator 39, the output terminal of the second operator 39 is connected to the input terminal of the third operator 310, the output terminal of the third operator 310 is connected to the input terminal of the fourth operator 311, the output terminal of the fourth operator 311 is connected to the input terminal of the fifth operator 312, and the output terminal of the fifth operator 312 outputs the hysteresis band lower envelope i L_low And input to input port No. 1 of the comparator subsystem 33.
[0048] Furthermore, the hysteresis band upper envelope i L_up The specific generation process is as follows:
[0049] The gate 31 outputs the voltage sampling value U dcx , voltage sampling value U dcx It can be the voltage sampling value U of the first DC voltage dividing capacitor C1 dc1 Or the voltage sampling value U of the second DC voltage dividing capacitor C2 dc2 , and input to the input end of the voltage outer loop controller 317, the output end of the voltage outer loop controller 317 is connected to one end of the second multiplier 318, the selected compensation coefficient k z and the switching period Ts The first and second input ports of the digital differentiator 34 are inputted respectively, and the third output port of the digital differentiator 34 is connected to an input terminal of the third multiplier 320. The grid voltage sampling value u g The other input terminal of the third multiplier 320 and the input terminal of the phase lock 319 are input respectively. The output terminal of the phase lock 319 is connected to the other terminal of the second multiplier 318. The output terminal of the second multiplier 318 is used as the inductor current reference value i L_ref The output of the third multiplier 320 is connected to one input of the second adder 316, the output of the second adder 316 is connected to the other input of the second adder 316, the output of the second adder 316 is connected to the input of the second scaler 313, the output of the second scaler 313 is connected to one input of the first adder 36, and the hysteresis band lower envelope i L_low The output terminal of the first operator 35 is connected to the other input terminal of the first adder 36, and the output terminal of the first adder 36 outputs the hysteresis band upper envelope i L_up And input to input port 2 of the comparator subsystem 33.
[0050] The input of the comparator subsystem 33 includes the inductor current sampling value i L 、Envelope line on hysteresis band i L_top and the hysteresis band lower envelope i L_low And configure two analog comparators through the comparator module inside the DSP, namely the first analog comparator 331 and the second analog comparator 332, where the inductor current sampling value i L are connected to the positive input terminal of the first analog comparator 331 and the negative input terminal of the second analog comparator 332 respectively. L_top Connected to the negative input terminal of the first analog comparator 331, the hysteresis band lower envelope i L_low Connected to the positive input terminal of the second analog comparator 332 , the output terminal of the first analog comparator 331 is output port No. 4 of the comparator subsystem 33 , and the output terminal of the second analog comparator 332 is output port No. 5 of the comparator subsystem 33 .
[0051] Furthermore, the operation method of the modulator 32 is as follows:
[0052] Input port 1 and input port 2 of the modulator 32 are connected to output port 5 and output port 4 of the comparator subsystem 33 respectively, and output port 3 of the modulator 32 outputs the first to fourth driving signals PWM1 to PWM4.
[0053] When the AC grid connected to the hysteresis current type soft-switching grid-connected converter is in the positive half cycle, the first drive signal PWM1 is consistent with the input signal of input port 1 of the modulator 32, the second drive signal PWM2 is always at a high level, the third drive signal PWM3 is consistent with the input signal of input port 2 of the modulator 32, and the fourth drive signal PWM4 is always at a low level; when the AC grid connected to the hysteresis current type soft-switching grid-connected converter is in the negative half cycle, the first drive signal PWM1 is always at a low level, the second drive signal PWM2 is consistent with the input signal of input port 2 of the modulator 32, the third drive signal PWM3 is always at a high level, and the fourth drive signal PWM4 is consistent with the input signal of input port 1 of the modulator 32.
[0054] The embodiments of the present invention preferably employ the following technical solutions:
[0055] Optionally, the gain k1 of the first scaler 37 is twice the AC filter capacitor C f The capacitance value is divided by the inductance value l1 of the inverter side filter inductor L1, that is, The gain k2 of the second scaler may be a constant of 2; the gain k3 of the third scaler may be a constant of 0.5.
[0056] Optionally, for the first operator 35, its output is the absolute value of the input; for the second operator 39, its output is the arithmetic square root of the input; for the third operator 310, its output is the opposite of the input; for the fourth operator 311, its output is the real part of the input; for the fifth operator 312, its output is the minimum value of the input compared with the constant 0.
[0057] The harmonic suppression method of the present invention selects the compensation coefficient k z and the switching period T s Input the No. 1 port and No. 2 port of the digital differentiator 34 respectively, and the No. 3 port of the digital differentiator 34 outputs G digital_d (z) and input to one end of the third multiplier 320, the voltage sampling value of the AC grid is input to the other end of the third multiplier 320, and the output is the hysteresis current envelope compensation value i L_GVF And input one end of the second adder 316, z represents the complex variable in the discrete domain, then the generation formula of the digital differentiator 34 is:
[0058]
[0059] The above preferred technical solution requires reasonable adjustment of k z The value of k is used to compensate for the phase compensation at the Nyquist frequency and reduce the gain. z = 1, a 90-degree phase lead can be achieved at the Nyquist frequency, but this also results in infinite gain. z=0.78, such as Figure 2 The Bode plots of the digital differentiator generated by the present invention and a conventional digital differentiation method are shown. Within relatively low frequency bands, such as within 1 kHz, the digital differentiator employed is nearly identical to an ideal differentiator. This avoids the Tustin differentiation method's inherent problem of infinite gain at the Nyquist frequency, which introduces high-frequency noise. The proposed digital differentiator 34 ensures that the proposed control method exhibits excellent harmonic suppression.
[0060] Figure 3 The figure shows a specific implementation flow chart of a harmonic suppression method of a hysteresis current type soft switching grid-connected converter according to the present invention, wherein each cycle includes the following steps.
[0061] Step S1: The bus voltage sampling unit 21 samples the voltage U of the first DC voltage dividing capacitor C1. dc1 and the voltage U of the second DC voltage dividing capacitor C2 dc2 The inductor current sampling unit 23 samples the current i of the inverter side filter inductor L1 L The grid voltage sampling unit 24 samples the voltage u of the AC grid. g .
[0062] Step S2, calculating the hysteresis current envelope compensation value i L_GVF ;
[0063] Step S3, generating the hysteresis band upper envelope i L_top and the hysteresis band lower envelope i L_low , the same as the inductor L1 current i L Input the comparator subsystem 33 together;
[0064] Step S4: the comparator subsystem 33 obtains the modulation signal required for harmonic suppression through the first analog comparator 331 and the second analog comparator 332 and outputs the modulation signal to the modulator 32;
[0065] In step S5, the modulator 32 obtains the first drive signal PWM1 to the fourth drive signal PWM4 and sends them to the power switches S1 to S4 in the hysteresis current type soft switching grid-connected converter 1, ending the current control cycle and waiting for the next control cycle.
[0066] Figure 4(a) shows the discrete domain control block diagram of the present invention using the proposed harmonic suppression method in the hysteresis current type soft-switching grid-connected converter. Figure 4(b) shows the system pole diagram under different grid-side filter inductance values l2. It can be seen that the distribution of the poles is independent of the grid-side filter inductance value l2 and always remains within the unit circle, indicating that the system has good robustness and stability.
[0067] An experimental platform was built according to the technical solution of the present invention, and experimental waveforms under the control method proposed by the present invention were obtained. The entire control method was implemented by a low-cost microcontroller TMS320F28377S. Figure 5 The experimental waveforms are as follows: the control method proposed in the present invention is used and the grid-connected converter is connected to the public power grid containing harmonics, where i g Indicates the grid current, i g =4.5A is half load condition, i g =9A is the full load condition. It can be seen that the grid current quality is good regardless of half load or full load. At the same time, there is no obvious overshoot or oscillation at the grid current mutation point, showing good dynamic response capability.
[0068] Furthermore, a comparison is made between the control method proposed in this application and the traditional non-harmonic compensation method when the hysteresis current type grid-connected converter is connected to a public power grid containing harmonics. Figure 6 It can be seen that within the full power range, the control method proposed in the present invention can significantly reduce the total harmonic distortion rate of the grid-connected current of the hysteresis current type grid-connected converter when it is connected to a non-ideal grid.
[0069] The embodiments are only for illustrating the technical idea of the present invention and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the present invention.
Claims
1. A hysteresis current type soft switching grid-connected converter, the hysteresis current type soft switching grid-connected converter (1) comprising a DC bus filter capacitor module (11), a power conversion module (12) and a filter module (13), the DC bus filter capacitor module (11) comprising a first DC voltage-dividing capacitor and a second DC voltage-dividing capacitor, the first DC voltage-dividing capacitor and the second DC voltage-dividing capacitor being connected in series and then connected in parallel to a DC power supply; the power conversion module (12) comprising a first power switch tube, a second power switch tube, a third power switch tube and a fourth power switch tube, the filter module (13) comprising an inverter side filter inductor, an AC filter capacitor and a grid side filter inductor; the first end of the first power switch tube is connected to the positive electrode of the DC power supply, the second end of the first power switch tube is connected to the first end of the fourth power switch tube, and the The second end of the fourth power switch tube is connected to the negative electrode of the DC power supply, the first end of the second power switch tube is connected to the common end of the first DC voltage-dividing capacitor and the second DC voltage-dividing capacitor, the second end of the second power switch tube is connected to the second end of the third power switch tube, the second end of the first power switch tube, the first end of the third power switch tube, and the first end of the fourth power switch tube are connected and connected to one end of the inverter-side filter inductor, the other end of the inverter-side filter inductor is connected to the AC filter capacitor and one end of the grid-side filter inductor, the other end of the AC filter capacitor is connected to the common end of the first DC voltage-dividing capacitor and the second DC voltage-dividing capacitor, the other end of the grid-side filter inductor is connected to the first end of the AC grid, and the second end of the AC grid is connected to the other end of the AC filter capacitor; It is characterized in that The DSP control unit (3) further includes a gate (31), a comparator subsystem (33), a first scaler (37), a first multiplier (38), a second operator (39), a third operator (310), a fourth operator (311), a fifth operator (312), a first subtractor (314), and a third scaler (315). The gate (31) outputs a voltage sampling value, which is input to the first scaler (37) and the third scaler (315). The output of the first scaler (37) is connected to one end of the first multiplier (38), and the output of the third scaler (315) is connected to the positive input end of the first subtractor (314). , the grid voltage sampling value is connected to the negative input terminal of the first subtractor (314), the output terminal of the first subtractor (314) is connected to the other terminal of the first multiplier (38), the output terminal of the first multiplier (38) is connected to the input terminal of the second operator (39), the output terminal of the second operator (39) is connected to the input terminal of the third operator (310), the output terminal of the third operator (310) is connected to the input terminal of the fourth operator (311), the output terminal of the fourth operator (311) is connected to the input terminal of the fifth operator (312), and the output terminal of the fifth operator (312) outputs the hysteresis band lower envelope and inputs it into the comparator subsystem (33); The DSP control unit (3) further includes a digital differentiator (34), a first operator (35), a first adder (36), a second scaler (313), a second adder (316), a voltage outer loop controller (317), a second multiplier (318), a phase lock (319) and a third multiplier (320). The gate (31) outputs a voltage sampling value and inputs it to the input end of the voltage outer loop controller (317). The output end of the voltage outer loop controller (317) is connected to one end of the second multiplier (318). The compensation coefficient k z and switching cycles T s The first and second input ports of the digital differentiator (34) are inputted respectively, the output port 3 of the digital differentiator (34) is connected to one input terminal of the third multiplier (320), the grid voltage sampling value is inputted to the other input terminal of the third multiplier (320) and the input terminal of the phase lock (319), the output terminal of the phase lock (319) is connected to the other terminal of the second multiplier (318), the output terminal of the second multiplier (318) is connected to one input terminal of the second adder (316) as the inductor current reference value, and the third multiplier (320) is connected to the second multiplier (318). ) is connected to the other input end of the second adder (316), the output end of the second adder (316) is connected to the input end of the second scaler (313), the output end of the second scaler (313) is connected to one input end of the first adder (36), the hysteresis band lower envelope is connected to the input end of the first operator (35), the output end of the first operator (35) is connected to the other input end of the first adder (36), and the output end of the first adder (36) outputs the hysteresis band upper envelope and inputs it into the comparator subsystem (33); For the first operator (35), its output is the absolute value of the input; for the second operator (39), its output is the arithmetic square root of the input; for the third operator (310), its output is the opposite of the input; for the fourth operator (311), its output is the real part of the input; for the fifth operator (312), its output is the minimum value of the input compared with the constant 0.
2. The hysteresis current type soft switching grid-connected converter according to claim 1, characterized in that: The DSP control unit (3) further includes a comparator subsystem (33), the comparator subsystem (33) including a first analog comparator (331) and a second analog comparator (332), the inductor current sampling value is connected to the positive input terminal of the first analog comparator (331) and the negative input terminal of the second analog comparator (332), respectively, the hysteresis band upper envelope is connected to the negative input terminal of the first analog comparator (331), the hysteresis band lower envelope is connected to the positive input terminal of the second analog comparator (332), the output terminal of the first analog comparator (331) is output port No. 4 of the comparator subsystem (33), and the output terminal of the second analog comparator (332) is output port No. 5 of the comparator subsystem (33).
3. The hysteresis current type soft switching grid-connected converter according to claim 2, characterized in that: The DSP control unit (3) further includes a modulator (32), wherein input port No. 1 and input port No. 2 of the modulator (32) are respectively connected to output port No. 5 and output port No. 4 of the comparator subsystem (33), and output port No. 3 of the modulator (32) outputs the first drive signal to the fourth drive signal; When the AC grid to which the hysteresis current type soft switching grid-connected converter is connected is in a positive half cycle, the first drive signal is consistent with the input signal of input port No. 1 of the modulator (32), the second drive signal is always at a high level, the third drive signal is consistent with the input signal of input port No. 2 of the modulator (32), and the fourth drive signal is always at a low level; when the AC grid to which the hysteresis current type soft switching grid-connected converter is connected is in a negative half cycle, the first drive signal is always at a low level, the second drive signal is consistent with the input signal of input port No. 2 of the modulator (32), the third drive signal is always at a high level, and the fourth drive signal is consistent with the input signal of input port No. 1 of the modulator (32).
4. The hysteresis current type soft switching grid-connected converter according to claim 3, characterized in that: The selector (31) sends the corresponding input signal to the input end of the first proportional device (37), the input end of the third proportional device (315), and the input end of the voltage outer loop controller (317) according to the polarity of the current AC grid voltage. The specific process is as follows: When the AC grid voltage is in the positive half cycle, the voltage sampling value of the first DC voltage dividing capacitor is sent to the input end of the first proportional device (37), the input end of the third proportional device (315), and the input end of the voltage outer loop controller (317); when the AC grid voltage is in the negative half cycle, the voltage sampling value of the second DC voltage dividing capacitor is sent to the input end of the first proportional device (37), the input end of the third proportional device (315), and the input end of the voltage outer loop controller (317).
5. The hysteresis current type soft switching grid-connected converter according to claim 1, characterized in that: The system also includes a sampling and driving circuit (2), wherein the sampling and driving circuit (2) includes a bus voltage sampling unit (21), a driving circuit (22), an inductor current sampling unit (23), and a grid voltage sampling unit (24). The bus voltage sampling unit (21) samples the voltage of the first DC voltage-dividing capacitor and the voltage of the second DC voltage-dividing capacitor. The inductor current sampling unit (23) samples the current of the inverter-side filter inductor. The grid voltage sampling unit (24) samples the voltage of the AC grid. The driving circuit (22) receives the PWM signal output by the DSP control unit (3) and outputs it to the gate and source of the first power switch tube to the fourth power switch tube respectively.
6. The hysteresis current type soft switching grid-connected converter according to claim 1, characterized in that: The gain of the first proportional device (37) k 1 is twice the AC filter capacitor C f The capacitance value is divided by the inverter side filter inductance L A value of 1 l 1, that is ; The gain of the second proportional device (313) k 2 is a constant 2; the gain of the third proportional device (315) k 3 is the constant 0.
5.
7. The hysteresis current type soft switching grid-connected converter according to claim 1, characterized in that: The generation formula of the digital differentiator (34) is: 。 8. A method for suppressing harmonics in a hysteresis current type soft switching grid-connected converter, characterized in that: The hysteresis current type soft switching grid-connected converter according to any one of claims 1 to 7 comprises: Step S1: The bus voltage sampling unit samples the voltage of the first DC voltage-dividing capacitor and the voltage of the second DC voltage-dividing capacitor, the inductor current sampling unit samples the current of the inverter-side filter inductor, and the grid voltage sampling unit samples the voltage of the AC grid; Step S2, calculating the hysteresis current envelope compensation value; Step S3, generating the hysteresis band upper envelope and the hysteresis band lower envelope, and inputting them into the comparator subsystem together with the current of the inverter-side filter inductor; Step S4, the comparator subsystem obtains the modulation signal required for harmonic suppression through the first analog comparator and the second analog comparator and outputs the modulation signal to the modulator; Step S5, obtaining the first drive signal to the fourth drive signal in the modulator and sending them to the first power switch tube to the fourth power switch tube in the hysteresis current type soft switching grid-connected converter, ending this control cycle and waiting for the next control cycle.
Citation Information
Patent Citations
Hysteresis loop control method for three-level inverter
CN105391328A
Power grid voltage feed-forward compensation control circuit of soft switching grid-connected inverter
CN116488437A