A control method, device, DCDC control system and medium

Abstract

The present application discloses a control method, device, DCDC control system and medium, which relate to the automotive field and are used to provide a closed-loop control function of a DCDC converter. In view of the problems currently caused by the need for independent DSP chip implementation, a control method is provided. The GTM peripheral in the existing single-chip microcomputer in the car is used to realize the generation of two sets of PWM that meet the requirements through closed-loop calculation based on the drive signal fed back by the controlled object. It can be seen that this solution does not require additional DSP and other control chips, and the control function can be integrated into the single-chip microcomputer, which improves the integration of the automobile control system, reduces manufacturing costs and improves space utilization. In addition, the secondary side PWM calculation in this solution is implemented through the MCS in the GTM peripheral, and does not require the participation of the CPU, which can reduce the CPU usage.

Description

Technical Field

[0001] The present application relates to the automotive field, and in particular to a control method, a device, a DCDC control system and a medium. Background Art

[0002] In today's automotive DC-DC (DCDC) control systems, the DCDC converter is an essential actuator in the vehicle system. The DCDC converter needs to accurately process the input / output current and voltage signals, complete the closed loop and stable fault monitoring protection, and output the pulse width modulation (PWM) wave to achieve inversion and rectification.

[0003] At present, in order to realize the functions of the above-mentioned DCDC converter, especially to output two sets of PWM waves that meet the requirements on the primary side and the secondary side, independent digital signal processor (DSP) chips are often used for control and protection. Independent DSP chips will increase the number of main control chips, increase the complexity of the automobile system, and thus increase the debugging and manufacturing costs of the automobile.

[0004] Therefore, technicians in this field are in urgent need of a control method to solve the defects caused by the need to use an independent DSP chip to complete the DCDC control function in the traditional solution. Summary of the invention

[0005] The purpose of the present application is to provide a control method, device, DCDC control system and medium to solve the defects caused by the need to use an independent DSP chip to complete the DCDC control function in the traditional solution.

[0006] In order to solve the above technical problems, the present application provides a control method, which is applied to a general timer peripheral of a single-chip microcomputer, wherein the general timer peripheral includes: a central processing unit, a coprocessor and a timer output module; the method includes:

[0007] The central processor performs closed-loop calculation according to the driving signal to obtain the primary PWM parameter value and write it into the primary PWM register;

[0008] Determine, by the coprocessor, a secondary side PWM parameter value according to the secondary side mode pre-written in the shared memory and the primary side PWM parameter value in the primary side PWM register and write it into the secondary side PWM register;

[0009] The timer output module generates and outputs a corresponding primary PWM signal according to the primary PWM parameter value in the primary PWM register, and generates and outputs a corresponding secondary PWM signal according to the secondary PWM parameter value in the secondary PWM register.

[0010] In a possible embodiment, the general timer peripheral further includes: a sampling module, a timer input module and a dead time module;

[0011] The driving signal is acquired by the sampling module and forwarded to the central processing unit; and after the sampling module acquires the driving signal, the method further includes:

[0012] When the dead time module receives the abnormal service request forwarded by the timer input module, the primary side PWM signal and the secondary side PWM signal output by the timer output module are turned off;

[0013] Wherein, the abnormal service request is generated by the sampling module and output to the timer input module when the sampling value of the driving signal exceeds a preset calibration range.

[0014] In a possible embodiment, the method further includes:

[0015] Configuring a protection mode of the dead time module;

[0016] Wherein, the protection mode of the dead time module is one of a cycle-by-cycle protection mode and a single-trigger protection mode.

[0017] In a possible embodiment, the single chip microcomputer further includes: a signal merging module;

[0018] The signal merging module is arranged between the sampling module and the timer input module, and is used to merge the multiple abnormal service requests generated by the sampling module corresponding to each sampling channel into one timer input signal in a timing sequence and send it to the timer input module.

[0019] In a possible embodiment, the signal merging module is: an auxiliary general timer peripheral; the auxiliary general timer peripheral includes: an auxiliary coprocessor, an auxiliary timer input module and an auxiliary timer output module; wherein the auxiliary timer input module, the auxiliary coprocessor and the auxiliary timer output module are sequentially connected in series, and the timer input module is correspondingly connected to the sampling module;

[0020] The method further comprises:

[0021] cyclically monitoring, by the auxiliary coprocessor, whether each input of the auxiliary timer input module corresponding to the plurality of sampling channels receives the abnormal service request;

[0022] Whenever the abnormal service request is received, the auxiliary coprocessor triggers the auxiliary timer output module to output an abnormal service request signal.

[0023] In a possible embodiment, the method further includes:

[0024] Configuring each of the sampling channels as an OST channel or a CBC channel;

[0025] The abnormal service request signal is cleared by triggering a PWM edge signal; wherein the PWM edge signal is triggered by an edge of the primary PWM signal or the secondary PWM signal;

[0026] Then, whenever the abnormal service request is received, triggering the auxiliary timer output module to output an abnormal service request signal through the auxiliary coprocessor includes:

[0027] If the sampling channel corresponding to the input of the abnormal service request is the OST channel, controlling the auxiliary timer output module to continuously output the abnormal service request signal until the central processing unit intervenes;

[0028] If the sampling channel corresponding to the input of the abnormal service request is the CBC channel, the auxiliary timer output module is controlled to output an abnormal service request signal until the abnormal service request disappears, and the dead time module turns on the primary side PWM signal and the secondary side PWM signal output by the timer output module when the next PWM edge signal is received.

[0029] In a possible embodiment, the method further includes:

[0030] Outputting a calibration PWM signal having a timing interval of a preset time length with the primary PWM signal and the secondary PWM signal through the timer output module;

[0031] Conventional sampling is triggered by a rising edge matching event of the primary PWM signal and the secondary PWM signal, and calibration sampling is triggered by a rising edge of the calibration PWM signal.

[0032] In order to solve the above technical problems, the present application also provides a control device, which is applied to a general timer peripheral of a single-chip microcomputer, wherein the general timer peripheral comprises: a central processing unit, a coprocessor and a timer output module; the device comprises:

[0033] A sampling module, used for performing closed-loop calculation according to the driving signal through the central processor to obtain the primary PWM parameter value and write it into the primary PWM register;

[0034] A determination module, configured to determine a secondary side PWM parameter value and write it into the secondary side PWM register through the coprocessor according to the secondary side mode pre-written in the shared memory and the primary side PWM parameter value in the primary side PWM register;

[0035] A generating module is used to generate and output a corresponding primary PWM signal according to the primary PWM parameter value in the primary PWM register and to generate and output a corresponding secondary PWM signal according to the secondary PWM parameter value in the secondary PWM register through the timer output module.

[0036] To solve the above technical problems, the present application also provides a DCDC control system, including: a DCDC converter and a TriCore microcontroller;

[0037] Wherein, the DCDC converter includes a DCDC driver board and a feedback module, and the feedback module is used to feed back the voltage signal and current signal of the DCDC driver board as a driving signal to the TriCore microcontroller;

[0038] The TriCore single chip microcomputer is used to implement the steps of the control method described above.

[0039] In order to solve the above technical problems, the present application also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the control method described above are implemented.

[0040] The present application provides a control method, which utilizes the general timer (GTM) peripheral in the existing single-chip microcomputer in the car to realize the generation of primary side PWM and secondary side PWM that meet the requirements through closed-loop calculation based on the drive signal. The drive signal here can be the voltage and current signal obtained by sampling the DCDC driver board in the car DCDC converter, thereby replacing the independent DSP chip to achieve effective control of the DCDC converter. It can be seen that this scheme uses the GTM peripheral of the existing single-chip microcomputer in the car to simulate the specialized control function realized by the DSP chip, and does not need to set up additional DSP and other control chips. The control function can be integrated into the existing single-chip microcomputer, which improves the integration of the automobile control system, reduces manufacturing costs and improves space utilization. In addition, the secondary side PWM calculation in this scheme is realized by the coprocessor in the GTM peripheral, does not require the participation of the central processing unit (CPU), and can reduce the CPU usage.

[0041] The control device, DCDC control system and computer-readable storage medium provided in the present application correspond to the above method and have the same effects as above. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0043] Figure 1 An architecture diagram of a DCDC closed-loop control and driving peripheral device provided by the present invention;

[0044] Figure 2 A flow chart of a control method provided by the present invention;

[0045] Figure 3 A flow chart of another control method provided by the present invention;

[0046] Figure 4 An architecture diagram of a DCDC closed-loop control system provided by the present invention;

[0047] Figure 5 An architectural diagram of an overvoltage and overcurrent protection solution provided by the present invention;

[0048] Figure 6 A multi-channel protection signal input monitoring synchronization principle diagram provided by the present invention;

[0049] Figure 7 A DTM module output control logic block diagram provided by the present invention;

[0050] Figure 8 A timing principle diagram of an ADC sampling time calibration solution provided by the present invention;

[0051] Fig. 9 A structural diagram of a control device provided by the present invention. DETAILED DESCRIPTION

[0052] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0053] The core of this application is to provide a control method, device, DCDC control system and medium.

[0054] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0055] In the current automotive field, in order to achieve effective control of the DC-DC (DCDC) converter, it is necessary to sample the voltage, current and other physical signals of the DCDC driver board input / output, and obtain the corresponding primary pulse width modulation (PWM) signal and secondary PWM signal through closed-loop calculation to control the inversion and rectification of the DCDC driver board.

[0056] In the related art, the above functions are generally realized by an independent digital signal processor (DSP) chip. The additional DSP chip will increase the complexity of the automobile control system and increase the debugging and manufacturing costs of the automobile.

[0057] To solve the above problems, the present application provides a control method, which is applied to the general timer module (GTM) peripheral of a single-chip microcomputer, and specifically requires the use of the central processing unit (CPU), coprocessor (MCS) and timer output module (TOM) in the GTM peripheral. Therefore, any single-chip microcomputer containing CPU, MCS and TOM modules can be used as the single-chip microcomputer to which the method is applied, replacing the independent DSP chip to realize the closed-loop control function.

[0058] It should be noted that this embodiment only requires that the MCU to which this method is applied needs to include CPU, MCS and TOM modules, but does not limit the model and parameters of the MCU. For example, common MCUs that can meet the above requirements include MCUs based on TriCore (a processor core) architecture, or MCUs based on AURIX (a processor architecture) architecture. Specifically, the model of the MCU can be a TC2xx series MCU, or a MCU such as Figure 1 The TC3xx series of microcontrollers shown in the figure are used in the following embodiments. Figure 1 The method is described with the single chip microcomputer of the hardware architecture shown as the execution subject of the method. Figure 1 "CPU x" and "Core x" mean that there are x CPUs and cores in the microcontroller. Figure 1 The (A) TOM in the above method is the TOM module. Figure 2 As shown, including:

[0059] S11: The central processing unit performs closed-loop calculation according to the driving signal to obtain the primary PWM parameter value and write it into the primary PWM register.

[0060] S12: Determine the secondary side PWM parameter value and write it into the secondary side PWM register through the coprocessor according to the secondary side mode pre-written in the shared memory and the primary side PWM parameter value in the primary side PWM register.

[0061] S13: Generate and output a corresponding primary PWM signal according to the primary PWM parameter value in the primary PWM register, and generate and output a corresponding secondary PWM signal according to the secondary PWM parameter value in the secondary PWM register through a timer output module.

[0062] Specifically, for step S11, that is, the calculation part of the primary PWM signal. The driving signal in step S11 is the feedback signal of the driving module required by the control method for control. That is, when it is necessary to use the GTM peripheral of the single-chip microcomputer to replace a DSP chip for drive control, the feedback signal (driving signal of the controlled object) connected to the original DSP chip and used for closed-loop control is the driving signal in step S11 of the method. For example, in the above Figure 1 In a possible application scenario shown, the control object targeted by this method may be a DCDC converter in a car DCDC control system, and the drive signal may be a voltage signal and a current signal of a DCDC drive board in the sampled DCDC converter. In addition, the acquisition of the drive signal may be completed by a sampling device such as a sampling circuit, which is part of the original closed-loop control, namely the feedback sampling part, but does not belong to the control part that must be implemented by a DSP chip. Therefore, this solution does not impose additional restrictions on this, and the drive signal participating in the closed-loop calculation can be obtained through the original feedback sampling solution.

[0063] To further explain how the CPU obtains the drive signal, Figure 1 The example shown is used as an example for explanation. Figure 1In the example shown, the above-mentioned drive signal can specifically be a voltage signal and a current signal of a DCDC driver board in a car DCDC controller. In this application scenario, after the ADC in the GTM peripheral obtains the physical signals sampled from the voltage and current of the DCDC driver board, the digital signal converted from the physical signal is forwarded to the CPU through the bus, so that the CPU performs closed-loop calculations based on the voltage signal and the current signal to obtain the primary PWM parameters for generating the primary PWM signal that meets the DCDC drive control. The primary PWM parameters include: frequency, duty cycle, phase shift value and other parameters. The primary PWM parameters are written into the primary PWM register so that the TOM module of the GTM peripheral in the subsequent step S13 can read the primary PWM parameter values ​​in the primary PWM register and generate the corresponding primary PWM signal.

[0064] It should also be noted that, based on the fact that the closed-loop calculation needs to be based on the voltage signal and current signal obtained by the ADC, the closed-loop calculation process can be implemented in the ADC sampling interrupt of the CPU. At this time, the workflow of this method on the CPU side and the MCS side is as follows: Figure 3 shown.

[0065] For step S12, i.e. the calculation part of the secondary PWM signal, this part of the calculation is completed by the MCS in the GTM peripheral. The MCS reads the pre-written secondary mode in the shared memory, and reads the primary PWM parameter value calculated by the CPU in step S11 and written into the primary PWM register from the primary PWM register. Based on the secondary mode, the primary PWM parameter value is ANDed or ORed, so as to calculate the secondary PWM parameter and write it into the secondary PWM register. So that in the subsequent step S13, the TOM module of the GTM peripheral reads the secondary PWM parameter value in the secondary PWM register and generates the corresponding secondary PWM signal. Similar to the primary PWM parameters, the secondary PWM parameters also include: frequency, duty cycle, phase shift value and other parameters.

[0066] It should be noted that the focus of this method is to simulate the control functions that need to be completed by independent DSP chips in related technologies through the CPU, MCS and TOM modules in the existing single-chip GTM peripherals in the automobile control system. However, the closed-loop calculation of the primary PWM parameters and the AND or OR operation of the secondary PWM parameters have not been changed, and the original calculation scheme can still be used.

[0067] It should also be noted that, in addition to the secondary side mode, the secondary side configuration items pre-configured and written into the shared memory may also include other configuration items, such as advancing or delaying the switching time, etc. Such configuration items determine whether to write and what configuration items to write according to the actual secondary side PWM control requirements, and this embodiment does not limit this.

[0068] Finally, step S13 is the generation part of the primary PWM signal and the secondary PWM signal. Based on the primary PWM parameters and the secondary PWM parameters calculated in the above steps S11 and S12, the corresponding PWM signals are generated and output through the TOM module in the GTM peripheral. Figure 1 In an exemplary driving scenario shown, the TOM module outputs 6 PWM signals (1A, 1B, 2A, 2B, 3A, 3B).

[0069] It should also be noted that when this method is used to replace the DSP chip to realize the driving control of the DCDC converter in the automotive DCDC system, Figure 4 As shown, this method can be implemented by using the existing single-chip microcomputer in the car (such as the single-chip microcomputer of the TC3xx series, i.e. Figure 4 The GTM peripheral of the MCU TC3xx in the system replaces the independent DSP chip to complete the drive control function.

[0070] As can be seen from the above, this method uses the CPU in the single-chip GTM peripheral to complete the closed-loop calculation based on the sampled drive signal to obtain the primary PWM parameters, and the TOM module in the GTM peripheral generates a complementary primary PWM signal. The MCS in the GTM peripheral calculates the secondary PWM parameters based on the primary PWM parameters and the secondary mode, and the TOM module generates the corresponding secondary PWM signal. The implementation of this solution is equivalent to integrating the drive control function originally realized by an independent DSP chip into the single-chip microcomputer, thereby improving the integration of the control system and reducing debugging and production costs. In addition, in the calculation and generation process of the above-mentioned PWM signal, except for the calculation of the primary PWM parameters, no CPU participation is required, which can effectively reduce the CPU utilization rate and reduce the occupation of CPU resources.

[0071] On the other hand, various serious faults may occur in the actual operation of the drive control, such as overvoltage and overcurrent. If such serious faults are not protected in time, it is easy to damage key components such as MOS tubes (MOSFET, metal-oxide semiconductor field effect transistors) in the controlled object, resulting in damage to the controlled object and affecting the safety and performance of the entire vehicle. Therefore, this embodiment also provides an overvoltage and overcurrent protection solution, such as Figure 5 As shown, the GTM peripherals also include: a sampling module (Analog To Digital Converter, ADC), a timer input module (Timer Input Module, TIM) and a dead time module (Dead Time Module, DTM). It should be noted that the single-chip microcomputer based on the TriCore architecture or AURIX architecture illustrated in the above embodiment also meets the requirements of the GTM peripherals of this embodiment.

[0072] The driving signal is acquired by the sampling module and forwarded to the central processing unit. After the sampling module acquires the driving signal, the method further includes:

[0073] When the dead time module receives the abnormal service request forwarded by the timer input module, the primary side PWM signal and the secondary side PWM signal output by the timer output module are turned off.

[0074] The abnormal service request is generated by the sampling module when the sampling value of the driving signal exceeds the preset calibration range and output to the timer input module. It should be noted that if the driving signal contains multiple signals (such as Figure 1 , 4 In the corresponding application scenario, the driving signal includes the voltage signal and current signal of the DCDC driving board), and the preset calibration range should correspond to each driving signal one by one. And when any driving signal exceeds the corresponding calibration range, a corresponding abnormal service request can be generated.

[0075] In particular, when the overvoltage and overcurrent protection solution provided in this embodiment is applied to the DCDC drive control of an automobile, such as Figure 4 and Figure 5 As shown, the conversion of the sampled analog signal to a digital signal is completed through the ADC in the GTM peripheral, so that the CPU and other devices can process the voltage signal and the current signal. And the single chip microcomputer introduces the input comparison function after the ADC sampling. When the sampled value is within the normal range, there is no effect (the normal range of each ADC channel configuration can be calibrated by software, that is, the calibration range mentioned above), but when it exceeds the normal range, the ADC peripheral will generate an abnormal service request. The service request is connected to the TIM module of the GTM peripheral, and the TIM module forwards all abnormal service requests to the DTM module of the GTM peripheral. The DTM module is set between the TOM module and the DCDC driver board, and can control the PWM signal (i.e. the primary side PWM signal and the secondary side PWM signal) output by the TOM module to turn off the tube. It can be seen that the above-mentioned tube-off actions that trigger the overvoltage and overcurrent protection are all spontaneously realized by the GTM peripheral of the single chip microcomputer, and the hardware ns-level tube-off protection can be realized. This solution does not require CPU intervention, has fast response speed and high reliability.

[0076] In addition, Figure 4 As shown, the overvoltage and overcurrent protection functions can also be implemented in combination with corresponding or other hardware protection circuits outside the single-chip microcomputer. The corresponding hardware protection circuit can be selected based on different protection functions. This embodiment does not limit this. This embodiment focuses on the overvoltage and overcurrent protection functions implemented based on the single-chip microcomputer GTM peripherals.

[0077] On the other hand, Figure 5As shown in the figure, in the GTM peripherals of the MCU, a DTM module can only receive one TIM signal input at a time. However, in the actual drive control scenario, the overvoltage and overcurrent protection functions involve more than one protection signal (at least one overvoltage and one overcurrent respectively), and there is more than one sampling channel corresponding to the ADC input side. Therefore, the original GTM peripherals cannot meet the protection requirements of multiple protection signal inputs at the same time.

[0078] Based on this, this embodiment provides an implementation scheme that satisfies the simultaneous input and real-time monitoring of multiple protection signals: the above-mentioned single chip microcomputer also includes: a signal merging module.

[0079] Among them, the signal merging module is arranged between the sampling module and the timer input module, and is used to merge the multiple abnormal service requests generated by the sampling module corresponding to each sampling channel into one timer input signal (TIM signal) in a timing sequence and send it to the timer input module.

[0080] It should be noted that there are currently a variety of mature technical solutions for integrating multiple protection signals (such as square wave signals, which have a specific level when the protection is triggered) into one signal according to the timing sequence. This can be simply achieved through software running on a single-chip microcomputer, or by introducing hardware such as a signal merging chip, which is not limited in this embodiment.

[0081] However, the above-mentioned solution implemented by software will occupy CPU resources, and the solution implemented by hardware needs to introduce other hardware devices, which brings difficulties in implementation and increases in cost. Therefore, this embodiment also provides a further signal merging implementation scheme:

[0082] The signal merging module is an auxiliary general timer peripheral. The auxiliary general timer peripheral includes: an auxiliary coprocessor, an auxiliary timer input module and an auxiliary timer output module. The auxiliary timer input module, the auxiliary coprocessor and the auxiliary timer output module are connected in series in sequence, and the timer input module is connected to the sampling module accordingly.

[0083] The method further comprises:

[0084] S21: cyclically monitoring, through the auxiliary coprocessor, whether the inputs of the auxiliary timer input module corresponding to the plurality of sampling channels receive abnormal service requests.

[0085] S22: Whenever an abnormal service request is received, the auxiliary coprocessor triggers the auxiliary timer output module to output an abnormal service request signal.

[0086] It should be noted that the auxiliary GTM peripheral is another GTM peripheral introduced through software configuration, which assists the GTM peripheral (which may be called the main GTM peripheral) that previously implements steps S11 to S13 or the functions described in the above embodiments, and is therefore called an auxiliary GTM peripheral. There is no difference in hardware structure between the auxiliary GTM peripheral and the main GTM peripheral. This embodiment mainly uses the MCS (i.e., auxiliary MCS), TIM module (i.e., auxiliary TIM module) and TOM module (i.e., auxiliary TOM module) in the auxiliary GTM peripheral. The auxiliary GTM peripheral collaborates with the main GTM peripheral to implement the functions of one-way monitoring, one-way output and protection.

[0087] The specific topology and data flow are as follows: Figure 6 As shown: the auxiliary TIM module is connected to each physical signal (analog or digital) that needs to be configured with a protection function. Based on the above embodiment, it can be known that after obtaining the voltage signal and the current signal, the ADC can compare the sampling value with the pre-calibrated normal range to determine whether to trigger the protection signal. The protection signal triggered here can be used as the physical signal connected to the auxiliary TIM module. Then the auxiliary MCS software cyclically monitors the input changes of the auxiliary TIM module (for the overvoltage and overcurrent protection functions implemented in the previous embodiment, that is, the abnormal service request generated when the ADC compares the sampling value of a certain sampling channel that is not within the calibration range). If a change is detected, the auxiliary TOM module is triggered to output a signal synchronously to the TIM module of the main GTM peripheral. Based on this form, when any of the multiple channels at the front end of the auxiliary TIM module receives an abnormal service request, the back end correspondingly triggers the auxiliary TOM module to output a signal synchronously to the main GTM peripheral, so that multiple protection signals are aggregated into one TIM signal according to the timing sequence, which can be directly connected to the main DTM module for protection.

[0088] It is not difficult to see from the above that the signal merging solution provided in this embodiment does not require the use of a CPU, nor does it require the introduction of other hardware devices or circuits, and can still be implemented through the GTM peripherals of the single-chip microcomputer, greatly reducing the difficulty and cost of implementing the signal merging solution, and is conducive to the simultaneous input and real-time monitoring of multiple protection signals to realize protection capabilities.

[0089] Based on the signal merging solution provided in the above embodiment, the multi-channel protection signals on the ADC input side are integrated into one TIM signal and input into the TIM module to adapt to the characteristic that a DTM module can only receive one TIM signal input at the same time, so that the GTM peripheral of the single-chip microcomputer can meet the protection requirements of having multiple protection signal inputs at the same time.

[0090] On the other hand, when the overvoltage and overcurrent protection function provided in the above embodiment is triggered, the DTM module of the main GTM peripheral will control the PWM to turn off the tube, and its output control logic can be as follows: Figure 7 As shown:

[0091] The output signal CTRL2 of the DTM module controls the PWM state of the DTM module output. The output signal CTRL2 has two control sources: Figure 8 In addition, the output of CTRL2 can also be controlled by selecting the SHUT_OFF_SYNC signal. When SHUT_OFF_SYNC = 0, the DTM module normally outputs the PWM signal (that is, the primary PWM signal and the secondary PWM signal mentioned above). When SHUT_OFF_SYNC = 0, the output is turned off.

[0092] Based on the above output control logic, two commonly used DCDC protection modes can be realized based on the control of the SHUT_OFF_SYNC signal: cycle-by-cycle (CBC) protection mode and single-shot protection (OST) protection mode. Therefore, this embodiment provides a corresponding implementation scheme, and the above method also includes:

[0093] S3A: Configure the protection mode of the dead time module.

[0094] The protection mode of the dead time module is one of a cycle-by-cycle protection mode and a single-trigger protection mode.

[0095] Specifically, the cycle-by-cycle protection mode detects whether there is a protection signal input cycle by cycle. Once the protection is triggered, the PWM output level will be set to the preset level (i.e., the tube is turned off). Whenever the PWM counter (CNT) is 0, it will re-detect whether the protection signal is input. If it is no longer triggered, the protection state will be cleared and the PWM output will be restored. If it is triggered again, the protection state will continue.

[0096] In the single-trigger protection mode, once the protection is triggered, it cannot be automatically restored and will always be in the protection state until the OST bit in the trip flag register (TZFLG) is manually cleared.

[0097] From the above, it can be seen that the implementation scheme provided based on this embodiment can flexibly realize two protection modes of the overvoltage and overcurrent protection function of the DTM module. In practical applications, the appropriate protection mode can be selected as needed to provide overvoltage and overcurrent protection functions for the DCDC driver board.

[0098] However, it should be noted that, because the configuration options are mutually exclusive, the hardware of the above-mentioned single-chip GTM peripheral can only support one of the cycle-by-cycle protection mode and the single-trigger protection mode at the same time. Therefore, this embodiment also provides a further protection scheme, and the above-mentioned method also includes:

[0099] S3B1: Configure each sampling channel as an OST channel or a CBC channel.

[0100] S3B2: The abnormal service request signal is cleared by the PWM edge signal trigger.

[0101] The PWM edge signal is triggered by the edge of the primary PWM signal or the secondary PWM signal.

[0102] Then step S22 specifically includes:

[0103] S221: If the sampling channel corresponding to the input of the received abnormal service request is the OST channel, the auxiliary timer output module is controlled to continuously output the abnormal service request signal until the central processing unit intervenes.

[0104] S222: If the sampling channel corresponding to the input of the received abnormal service request is the CBC channel, the auxiliary timer output module is controlled to output the abnormal service request signal until the abnormal service request disappears, and the dead time module turns on the primary side PWM signal and the secondary side PWM signal output by the timer output module when receiving the next PWM edge signal.

[0105] As can be seen from the above, based on the solution provided in this embodiment, each sampling channel corresponding to the protection signal is configured as an OST channel or a CBC channel. When the protection signal that triggers the protection function corresponds to the CBC channel, the DTM module performs protection output based on the cycle-by-cycle protection mode. When the protection signal that triggers the protection function corresponds to the OST channel, the DTM module performs protection output based on the single-trigger protection mode. Both the cycle-by-cycle protection mode and the single-trigger protection mode can be supported at the same time.

[0106] On the other hand, this embodiment also provides a corresponding implementation scheme for the flexible configuration of the sampling time of the ADC, and the above method further includes:

[0107] S41: Outputting a calibration PWM signal whose timing interval with the primary PWM signal and the secondary PWM signal is a preset time length through a timer output module.

[0108] S42: triggering regular sampling through the rising edge matching event of the primary PWM signal and the secondary PWM signal, and triggering calibration sampling through the rising edge of the calibration PWM signal.

[0109] Specifically, the principle of the solution provided in this embodiment is as follows Figure 8As shown: This solution configures an additional synchronized calibration PWM signal (ADC Trig) while the TOM module outputs multiple PWM signals (PWM1, 2, A, B). The calibration sampling of the ADC is triggered by the rising edge matching event of the calibration PWM signal ADC Trig. That is, the original conventional sampling is triggered at time e1 by the rising edge matching event of the primary PWM signal and the secondary PWM signal. The new customizable calibration sampling is triggered at time e2 by the calibration PWM signal ADC Trig. The time difference of e2-e1 is the preset duration mentioned above, which can be modified by the calibration amount of the preset duration to achieve the triggering of ADC sampling at any time within the carrier cycle, thereby improving the flexibility of the above method.

[0110] In the above embodiment, a control method is described in detail, and the present application also provides an embodiment corresponding to a control device. It should be noted that the present application describes the embodiment of the device part from two perspectives, one is based on the functional module perspective, and the other is based on the hardware perspective.

[0111] From the perspective of functional modules, this embodiment provides a control device, which is also applied to a general timer peripheral of a single-chip microcomputer. The general timer peripheral includes: a central processing unit, a coprocessor and a timer output module. Fig. 9 As shown, the device comprises:

[0112] The sampling module 11 is used to perform closed-loop calculation according to the driving signal through the central processing unit to obtain the primary PWM parameter value and write it into the primary PWM register.

[0113] The determination module 12 is used to determine the secondary side PWM parameter value and write it into the secondary side PWM register through the coprocessor according to the secondary side mode pre-written in the shared memory and the primary side PWM parameter value in the primary side PWM register.

[0114] The generating module 13 is used to generate and output the corresponding primary PWM signal according to the primary PWM parameter value in the primary PWM register and to generate and output the corresponding secondary PWM signal according to the secondary PWM parameter value in the secondary PWM register through the timer output module.

[0115] Since the embodiments of the apparatus part correspond to the embodiments of the method part, please refer to the description of the embodiments of the method part for the embodiments of the apparatus part, which will not be repeated here.

[0116] On the other hand, this embodiment also provides an embodiment corresponding to a DCDC control system, which can be a DCDC control system used in a car. A DCDC control system provided in this embodiment includes: a DCDC converter and a TriCore single-chip microcomputer, which is the single-chip microcomputer based on the TriCore architecture mentioned in the above method embodiment.

[0117] The DCDC converter includes a DCDC driver board and a sampling circuit. The sampling circuit is used to sample the voltage signal and current signal of the DCDC driver board and feed them back to the TriCore microcontroller as a driving signal.

[0118] The TriCore single chip microcomputer is used to implement the steps of the control method described in any of the above embodiments.

[0119] Similar to the above, since the embodiments of the system part and the embodiments of the method part correspond to each other, the embodiments of the system part refer to the description of the embodiments of the method part, and will not be repeated here.

[0120] Finally, the present application also provides an embodiment corresponding to a computer-readable storage medium. The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps recorded in the above method embodiment are implemented.

[0121] It is understandable that if the method in the above embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program code.

[0122] The above is a detailed introduction to a control method, device, DCDC control system and medium provided by the present application. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the present application.

[0123] It should also be noted that, in this specification, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

Claims

1. A control method, characterized in that: A general timer peripheral applied to a single-chip microcomputer, the general timer peripheral comprising: a central processing unit, a coprocessor and a timer output module; the method comprises: The central processor performs closed-loop calculation according to the driving signal to obtain the primary PWM parameter value and write it into the primary PWM register; Determine, by the coprocessor, a secondary side PWM parameter value according to the secondary side mode pre-written in the shared memory and the primary side PWM parameter value in the primary side PWM register and write it into the secondary side PWM register; The timer output module generates and outputs a corresponding primary PWM signal according to the primary PWM parameter value in the primary PWM register, and generates and outputs a corresponding secondary PWM signal according to the secondary PWM parameter value in the secondary PWM register.

2. The control method according to claim 1, characterized in that: The general timer peripheral also includes: a sampling module, a timer input module and a dead time module; The driving signal is acquired by the sampling module and forwarded to the central processing unit; and after the sampling module acquires the driving signal, the method further includes: When the dead time module receives the abnormal service request forwarded by the timer input module, the primary side PWM signal and the secondary side PWM signal output by the timer output module are turned off; Wherein, the abnormal service request is generated by the sampling module and output to the timer input module when the sampling value of the driving signal exceeds a preset calibration range.

3. The control method according to claim 2, characterized in that: The method further comprises: Configuring a protection mode of the dead time module; Wherein, the protection mode of the dead time module is one of a cycle-by-cycle protection mode and a single-trigger protection mode.

4. The control method according to claim 2, characterized in that: The single chip microcomputer further comprises: a signal merging module; The signal merging module is arranged between the sampling module and the timer input module, and is used to merge the multiple abnormal service requests generated by the sampling module corresponding to each sampling channel into one timer input signal in a timing sequence and send it to the timer input module.

5. The control method according to claim 3, characterized in that: The signal merging module is: an auxiliary general timer peripheral; the auxiliary general timer peripheral includes: an auxiliary coprocessor, an auxiliary timer input module and an auxiliary timer output module; wherein the auxiliary timer input module, the auxiliary coprocessor and the auxiliary timer output module are sequentially connected in series, and the timer input module is correspondingly connected to the sampling module; The method further comprises: cyclically monitoring, by the auxiliary coprocessor, whether each input of the auxiliary timer input module corresponding to the plurality of sampling channels receives the abnormal service request; Whenever the abnormal service request is received, the auxiliary coprocessor triggers the auxiliary timer output module to output an abnormal service request signal.

6. The control method according to claim 5, characterized in that: The method further comprises: Configuring each of the sampling channels as an OST channel or a CBC channel; The abnormal service request signal is cleared by triggering a PWM edge signal; wherein the PWM edge signal is triggered by an edge of the primary PWM signal or the secondary PWM signal; Then, whenever the abnormal service request is received, triggering the auxiliary timer output module to output an abnormal service request signal through the auxiliary coprocessor includes: If the sampling channel corresponding to the input of the abnormal service request is the OST channel, controlling the auxiliary timer output module to continuously output the abnormal service request signal until the central processing unit intervenes; If the sampling channel corresponding to the input of the abnormal service request is the CBC channel, the auxiliary timer output module is controlled to output an abnormal service request signal until the abnormal service request disappears, and the dead time module turns on the primary side PWM signal and the secondary side PWM signal output by the timer output module when the next PWM edge signal is received.

7. The control method according to any one of claims 1 to 6, characterized in that: The method further comprises: Outputting a calibration PWM signal having a timing interval of a preset time length with the primary PWM signal and the secondary PWM signal through the timer output module; Conventional sampling is triggered by a rising edge matching event of the primary PWM signal and the secondary PWM signal, and calibration sampling is triggered by a rising edge of the calibration PWM signal.

8. A control device, characterized in that: A general timer peripheral applied to a single-chip microcomputer, the general timer peripheral comprising: a central processing unit, a coprocessor and a timer output module; the device comprises: A sampling module, used for performing closed-loop calculation according to the driving signal through the central processor to obtain the primary PWM parameter value and write it into the primary PWM register; A determination module, configured to determine a secondary side PWM parameter value and write it into the secondary side PWM register through the coprocessor according to the secondary side mode pre-written in the shared memory and the primary side PWM parameter value in the primary side PWM register; A generating module is used to generate and output a corresponding primary PWM signal according to the primary PWM parameter value in the primary PWM register and to generate and output a corresponding secondary PWM signal according to the secondary PWM parameter value in the secondary PWM register through the timer output module.

9. A DCDC control system, characterized in that: include: DCDC converter and TriCore microcontroller; Wherein, the DCDC converter includes a DCDC driver board and a feedback module, and the feedback module is used to feed back the voltage signal and current signal of the DCDC driver board as a driving signal to the TriCore microcontroller; The TriCore microcontroller is used to implement the steps of the control method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the control method according to any one of claims 1 to 7 are implemented.

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