Discrete magnitude acquisition adaptive circuit
By designing a discrete amount acquisition adaptive circuit including a signal conditioning circuit, a 555 timer circuit, a power supply circuit, a signal isolation circuit and a processor module, the problem of the inability to achieve universality and high hardware cost in the prior art is solved, and compatible acquisition and resource saving for 28V/on, ground/on input signals are achieved.
Patent Information
- Application Number
- CN202411932967.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-04-08
AI Technical Summary
The existing discrete amount acquisition circuit cannot achieve universality when compatible with 28V/on and ground/on input signals, resulting in difficulty in reusing products between different aircraft, high hardware costs and large resource utilization.
A discrete amount acquisition adaptive circuit including a signal conditioning circuit, a 555 timer circuit, a power supply circuit, a signal isolation circuit and a processor module are designed. The square wave signal is output through signal conditioning and a 555 timer. The processor module identifies the frequency and duty cycle of the square wave signal to judge the input signal characteristics.
It realizes compatible acquisition of 28V/on and ground/on input signals, saves IO pin resources, reduces hardware costs, improves resource utilization, and improves product versatility.
Smart Images
Figure CN119788053A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure generally relates to the technical field of aviation airborne electronic equipment, and in particular to a discrete quantity acquisition adaptive circuit. Background Art
[0002] Discrete input signals are a type of signal commonly used in avionics systems, mainly including 28V / open discrete input interfaces, ground / open discrete input interfaces, and 28V / ground discrete input interfaces. According to signal characteristics, the input signals can be summarized into three types of input signals, namely 28V input signals, 28V ground input signals, and open circuit signals.
[0003] Commonly used discrete quantity acquisition circuits are composed of photocouplers or comparators. For the 28V / open discrete quantity acquisition circuit, when the input signal is 28V, it is recognized that the 28V state is valid, otherwise it is in the open state; for the ground / open discrete quantity acquisition circuit, when the input signal is 28VGND, it is recognized that the ground state is valid, otherwise it is in the open state; the 28V / ground discrete quantity acquisition circuit can use any of the above circuits, but the acquisition state needs to be formulated in advance. The 28V / open discrete quantity acquisition circuit and the ground / open discrete quantity acquisition circuit are implemented using different dedicated circuits, which are functionally independent, and there is no clear boundary value for the 28V valid, ground valid or floating state when using optocouplers. When the product needs to be reused on different aircraft, different aircraft have different requirements for the number of ground / open input interfaces and 28V / open input interfaces, resulting in the inability to reuse the product. The type and number of interfaces need to be redesigned, and the product has poor versatility and a long design cycle, which is not conducive to the universal design of the product.
[0004] Another acquisition circuit is composed of analog-to-digital conversion chips and other circuits, which can adaptively acquire 28V input signals and 28VGND signals while taking into account a clear dividing line. However, the hardware cost of the AD acquisition circuit is high, and the data transmission generally uses the SPI bus, which requires additional system communication resources. In addition, the processor needs to perform real-time calculations on a large amount of analog data, consuming a large amount of processor resources. Summary of the invention
[0005] In view of the above defects or deficiencies in the prior art, it is desirable to provide a discrete quantity acquisition adaptive circuit to solve the above problems.
[0006] The present application provides a discrete quantity acquisition adaptive circuit, comprising: A signal conditioning circuit, wherein the signal conditioning circuit is used to perform voltage division or pull-up processing on an external input signal; A 555 timer circuit, wherein the 555 timer circuit is used to convert the voltage output by the signal conditioning circuit into a square wave signal with different frequencies and different duty cycles; A power supply circuit, the power supply circuit is used to supply power to the signal conditioning circuit and the 555 timer circuit; A signal isolation circuit, wherein the signal isolation module is used to isolate and convert the voltage of the square wave signal output by the 555 timer; A processor module is used to identify the period and duty cycle of the square wave signal output by the signal isolation circuit to determine the signal characteristics of the input signal.
[0007] According to the technical solution provided in the embodiment of the present application, the signal conditioning circuit includes a first resistor, a second resistor, a first diode and a second diode; the cathode of the first diode is used to input an external input signal, the anode of the first diode is connected to one end of the first resistor, the other end of the first resistor is connected to one end of the second resistor, and is electrically connected to the 555 timer circuit; the other end of the second resistor is electrically connected to the cathode of the second diode, and the anode of the second diode is electrically connected to a +15V power supply.
[0008] According to the technical solution provided in the embodiment of the present application, the 555 timer circuit includes a third resistor, a fourth resistor, a first capacitor, a second capacitor and a 555 timer; the third resistor is electrically connected to the fourth resistor and the Dis pin of the 555 timer, and the fourth resistor is electrically connected to the first capacitor and the Thres pin and Trig pin of the 555 timer; the other end of the first capacitor is grounded.
[0009] According to the technical solution provided in the embodiment of the present application, the power supply circuit includes a third capacitor, a fourth capacitor and a power module; the third capacitor is electrically connected to the processor module and the ground, and is electrically connected between the input positive pole and the input negative pole of the power module; the output negative pole of the power module is electrically connected to the bottom line of the input signal, and the output positive pole of the power module is electrically connected to the 555 timer; the fourth capacitor is electrically connected between the output positive pole and the output negative pole of the power module.
[0010] According to the technical solution provided in the embodiment of the present application, the signal isolation circuit includes a fifth resistor, a sixth resistor and a photoelectric coupler; one end of the fifth resistor is connected to a +15V power supply, and the other end is electrically connected to the positive input of the photoelectric coupler; the negative input of the photoelectric coupler is electrically connected to the Out pin of the 555 timer, the positive output of the photoelectric coupler is electrically connected to the sixth resistor and the processor module, and the negative output of the photoelectric coupler is grounded; the other end of the sixth resistor is electrically connected to the processor module.
[0011] According to the technical solution provided in the embodiment of the present application, the processor module includes one of an MCU, a DSP or an FPGA, and the processor module calculates the input voltage value and performs input state judgment based on the square wave signal frequency / period and duty cycle of the IO pin.
[0012] Compared with the prior art, the beneficial effects of the present application are as follows: the discrete quantity acquisition adaptive circuit provided by the present application can be compatible with the acquisition requirements of 28V input signals, ground input signals and open-circuit signals at the same time, and only one processor IO pin is used, which saves IO pin resources, can greatly reduce hardware costs, greatly reduce hardware resource expenditures, and improve hardware resource utilization; for products with multiplexing requirements, there is no need to repeatedly design acquisition circuits, thereby improving versatility; the input state is determined by the PWM wave frequency generated by the acquisition timer, which can avoid erroneous acquisition problems caused by interference such as glitches, and has the advantage of a simple circuit; the voltage value of the discrete quantity input signal can be calculated through the square wave frequency. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings: Figure 1 This is a schematic diagram of the structure of the discrete quantity acquisition adaptive circuit provided in this application. DETAILED DESCRIPTION
[0014] The present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It is also necessary to explain that, for ease of description, only the parts related to the invention are shown in the accompanying drawings.
[0015] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0016] Please refer to Figure 1 , the present application provides a discrete quantity acquisition adaptive circuit, comprising: A signal conditioning circuit, wherein the signal conditioning circuit is used to perform voltage division or pull-up processing on an external input signal; A 555 timer circuit, wherein the 555 timer circuit is used to convert the voltage output by the signal conditioning circuit into a square wave signal with different frequencies and different duty cycles; A power supply circuit, the power supply circuit is used to supply power to the signal conditioning circuit and the 555 timer circuit; A signal isolation circuit, wherein the signal isolation module is used to isolate and convert the voltage of the square wave signal output by the 555 timer; A processor module is used to identify the period and duty cycle of the square wave signal output by the signal isolation circuit to determine the signal characteristics of the input signal.
[0017] Furthermore, the signal conditioning circuit includes a first resistor, a second resistor, a first diode and a second diode; the cathode of the first diode is used to input an external input signal, the anode of the first diode is connected to one end of the first resistor, the other end of the first resistor is connected to one end of the second resistor, and is electrically connected to the 555 timer circuit; the other end of the second resistor is electrically connected to the cathode of the second diode, and the anode of the second diode is electrically connected to a +15V power supply.
[0018] Specifically, Figure 1 As shown, the first resistor and the second resistor are respectively a voltage-dividing resistor R1 and a voltage-dividing resistor R2, the first diode is a voltage-regulating diode V1, and the second diode is a diode V2; the cathode of the voltage-regulating diode V1 is electrically connected to the external input signal, the external input signal is input by the cathode of the voltage-regulating diode V1, and the anode of the voltage-regulating diode V1 is connected to one end of the voltage-dividing resistor R1, which is used to realize the isolation of the ground / open discrete quantity signal and the internal acquisition circuit, and at the same time, the 28V / open signal can be normally conducted; the other end of the voltage-dividing resistor R1 is electrically connected to one end of the voltage-dividing resistor R2 and the 555 timer circuit respectively, and the other end of the voltage-dividing resistor R2 is electrically connected to the cathode of the diode V2; the anode of the diode V2 is electrically connected to the +15V power supply, which is used to prevent the power supply circuit from being fed back when the external input is 28V; the diode V2 and the resistor R2 are used to provide a pull-up level for the signal.
[0019] Furthermore, the 555 timer circuit includes a third resistor, a fourth resistor, a first capacitor, a second capacitor and a 555 timer; the third resistor is electrically connected to the fourth resistor and the Dis pin of the 555 timer, and the fourth resistor is electrically connected to the first capacitor and the Thres pin and Trig pin of the 555 timer; the other end of the first capacitor is grounded.
[0020] Specifically, Figure 1 As shown, the third resistor is resistor R3, the fourth resistor is resistor R4, the first capacitor is capacitor C1, the second capacitor is capacitor C2, and the 555 timer is Figure 1Module N1 in; one end of the resistor R3 is electrically connected to the voltage-dividing resistor R1 and the voltage-dividing resistor R2, and the other end is respectively connected to one end of the resistor R4 and the Dis pin of the 555 timer; the other end of the resistor R4 is respectively connected to one end of the first capacitor C1, the Thres pin and the Trig pin of the 555 timer; the other end of the capacitor C1 is connected to the ground; the resistor R3, the resistor R4, the capacitor C1 and the 555 timer form a charging and discharging circuit; the power pin and the ground pin of the 555 timer are respectively electrically connected to the +15V power supply and 28VGND, and the Reset pin of the 555 timer is electrically connected to the +15V power supply.
[0021] Furthermore, the power supply circuit includes a third capacitor, a fourth capacitor and a power module; the third capacitor is electrically connected to the processor module and the ground, and is electrically connected between the input positive pole and the input negative pole of the power module; the output negative pole of the power module is electrically connected to the bottom line of the input signal, and the output positive pole of the power module is electrically connected to the 555 timer; the fourth capacitor is electrically connected between the output positive pole and the output negative pole of the power module.
[0022] Specifically, Figure 1 As shown, the third capacitor is capacitor C3, the fourth capacitor is capacitor C4, and the power module is Figure 1 module N2 in; one end of the capacitor C3 is electrically connected to the working power supply Vsig of the processor module, and is also electrically connected to the input positive electrode of the power module N2, the other end of the capacitor C3 is grounded, and is also electrically connected to the output negative electrode of the power module N2; the power module N2 is an isolated power module, the output negative electrode of the power module N2 is electrically connected to the ground wire 28VGND of the input signal, ensuring that the acquisition circuit and the input signal have the same voltage reference, the output positive electrode +15V of the power module N2 is electrically connected to the 555 timer for providing power; the capacitor C4 is connected between the output positive electrode and the output negative electrode of the power module N2 for providing filtering.
[0023] Furthermore, the signal isolation circuit includes a fifth resistor, a sixth resistor and a photocoupler; one end of the fifth resistor is connected to a +15V power supply, and the other end is electrically connected to the positive input of the photocoupler; the negative input of the photocoupler is electrically connected to the Out pin of the 555 timer, the positive output of the photocoupler is electrically connected to the sixth resistor and the processor module, and the negative output of the photocoupler is grounded; the other end of the sixth resistor is electrically connected to the processor module.
[0024] Specifically, Figure 1 As shown, the fifth resistor is resistor R5, the sixth resistor is resistor R6, and the photoelectric coupler is Figure 1module B1 in; one end of the resistor R5 is electrically connected to the +15V power supply, and the other end is electrically connected to the positive input of the photocoupler B1; the negative input of the photocoupler B1 is connected to the Out pin of the 555 timer N1, the positive output of the photocoupler B1 is electrically connected to one end of the resistor R6 and the IO pin of the processor module, and the negative output of the photocoupler B1 is electrically connected to the signal ground; the other end of the resistor R6 is electrically connected to the working power supply Vsig of the processor module.
[0025] Specifically, the photocoupler B1 can also be replaced by a digital isolator. The input voltage of the digital isolator is generally not greater than 5V. It can be used when the power supply circuit outputs 5V. No example is given here.
[0026] Furthermore, the processor module includes one of an MCU, a DSP and an FPGA, and the processor module calculates the input voltage value and performs input state judgment according to the square wave signal frequency / period and duty cycle of the IO pin.
[0027] Specifically, Figure 1 As shown, the processor module includes but is not limited to MCU, DSP or FPGA. In this embodiment, MCU is used as an example. The processor calculates the input voltage value and performs input state judgment according to the square wave signal frequency / period and duty cycle of the IO pin. For the IO pins in the MCU module and the DSP module, the pins with square wave capture function are preferably selected to reduce the processor resource overhead.
[0028] In this embodiment, select For +15V power supply, when When it is suspended, the charging voltage of the 555 timer is the pull-up voltage minus the voltage drop of diode V2, 0.7V. Therefore, the charging and discharging formula is: Formula (I) Formula (II) Formula (III) According to the above formula, the processor module can judge the three input states according to the following logic: The frequency of acquisition is When the input discrete quantity is judged to be in the "open circuit" state; the collected frequency is greater than , then the input discrete quantity is determined to be a "28V" signal; the collected frequency is less than , then the input discrete quantity is judged to be a "ground" signal.
[0029] Furthermore, to determine the input voltage value, the frequency value corresponding to different input voltages can be calculated according to the following formula: The frequency of acquisition is greater than hour, , is the stable voltage value of the voltage-stabilizing diode V1. The charging and discharging formulas of the 555 timer are as follows: Formula (IV) and Formula (V) respectively; Formula (IV) Formula (V) The frequency of the square wave is given by the following formula (6); Formula (VI) The frequency of acquisition is less than hour, , the charging and discharging formulas of 555 timer are as follows: Formula (VII) and Formula (VIII); Formula (VII) Formula (8) The frequency of the square wave is given by the following formula (9); Formula (IX) Furthermore, for When the input signal is ground, that is, the input is 0V, in order to ensure that the 555 timer can output a square wave signal, the resistance values of the voltage divider resistors R1 and R2 should satisfy the following relationship: .
[0030] Therefore, the present invention converts 28V input discrete quantity, ground input discrete quantity and open state into different voltage values through signal conditioning circuit, and converts different input voltages into square wave signals of different frequencies using 555 timer. The processor module uses the frequency value in the open state as the dividing line to simultaneously identify the three states of "28V", "ground" and "open", so that the same circuit can be compatible with the acquisition requirements of 28V / open and ground / open, and can calculate and judge the voltage value of the input state.
[0031] The above description is only a preferred embodiment of the present application and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the invention involved in the present application is not limited to the technical solution formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the inventive concept. For example, the above features are replaced with (but not limited to) technical features with similar functions disclosed in the present application.
Claims
1. A discrete quantity acquisition adaptive circuit, characterized in that: include: A signal conditioning circuit, wherein the signal conditioning circuit is used to perform voltage division or pull-up processing on an external input signal; A 555 timer circuit, wherein the 555 timer circuit is used to convert the voltage output by the signal conditioning circuit into a square wave signal with different frequencies and different duty cycles; A power supply circuit, the power supply circuit is used to supply power to the signal conditioning circuit and the 555 timer circuit; A signal isolation circuit, wherein the signal isolation module is used to isolate and convert the voltage of the square wave signal output by the 555 timer; A processor module is used to identify the period and duty cycle of the square wave signal output by the signal isolation circuit to determine the signal characteristics of the input signal.
2. The discrete quantity acquisition adaptive circuit according to claim 1, characterized in that: The signal conditioning circuit includes a first resistor, a second resistor, a first diode and a second diode; the cathode of the first diode is used to input an external input signal, the anode of the first diode is connected to one end of the first resistor, the other end of the first resistor is connected to one end of the second resistor, and is electrically connected to the 555 timer circuit; the other end of the second resistor is electrically connected to the cathode of the second diode, and the anode of the second diode is electrically connected to a +15V power supply.
3. The discrete quantity acquisition adaptive circuit according to claim 2, characterized in that: The 555 timer circuit includes a third resistor, a fourth resistor, a first capacitor, a second capacitor and a 555 timer; the third resistor is electrically connected to the fourth resistor and the Dis pin of the 555 timer, the fourth resistor is electrically connected to the first capacitor and the Thres pin and Trig pin of the 555 timer; the other end of the first capacitor is grounded.
4. The discrete quantity acquisition adaptive circuit according to claim 3, characterized in that: The power supply circuit includes a third capacitor, a fourth capacitor and a power module; the third capacitor is electrically connected to the processor module and the ground, and is electrically connected between the input positive pole and the input negative pole of the power module; the output negative pole of the power module is electrically connected to the bottom line of the input signal, and the output positive pole of the power module is electrically connected to the 555 timer; the fourth capacitor is electrically connected between the output positive pole and the output negative pole of the power module.
5. The discrete quantity acquisition adaptive circuit according to claim 4, characterized in that: The signal isolation circuit includes a fifth resistor, a sixth resistor and a photoelectric coupler; one end of the fifth resistor is connected to a +15V power supply, and the other end is electrically connected to the positive input of the photoelectric coupler; the negative input of the photoelectric coupler is electrically connected to the Out pin of the 555 timer, the positive output of the photoelectric coupler is electrically connected to the sixth resistor and the processor module, and the negative output of the photoelectric coupler is grounded; the other end of the sixth resistor is electrically connected to the processor module.
6. The discrete quantity acquisition adaptive circuit according to claim 5, characterized in that: The processor module includes one of an MCU, a DSP or an FPGA. The processor module calculates the input voltage value and performs input state judgment according to the square wave signal frequency / period and duty cycle of the IO pin.