Compact RF front-end module and packaging method

Abstract

The invention relates to a compact RF front-end module and a packaging method. A front end module in a compact printed circuit board (PCB) package. The module includes a PCB including a top surface, the top surface including a first portion. The module also includes a power amplifier block disposed on the PCB, the power amplifier block including a power amplifier and an output matching network (OMN) transformer. The power amplifier is coupled to the first portion of the top surface. The OMN transformer is positioned vertically below the power amplifier at a first level in the PCB below the top surface. The module is provided in a compact package with the power amplifier block in the first portion and other functional blocks including filter blocks, switch blocks, control blocks, and low noise amplifier blocks, and disposed on a remaining area of the PCB outside the first portion.

Description

Technical Field

[0001] The present technology relates to compact module packaging and packaging methods. Background Art

[0002] The demand for more compact module packaging continues to increase. For example, to achieve a smaller size of the final system product, smaller form factors of various functional blocks or dies are always desired. The present invention introduces a method to significantly reduce the size of a radio frequency front end module (RF FEM).

[0003] In a typical existing RF FEM, multiple functional blocks are included, such as multi-band power amplifiers (PAs), film bulk acoustic resonator (FBAR) duplexers and multiplexers, silicon on insulator (SOI) multimode low noise amplifiers (LNAs), antenna switches, couplers, and mobile industry processor interface (MIPI) controllers. All of these blocks are designed to support various carrier aggregations (CAs) for both frequency division duplex (FDD) and time division duplex (TDD) bands. Efforts have been made to optimize the size of each block, reaching a limit beyond which any further reduction may result in performance degradation. Advanced packaging methods such as system in package (SIP) and system on package (SOP) have facilitated module size minimization. However, due to the requirements of PA and its output matching network (OMN) for high output power and linearity, reducing the area of ​​PA and its output matching network (OMN) has proven to be a challenging task. Therefore, improved methods of packaging PA and associated OMN are desired to reduce the size of compact RF FEMs. Summary of the invention

[0004] On the one hand, the present disclosure relates to an integrated circuit device, comprising: a substrate, comprising a top surface, the top surface comprising a first portion, a second portion at least partially surrounding a periphery of the first portion, and a remaining portion outside the first portion and the second portion, the substrate comprising at least two windings of a conductive trace positioned at a level below the second portion; a first circuit disposed on the first portion, the first circuit comprising at least an amplifier; a second circuit comprising a transformer based on two windings of the conductive trace, the transformer being coupled to the amplifier; and a third circuit disposed on the remaining portion of the substrate.

[0005] On the other hand, the present disclosure relates to an integrated circuit device, comprising: a substrate, comprising a top surface, the top surface comprising a first portion, a second portion, a third portion and a fourth portion, the second portion at least partially surrounding a periphery of the first portion, the fourth portion at least partially surrounding a periphery of the third portion, the second portion being adjacent to the fourth portion, the substrate comprising a first pair of windings of a conductive trace positioned at a first level below the fourth portion and a second pair of windings of a conductive trace positioned at a second level below the second portion; a first amplifier coupled to the first portion; a second amplifier coupled to the third portion; a first transformer based on the first pair of windings and coupled to the first amplifier; and a second transformer based on the second pair of windings and coupled to the second amplifier.

[0006] In another aspect, the present disclosure relates to a method for processing an integrated circuit device, the method comprising: providing a substrate comprising a top surface and a thickness, the top surface comprising at least a first portion and a second portion, the second portion being adjacent to the first portion; laying out a first winding of a conductive trace and a second winding of a conductive trace at a first level below the second portion of the top surface in the substrate, the first winding of the conductive trace overlapping the second winding of the conductive trace; laying out a third winding of a conductive trace and a fourth winding of a conductive trace at a second level below the first portion of the top surface in the substrate, the third winding of the conductive trace overlapping the second winding of the conductive trace; a fourth winding of the trace overlapping; forming a plurality of first contact pads on the first portion of the top surface, the plurality of first contact pads including at least a first pair of output pads coupled to the first winding; forming a plurality of second contact pads on the second portion of the top surface, the plurality of second contact pads including at least a second pair of output pads coupled to the third winding; placing a first amplifier on the first portion of the top surface, the first pair of output pads coupled to a first differential output from the first amplifier; and placing a second amplifier on the second portion of the top surface, the second pair of output pads coupled to a second differential output from the second amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] A further understanding of the nature and advantages of particular embodiments may be achieved by reference to the remainder of the specification and drawings, in which like reference numerals are used to refer to similar components. In some instances, a sub-label is associated with a reference numeral to indicate one of multiple similar components. When a reference numeral is made without specifying an existing sub-label, it is intended to refer to all such multiple similar components.

[0008] Figure 1Schematic diagrams of (A) a power amplifier (PA) module with associated output matching network (OMN), (B) differential to single transformer based OMN, and (C) a layout example of differential to single transformer.

[0009] Figure 2 It is a schematic diagram of a conventional power amplifier (PA) and printed circuit board (PCB) transformer allocation in the PCB of a front-end module.

[0010] Figure 3 It is a schematic diagram of the distribution of power amplifier (PA) and output matching network (OMN) transformer in the front-end module PCB according to an embodiment of the present technology.

[0011] Figure 4 are schematic top views of an RF FEM module with two PAs and two OMNs in (A) a conventional PCB package and (B) a compact PCB package according to embodiments of the present technology.

[0012] Figure 5 2 is a schematic diagram of (A) two PAs and two OMNs in a compact PCB package according to an embodiment of the present technology and (B) a top view of the layout of contact pads for windings of the two PAs and two OMN transformers.

[0013] Figure 6 is a cross-sectional view of two PAs and two OMNs in a compact FEM PCB package according to an embodiment of the present technology.

[0014] Figure 7 are cross-sectional views of (A) one PA and one OMN and (B) two PAs and two OMNs in a compact FEM PCB package according to some embodiments of the present technology. DETAILED DESCRIPTION

[0015] The present technology relates to compact module packaging and packaging methods. In a specific embodiment, a front-end module in a compact printed circuit board (PCB) package is provided. The module includes a power amplifier block disposed on the PCB, which includes a power amplifier and an output matching network (OMN) transformer. The power amplifier is coupled to a first portion of the PCB. The OMN transformer is vertically positioned below the power amplifier in the PCB. The compact package also includes other functional blocks disposed on the remaining area outside the first portion of the PCB, including a filter block, a switch block, a control block, and a low noise amplifier block. Other embodiments also exist.

[0016] For most commercial power amplifiers, a differential structure is usually used to improve efficiency while producing higher output power. When a differential structure is used, an output matching network (OMN) based on differential to single transformer is required. Figure 1Schematic diagrams of (A) a power amplifier (PA) module with associated output matching network (OMN), (B) an OMN based on differential to single transformer, and (C) a layout example of differential to single transformer. Figure 1 In part (A), the PA block includes a differential PA 110 having a pair of output ports 111 and 112 to provide a differential voltage output. The PA block also includes an OMN 120 coupled to the pair of output ports 111 and 112 to receive the differential voltage output and convert it to a single voltage output at output port 121. Figure 1 Part (B) shows an example of OMN 120, which is a differential-to-single transformer having a first (primary) winding 1201 and a second (secondary) winding 1202. The two terminals of the first winding 1201 are coupled to a pair of output ports 111 and 112 of (PA 110), respectively. Terminal 121 of the two terminals of the second winding 1202 is used as a single output terminal, and the other of the two terminals is grounded. Depending on the ratio (e.g., 1:n) of the number of windings (number of turns) of the first winding 1201 and the second winding 1202, the voltage transformation ratio of the OMN transformer 120 will also change.

[0017] For the purpose of making a compact module, one approach is to integrate the OMN 120 on the bare die of the PA 110, but the packaging structure will produce higher losses of the OMN. In order to achieve wider bandwidth and lower insertion loss of the OMN, transformers designed with printed circuit boards (PCBs) are widely used. Unlike traditional transformers, PCB transformers are made of two windings of conductive traces built as part of the PCB itself. The PCB substrate is usually made of a dielectric material such as FR4, which is a common material used in standard PCBs. Depending on the design and isolation requirements, the windings are formed by laying out conductive traces on the same layer or different layers of the multilayer PCB. One of the windings acts as a primary winding, which is connected to the input voltage. The second winding acts as a secondary winding, where the transformed voltage is taken out. For optimal transformer operation, the primary and secondary windings should be tightly coupled. If the traces are on the same layer, they can be laid out in a spiral or other configuration to ensure close proximity and good coupling. If on different layers, they can be stacked on each other, with through holes connecting the traces (if necessary). Using multiple layers also helps to achieve more turns in a limited space. Figure 1Part (C) gives a specific example of the layout of the OMN PCB transformer 120. In this example, the first and second windings are formed as two bundles of conductive traces 1201 and 1202 laid in a circular geometry from one terminal to the other. For example, the conductive traces 1201 and 1202 can be laid in a PCB. The two bundles can overlap at the same area of ​​the PCB, but have different depths in the PCB so that the two bundles are electrically coupled to each other. In view of the position of its terminals, one bundle of conductive traces 1201 can be laid in an opposite direction to the other bundle of conductive traces 1202. For example, the two terminals of the first winding 1201 are located at the left side to couple with the two output ports 111 and 112 of the power amplifier 110, and the two terminals of the second winding 1202 are located at the right side, with one terminal 121 producing a single output as the other terminal is grounded.

[0018] However, if Figure 1 As shown in (C), the PCB transformer itself occupies a certain amount of PCB space, which may be equivalent to the size of the power amplifier module. In particular, for some commercial radio frequency front-end modules (RF FEMs) in wireless communication systems, multiple PA blocks are used to cover various frequency bands, and each PA requires its own OMN. This leads to the huge size of the existing FEM module package with PCB transformer. Figure 22 is a schematic diagram of a conventional power amplifier (PA) 210 and PCB transformer allocation in a PCB 200 of a front end module (FEM). As shown in the cross-sectional view, the power amplifier (PA) module 210 associated with the front end module is mounted on a designated portion of the top surface of the PCB 200 via a plurality of surface contacts 212. Under the PA module 210, an area 202 in the PCB 200 corresponding to the direct vertical projection from the PA 210 is allocated to construct all ground (GND), input / output (IO) and control lines for controlling and operating the PA, and allowing the PA to communicate with other functional blocks also mounted on the FEM. An output matching network (OMN) transformer 220 required for the PA configured to handle differential signals is formed adjacent to the PA 210. Specifically, as shown in the cross-sectional view, the OMN transformer 220 is positioned in the top surface of the PCB 200 and has a lateral dimension similar to that of the PA 210. The OMN transformer 220 is coupled to the PA 210 via an interconnect 221 and at least one surface contact 212 positioned in the PCB 200. In theory, there is a way to integrate the OMN on the PA module, but this would result in higher losses for the OMN, which is a huge trade-off to achieve a reduction in package size. Although as seen in the top view, the OMN transformer 220 is mainly configured as a closed loop in a circular or rectangular shape, leaving an empty space (i.e., an unused PCB portion) within the loop containing the area below it. If this empty space can be used appropriately, a relatively compact PA block package can be achieved.

[0019] The following description is presented to enable one of ordinary skill in the art to make and use the invention and to incorporate it into the context of a particular application. Various modifications and uses in different applications will be apparent to those skilled in the art, and the general principles defined herein can be applied to a wide range of embodiments. Therefore, the present technology is not intended to be limited to the embodiments presented, but should be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0020] In the following detailed description, many specific details are set forth in order to provide a more thorough understanding of the present technology. However, it will be apparent to those skilled in the art that the present technology can be practiced without being limited to these specific details. In other examples, well-known structures and devices are shown in block diagram form rather than in detail to avoid obscuring the present technology.

[0021] The reader's attention is directed to all papers and documents filed simultaneously with this specification and disclosed for public inspection together with this specification, and the contents of all such papers and documents are incorporated herein by reference. Unless otherwise expressly stated, all features disclosed in this specification (including any attached claims, abstracts and drawings) can be replaced by alternative features for the same, equivalent or similar purposes. Therefore, unless otherwise expressly stated, each feature disclosed is only an example of a general series of equivalent or similar features.

[0022] Furthermore, any element in a claim that does not explicitly recite a “means” for performing a specified function or a “step” for performing a specific function should not be construed as a “means” or “step” clause as specified in 35 U.S.C. § 112, paragraph 6. In particular, the “step” or “action” used in the claims herein is not intended to invoke the provisions of 35 U.S.C. § 112, paragraph 6.

[0023] In the detailed description below, "printed circuit board" or PCB refers to a non-conductive substrate used as a physical platform for arranging electronic components, and provides a means for electrically interconnecting these components in a systematic and organized manner. PCBs are typically made of materials (such as fiberglass, composite epoxy resins, or other similar materials) that carry conductive tracks or traces etched from copper sheets laminated to their surfaces. These traces form the "wiring" and connections between different electronic components. Components (such as transistors, resistors, capacitors, inductors, connectors, and integrated circuits (ICs) made from these components) are mounted on the PCB and interconnected through these conductive traces according to the circuit design. Components can be attached to the PCB using various methods (such as through-hole technology (components are inserted into holes) or surface mounting technology (components are placed directly on top of the PCB via contact pads)). PCBs can be single-layer (one conductive layer), double-layer (two conductive layers, one conductive layer on each side of the substrate) or multi-layer (more than two layers to accommodate complex circuit systems, where conductive paths or "through holes" pass through the layers). In addition to serving as a stable and organized platform for electronic components, PCBs provide physical support, promote electromagnetic compatibility (EMC) through careful routing and shielding, assist in heat dissipation, and improve the reliability and durability of the final electronic product.

[0024] When an element is referred to herein as being "connected" or "coupled" to another element, it is understood that the element may be directly connected to the other element, or have an intervening element between the elements. Conversely, when an element is referred to as being "directly connected" or "directly coupled" to another element, it is understood that there are no intervening elements in the "direct" connection between the elements. However, the presence of a direct connection does not exclude other connections in which there may be intervening elements.

[0025] When an element is referred to herein as being "disposed" in some manner relative to another element (e.g., disposed on, disposed between, disposed below, disposed adjacent to, or disposed in some other relative manner), it is understood that the element may be disposed directly relative to another element (e.g., disposed directly on another element) or have intervening elements present between the elements. Conversely, when an element is referred to as being "directly disposed" relative to another element, it is understood that there are no intervening elements in the "direct" instance. However, the presence of a direct placement does not exclude other instances in which there may be intervening elements.

[0026] Similarly, when an element is referred to herein as being "joined" to another element, it is understood that the element may be directly joined to the other element (without any intervening elements), or have an intervening element present between the joined elements. Conversely, when an element is referred to as being "directly joined" to another element, it is understood that there are no intervening elements in the "direct" joining between the elements. However, the presence of direct joining does not exclude other forms of joining in which intervening elements may be present.

[0027] Likewise, when an element is referred to herein as a "layer," it is understood that the layer may be a single layer or may include multiple layers. For example, a conductive layer may include multiple different conductive materials or multiple layers of different conductive materials, and a dielectric layer may include multiple dielectric materials or multiple layers of dielectric materials. When a layer is described as being coupled or connected to another layer, it is understood that the coupled or connected layer may include an intermediary element that exists between the coupled or connected layers. Conversely, when a layer is referred to as being "directly" connected or coupled to another layer, it is understood that there are no intermediary elements between the layers. However, the presence of a directly coupled or connected layer does not exclude other connections in which an intermediary element may exist.

[0028] In addition, the terms left, right, front, back, top, bottom, forward, reverse, clockwise and counterclockwise are used for explanation purposes only and are not limited to any fixed direction or orientation. Instead, they are only used to indicate the relative position and / or direction between the various parts of an object and / or component.

[0029] In addition, for ease of description, the methods and processes described herein may be described in a particular order. However, it should be understood that unless the context indicates otherwise, intermediary processes may occur before and / or after any portion of the described processes, and various other processes may be reordered, added, and / or omitted according to various embodiments.

[0030] Unless otherwise indicated, all numbers used herein to express quantities, dimensions, etc. should be understood to be modified by the term "about" in all instances. In this application, unless otherwise expressly stated, the use of the singular includes the plural, and the use of the terms "and" and "or" means "and / or" unless otherwise indicated. In addition, the use of the terms "including" and "having" and other forms (such as includes, included, has, have and had) should be considered non-exclusive. In addition, terms such as "element" or "component" cover both elements and components comprising one unit and elements and components comprising more than one unit, unless otherwise expressly stated.

[0031] As used herein, the phrase "at least one" preceding a series of items using the terms "and" or "or" to separate any of the items modifies the list as a whole, rather than each member of the list (i.e., each item). The phrase "at least one" does not require selection of at least one of each item listed; rather, the phrase allows for a meaning that includes at least one of any of the items, and / or at least one of any combination of the items. For example, the phrase "at least one of A, B, and C" or "at least one of A, B, or C" each refers to only A, only B, or only C; and / or any combination of A, B, and C. In examples where selection of "at least one of each of A, B, and C," or alternatively "at least one of A, at least one of B, and at least one of C," is intended, it is explicitly described as such.

[0032] One general aspect includes an integrated circuit device in a compact package. The integrated circuit device includes a substrate including a top surface. The substrate may be a printed circuit board (PCB). The top surface includes a first portion, a second portion at least partially surrounding the periphery of the first portion, and a remainder outside the first portion and the second portion. The substrate includes at least two windings of a conductive trace positioned at a level below the second portion. The integrated circuit device also includes a first circuit disposed on the first portion, the first circuit including at least an amplifier. The integrated circuit device further includes a second circuit including a transformer based on the two windings of the conductive trace, the transformer coupled to the amplifier. The integrated circuit device may include a third circuit disposed on the remainder of the substrate. The third circuit may include filters, switches, controls and interfaces, and a low noise amplifier.

[0033] The implementation may include one or more of the following features. The first portion includes a plurality of contact pads coupled to an amplifier, the plurality of contact pads including at least one pair of output pads, an input pad, a plurality of ground pads, and a plurality of control pads. The integrated circuit device in which the transformer is based on two windings includes a first winding and a second winding, the first winding including a first pair of terminals coupled to a pair of output pads to receive a differential voltage output from the amplifier, and the second winding including a ground terminal and an output terminal configured to provide a single voltage output. The first circuit includes a power amplifier duplexer, which is coupled to a second circuit and a third circuit to separate a transmission signal based on a single voltage output from the transformer and a reception signal based on an output from the third circuit. The first winding and the second winding overlap each other. The level below the second portion varies between zero and the thickness of the substrate. The substrate may include a ground plane positioned between the first portion of the top surface and the two windings of the conductive trace. In an embodiment, the amplifier module is a power amplifier. The transformer is an output matching network transformer based on a PCB. The integrated circuit device may be a radio frequency front end module (RF FEM) for wireless mobile communications. The integrated circuit device may be adopted in handheld devices in 5G and above (e.g., 6G) systems that require a compact module form factor.

[0034] Another general aspect includes an integrated circuit device in a compact package for a wireless communication system. The integrated circuit device includes a substrate including a top surface including a first portion, a second portion, a third portion, and a fourth portion. The second portion at least partially surrounds a perimeter of the first portion. The fourth portion at least partially surrounds a perimeter of the third portion. The second portion is adjacent to the fourth portion. The substrate may include a first pair of windings of a conductive trace positioned at a first level below the fourth portion and a second pair of windings of a conductive trace positioned at a second level below the second portion. The integrated circuit also includes a first amplifier coupled to the first portion. The integrated circuit device may include a second amplifier coupled to the third portion. The integrated circuit device also includes a first transformer based on the first pair of windings, and the first transformer is coupled to the first amplifier. The integrated circuit also includes a second transformer based on the second pair of windings, and the second transformer is coupled to the second amplifier.

[0035] Implementations may include one or more of the following features. An integrated circuit device, wherein a first portion includes at least a first pair of output pads configured to be coupled to a first amplifier. A first transformer based on the first pair of windings includes a first winding and a second winding. The first winding overlaps with the second winding. The first winding includes a first pair of terminals configured to be coupled to the first pair of output pads to receive a first differential voltage output from the first amplifier, and the second winding includes a first ground terminal and a first output terminal configured to provide a first single voltage output. A third portion includes at least a second pair of output pads configured to be coupled to a second amplifier. A second transformer based on the second pair of windings includes a third winding and a fourth winding. The third winding overlaps with the fourth winding. The third winding includes a second pair of terminals configured to be coupled to the second pair of output pads to receive a second differential voltage output from the second amplifier. The fourth winding includes a second ground terminal and a second output terminal configured to provide a second single voltage output. A first level below the second portion varies between zero and the thickness of the substrate. The substrate may include a first ground plane vertically positioned between the top surface and the first transformer, the first ground plane extending laterally across both the third portion and the fourth portion. The second level below the fourth portion varies between zero and the thickness of the substrate. The substrate includes a second ground plane positioned vertically between the top surface and the second transformer, the second ground plane extending laterally across both the first portion and the second portion. The first amplifier and the second amplifier are power amplifiers associated with front-end modules for two different radio frequency bands of a wireless communication system, respectively.

[0036] Yet another general aspect includes a method for processing an integrated circuit device. The method also includes providing a substrate including a top surface and a thickness, the top surface including at least a first portion and a second portion, the second portion being adjacent to the first portion. The method also includes laying out a first winding of a conductive trace and a second winding of a conductive trace at a first level in the substrate below the second portion of the top surface, the first winding of the conductive trace overlapping the second winding of the conductive trace. The method may include laying out a third winding of a conductive trace and a fourth winding of a conductive trace at a second level in the substrate below the first portion of the top surface, the third winding of the conductive trace overlapping the fourth winding of the conductive trace. The method also includes forming a plurality of first contact pads on the first portion of the top surface, the plurality of first contact pads including at least a first pair of output pads coupled to the first winding. The method also includes forming a plurality of second contact pads on the second portion of the top surface, the plurality of second contact pads including at least a second pair of output pads coupled to the third winding. The method further includes positioning a first amplifier on the first portion of the top surface, the first pair of output pads coupled to a first differential output from the first amplifier. The method further includes disposing a second amplifier on a second portion of the top surface, the second pair of output pads coupled to a second differential output from the second amplifier. The method also includes disposing other functional blocks on a remaining portion of the top surface other than the first portion and the second portion, the other functional blocks may include a filter block, a switch block, a control and interface block, and a low noise amplifier block.

[0037] Embodiments may include one or more of the following features. The method may include forming a first transformer based on a first winding of a conductive trace in an at least partially annular shape carrying a perimeter of the second portion and a second winding of the conductive trace. The first winding includes a first pair of input terminals coupled to a first pair of output pads on the first portion. The method also includes forming a second transformer based on a third winding and a fourth winding in an at least partially annular shape carrying a perimeter of the first portion, wherein the third winding includes a second pair of input terminals coupled to a second pair of output pads on the second portion. The method may also include forming a first ground plane positioned between a second portion of the top surface and a first level in the substrate and a second ground plane positioned between the first portion of the top surface and a second level in the substrate, the first level and the second level being at most equal to the thickness. Embodiments of the present technology are illustrated by the examples shown below.

[0038] Figure 33 is a schematic diagram of a power amplifier (PA) and output matching network (OMN) transformer allocation in a front-end module PCB according to an embodiment of the present technology. This diagram is only an example, which should not unduly limit the scope of the claims. A person of ordinary skill in the art will recognize many variations, substitutions, and modifications. In an embodiment, the packaging of the power amplifier PA 310 and the associated OMN 320 on the front-end module PCB 300 is arranged to provide a ratio of Figure 2 A more compact front-end module than the conventional one shown in FIG.

[0039] exist Figure 3 In the cross-sectional view of FIG. 3 , the PCB 300 is provided with an OMN 320 which is laid flush with the top surface 301 and is located below the PA 310. The PA 310 is disposed on the top surface 301 of the PCB 300. With this position, a portion 300′ of the PCB 300 which is required to accommodate the OMN transformer in a conventional manner can be eliminated, resulting in a direct reduction in the package size of the front-end module.

[0040] exist Figure 3 , which further illustrates that in an embodiment, OMN 320 is provided as a PCB transformer, which is configured to have a geometric shape of a ring shape with a central opening. The ring shape has a size to carry the periphery of the PA module so that the central free space of the PCB can be used to install the PA module. When the PCB transformer 320 is positioned in the top surface of the PCB or at a level below the top surface, the central space refers to a portion of the top surface of the PCB 300. Figure 3 The top view shows that the PA 310 is mounted on a portion of the top surface of the PCB 300. The entire area 302 below the portion of the top surface of the PCB 300 can be fully used to form all the GND, I / O and control lines of the PA 310 to couple with other functional blocks associated with the PCB including the OMN 320. The two output ports 311 of the PA 310 can be coupled to the OMN transformer 320 positioned in or below the top surface via two wires or conductive traces 321. Therefore, the proposed package that places the PA in the central free space of the PCB transformer effectively utilizes the PCB area to achieve a reduction in package size. Advantages also include that for the same differential power amplifier design, no additional materials or changes in the OMN design are required, which may result in higher losses in the output matching network.

[0041] Figure 4Schematic top view of an RF FEM module with two PAs and two OMNs in (A) a conventional PCB package and (B) a compact PCB package according to an embodiment of the present technology. This figure is only an example and should not unduly limit the scope of the claims. A person of ordinary skill in the art will recognize many variations, substitutions and modifications. In an embodiment of the present technology, an integrated circuit device is provided. As an example, the integrated circuit device is a radio frequency (RF) front end module (FEM), which combines various RF functional blocks into a compact module on a printed circuit board (PCB). RF FEMs are commonly used in wireless communication systems such as mobile devices, IoT devices, Wi-Fi routers, and other wireless transceiver applications. RF FEMs serve as an interface between antennas and transceivers, providing basic RF signal conditioning and processing. RF FEMs typically include at least a power amplifier block having a power amplifier (PA) and an associated output matching network (OMN). The PA is configured to enhance the signal strength of the transmitted RF signal and provide the necessary power amplification to ensure that the transmitted signal can reach the desired range. OMNs are used to ensure impedance matching between the RF FEM and the antenna or transmission line. These networks help maximize power transfer and minimize reflections between the FEM and external components. In some modules, two or more PAs are required to cover the differential frequency band. In many modules, the PAs are often configured in a differential structure to improve efficiency while generating higher output power. When a differential structure is used, it is required to be differentiated to a single transformer OMN.

[0042] Other functional blocks are needed in the RF FEM. For example, a low noise amplifier (LNA) block is frequently integrated into the RF FEM to amplify weak incoming signals from the antenna before further processing. The LNA enhances the sensitivity and reception capabilities of the system by amplifying low-level signals with minimal additional noise. The filter block includes various filters to ensure appropriate frequency selectivity and suppress unwanted signals. These filters may include bandpass filters, notch filters, or even duplexers to separate transmission and reception signals in a full-duplex system. The switch block includes various RF switches for controlling signal routing between different components or antenna ports. These switches enable seamless switching between transmission and reception modes, frequency bands, or antenna configurations. The RF FEM may incorporate at least a control and interface block with a specific circuit system to facilitate communication and control between the FEM and the overall system. This circuit system may include a digital interface, control logic, and voltage regulation components.

[0043] Figure 4Part (A) shows a schematic block diagram of a radio frequency front end module (RF FEM) 40, which includes two differential power amplifiers PA1 and PA2 and two associated output matching networks OMN1 and OMN2 in a conventional package on a PCB 400. For example, each OMN is a transformer pre-built in a PCB by laying two windings of conductive traces in a non-conductive substrate. The RF FEM 40 uses two power amplifiers to handle different frequency bands. Optionally, one PA is in an on state and the other PA is in an off state. Optionally, both PAs are in an on mode. By design, the PA1 module occupies a portion 401 of the top surface area of ​​the PCB 400. The PA2 module occupies a portion 402 of the top surface area. Correspondingly, the output matching network OMN1 occupies a portion 403 of a similar size adjacent to the PCB where the PA1 module is mounted on OMN1 and coupled to the portion 401 of OMN1. Another OMN2 occupies a portion 403 of the PCB adjacent to the portion 402 of OMN2 where the PA2 module is mounted on OMN2 and coupled to.

[0044] In addition, the RF FEM 40, which is a common interface module between the antenna and the transceiver to provide RF signal conditioning and processing for the wireless communication system, also includes a plurality of other functional blocks, such as filter blocks, switch blocks, control and interface blocks, and low noise amplifier (LNA) blocks. All other functional blocks are placed on the remaining portion 409 of the top surface of the PCB 400. Each of the other functional blocks can be individually packaged with advanced packaging methods, such as system in package (SIP) and system on package (SOP) to make a corresponding optimized size. Due to its integration with two PAs and two OMNs on the PCB 400, the FEM module size limit is reached, so that module performance degradation will be a trade-off to further reduce the size of each functional block.

[0045] Figure 4 Part (B) shows a schematic block diagram of an RF FEM 41 having two amplifier blocks (i.e., a pair of PAs and associated OMNs) in a compact PCB 410 package according to an embodiment of the present technology. As shown, each PA-OMN pair is packaged in a compact form such that it occupies only a portion 411 or 412 of the top surface of the PCB 410. This is achieved by placing the two PAs directly on a portion of the PCB under which the corresponding OMN or another OMN has been pre-laid.

[0046] In one option, PA1 is placed on portion 411 of the top surface of PCB 410, wherein OMN2 associated with PA2 is laid in the body area below portion 411, and PA2 is placed on portion 412 of the top surface of PCB 410, wherein OMN1 associated with PA1 is laid in the body area below portion 412. If the two amplifiers are alternately in an on / off state, this option not only effectively utilizes the surface area and body space of PCB 410, but also reduces the electromagnetic coupling between OMN and PA because the OMN is not directly below its associated PA.

[0047] In another option, if both amplifiers are in the on state at the same time, then PA1 can be placed directly above its associated OMN1, and PA2 can be placed directly above OMN2. In this option, electromagnetic coupling between the PA and its own OMN can be a concern because each OMN has a ring shape that carries the periphery of the PA. However, OMN1 and OMN2 can be laid at a certain level below the top surface in PCB 410, respectively, because the increased distance between the PA and its associated OMN will reduce electromagnetic coupling. When both amplifiers are in the on state at the same time, two options, 1) OMN1 below PA1 and OMN2 below PA2; 2) OMN1 below PA2 and OMN2 below PA1 are possible. In this case, increasing the distance between the PA and its OMN can reduce electromagnetic coupling. Alternatively, inserting a ground plane between the PA and the OMN can provide a definite reduction in electromagnetic coupling.

[0048] In some embodiments, Figure 4 As seen in section (B), the other functional blocks of the FEM 41 (including at least a filter block, a switch block, a control and interface block, and a low noise amplifier (LNA) block) can be packaged outside of the two portions 411 and 412 of the two power amplifier blocks on the remaining portion 419 of the top surface of the PCB 410. Although each of the other functional blocks is optimally packaged in its own right, as shown in FIG. Figure 4 Those in part (A), but the overall package size of the RF FEM 41 is reduced compared to the conventional package size of the RF FEM 40.

[0049] In another embodiment, the RF FEM may include a duplexer configured to utilize one or more filters in the filter block and one or more switches in the switch block to separate a transmit signal and a receive signal, and direct the transmit signal and the receive signal to appropriate paths, the transmit signal being based on one of a first single voltage output and a second single voltage output, and the receive signal being based on an output from a low noise amplifier block. In some embodiments, the duplexer is included in a power amplifier block for use as a power amplifier duplexer (PAD) in some FEM modules. For wireless mobile communications, RF PADs have been adopted in handheld devices. 5G and above systems (e.g., 6G) will require smaller form factors of RF FEMs. For various wireless communication applications, PADs require multiple PA blocks to cover various signal frequency bands. When there is an even number of PAs (e.g., two PAs), use Figure 4 The proposed packaging method shown in part (B) and the following Figure 5 The more details in the can more easily solve the coupling problem between the PA and its OMN. At the same time, the proposed packaging method also leads to a reduced module size.

[0050] Figure 5 1 is a schematic diagram of (A) two PAs and two OMNs in a compact PCB package according to an embodiment of the present technology and (B) a top view of the layout of contact pads for the windings of the two PA and two OMN transformers. This figure is only an example, which should not unduly limit the scope of the claims. Those of ordinary skill in the art will recognize many variations, substitutions, and modifications. Figure 5 Part (A) shows an example of a compact package of two PAs (511 and 512) and two OMNs (521 and 522) in a FEM or simple PAD module. Each OMN (e.g., 521) is laid directly in a printed circuit board (PCB) below another PA (512) instead of its own PA (511). In fact, OMN 522 is below PA 511. PA 511 is placed adjacent to PA 512. In an alternative view of this configuration, each OMN (e.g., 521) is configured to have a ring-shaped geometry that carries the periphery of another PA (512) so that the center portion of the ring shape of the PCB can be used to support the PA (512).

[0051] In an embodiment, Figure 5As shown in part (B), each OMN is provided as a PCB transformer having a primary winding of conductive traces and a secondary winding of conductive traces formed at a certain level below the top surface. The level may be zero, i.e., the same level as the top surface. The level in the body of the PCB may be deeper. The level may be at most the thickness of the PCB (or the same level as the bottom surface). The first transformer corresponding to OMN 521 includes a first (primary) winding 5211 of a wire or conductive trace inside the PCB and a second (secondary) winding 5212 of a conductive wire or trace in the PCB. Both the primary and secondary windings overlap each other geometrically. The second transformer corresponding to OMN 522 includes a third winding 5221 and a fourth winding 5222 laid out in the PCB in a similar configuration. The first transformer is disposed in a first OMN region 5210 of the PCB. The second transformer is disposed in a second OMN region 5220 adjacent to the first OMN region 5210. The primary (first) winding 5211 of the first transformer has a first pair of input terminals 5218 configured to be coupled to a first differential voltage output from the first PA 511, which should be disposed in the first PA region 5110 within the central portion of the second OMN region 5220. The secondary (second) winding 5212 of the first transformer has a ground terminal and a first output terminal 5219 configured to provide a first single voltage output. The primary (third) winding 5221 of the second transformer has a second pair of input terminals 5228 configured to be coupled to a second differential voltage output from the second PA 512, which should be disposed in the second PA region 5120 within the central portion of the first OMN region 5210. The secondary (fourth) winding 5222 of the second transformer has a ground terminal and a second output terminal 5229 configured to provide a second single voltage output.

[0052] In a specific embodiment, each winding in each transformer is configured as a coil loop, wherein the outer perimeter is located at the boundary of the allocated OMN area (e.g., 5210) and the inner perimeter is located at the boundary of the allocated PA area (e.g., 5120). The first PA area 5110 is a portion of the top surface of the PCB on which the first PA 511 can be placed. Various contact pads including at least a first pair of output pads 5119, a first input pad 5111, a plurality of first control pads 5114, and a plurality of first ground (GDN) pads 5113 are formed on the portion of the top surface of the PCB within the first PA area 5110 for coupling with the (first) PA module to be placed. The first pair of output pads 5119 are configured to couple to the first pair of input terminals 5218 of the primary (first) winding 5211 of the first transformer. The second PA area 5120 is a portion of the top surface of the PCB on which the second PA can be placed. Various contact pads including at least a second pair of output pads 5129, a second input pad 5121, a plurality of second control pads 5124, and a plurality of second ground (GDN) pads 5123 are formed on the portion of the top surface of the PCB within the second PA area 5120 for coupling with the (second) PA module to be placed. The second pair of output pads 5129 are configured to be coupled to the second pair of input terminals 5228 of the primary (third) winding 5221 of the second transformer.

[0053] Figure 4 The compact packaging configuration and corresponding PA-OMN layout described in FIG. 1 can be extended to FEM or PAD modules with any even number of PA blocks. Each pair of PA blocks can be connected to Figure 4 The layout proposed according to the present technology not only leads to a compact module size but also maintains low electromagnetic coupling because each OMN transformer is not directly under its own PA, but at its side, for a FEM or PAD in an operating mode where two PAs are used simultaneously. The electromagnetic coupling can be reduced by increasing the distance between the OMN and the PA. This can be achieved by positioning the windings of the conductive traces of the OMN to the bottom surface of the PCB. Optionally, a ground plane can be laid between the top surface of the OMN and the windings in the PCB.

[0054] Figure 6 is a cross-sectional view of two PAs and two OMNs in a compact FEM PCB package according to an embodiment of the present technology. This figure is merely an example, which should not unduly limit the scope of the claims. A person of ordinary skill in the art will recognize many variations, substitutions, and modifications. Figure 6 yes Figure 5611 and the second PA 612 are placed on the top surface 601 of the FEM PCB 600 using a flip chip packaging method. The FEM PCB 600 is a single printed circuit board designed to mount all functional blocks of the front-end module. Various contact pads including at least ground (GND), input / output, and control line pads are formed under the corresponding PA module (bare die). The first OMN 621 is associated with the first PA 611. It includes a conductive trace bundle laid in the FEM PCB 600, wherein the relative position is below the second PA 612. The second OMN 622 is associated with the second PA 612. It includes a conductive trace bundle laid in the FEM PCB 600, wherein the relative position is below the first PA 611. In addition, the body area 602 of the PCB 600 located below the portion of the top surface 601 below the first PA 611 (optionally through the entire thickness of the PCB) is used to construct all GND, IO, and control lines for coupling the corresponding PA 611 to the system. Similarly, the body area 603 of the PCB 600 located below the portion of the top surface 601 below the second PA 612 is used to construct all GND, IO, and control lines for coupling the corresponding PA 612 to the system.

[0055] Figure 7 1 is a cross-sectional view of (A) one PA and one OMN and (B) two PAs and two OMNs in a compact FEM PCB package according to some embodiments of the present technology. This figure is only an example, which should not unduly limit the scope of the claims. A person of ordinary skill in the art will recognize many variations, substitutions, and modifications. Figure 7 Part (A) shows that in a compact FEM PCB package, OMN 720 (windings of conductive traces) are pre-laid out at a level L below the top surface 701 supporting an associated power amplifier (PA) 710 in the FEM PCB. PA 710 is mounted on the top surface 701 via a plurality of contact pads formed in the top surface 701. The plurality of contact pads include at least a ground pad 715 and an output pad 714 coupled to the OMN 720 via an interconnect 706. Figure 3 , this package has an increased distance between OMN 720 and PA 710, such that electromagnetic interference coupling therebetween can be reduced or eliminated. Level L can be equal to zero, i.e., OMN 720 is practically flush with top surface 701. Level L can be equal to H, i.e., the thickness of FEM PCB 700, e.g., OMN 720 is laid down to be flush with bottom surface 702 of FEM PCB 70. Figure 7The schematic diagram (part A) in FIG. 7 is not to scale with the actual size of OMN 720. In general, level L is geometrically allowed to vary between zero and the thickness of PCB 700. In an alternative embodiment, a ground plane 705 may be inserted between PA 710 and OMN 720 to provide electromagnetic shielding. Optionally, ground plane 705 may be a bundle of metal wires or a mesh of conductive traces with ground connections. Ground plane 705 may be a metallized plane formed in PCB 700 and coupled to ground pad 715.

[0056] Figure 7 Part (B) further shows a compact FEM PCB package with two PAs and two associated OMNs. A first PA 711 is mounted on the top surface 703 of a PCB 770 via a plurality of contact pads including at least a ground pad 725 and an output pad 724. A second PA 712 is also mounted on the top surface 703 adjacent to the first PA 711 via a plurality of contact pads including at least a ground pad 727 and an output pad 726. A first OMN 721 associated with the first PA 711 may be laid at a first level L1 below the top surface 703 below the second PA 712 in the PCB 770. A second OMN 722 associated with the second PA 712 may be laid at a second level L2 below the top surface 703 below the first PA 711 in the PCB 770. The first level L1 may be selected from 0 to the thickness H of the PCB 770. Similarly, the second level L2 may be any value between 0 and H. L2 may not be equal to L1. Optionally, two OMNs are laid out in a position flush with the bottom surface 704 of the PCB 770 to have a maximum distance H between the PA and the associated OMN.

[0057] The first OMN 721 is coupled to the output pad 724 of the first PA 711 via an interconnect 708 (wire or conductive trace) formed inside the PCB 770. The second OMN 722 is coupled to the output pad 726 of the second PA 712 via an interconnect 709 (wire or conductive trace) formed inside the PCB 770. In an embodiment, increasing the values ​​of L1 and L2 helps to reduce the electromagnetic coupling between the power amplifier and its output matching network.

[0058] In another embodiment, the first ground plane G1 can be disposed between the first portion of the top surface 703 under the first PA 711 and the second OMN 722 to serve as an electromagnetic shield. The first ground plane G1 is coupled to the ground pad 725 in the first portion of the top surface 703 under the first PA 711. The second ground can also be disposed between the second portion of the top surface 703 under the second PA 912 and the first OMN 721 to serve as an electromagnetic shield. The second ground plane G2 is coupled to the ground pad 727 in the second portion of the top surface 703 under the second PA 712. These electromagnetic shields can substantially reduce the coupling between each PA and its associated OMN. Even if the OMN is disposed directly under its own PA and the two PAs are operated simultaneously, these electromagnetic shields can ensure that there is no coupling effect between the PA and the OMN in any operating frequency band of the RF FEM compact module.

[0059] In another embodiment, the present technology provides a method for processing an integrated circuit device. The method includes providing a printed circuit board (PCB) including a top surface and a thickness, the top surface including at least a first portion and a second portion, the second portion being adjacent to the first portion. The PCB is processed to lay out various types of conductive traces for control lines, ground connections, input / output lines, etc. The method may include laying out a first winding of the conductive trace and a second winding of the conductive trace at a first level below the second portion of the top surface in the PCB. In particular, the first winding of the conductive trace overlaps the second winding of the conductive trace. In an embodiment, the process of laying out the first winding and the second winding includes making them in a ring shape, carrying the perimeter of the second portion defined on the top surface of the PCB. The first winding of the conductive trace includes a first pair of input terminals. The second winding of the conductive trace may include a first ground terminal and a first output terminal.

[0060] In addition, the method of processing an integrated circuit device includes laying out a third winding of a conductive trace and a fourth winding of a conductive trace at a second level below a first portion of a top surface in a PCB. The third winding of the conductive trace overlaps the fourth winding of the conductive trace. The method further includes making the third winding and the fourth winding annular in shape, carrying the perimeter of the first portion defined on the top surface of the PCB. The third winding of the conductive trace includes a second pair of input terminals. The fourth winding of the conductive trace may include a second ground terminal and a second output terminal. The method may also include forming a first transformer based on the first winding and the second winding at a first level directly below the second portion of the PCB. The method may also include forming a second transformer based on the third winding and the fourth winding at a first level directly below the second portion of the PCB.

[0061] In addition, the method of processing an integrated circuit device includes forming a plurality of first contact pads on a first portion of the top surface, the plurality of first contact pads including at least a first pair of output pads and a first ground pad. The first pair of output pads are coupled to a first pair of input terminals of a first winding (primary winding) of a first transformer. The first ground pad is coupled to a first ground terminal of a second winding (secondary winding) of the first transformer. The method of processing an integrated circuit device also includes forming a plurality of second contact pads on a second portion of the top surface, the plurality of second contact pads including at least a second pair of output pads and a second ground pad. The second pair of output pads are coupled to a second pair of input terminals of a third winding (primary winding) of a second transformer. The second ground pad is coupled to a second ground terminal of a fourth winding (secondary winding) of the second transformer.

[0062] Furthermore, the method of processing an integrated circuit device includes disposing a first amplifier module onto a first portion of the top surface, a first pair of output pads configured to couple a first differential output from the first amplifier module to a first transformer below a second portion of the top surface. The method also includes disposing a second amplifier module onto the second portion of the top surface, a second pair of output pads configured to couple a second differential output from the second amplifier module to a second transformer below the first portion of the top surface. In another embodiment, the method of processing an integrated circuit device (wherein a PCB is processed) may include forming a first ground plane positioned between the second portion of the top surface and a first level, and forming a second ground plane positioned between the first portion of the top surface and a second level, the first level and the second level being at most equal in thickness.

[0063] Although the above is a complete description of specific embodiments, various modifications, alternative constructions and equivalents may be used. Therefore, the above description and illustration should not be taken as limiting the scope of the present technology as defined by the appended claims.

Claims

1. An integrated circuit device, comprising: a substrate comprising a top surface including a first portion, a second portion at least partially surrounding a perimeter of the first portion, and a remaining portion outside of the first portion and the second portion, the substrate comprising at least two windings of a conductive trace positioned at a level below the second portion; a first circuit disposed on the first portion, the first circuit comprising at least an amplifier; a second circuit comprising a transformer based on two windings of the conductive trace, the transformer coupled to the amplifier; and A third circuit is disposed on the remaining portion of the substrate.

2. The integrated circuit device according to claim 1, wherein the first portion comprises a plurality of contact pads coupled to the amplifier, the plurality of contact pads comprising at least one pair of output pads, an input pad, a plurality of ground pads, and a plurality of control pads.

3. An integrated circuit device according to claim 2, wherein the transformer based on the two windings includes a first winding and a second winding, the first winding including a first pair of terminals coupled to the pair of output pads to receive a differential voltage output from the amplifier, and the second winding including a ground terminal and an output terminal configured to provide a single voltage output.

4. The integrated circuit device of claim 3, wherein the first circuit comprises a power amplifier duplexer coupled to the second circuit and the third circuit to separate a transmission signal based on the single voltage output from the transformer from a reception signal based on an output from the third circuit. The integrated circuit device according to claim 1 , wherein the first winding and the second winding overlap each other. 6 . The integrated circuit device according to claim 1 , wherein the level below the second portion varies between zero and the thickness of the substrate.

7. The integrated circuit device of claim 1, wherein the substrate comprises a ground plane positioned between the first portion of the top surface and two windings of the conductive trace.

8. An integrated circuit device comprising: a substrate comprising a top surface, the top surface comprising a first portion, a second portion, a third portion, and a fourth portion, the second portion at least partially surrounding a perimeter of the first portion, the fourth portion at least partially surrounding a perimeter of the third portion, the second portion being adjacent to the fourth portion, the substrate comprising a first pair of windings of a conductive trace positioned at a first level below the fourth portion and a second pair of windings of a conductive trace positioned at a second level below the second portion; a first amplifier coupled to the first portion; a second amplifier coupled to the third portion; a first transformer based on the first pair of windings and coupled to the first amplifier; and A second transformer is based on the second pair of windings and is coupled to the second amplifier.

9. The integrated circuit device according to claim 8, wherein the first portion comprises at least a first pair of output pads configured to be coupled to the first amplifier.

10. The integrated circuit device of claim 9, wherein the first transformer based on the first pair of windings comprises a first winding and a second winding, the first winding overlapping the second winding, the first winding comprising a first pair of terminals configured to be coupled to the first pair of output pads to receive a first differential voltage output from the first amplifier, the second winding comprising a first ground terminal and a first output terminal configured to provide a first single voltage output.

11. The integrated circuit device according to claim 8, wherein the third portion comprises at least a second pair of output pads configured to be coupled to the second amplifier.

12. The integrated circuit device of claim 11 , wherein the second transformer based on the second pair of windings comprises a third winding and a fourth winding, the third winding overlapping the fourth winding, the third winding comprising a second pair of terminals configured to be coupled to the second pair of output pads to receive a second differential voltage output from the second amplifier, the fourth winding comprising a second ground terminal and a second output terminal configured to provide a second single voltage output.

13. The integrated circuit device according to claim 8, wherein the first level below the second portion varies between zero and a thickness of the substrate.

14. The integrated circuit device of claim 13, wherein the substrate comprises a first ground plane positioned vertically between the top surface and the first transformer, the first ground plane extending laterally across both the third portion and the fourth portion.

15. The integrated circuit device according to claim 8, wherein the second level below the fourth portion varies between zero and a thickness of the substrate.

16. The integrated circuit device of claim 15, wherein the substrate comprises a second ground plane positioned vertically between the top surface and the second transformer, the second ground plane extending laterally across both the first portion and the second portion.

17. A method for processing an integrated circuit device, the method comprising: providing a substrate comprising a top surface and a thickness, the top surface comprising at least a first portion and a second portion, the second portion being adjacent to the first portion; laying out a first winding of a conductive trace and a second winding of a conductive trace at a first level in the substrate below the second portion of the top surface, the first winding of the conductive trace overlapping the second winding of the conductive trace; laying out a third winding of a conductive trace and a fourth winding of a conductive trace at a second level in the substrate below the first portion of the top surface, the third winding of the conductive trace overlapping the fourth winding of the conductive trace; forming a plurality of first contact pads on the first portion of the top surface, the plurality of first contact pads including at least a first pair of output pads coupled to the first winding; forming a plurality of second contact pads on the second portion of the top surface, the plurality of second contact pads including at least a second pair of output pads coupled to the third winding; positioning a first amplifier on the first portion of the top surface, the first pair of output pads coupled to a first differential output from the first amplifier; and A second amplifier is disposed on the second portion of the top surface, and the second pair of output pads is coupled to a second differential output from the second amplifier.

18. The method of claim 17, comprising forming a first transformer based on a first winding of the conductive trace and a second winding of the conductive trace in an at least partially annular shape carrying a perimeter of the second portion, wherein the first winding comprises a first pair of input terminals coupled to the first pair of output pads on the first portion.

19. The method of claim 17, comprising forming a second transformer based on the third winding and the fourth winding in an at least partially annular shape carrying a perimeter of the first portion, wherein the third winding comprises a second pair of input terminals coupled to the second pair of output pads on the second portion.

20. The method of claim 17, comprising forming a first ground plane positioned between the second portion of the top surface in the substrate and the first level and a second ground plane positioned between the first portion of the top surface in the substrate and the second level, the first level and the second level being at most equal to the thickness.

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