A RC-IGBT and a method for forming the same
By adopting SBR diodes and optimizing deep groove structure in RC-IGBT devices, the problem of insufficient reverse recovery performance and area utilization of existing RC-IGBT devices is solved, and the effects of low VF and efficient reverse recovery are achieved.
Patent Information
- Application Number
- CN202411906477.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-23
- Publication Date
- 2025-04-08
AI Technical Summary
Existing RC-IGBT devices have insufficient in reverse recovery performance and diode area occupancy, resulting in higher VF and insufficient area utilization.
SBR diodes are used to replace the traditional PN junction diodes, and a low VF SBR diode structure is formed by providing a thin gate oxide layer and a thick oxide layer in the deep groove, while retaining the deep groove structure in the IGBT region to support the BV.
It effectively reduces VF, improves the reverse recovery performance of RC-IGBT, and saves the area of the diode area, maximizing area utilization.
Smart Images
Figure CN119789448A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor devices, and in particular to the technical field of an RC-IGBT semiconductor device and a forming method thereof. Background Art
[0002] IGBT devices have been widely used in new energy vehicles, smart grids, rail transit and other fields. As the mainstream power switching device in the field of medium and high power power electronics, silicon IGBT has become one of the most important power semiconductor devices. Traditional IGBT cannot conduct in reverse. In practical applications, an additional anti-parallel fast recovery diode is required, which increases the cost and volume of the system.
[0003] In the prior art, a reverse conducting insulated gate bipolar transistor (RC-IGBT) is used to solve the above problems. The core is to integrate the IGBT and diode structure on the same chip, which has many advantages such as small size, high power density, low cost, and high reliability.
[0004] On the one hand, RC-IGBT saves chip area, and on the other hand, reduces packaging and testing costs, greatly reducing device manufacturing costs. At the same time, it also has low loss, good safe operating area (SOA) characteristics, positive temperature coefficient, and good soft shutdown characteristics, short circuit characteristics and power cycling characteristics.
[0005] The front side of RC-IGBT is generally composed of a PN junction diode. The performance optimization of the PN junction diode reduces the reverse recovery loss of the diode: the usual method is to accurately control the PN junction doping, carrier lifetime control, etc. to optimize the reverse recovery capability of the PN junction.
[0006] The common practices in the prior art are: 1. making a PN junction diode in a single area; 2. using the P+ well and N-SUB of the IGBT as a diode structure. However, these two methods occupy a large area and the VF of the diode needs to be improved. Summary of the invention
[0007] The object of the present invention is to provide an RC-IGBT device which reduces VF and improves the reverse recovery performance of the RC-IGBT.
[0008] In order to achieve the above objectives, the present invention is implemented by the following technical solutions:
[0009] The present invention provides an RC-IGBT device, comprising:
[0010] An IGBT region, wherein an IGBT device is arranged in the IGBT region;
[0011] The diode region is adjacent to the IGBT region, the diode region is arranged in the cell, the diode region is provided with a deep groove, the sidewall of the deep groove is provided with a thin gate oxide layer for forming an SBR diode, and the bottom of the deep groove is provided with a thick oxide layer.
[0012] Optionally, a contact hole is provided above the deep groove, and the contact hole is realized by a self-alignment process.
[0013] Optionally, the etching angle of the sidewall of the contact hole is 85°-86°.
[0014] Optionally, gate polysilicon is also disposed in the deep trench.
[0015] Optionally, the IGBT region and the diode region are both arranged on a substrate; the substrate is an N-type substrate, and a P+ well is arranged between the deep trenches.
[0016] Optionally, a source is also disposed above the P+ well between the deep trenches.
[0017] Optionally, the thickness of the thin gate oxide layer is less than or equal to
[0018] Optionally, an N+ short-circuit region is provided in the substrate corresponding to the diode region.
[0019] Optionally, the diode gate is made of metal tungsten.
[0020] The present invention also provides a method for forming an RC-IGBT device, comprising:
[0021] S1, providing an N-type substrate;
[0022] S2, etching to form a deep groove on the substrate;
[0023] S3, forming a thick oxide layer at the bottom of the deep groove;
[0024] S4, forming a gate oxide layer on the sidewall of the deep trench, shielding the IGBT region with a photoresist, and wet etching to form a thin gate oxide layer in the diode region;
[0025] S5, depositing gate polysilicon in the deep trench, etching the top polysilicon, ion implanting, and annealing to form the P+ well and the N+ well;
[0026] S6, depositing an isolation layer, etching to form contact holes, and forming metal leads;
[0027] S7, perform back side processing to form N+ short circuit area and P+ injection area to thin the back side and metallize the back side.
[0028] The present invention also provides a method for forming an RC-IGBT device, comprising:
[0029] S1, providing an N-type substrate;
[0030] S2, etching to form a deep groove on the substrate, with the etching angle being 85°-86° to form an angle on the sidewall of the top of the deep groove;
[0031] S3, forming a gate oxide layer in the deep trench;
[0032] S4, depositing gate polysilicon in the deep trench, etching top polysilicon, ion implanting, and annealing to form the P+ well;
[0033] S5, forming an isolation oxide layer on the surface;
[0034] S6, using photoresist to block the area outside the contact hole of the active area, etching the isolation oxide layer from the active area to the silicon surface, then depositing the oxide layer on the surface, and finally ion implanting and annealing to form an N+ well above the P+ well;
[0035] S7, using photoresist to block the area except the diode area and the gate contact hole, etching the oxide layer above the deep trench, and removing the photoresist;
[0036] S8, forming an active area contact hole by self-aligned etching of silicon, and etching away a portion of the gate polysilicon above the diode deep trench and the polysilicon of the gate lead of the IGBT at the same time;
[0037] S9, reducing the thickness of the gate oxide layer above the deep trench by wet etching to form a thin gate oxide layer;
[0038] S10, tungsten plug deposition and back etching to fill the contact hole and the gate of the diode to form a metal lead.
[0039] S11, back side process, forming N+ short circuit area and P+ injection area to thin the back side and perform back side metallization.
[0040] Compared with the prior art, the present invention has the following advantages:
[0041] The PN diode in the RC-IGBT provided by the present invention is replaced by an SBR diode, which effectively reduces the VF, improves the performance of the reverse recovery of the RC-IGBT, and can save the area of the diode, maximizing the area utilization. At the same time, the SBR in the deep groove of the present invention is dispersed in the cell of the IGBT, which saves more area than the planar PN junction diffusion, and can be more evenly dispersed in the cell. The efficiency is higher during reverse recovery. Moreover, in the diode area, by retaining the deep groove structure of the IGBT, the thick oxygen at the bottom is retained as the support of the BV, and the upper layer is changed to a thin gate oxide, the low VF function of the SBR is realized. BRIEF DESCRIPTION OF THE DRAWINGS
[0042] In order to more clearly illustrate the technical solution of the present invention, the following briefly introduces the drawings required for the description. Obviously, the drawings described below are an embodiment of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work:
[0043] Figure 1 A schematic diagram of the structure of the RC-IGBT device provided by the present invention;
[0044] Figure 2 A schematic diagram of the structure of another RC-IGBT device provided by the present invention;
[0045] Figure 3(a)-Figure 3(d) A schematic diagram of a method for forming a RC-IGBT device provided by the present invention;
[0046] Figure 4(a)-Figure 4(g) A schematic diagram of another method for forming an RC-IGBT device provided by the present invention. DETAILED DESCRIPTION
[0047] The scheme proposed by the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the accompanying drawings are in a very simplified form and use non-precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the implementation method of the present invention. In order to make the purposes, features and advantages of the present invention more obvious and easy to understand, please refer to the accompanying drawings. It should be noted that the structures, proportions, sizes, etc. illustrated in the accompanying drawings of this specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the present invention, so they have no technical substantive significance. Any structural modification, change in proportional relationship or adjustment of size, without affecting the effects that the present invention can produce and the purposes that can be achieved, should still fall within the scope of the technical content disclosed by the present invention.
[0048] Figure 1 The schematic diagram of the structure of the RC-IGBT device is shown in FIG. Figure 1As shown, the RC-IGBT device includes: an IGBT region 112 and a diode region 111. The IGBT region 112 is provided with an IGBT device; the diode region 111 is adjacent to the IGBT region 112, the diode region 111 is provided in a cell, a deep trench 121 (Trench) is provided in the diode region 111, a thin gate oxide layer 123 is provided on the sidewall of the deep trench 121 to form an SBR diode, and a thick oxide layer 122 is provided at the bottom of the deep trench 121. Of course, the IGBT region 112 can also be provided with a deep trench 121, a gate oxide layer is provided on the sidewall of the deep trench 121 of the IGBT region 112, and the thickness of the gate oxide layer is greater than the thin gate oxide layer 123 on the sidewall of the deep trench 121 of the diode region 11, and a thick oxide layer 122 is also provided at the bottom of the deep trench 121 of the IGBT region 112. The RC-IGBT device is provided on a substrate, such as an N-type substrate. A P+ is arranged above the substrate, a P+ well is arranged between the deep trenches 121, and a source 125 is arranged between the deep trenches 121 above the P+ well. An isolation layer is arranged on the upper surface of the deep trenches 121, and a metal lead is arranged on the upper surface of the isolation layer, and the metal lead is electrically connected through the tungsten of the contact hole. A gate polysilicon 124 is also arranged in the deep trenches 121. The substrate portion of the diode region corresponds to the N+ short-circuit region.
[0049] Figure 2 FIG. 4 shows a schematic diagram of the structure of another RC-IGBT device, such as Figure 2 As shown, the IGBT region 112 is provided with an IGBT device; the diode region 111 is adjacent to the IGBT region 112, the diode region 111 is provided in the cell, the diode region 111 is provided with a deep trench 121 (Trench), and the sidewall of the deep trench 121 is provided with a thin gate oxide layer 123 for forming an SBR diode. Figure 1The main difference is that the self-aligned contact hole 131 self-aligned IGBT process is adopted. Specifically, in the diode area 111, a contact hole 131 is set above the deep groove 121, and the contact hole 131 is realized by a self-aligned process. The etching angle of the side wall of the contact hole is 85°-86°. The distance L between the bottom of the contact hole 131 and the deep groove 121 is generally greater than or equal to 0.15um. In the non-diode area 111, an isolation layer 133 is set above the deep groove 121. Between the deep grooves 121, an N+ well is set above the P+ well. On the basis of not increasing the process cost, the improvement of RC-IGBT function is achieved through process sequence and layout adjustment. The contact hole self-alignment process does not have the problem of contact hole lithography offset, and the VTH consistency and current uniformity are better. In addition, the contact hole self-alignment process does not use lithography to define the line width of the contact hole, and the line width of the contact hole is not limited by the ability of the lithography machine, which realizes a smaller CD size, can effectively reduce the size of the cell, and improve the overall performance parameters. At the same time, the diode gate uses a tungsten plug, which has a smaller resistance.
[0050] In any of the above embodiments, optionally, the thickness of the thin gate oxide layer is less than or equal to
[0051] The present invention also provides Figure 1 The method for forming the RC-IGBT device is as follows: Figure 3(a)-3(d) Said method comprises:
[0052] S1, providing an N-type substrate;
[0053] S2, etching to form a deep groove 121 on the substrate;
[0054] S3, forming a thick oxide layer at the bottom of the deep groove, as shown in FIG3(a);
[0055] S4, forming a gate oxide layer on the sidewall of the deep trench, as shown in FIG3(b); then the photoresist shields the IGBT region, and the gate oxide layer is etched in the diode region 111 by wet etching to form a thin gate oxide layer, wherein the thickness of the thin gate oxide layer is D, and the thickness D is less than or equal to As shown in Figure 3(c);
[0056] S5, depositing gate polysilicon 124 in the deep trench, etching the top polysilicon, forming the P+ well by ion implantation and annealing, and then forming the N+ well, as shown in FIG3(d);
[0057] S6, depositing the isolation layer, etching to form contact holes, forming metal leads, and finally forming Figure 1 The RC-IGBT device shown;
[0058] S7, perform back side processing to form N+ short circuit area and P+ injection area to thin the back side and metallize the back side.
[0059] The present invention also provides Figure 2 The method for forming the RC-IGBT device is as follows: Figure 4(a)-4(g) Said method comprises:
[0060] S1, providing an N-type substrate;
[0061] S2, etching to form a deep groove 121 on the substrate, the etching angle is 85°-86°, and an angle is formed on the sidewall of the top of the deep groove;
[0062] S3, forming a gate oxide layer in the deep trench;
[0063] S4, depositing gate polysilicon 124 in the deep trench, etching the top polysilicon, ion implanting, and annealing to form the P+ well, as shown in FIG4(a);
[0064] S5, forming an isolation layer 133 on the surface, such as an isolation oxide layer, as shown in FIG4(b);
[0065] S6, the photoresist shields the area outside the contact hole of the active area, etches the isolation oxide layer from the active area to the silicon surface, then deposits or grows a thin oxide layer on the surface, and finally ion implants and anneals to form an N+ well above the P+ well, as shown in FIG4(c);
[0066] S7, using photoresist to block the area except the diode area 111 and the gate contact hole, and etching the oxide layer above the deep groove 121, as shown in FIG4(d); then removing the photoresist, as shown in FIG4(e);
[0067] S8, forming an active area contact hole by self-aligned silicon etching, and etching away a portion of the gate polysilicon above the diode deep trench and the polysilicon of the gate lead of the IGBT at the same time, the contact hole has an inclined angle, that is, the angle with the horizontal plane is less than 90°, and the distance L between the bottom of the contact hole 131 and the deep trench 121 is generally greater than or equal to 0.15 um, and the distance L is a safety distance, as shown in FIG4(f);
[0068] S9, by etching, for example, etching by etching method, reducing the thickness of the gate oxide layer above the deep trench 121 to form a thin gate oxide layer, wherein the thickness D is less than or equal to The wet etching only reduces the gate oxide layer of the diode region 111; preferably, the thickness d from the upper surface of the isolation layer to the upper surface of the gate polysilicon 124 is not less than Used for gate and emitter isolation.
[0069] S10, tungsten plug deposition and back etching to fill the contact hole and the gate of the diode to form a metal lead.
[0070] S11, back side process, forming N+ short circuit area and P+ injection area to thin the back side and perform back side metallization.
[0071] The final formation Figure 2 The RC-IGBT device shown.
[0072] The PN diode in the RC-IGBT provided by the present invention is replaced by an SBR diode, which effectively reduces the VF, improves the performance of the reverse recovery of the RC-IGBT, and can save the area of the diode, maximizing the area utilization. At the same time, the SBR in the deep groove of the present invention is dispersed in the cell of the IGBT, which saves more area than the planar PN junction diffusion, and can be more evenly dispersed in the cell. The efficiency is higher during reverse recovery. Moreover, in the diode area, by retaining the deep groove structure of the IGBT, the thick oxygen at the bottom is retained as the support of the BV, and the upper layer is changed to a thin gate oxide, the low VF function of the SBR is realized.
[0073] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
[0074] Although the content of the present invention has been described in detail through the above preferred embodiments, it should be appreciated that the above description should not be considered as a limitation of the present invention. After reading the above content, it will be apparent to those skilled in the art that various modifications and substitutions of the present invention will occur. Therefore, the protection scope of the present invention should be limited by the appended claims.
Claims
1. An RC-IGBT device, characterized in that: include: An IGBT region, wherein an IGBT device is arranged in the IGBT region; The diode region is adjacent to the IGBT region, the diode region is arranged in the cell, the diode region is provided with a deep groove, the sidewall of the deep groove is provided with a thin gate oxide layer for forming an SBR diode, and the bottom of the deep groove is provided with a thick oxide layer.
2. The RC-IGBT device according to claim 1, characterized in that: A contact hole is arranged above the deep groove, and the contact hole is realized by a self-alignment process.
3. The RC-IGBT device according to claim 2, characterized in that: The etching angle of the side wall of the contact hole is 85°-86°.
4. The RC-IGBT device according to claim 3, characterized in that: Gate polysilicon is also arranged in the deep trench.
5. The RC-IGBT device according to claim 4, characterized in that: The IGBT region and the diode region are both arranged on a substrate; the substrate is an N-type substrate, and a P+ well is arranged between the deep trenches.
6. The RC-IGBT device according to claim 5, characterized in that: A source is also disposed above the P+ well between the deep trenches.
7. The RC-IGBT device according to claim 1, characterized in that: The thickness of the thin gate oxide layer is less than or equal to 8. The RC-IGBT device according to claim 7, characterized in that: An N+ short-circuit region is arranged on the substrate corresponding to the diode region.
9. The RC-IGBT device according to claim 8, characterized in that: The diode grid is made of metal tungsten.
10. The method for forming a RC-IGBT device according to any one of claims 1 to 9, characterized in that: include: S1, providing an N-type substrate; S2, etching to form a deep groove on the substrate; S3, forming a thick oxide layer at the bottom of the deep groove; S4, forming a gate oxide layer on the sidewall of the deep trench, shielding the IGBT region with a photoresist, and wet etching to form a thin gate oxide layer in the diode region; S5, depositing gate polysilicon in the deep trench, etching the top polysilicon, ion implanting, and annealing to form the P+ well and the N+ well; S6, depositing an isolation layer, etching to form contact holes, and forming metal leads; S7, perform back side processing to form N+ short circuit area and P+ injection area to thin the back side and perform back side gold.
11. The method for forming a RC-IGBT device according to any one of claims 1 to 9, characterized in that: include: S1, providing an N-type substrate; S2, etching to form a deep groove on the substrate, with the etching angle being 85°-86° to form an angle on the sidewall of the top of the deep groove; S3, forming a gate oxide layer in the deep trench; S4, depositing gate polysilicon in the deep trench, etching top polysilicon, ion implanting, and annealing to form the P+ well; S5, forming an isolation oxide layer on the surface; S6, using photoresist to block the area outside the contact hole of the active area, etching the isolation oxide layer from the active area to the silicon surface, then depositing or growing a thin oxide layer on the surface, and finally ion implanting and annealing to form an N+ well above the P+ well; S7, using photoresist to block the area except the diode area and the gate contact hole, etching the oxide layer above the deep trench, and removing the photoresist; S8, forming an active area contact hole by self-aligned silicon etching, and etching away a portion of the gate polysilicon above the diode deep trench and the polysilicon of the gate lead of the IGBT; S9, reducing the thickness of the gate oxide layer above the deep trench by etching to form a thin gate oxide layer; S10, tungsten plug deposition and back etching, filling the contact hole and the gate of the diode to form a metal lead; S11, perform back side processing to form N+ short circuit area and P+ injection area to thin the back side and metallize the back side.