A deep trench MOSFET-like Schottky diode and its manufacturing method

Abstract

The present invention relates to a deep trench MOSFET-like Schottky diode and a manufacturing method thereof. The deep trench MOSFET-like Schottky diode includes: a substrate; an epitaxial layer located on the upper surface of the substrate; a plurality of deep trenches located in the epitaxial layer, with source polysilicon and gate polysilicon disposed in the deep trenches; a well region located on the upper surface of the epitaxial layer; a source region located on the upper surface of the well region, characterized in that it further includes: a first base region disposed in the well region between two adjacent deep trenches and having the same conductivity type as the well region; a second base region located below the first base region, the second base region having the same conductivity type as the first base region and a doping concentration lower than that of the first base region; and a metal electrode penetrating through the first base region and the second base region. The present invention can reduce the time and charge required for the reverse recovery of the diode.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to a deep trench MOSFET-like Schottky diode and a manufacturing method thereof. Background Art

[0002] Compared with traditional MOSFETs, deep trench double-gate MOSFETs have better figure of merit (FOM). As Figure 1 shown, due to the use of an electro-coupled balance design, split-gate power MOSFETs can achieve both low on-resistance (Rdson) and low reverse transfer capacitance (crss), thereby reducing the conduction loss and switching loss of the system and improving the usage efficiency of electronic products. However, also because of the split-gate design, the lower gate is actually connected to the source. In this case, for the same wafer size, SGT MOSFETs will have a larger output capacitance (Coss), and the largest proportion in the output capacitance is the capacitance Cds between the drain and the source. In practical applications, such as resonant topology power supplies or brushless motor applications, during each switching process, the body diode of the MOSFET will experience reverse recovery. Figure 2 The circuit shown is to simulate the reverse recovery of the diode. Figure 3 is the waveform diagram of the diode reverse recovery. When the diode undergoes reverse recovery, an excessive VDS spike (stress) will directly cause overvoltage failure of the MOSFET. The existing solution is to perform a Schottky-like design on the body diode of the double-gate structure, thereby greatly reducing the charge and time required for diode reverse recovery, and thus reducing the VDS spike stress.

[0003] Figure 1 The body diode of the deep trench MOSFET shown is connected to the base region P+ through metal as the cathode. During the conduction process, the base region P+ will release a large amount of holes into the epitaxial layer. During the reverse recovery process, a large amount of holes require a large amount of reverse current for a long time to neutralize, which results in a long reverse recovery time and a large current for the body diode of the trench MOSFET. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a deep trench MOSFET-like Schottky diode and a manufacturing method thereof, which can reduce the time and charge required for diode reverse recovery.

[0005] The technical solution adopted by the present invention to solve its technical problems is: to provide a deep trench MOSFET-like Schottky diode, comprising: a substrate; an epitaxial layer located on the upper surface of the substrate; a plurality of deep trenches located in the epitaxial layer, with source polysilicon and gate polysilicon disposed in the deep trenches; a well region located on the upper surface of the epitaxial layer; a source region located on the upper surface of the well region, further comprising: a first base region disposed in the well region between two adjacent deep trenches and having the same conductivity type as the well region; a second base region located below the first base region, the second base region having the same conductivity type as the first base region and a doping concentration lower than that of the first base region; and a metal electrode passing through the first base region and the second base region.

[0006] The second base region has the same doping concentration as the well region and has an overlapping portion.

[0007] The well region is a P-type well region or an N-type well region.

[0008] The epitaxial layer is an N-type epitaxial layer or a P-type epitaxial layer.

[0009] The technical solution adopted by the present invention to solve its technical problems is: to further provide a manufacturing method for a deep trench MOSFET-like Schottky diode, comprising the following steps:

[0010] Provide a substrate and form an epitaxial layer on the substrate;

[0011] Form a plurality of deep trenches in the epitaxial layer;

[0012] Form source polysilicon and gate polysilicon in the deep trenches;

[0013] Form a well region on the upper surface of the epitaxial layer;

[0014] Form a source region on the upper surface of the well region;

[0015] Open an opening between two adjacent deep trenches such that the opening extends to the well region;

[0016] Form a first base region in the well region, the first base region having the same conductivity type as the well region;

[0017] Dig deeper along the opening until the opening penetrates the well region;

[0018] Form a second base region in the epitaxial layer such that the second base region is located below the first base region, and the second base region has the same conductivity type as the first base region and a doping concentration lower than that of the first base region;

[0019] Fill the opening with a metal electrode.

[0020] The doping concentrations of the second base region and the well region are the same.

[0021] The well region is a P-type well region or an N-type well region.

[0022] The epitaxial layer is an N-type epitaxial layer or a P-type epitaxial layer.

[0023] Advantageous Effects

[0024] Due to the adoption of the above technical solution, compared with the prior art, the present invention has the following advantages and positive effects: A second base region is arranged under the first base region in the present invention. In this way, when the diode is turned on, the second base region injects holes into the epitaxial layer instead of the first base region, greatly reducing the time and charge required for the reverse recovery of the diode. During avalanche, the first base region is still the path with the smallest resistance for the avalanche current to pass through. Therefore, during avalanche, the parasitic triode of the MOS will not be triggered to cause a decrease in the avalanche current. Description of the Drawings

[0025] Figure 1 is a schematic diagram of the structure of the body diode of a deep trench MOSFET in the prior art;

[0026] Figure 2 is a circuit diagram of the reverse recovery of the diode;

[0027] Figure 3 is a waveform diagram of the reverse recovery of the diode;

[0028] Figures 4 - 13 is a process diagram of the manufacturing method of the deep trench MOSFET type Schottky diode according to the first embodiment of the present invention;

[0029] Figure 14 is a schematic diagram of the current flow direction when the deep trench MOSFET type Schottky diode according to the second embodiment of the present invention is reversely conducting;

[0030] Figure 15 is a waveform diagram of the reverse recovery of the deep trench MOSFET type Schottky diode according to the second embodiment of the present invention;

[0031] Figure 16 is a schematic diagram of the current flow direction during avalanche of the deep trench MOSFET type Schottky diode according to the second embodiment of the present invention. Detailed Embodiments

[0032] The present invention will be further described below in conjunction with specific embodiments. It should be understood that these embodiments are only used to illustrate the present invention and not to limit the scope of the present invention. In addition, it should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms also fall within the scope defined by the appended claims of this application.

[0033] The first embodiment of the present invention relates to a method for manufacturing a deep trench MOSFET-like Schottky diode, comprising the following steps:

[0034] Step 1: Provide a substrate 10 and form an epitaxial layer 20 on the substrate 10;

[0035] Step 2: Form a plurality of deep trenches 30 in the epitaxial layer 20;

[0036] Step 3: Form a source polysilicon 40 and a gate polysilicon 50 in the deep trenches 30;

[0037] Step 4: Form a well region 60 on the upper surface of the epitaxial layer 20;

[0038] Step 5: Form a source region 70 on the upper surface of the well region 60;

[0039] Step 6: Open an opening 80 between two adjacent deep trenches 30 such that the opening 80 extends to the well region 60;

[0040] Step 7: Form a first base region 91 in the well region 60, the conductivity type of the first base region 91 being the same as that of the well region 60;

[0041] Step 8: Dig deeper along the opening 80 until the opening 80 penetrates the well region 60;

[0042] Step 9: Form a second base region 92 in the epitaxial layer 20 such that the second base region 92 is located below the first base region 91, and the conductivity type of the second base region 92 is the same as that of the first base region 91 and the doping concentration is lower than that of the first base region 91;

[0043] Step 10: Fill the opening 80 with a metal electrode 100.

[0044] In step 1, as Figure 4 shown, the provided substrate 10 can be a silicon substrate, a silicon carbide substrate or a silicon germanium substrate. The formed epitaxial layer 20 is an epitaxial layer of a first conductivity type.

[0045] In step 2, as Figure 5 shown, the depths and widths of the formed plurality of deep trenches 30 are the same.

[0046] In step 3, form a source polysilicon 40 and a gate polysilicon 50 in the deep trenches 30, as Figure 6As shown, specifically: a deep trench oxide layer covering the deep trench is deposited on the surface of the deep trench 30, polysilicon is filled on the deep trench oxide layer, and part of the polysilicon is etched away to generate the source polysilicon 40; part of the deep trench oxide layer is etched away, and a deep channel oxide layer is formed in the etched deep trench space; part of the deep channel oxide layer is removed and thermal oxidation is performed; polysilicon is implanted into the gate deep trench space after thermal oxidation to form the gate polysilicon.

[0047] In step 4, as Figure 7 shown, the formed well region 60 is a well region of the second conductivity type.

[0048] In step 5, as Figure 8 shown, a source region 70 is formed on the upper surface of the well region 60, and the conductivity type of the source region 70 is the same as that of the epitaxial layer 20.

[0049] In step 6, as Figure 9 shown, an opening 80 is formed between two adjacent deep trenches 30, such that the opening 80 extends to the well region 60. The opening can be formed by etching, and the opening 80 extends to about one-third of the depth of the well region 60.

[0050] In step 7, as Figure 10 shown, electrons are implanted at the position of the opening 80 until a first base region 91 is formed in the well region 60. The conductivity type of the first base region 91 is the same as that of the well region 60, both being the second conductivity type.

[0051] The doping concentration of the first base region 91 is higher than that of the well region 60.

[0052] In step 8, as Figure 11 shown, the opening 80 is dug deeper along the opening 80, which can be achieved by etching, and the opening 80 penetrates through the well region 60 to reach the epitaxial layer 20.

[0053] In step 9, as Figure 12 shown, electrons are implanted at the position of the opening 80 until a second base region 92 is formed in the epitaxial layer 20. The second base region 92 is located below the first base region 91 and overlaps with the well region 60. The conductivity type of the second base region 92 is the same as that of the well region 60, and the doping concentration is also the same as that of the well region 60.

[0054] In step 10, as Figure 13 shown, a metal electrode 100 is inserted into the opening 80. The metal electrode 100 can be a copper electrode, an aluminum electrode, a gold electrode, a silver electrode, a nickel electrode, etc. Through Figure 13It can be seen that compared with the prior art, the difference between the two is that in this embodiment, a second base region is provided under the first base region in the deep trench MOSFET-like Schottky diode formed in this embodiment. In this way, when the diode is turned on, the second base region injects holes into the epitaxial layer instead of the first base region, thus greatly reducing the time and charge required for the reverse recovery of the diode.

[0055] In one example, the first conduction type in the above steps may be N-type. At this time, the second conduction type is P-type. In another example, the first conduction type in the above steps may be P-type. At this time, the second conduction type is N-type.

[0056] The second embodiment of the present invention relates to a deep trench MOSFET-like Schottky diode, as Figure 13 shown, including: a substrate 10; an epitaxial layer 20 located on the upper surface of the substrate 10; a plurality of deep trenches 30 located in the epitaxial layer 20, with source polysilicon 40 and gate polysilicon 50 provided in the deep trenches 30; a well region 60 located on the upper surface of the epitaxial layer 20; a source region 70 located on the upper surface of the well region 60, and further including: a first base region 91 provided in the well region 60 between two adjacent deep trenches 30 and having the same conduction type as the well region 60; a second base region 92 located below the first base region 91, the second base region 92 having the same conduction type as the first base region 91 and a doping concentration lower than that of the first base region 91; a metal electrode 100 penetrating through the first base region 91 and the second base region 92. In this embodiment, the doping concentration of the second base region 92 is the same as that of the well region 60 and there is an overlapping part.

[0057] In this embodiment, when the well region is a P-type well region, the epitaxial layer is an N-type epitaxial layer; when the well region is an N-type well region, the epitaxial layer is a P-type epitaxial layer.

[0058] As Figure 14 shown, since the second base region 92 is provided directly below the first base region 91 in this embodiment and the doping concentration of the second base region 92 is lower than that of the first base region 91, when the diode is turned on, it is the second base region 92 that injects holes into the epitaxial layer, thus greatly reducing the time and charge required for the reverse recovery of the diode. As Figure 15 shown, Figure 15 In, the dotted line represents the reverse recovery waveform diagram of the deep trench MOSFET-like Schottky diode of this embodiment, and the solid line represents the reverse recovery waveform diagram of the Schottky diode-like in the prior art. It can be seen that the reverse recovery current of the deep trench MOSFET-like Schottky diode of this embodiment is significantly smaller than that of the Schottky diode-like in the prior art, and the VDS peak stress is also significantly smaller than that of the Schottky diode-like in the prior art.

[0059] As Figure 16 shown, when the deep trench MOSFET-like Schottky diode of this embodiment is in avalanche, the first base region is still the path with the smallest resistance for the avalanche current to pass through. Therefore, the parasitic triode of the MOS is not triggered during avalanche to cause a decrease in the avalanche current. Thus, this embodiment does not affect the original characteristics during avalanche.

Claims

1. A deep trench MOSFET-like Schottky diode, comprising: a substrate; an epitaxial layer located on the upper surface of the substrate; a plurality of deep trenches located in the epitaxial layer, with source polysilicon and gate polysilicon provided in the deep trenches; a well region located on the upper surface of the epitaxial layer; a source region located on the upper surface of the well region, characterized in that it further comprises: a first base region provided in the well region between two adjacent deep trenches and having the same conductivity type as the well region; a second base region located below the first base region and having an overlapping portion with the well region, the second base region having the same conductivity type as the first base region and a doping concentration lower than that of the first base region; and a metal electrode penetrating through the first base region and the second base region.

2. The deep trench MOSFET-like Schottky diode according to claim 1, characterized in that the second base region has the same doping concentration as the well region.

3. The deep trench MOSFET-like Schottky diode according to claim 1, characterized in that the well region is a P-type well region or an N-type well region.

4. The deep trench MOSFET-like Schottky diode according to claim 1, characterized in that the epitaxial layer is an N-type epitaxial layer or a P-type epitaxial layer.

5. A method for manufacturing a deep trench MOSFET-like Schottky diode, characterized in that it comprises the following steps: providing a substrate and forming an epitaxial layer on the substrate; forming a plurality of deep trenches in the epitaxial layer; forming source polysilicon and gate polysilicon in the deep trenches; forming a well region on the upper surface of the epitaxial layer; forming a source region on the upper surface of the well region; opening between two adjacent deep trenches such that the opening extends to the well region; forming a first base region in the well region, the first base region having the same conductivity type as the well region; digging deeper along the opening until the opening penetrates through the well region; forming a second base region in the epitaxial layer such that the second base region is located below the first base region and has an overlapping portion with the well region, the second base region having the same conductivity type as the first base region and a doping concentration lower than that of the first base region; filling a metal electrode in the opening.

6. The method for manufacturing a deep trench MOSFET-like Schottky diode according to claim 5, characterized in that the second base region and the well region have the same doping concentration.

7. The method for manufacturing a deep trench MOSFET-like Schottky diode according to claim 5, characterized in that the well region is a P-type well region or an N-type well region.

8. The method for manufacturing a deep trench MOSFET-like Schottky diode according to claim 5, characterized in that the epitaxial layer is an N-type epitaxial layer or a P-type epitaxial layer.

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