A micro-rcled device based on an ito shoulder structure and a preparation method thereof

Abstract

The application discloses a Micro-RCLED device based on an ITO shoulder structure and a preparation method thereof, wherein the device comprises, from bottom to top, a substrate layer, a bonding metal layer, a first mirror layer, an ITO current expansion layer and a gallium nitride epitaxial layer; the gallium nitride epitaxial layer comprises, from bottom to top, a p-GaN layer, an MQW layer and an n-GaN layer; the bonding metal layer, the ITO current expansion layer and the first mirror layer are arranged in an I-shaped mode with the mesa size gradually decreasing; the mesa size of the gallium nitride epitaxial layer is not greater than that of the ITO current expansion layer; a metal electrode layer is arranged on the bonding metal layer outside the first mirror layer and the ITO current expansion layer and faces the bottom shoulder of the ITO current expansion layer; a DBR mirror layer is arranged on the n-GaN layer, and the reflectivity of the DBR mirror layer to the light source emitted by the device is less than that of the first mirror layer. The application greatly improves the yield of the Micro-RCLED chip in mass production, and in the substrate transfer, the CMP-ICP-CMP thinning resonant cavity layer method is innovatively proposed, thereby reducing the phenomena of device open circuit and device failure.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor electronics, and in particular to a Micro-RCLED device based on an ITO shoulder structure and a preparation method thereof. BACKGROUND

[0002] With the rapid development of display technology, Micro-LED display technology with a single light-emitting unit less than 100 um has excellent characteristics such as high light-emitting efficiency, high brightness, high response speed and reliability, and is gradually developing into the next generation of display technology. It also shows great potential in the field of optogenetics and photodynamic medicine. However, Micro-LED also faces problems such as too large divergence angle and too wide half-height width of the light-emitting peak spectrum. In the display field, too large divergence angle and too wide half-height width of the light-emitting peak spectrum will cause serious color difference, color crosstalk, and decrease in contrast ratio. In the field of photodynamic medicine, it will seriously affect the accuracy and effect of treatment. Therefore, by introducing a resonant cavity structure (Resonant Cavity) at the top and bottom of the Micro-LED device, the divergence angle of the device can be significantly optimized and the half-height width of the device can be reduced, thereby achieving high-precision photoelectric waveband control.

[0003] However, existing Micro-RCLED devices are often prepared by directly growing the film system structure. However, during the growth process, in-situ growth between different system materials will produce a large number of lattice defects and dislocations, resulting in low device efficiency and the inability to achieve arbitrary waveband growth, especially the preparation of blue and green Micro-RCLED. Therefore, in recent years, the method of substrate transfer has been used to prepare Micro-RCLED to fully avoid growth defects between different system materials, such as Chinese patent application CN113299806A and Chinese patent CN 105609602B.

[0004] However, this method also faces the following problems: during the preparation process, the introduction of the resonant cavity structure through substrate transfer requires precise control of the gallium nitride film thickness. During preparation, since the p-GaN is only a few nanometers thick, and the bottom is a full-face mirror, during the preparation of the device mesa, the device may not be etched to the P-GaN layer or the ITO current spreading layer may be etched through, resulting in insulation and non-conduction. At the same time, the traditional peeling and thinning method causes a large loss of the surface GaN thickness, and the speed cannot be precisely controlled, often causing a large thickness difference between the edge and the center of the wafer, and even the edge gallium nitride is completely worn out. It is difficult to obtain a high-precision designed GaN film thickness, thereby resulting in a very low chip yield and seriously hindering the industrialization and application prospects of Micro-RCLED devices. SUMMARY

[0005] The Micro-RCLED device based on the ITO shoulder structure and the preparation method thereof can effectively improve the yield of chips, realize accurate control of the thickness of the GaN light-emitting layer in the middle layer of the resonant cavity, realize mass production of small divergence angle, and narrow the spectral full width at half maximum.

[0006] The Micro-RCLED device based on the ITO shoulder structure comprises, from bottom to top, a substrate layer, a bonding metal layer, a first mirror layer, an ITO current expansion layer and a gallium nitride epitaxial layer, wherein the gallium nitride epitaxial layer comprises, from bottom to top, a p-GaN layer, an MQW layer and an n-GaN layer, the bonding metal layer, the ITO current expansion layer and the first mirror layer are arranged in an I-shaped manner with the mesa size gradually decreasing from bottom to top, the mesa size of the gallium nitride epitaxial layer is not greater than that of the ITO current expansion layer, a metal electrode layer is arranged on the bonding metal layer outside the first mirror layer and the ITO current expansion layer and faces the bottom shoulder of the ITO current expansion layer, an insulating layer is deposited on the metal electrode layer and extends to the top of the n-GaN layer, a P-type contact electrode is arranged on the insulating layer on one side of the gallium nitride epitaxial layer and faces the metal electrode layer, the P-type contact electrode is connected to the p-GaN layer through the metal electrode layer and the ITO current expansion layer to form an ohmic contact for conduction, an N-type contact electrode is arranged on the insulating layer on the other side of the gallium nitride epitaxial layer and faces the n-GaN layer, and a DBR mirror layer is arranged on the n-GaN layer, wherein the reflectivity of the DBR mirror layer to the light source emitted by the device is less than that of the first mirror layer.

[0007] The preparation method of the Micro-RCLED device based on the ITO shoulder structure comprises the following steps.

[0008] S1, growing, from bottom to top, a u-GaN layer, an n-GaN layer, an MQW layer and a p-GaN layer on a sapphire substrate to obtain a sapphire gallium nitride epitaxial wafer;

[0009] S2, growing a transparent ITO film on the p-GaN layer of the sapphire gallium nitride epitaxial wafer as an ITO current expansion layer;

[0010] S3, using a negative photoresist lithography stripping method and through EB or a magnetic control mode, preparing a first mirror layer with a mesa size smaller than that of the final device on the ITO current expansion layer;

[0011] S4, forming a protective mask on the outer surface of the first mirror layer through positive photoresist lithography, and preparing an edge shoulder of the ITO current expansion layer through dry etching or wet etching to ensure that the mesa sizes of the sapphire gallium nitride epitaxial wafer, the ITO current expansion layer and the first mirror layer gradually decrease;

[0012] S5, filling the metal electrode layer on the sapphire gallium nitride epitaxial wafer outside the first mirror layer by the negative photoresist lithography stripping method, and ensuring that the metal electrode layer is in contact with the shoulder surface of the patterned ITO current spreading layer to form an ohmic contact;

[0013] S6, sequentially preparing a bonding metal layer and a substrate layer from bottom to top on the metal electrode layer and the first mirror layer to form a first part;

[0014] S7, inverting the above first part with the sapphire gallium nitride epitaxial wafer on top, stripping off the sapphire substrate by laser stripping or chemical etching stripping, and removing the u-GaN layer by the CMP-ICP-CMP mixed thinning process, and thinning the n-GaN layer to the designed thickness;

[0015] S8, completely etching the n-GaN layer, the MQW layer and the p-GaN layer to the metal electrode layer by positive photoresist lithography mask dry etching, so that the n-GaN layer, the MQW layer and the p-GaN layer form a convex gallium nitride epitaxial layer on the metal electrode layer, and ensure that the mesa size of the gallium nitride epitaxial layer is not greater than the ITO current spreading layer;

[0016] S9, depositing an insulating layer extending to the top of the n-GaN layer on the metal electrode layer; after positive photoresist lithography, the insulating layer of the electrode and the top light emitting position is removed by dry etching, and P-type contact electrode and N-type contact electrode are evaporated in sequence, so that the P-type contact electrode is opposite to the metal electrode layer, and the N-type contact electrode is opposite to the n-GaN layer;

[0017] S10, preparing a DBR mirror layer on the n-GaN layer, and the DBR mirror layer is a DBR mirror.

[0018] In step S2, the first mirror layer is a DBR mirror, and the DBR material is two film systems selected from TiO2, SiO2, Ta2O5 and SiN, and the number is 10-20 pairs.

[0019] In step S2, the first mirror layer is a metal mirror made of metal AG or AL.

[0020] In step S4, the electrode system of the metal electrode layer is Cr / Al / Ti / Pt / Ti / Pt / Au, which serves as a filling metal and ensures good electrical performance.

[0021] In step S6, the bonding metal layer is made of Ni / Sn or Sn / Au, and the substrate layer is made of Si or metal Cu, Al.

[0022] In step S9, the insulating layer of the extension arrangement is an insulating transparent film made of SiO2 or SiN, the metal system of the P-type contact electrode is Ni / Au, and the metal system of the N-type contact electrode is Ti / Al / Ti / Au.

[0023] In step S10, the DBR material of the DBR mirror layer is two film systems with high and low refractive index difference in TiO2, SiO2, Ta2O5, and SiN, and the number is 3-8 pairs.

[0024] In step S7, the specific steps of the CMP-ICP-CMP mixed thinning process are: 1, polishing the surface quickly by CMP; 2, removing the u-GaN layer and thinning the n-GaN layer by ICP dry etching; 3, polishing by secondary CMP to obtain a smooth surface.

[0025] Compared with the prior art, the present application has the following advantages:

[0026] 1, the P-type contact electrode is in contact with the p-GaN layer through the metal electrode layer and the ITO current expansion layer, the device mesa is set to be not greater than the size of the ITO current expansion layer, the full-coverage type optimization electrical contact is realized, and the gallium nitride epitaxial layer in other areas is etched completely, so that all devices can complete the electrical contact of the p-GaN layer through the shoulder structure of the ITO, the insulation of the device caused by the failure to etch to the p-GaN layer is avoided, and the current injection strength can be improved by adjusting the shoulder contact area of the ITO current expansion and the metal electrode layer, thereby improving the yield and electrical performance of the Micro-RCLED device.

[0027] 2, the DBR mirror layer at the top, the gallium nitride epitaxial layer in the middle, and the first mirror layer at the bottom form a Fabry-Perot resonant cavity, so that the light emitted by the active region MQW is narrowed after resonance, the device Lambert distribution is improved, and the full width at half maximum of the light emission spectrum is reduced.

[0028] 3、The commonly used single-step CMP chemical mechanical polishing method, due to the wafer stress is high on both sides and low in the middle, and the polishing liquid flows from the edge of the sample first and then to the middle, which can cause more edge thinning and less middle thinning, so the GAN layer of the edge often falls off, and the thickness of the GAN layer in the middle has not been thinned to the required thickness (GAN epitaxial layer, which is commonly 4-6um thick in the industry, of which P-GAN is 100-200nm, MQWs is about 50nm, n-GaN is 1-3um, and 1-3um is u-GAN growth buffer zone), the film layers in the edge and the center area have great thickness difference, which cannot accurately guarantee the thickness control of the surface GaN film system, thereby making the performance of the prepared RC Micro-LED unstable. The CMP-ICP-CMP hybrid thinning process is adopted in the present application, the surface is first polished flat by the first CMP, then the u-GAN is removed and the n-GAN thickness is thinned by the ICP scheme, the n-GaN layer thinning thickness (the thickness error can be controlled within 100nm) and the thinning rate can be accurately controlled, the surface roughness is controlled by the second CMP polishing after etching, and the subsequent surface process requirements are met, thereby effectively improving the manufacturing precision and performance control of the prepared Micro-RCLED device.

[0029] 4、Since dry etching is difficult to etch the metal electrode layer, it can be ensured that all device mesas on the wafer can be completely etched, and a Micro-RCLED device containing a complete diode structure is prepared.

[0030] The present application sets ITO shoulder for electrode power supply in the device, and at the same time uses CMP-ICP-CMP hybrid high-precision GaN thickness reduction to meet the resonant cavity thickness requirement, thereby greatly improving the yield of Micro-RCLED chip mass production, reducing the phenomenon of device open circuit caused by etching of gallium nitride device mesa or insufficient etching, solving the key problem that the resonant cavity thickness cannot be accurately controlled due to uneven n-GAN layer thickness reduction by CMP, leading to unstable device thin film breaking performance, and even device failure, and facilitating the preparation of Micro-RCLED of any waveband. BRIEF DESCRIPTION OF DRAWINGS

[0031] Figure 1 It is a structure schematic diagram of the Micro-RCLED device based on the ITO shoulder structure in the present application.

[0032] Figure 2 It is a process flow chart of the preparation method in the present application.

[0033] The marks shown in the figure and the corresponding component names are:

[0034] 1, substrate layer; 2, bonding metal layer; 3, first mirror layer; 4, ITO current expansion layer; 5, gallium nitride epitaxial layer; 6, metal electrode layer; 7, insulating layer; 8, P-type contact electrode; 9, N-type contact electrode; 10, DBR mirror layer 10; 51, sapphire substrate; 52, u-GaN layer; 53, n-GaN layer; 54, MQW layer; 55, p-GaN layer. DETAILED DESCRIPTION

[0035] From Figure 1 It can be seen that the Micro-RCLED device based on the ITO shoulder structure of the application comprises, from bottom to top, a substrate layer 1, a bonding metal layer 2, a first mirror layer 3, an ITO current expansion layer 4, and a gallium nitride epitaxial layer 5, the gallium nitride epitaxial layer 5 comprises, from bottom to top, a p-GaN layer 55, an MQW layer 54, and an n-GaN layer 53, the substrate layer 1 and the bonding metal layer 2 have the same mesa size and cover the entire wafer, the bonding metal layer 2, the ITO current expansion layer 4, and the first mirror layer 3 have mesa sizes that decrease in turn in an I-shaped arrangement, and the mesa size of the gallium nitride epitaxial layer 5 is not greater than the mesa size of the ITO current expansion layer 4; the bonding metal layer 2 outside the first mirror layer 3 and the ITO current expansion layer 4 is filled with a metal electrode layer 6 arranged in butt joint with the bottom shoulder of the ITO current expansion layer 4, and the top surface of the metal electrode layer 6 is flush with the bottom surface of the p-GaN layer 55;

[0036] An insulating layer 7 is deposited on the metal electrode layer 6 and the sidewall of the gallium nitride epitaxial layer 5, and the insulating layer 7 extends to the top of the n-GaN layer 53;

[0037] A contact electrode is provided on the insulating layer 7, the contact electrode comprises a P-type contact electrode 8 and an N-type contact electrode 9, the P-type contact electrode 8 is arranged on the insulating layer 7 on one side of the gallium nitride epitaxial layer 5, the bottom of the P-type contact electrode 8 penetrates through the insulating layer 7 and is in butt joint with the metal electrode layer 6, and the P-type contact electrode 8 is in butt joint with the p-GaN layer 55 through the metal electrode layer 6 and the ITO current expansion layer 4 to form an ohmic contact for conduction; the N-type contact electrode 9 is provided on the insulating layer 7 on the other side of the gallium nitride epitaxial layer 5, and the top of the N-type contact electrode 9 extends along the insulating layer 7 to the top of the gallium nitride epitaxial layer 5 and is in butt joint with the n-GaN layer 53;

[0038] A DBR mirror layer 10 is provided on the n-GaN layer 53, and the reflectivity of the DBR mirror layer to the light source emitted by the device is less than that of the first mirror layer.

[0039] From Figure 2 It can be seen that the preparation method of the Micro-RCLED device based on the ITO shoulder structure of the application comprises the following steps:

[0040] S1, growing u-GaN layer 52, n-GaN layer 53, MQW layer 54 and p-GaN layer 55 on the sapphire substrate 51 from bottom to top, making a sapphire gallium nitride epitaxial wafer, wherein the u-GaN layer 52 is used as a buffer layer, and the electrons of the n-GaN layer 53 and the holes of the p-GaN layer 55 are combined in the MQW layer 54 as a light emitting region;

[0041] S2, growing a transparent ITO film on the p-GaN layer 55 of the sapphire gallium nitride epitaxial wafer as an ITO current expansion layer 4 to increase the conductivity;

[0042] S3, using a negative resist lithography stripping method, and through EB or magnetic control, preparing a first mirror layer 3 on the ITO current expansion layer 4, the size of which is smaller than the size of the final device mesa;

[0043] S4, forming a protective mask on the outer surface of the first mirror layer 3 through positive resist lithography, and preparing an edge shoulder of the ITO current expansion layer 4 through dry or wet etching, so as to ensure that the mesa sizes of the sapphire gallium nitride epitaxial wafer, the ITO current expansion layer 4 and the first mirror layer 3 are gradually reduced;

[0044] S5, filling a metal electrode layer 6 on the sapphire gallium nitride epitaxial wafer outside the first mirror layer 3 through a negative resist lithography stripping method, and ensuring that the metal electrode layer 6 is in contact with the patterned ITO current expansion layer 4 shoulder surface to form an ohmic contact;

[0045] S6, preparing a bonding metal layer (2) and a substrate layer 1 on the metal electrode layer 6 and the first mirror layer 3 from bottom to top to form a first part;

[0046] S7, inverting the above first part so that the sapphire gallium nitride epitaxial wafer is on top; stripping off the sapphire substrate 51 through laser stripping or chemical etching stripping; removing the u-GaN layer 52 with high precision and speed through a CMP-ICP-CMP mixed thinning process, and thinning the n-GaN layer 53 to a designed thickness, which is flexibly selected according to the design effect strength of the resonant cavity;

[0047] S8, completely etching the n-GaN layer 53, the MQW layer 54 and the p-GaN layer 55 to the metal electrode layer 6 through positive resist lithography mask dry etching, so that the n-GaN layer 53, the MQW layer 54 and the p-GaN layer 55 form a convex gallium nitride epitaxial layer 5 on the metal electrode layer 6, and ensure that the mesa size of the gallium nitride epitaxial layer 5 is not greater than that of the ITO current expansion layer 4;

[0048] S9, depositing an insulating layer 7 extending to the top of the n-GaN layer 53 on the metal electrode layer 6; after positive photoetching, removing the insulating layer 7 of the electrode and the top light-emitting position by dry etching, and sequentially evaporating a P-type contact electrode 8 and an N-type contact electrode 9, so that the P-type contact electrode 8 is opposite to the metal electrode layer 6, and the N-type contact electrode 9 is opposite to the n-GaN layer 53;

[0049] S10, preparing a DBR mirror layer 10 on the n-GaN layer 53, wherein the DBR mirror layer 10 is a DBR mirror.

[0050] In step S2 of the present application, the first mirror layer 3 is a DBR mirror, and the DBR material is two film systems selected from TiO2, SiO2, Ta2O5 and SiN, and the number of the film systems is 10-20 pairs.

[0051] In step S2 of the present application, the first mirror layer 3 is a metal mirror and is made of metal AG or AL.

[0052] In step S4 of the present application, the electrode system of the metal electrode layer 6 is Cr / Al / Ti / Pt / Ti / Pt / Au.

[0053] In step S6 of the present application, the bonding metal layer 2 is made of Ni / Sn or Sn / Au, and the substrate layer 1 is made of Si or metal Cu or Al.

[0054] In step S9 of the present application, the extending insulating layer 7 is an insulating transparent film made of SiO2 or SiN, the metal system of the P-type contact electrode 8 is Ni / Au, and the metal system of the N-type contact electrode 9 is Ti / Al / Ti / Au.

[0055] In step S10 of the present application, the DBR material of the DBR mirror layer 10 is two film systems selected from TiO2, SiO2, Ta2O5 and SiN with high and low refractive index difference, and the number of the film systems is 3-8 pairs.

[0056] In step S7 of the present application, the specific steps of the CMP-ICP-CMP mixed thinning process are as follows: 1, polishing the surface of the u-GaN layer 52 by CMP; 2, removing the u-GaN layer 52 by ICP dry etching with high precision and fast etching, and thinning the n-GaN layer 53 to the designed thickness; and 3, polishing the n-GaN layer 53 to obtain a smooth surface by secondary CMP.

[0057] The application realizes the precise control of the GaN light-emitting area thickness of the Micro-RCLED by sequentially integrating the ITO shoulder structure, the FP resonant cavity structure composed of upper and lower reflectors, the contact conduction mode of the device bottom metal electrode layer 6 and the ITO current expansion layer 4 shoulder structure, substrate transfer and the CMP-ICP-CMP mixed high-precision thinning process in the resonant cavity Micro-RCLED device structure. Compared with the existing Micro-RCLED device, the preparation precision control and process yield of the device are greatly improved, and the problems of device insulation, non-conduction, uneven thickness and extremely low wafer yield in the process preparation of large-size GaN wafers for RC Micro-LED are solved. The chip yield is greatly improved, and the thickness of the GaN light-emitting layer in the middle layer of the resonant cavity is precisely controlled, so that the Micro-RCLED functional device with small divergence angle and narrow spectral full width at half maximum can be prepared in large quantities.

Claims

1. A Micro-RCLED device based on ITO shoulder structure, comprising, from bottom to top, a substrate layer (1), a bonding metal layer (2), a first mirror layer (3), an ITO current spreading layer (4) and a gallium nitride epitaxial layer (5), the gallium nitride epitaxial layer comprising, from bottom to top, a p-GaN layer (55), an MQW layer (54) and an n-GaN layer (53), characterized in that: The mesa size of the bonding metal layer, the ITO current spreading layer and the first mirror layer is arranged in an I-shaped manner with the mesa size gradually decreasing, the mesa size of the gallium nitride epitaxial layer is not greater than the ITO current spreading layer, a metal electrode layer (6) is arranged on the bonding metal layer outside the first mirror layer and the ITO current spreading layer and faces the bottom shoulder of the ITO current spreading layer, an insulating layer (7) is deposited on the metal electrode layer and extends to the top of the n-GaN layer, a P-type contact electrode (8) is arranged on one side of the gallium nitride epitaxial layer and faces the metal electrode layer, the P-type contact electrode is connected with the p-GaN layer through the metal electrode layer and the ITO current spreading layer to form an ohmic contact for conduction, an N-type contact electrode (9) is arranged on the other side of the gallium nitride epitaxial layer and faces the n-GaN layer, a DBR mirror layer (10) is arranged on the n-GaN layer, and the reflectivity of the DBR mirror layer to the light source emitted by the device is less than that of the first mirror layer.

2. A preparation method suitable for the ITO shoulder structure based Micro-RCLED device of claim 1, characterized in that, The method comprises the following steps: S1, growing a u-GaN layer (52), an n-GaN layer (53), an MQW layer (54) and a p-GaN layer (55) on a sapphire substrate (51) from bottom to top to prepare a sapphire gallium nitride epitaxial wafer; S2, growing a transparent ITO film on the p-GaN layer of the sapphire gallium nitride epitaxial wafer as an ITO current spreading layer (4); S3, using a negative photoresist lithography stripping method and through EB or magnetron, preparing a first mirror layer (3) on the ITO current spreading layer, the mesa size of the first mirror layer being less than that of the final device; S4, forming a protective mask on the outer surface of the first mirror layer through a positive photoresist lithography, and preparing an edge shoulder of the ITO current spreading layer through dry or wet etching, so as to ensure that the mesa sizes of the sapphire gallium nitride epitaxial wafer, the ITO current spreading layer and the first mirror layer gradually decrease; S5, filling a metal electrode layer (6) on the sapphire gallium nitride epitaxial wafer outside the first mirror layer through a negative photoresist lithography stripping method, and ensuring that the metal electrode layer is in contact with the patterned shoulder of the ITO current spreading layer to form an ohmic contact; S6, preparing a bonding metal layer (2) and a substrate layer (1) from bottom to top on the metal electrode layer and the first mirror layer to form a first part; S7, inverting the first part so that the sapphire gallium nitride epitaxial wafer is on top, and stripping off the sapphire substrate through laser stripping or chemical etching stripping, and removing the u-GaN layer through a CMP-ICP-CMP mixed thinning process, and thinning the n-GaN layer to a designed thickness; S8, completely etching the n-GaN layer, the MQW layer and the p-GaN layer to the metal electrode layer through a positive photoresist lithography mask dry etching, so that the n-GaN layer, the MQW layer and the p-GaN layer form a gallium nitride epitaxial layer (5) in the form of a boss on the metal electrode layer, and ensure that the mesa size of the gallium nitride epitaxial layer is not greater than the ITO current spreading layer. S9, depositing an insulating layer (7) extending to the top of the n-GaN layer on the metal electrode layer; after positive photoresist lithography, dry etching is used to remove the insulating layer at the electrode and the top light-emitting position, and P-type contact electrode (8) and N-type contact electrode (9) are evaporated in sequence, so that the P-type contact electrode is opposite to the metal electrode layer and the N-type contact electrode is opposite to the n-GaN layer; S10, preparing a DBR mirror layer (10) on the n-GaN layer.

3. The preparation method of the ITO shoulder structure based Micro-RCLED device according to claim 2, characterized in that: In step S2, the first mirror layer is a DBR mirror, and the DBR material is two film systems selected from TiO2, SiO2, Ta2O5 and SiN, and the number is 10-20 pairs.

4. The preparation method of the ITO shoulder structure based Micro-RCLED device according to claim 2, characterized in that: In step S2, the first mirror layer is a metal mirror and is made of metal AG or AL.

5. The preparation method of the ITO shoulder structure based Micro-RCLED device according to claim 2, characterized in that: In step S4, the electrode system of the metal electrode layer is Cr / Al / Ti / Pt / Ti / Pt / Au.

6. The preparation method of the ITO shoulder structure based Micro-RCLED device according to claim 2, characterized in that: In step S6, the bonding metal layer is made of Ni / Sn or Sn / Au, and the substrate layer is made of Si or metal Cu or Al.

7. The preparation method of the ITO shoulder structure based Micro-RCLED device according to claim 2, characterized in that: In step S9, the metal system of the P-type contact electrode is Ni / Au, and the metal system of the N-type contact electrode is Ti / Al / Ti / Au.

8. The preparation method of the ITO shoulder structure based Micro-RCLED device according to claim 2, characterized in that: In step S10, the DBR material of the DBR mirror layer is two film systems with high and low refractive index difference selected from TiO2, SiO2, Ta2O5 and SiN, and the number is 3-8 pairs.

9. The preparation method of the ITO shoulder structure based Micro-RCLED device according to claim 2, characterized in that: In step S7, the specific steps of the CMP-ICP-CMP mixed thinning process are as follows:

1. polishing the surface quickly by CMP; 2. removing the u-GaN layer and thinning the n-GaN layer by ICP dry etching; 3. polishing the surface by secondary CMP to obtain a smooth surface.

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