Exposure marking device and marking method

The exposure marking device uses photochemical reaction to form pattern marking on the wafer, which solves the shortcomings of the existing marking method, realizes an efficient and reliable marking process, and reduces costs.

CN119805871APending Publication Date: 2025-04-11SEMICON MFG ELECTRONICS (SHAOXING) CORP
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Patent Information

Application Number
CN202411901152.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-23
Publication Date
2025-04-11

AI Technical Summary

Technical Problem

The existing wafer abnormal marking methods have problems such as ink dot shedding, uneven size, cumbersome operation, high cost, low degree of automation, and inapplicable to small-sized products.

Method used

An exposure marking device is adopted, which includes a light source, a sheet bearing unit, an optical device and an exit unit. The light reacts photochemically with the photosensitive layer on the wafer to form a pattern mark of a set shape.

Benefits of technology

It improves the reliability and efficiency of marking, reduces the cost of marking materials, is suitable for single wafers of different sizes, and is integrated into existing wafer processing processes.

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Abstract

The invention relates to the technical field of semiconductor manufacturing, and provides an exposure type marking device and a marking method.The exposure type marking device comprises a light source, a wafer bearing unit, an optical device and an emergent unit; the light source is used for providing light required by exposure; the wafer bearing unit is provided with a bearing surface, and the bearing surface is used for bearing a wafer to be marked; the optical device is used for guiding the light, so that at least one part of the light is emitted through the emitting unit and irradiates a wafer borne on the bearing face, the light and a photosensitive layer on the wafer are subjected to a photochemical reaction, and a graphic mark in a set shape is formed. According to the device, the abnormal marking of the wafer can be realized in an exposure mode, the marking reliability is improved, the marking efficiency is improved, and the marking material cost is reduced.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to an exposure type marking device and a marking method. Background Art

[0002] Wafer abnormality marking is an important process before semiconductor packaging.

[0003] In this testing process, wafer testing (CP) is used to mark unqualified single chips (NG dies) or single chips with abnormal appearance as abnormal. This allows the wafers to be identified and not used during the packaging process after slicing.

[0004] The existing marking method is usually to mark by physical contact, and the marking process is performed separately after the wafer processing process (exposure, development, etching and other processes) is completed.

[0005] The above-mentioned marking means usually include ink pen dotting and glue dispensing;

[0006] Ink pen marking is a process of leaving a mark on a single chip (die) by manually holding a pen and marking. Ink pen marking may cause problems such as ink dot falling off, uneven ink dot size, and cumbersome human operation.

[0007] The dispensing method is usually performed by dispensing equipment, which has a high degree of automation. The dispensing equipment is used to dispense glue to leave a specific mark on a single wafer. This marking method usually has the following problems:

[0008] There are problems such as poor adhesion between the dispensing material and the wafer surface, high dispensing cost, low WPH (number of wafers produced per unit time) of dispensing, and it is not applicable to small-sized single-chip products.

[0009] To this end, the present invention provides an exposure marking device and a marking method to improve the technical problems in the above-mentioned marking process. Summary of the invention

[0010] The object of the present invention is to provide an exposure marking device and a marking method, which can realize abnormal marking of wafers by exposure, help to improve the reliability of marking, improve marking efficiency, and reduce marking material costs.

[0011] The present invention provides an exposure type marking device, comprising: a light source, a film receiving unit, an optical device and an emission unit;

[0012] The light source is used to provide light required for exposure;

[0013] The wafer carrier unit has a carrying surface, and the carrying surface is used to carry the wafer to be marked;

[0014] The optical device is used to guide the light so that at least a portion of the light is emitted through the emission unit and irradiates the wafer carried on the carrying surface, undergoes a photochemical reaction with the photosensitive layer on the wafer, and forms a graphic mark of a set shape.

[0015] Optionally, the emission unit includes a first emission unit and a second emission unit;

[0016] The exposure type marking device further comprises an alignment mark, and the alignment mark is arranged on the film holding unit;

[0017] The optical device is used to guide the light so that a portion of the light is emitted through the first emission unit and irradiates the wafer carried on the carrying surface, and a portion of the light is emitted through the second emission unit to align with the alignment mark.

[0018] Optionally, the sheet-carrying unit is arranged to move relative to the emission unit along a direction parallel to the carrying surface.

[0019] Optionally, the exposure-type marking device further comprises a light spot adjustment unit, which is disposed at the first emission unit and is used to adjust the light spot size of the light emitted through the first emission unit.

[0020] Optionally, the exposure-type marking device further comprises a shading unit, which is movably disposed on the transmission path of the light and is used to block or open the transmission path of the light.

[0021] The present invention also provides a marking method, comprising the following steps:

[0022] Coating: coating the wafer with a photosensitive layer;

[0023] Marking exposure: guiding light to illuminate a single abnormal chip on the wafer, and photochemically reacting with the photosensitive layer on the single chip to form a graphic mark of a set shape.

[0024] Optionally, the photosensitive layer is a protective insulating layer of the wafer.

[0025] Optionally, the material of the photosensitive layer includes polyimide.

[0026] Optionally, the marking method further comprises the following steps after the marking exposure:

[0027] Development: at least used to remove the photosensitive layer located in the graphic mark area after the photochemical reaction, and expose the substrate material located below the photosensitive layer corresponding to the graphic mark area;

[0028] Etching: removing the surface material of the exposed substrate to form a marking pattern consistent with the graphic mark on the substrate.

[0029] Optionally, the following steps are further included between the step of coating and the step of marking exposure:

[0030] Pattern exposure: guiding light through the mask to illuminate the wafer, and undergoing a photochemical reaction with the photosensitive layer on the wafer to form a specific pattern.

[0031] Optionally, the graphic mark does not overlap with the specific pattern.

[0032] In summary, the exposure marking device includes: a light source, a film supporting unit, an optical device and an output unit; the light source is used to provide the light required for exposure; the film supporting unit has a carrying surface, and the carrying surface is used to carry the wafer to be marked; the optical device is used to guide the light so that at least a part of the light is emitted through the output unit and irradiates the wafer carried on the carrying surface, and undergoes a photochemical reaction with the photosensitive layer on the wafer to form a graphic mark of a set shape.

[0033] Configured in this way, the marking device in the present invention realizes the marking of abnormal single wafers through non-physical contact exposure, and will not cause secondary damage to the surface of the existing wafer. The marking device forms a graphic mark through the photochemical reaction of light and the photosensitive layer on the wafer, which is conducive to the standardization of abnormal marks, can improve the phenomenon of uneven size of the marking graphics, and is also conducive to increasing the WPH (number of wafers produced per unit time) of the mark, which helps to improve the marking efficiency. Moreover, the marking method of the marking device will not additionally adhere marking materials to the wafer, and there is no phenomenon of marking falling off, which helps to improve the reliability of the marking. In addition, there is no need to consider the material cost and the bonding strength of the marking material with the wafer surface during the marking process, which helps to simplify the marking process and reduce the cost of marking materials.

[0034] The marking device of the present invention can easily adjust the size of the light spot irradiated on the wafer, and has a high marking accuracy. Therefore, the marking device can be used to mark single wafers of different sizes and has a wider range of applications.

[0035] The marking device in the present invention uses the method of exposing the photosensitive layer to realize the marking of abnormal single wafers, so that the entire marking process is more closely integrated with the existing wafer processing technology (exposure, development, etching and other processes). Therefore, the marking process can be integrated into the existing wafer processing technology. For example, the existing wafer is coated with a protective insulating layer (such as polyimide, polyimide, abbreviated as PI), and after the pattern exposure (such as PI exposure), the marking exposure is immediately performed through the above-mentioned marking device. The entire marking process can be more reasonably integrated into the existing wafer processing technology, so there is no need to set up a separate marking process after the existing wafer processing technology is completed, which helps to further integrate and optimize the wafer manufacturing process and improve the wafer manufacturing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a structural schematic diagram of an exposure type marking device according to an embodiment of the present invention;

[0037] Figure 2 It is a side view schematic diagram of the structure of an exposure type marking device according to one embodiment of the present invention;

[0038] Figure 3 A schematic structural diagram of a light shielding unit of an exposure-type marking device according to an embodiment of the present invention;

[0039] Figure 4 A schematic diagram of a positive photoresist exposure process according to an embodiment of the present invention;

[0040] Figure 5 FIG. 4 is a schematic diagram of a negative photoresist exposure process according to an embodiment of the present invention.

[0041] Among them, in the attached drawings:

[0042] 10- Light source;

[0043] 20- sheet-carrying unit; 201- bearing surface;

[0044] 21- film receiving table;

[0045] 22- base;

[0046] 30-optical device; 31-spherical mirror; 32-reflecting mirror; 33-exposure lens;

[0047] 40-exit unit; 41-first exit unit; 411-main optical channel; 42-second exit unit;

[0048] 50-alignment mark;

[0049] 60-track unit;

[0050] 70-light spot adjustment unit;

[0051] 80-shading unit;

[0052] 90-operating platform;

[0053] 100-wafer. DETAILED DESCRIPTION

[0054] The exposure marking device proposed by the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0055] As used in the present invention, the singular forms "one", "an" and "the" include plural objects, the term "or" is usually used to include the meaning of "and / or", the term "several" is usually used to include the meaning of "at least one", and the terms "at least two" or "multiple" are usually used to include the meaning of "two or more". In addition, the terms "first", "second" and "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first", "second" and "third" can explicitly or implicitly include one or at least two of the features. In addition, as used in the present invention, "installed", "connected", "connected", and one element "set" on another element should be understood in a broad sense, usually only indicating that there is a connection, coupling, matching or transmission relationship between the two elements, and the connection, coupling, matching or transmission between the two elements can be direct or indirect through an intermediate element, and cannot be understood as indicating or implying the spatial position relationship between the two elements, that is, one element can be in any orientation such as inside, outside, above, below or on one side of another element, unless the content clearly indicates otherwise. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances. In addition, directional terms such as above, below, up, down, upward, downward, left, right, etc. are used with respect to the exemplary embodiments as they are shown in the figures, with the upward or upper direction toward the top of the corresponding figure, and the downward or lower direction toward the bottom of the corresponding figure.

[0056] Please refer to Figure 1 and Figure 2 As shown, this embodiment provides an exposure-type marking device, which includes: a light source 10 , a film receiving unit 20 , an optical device 30 and an emission unit 40 .

[0057] The light source 10 is used to provide light required for exposure.

[0058] In this embodiment, the light source 10 is a mercury lamp for emitting ultraviolet light, and a photochemical reaction occurs between the ultraviolet light and the photosensitive layer, so the photosensitive layer coated on the wafer is suitable for ultraviolet photoresist (EUV photoresist). In other alternative embodiments, the light source 10 can select the required light source type based on the light type adapted to the photosensitive layer, for example, if the light is X-ray, ion beam, electron beam, etc., then the corresponding light source can be adaptively selected.

[0059] The wafer carrier unit 20 has a carrying surface 201 , and the carrying surface 201 is used for carrying the wafer 100 to be marked.

[0060] Please continue to refer to Figure 1 and Figure 2 As shown, the wafer holding unit 20 includes a disc-shaped wafer holding platform 21, the axis of which extends vertically, and the upper surface of which serves as a bearing surface 201. The wafer holding unit 20 is a vacuum suction cup structure, and an adsorption groove is provided on its bearing surface 201, and the adsorption groove is connected to an external vacuum device to form a negative pressure environment to achieve vacuum adsorption of the wafer 100. In addition, the wafer holding unit 20 also includes a plurality of ejector pins (PIN) for receiving the wafer. In other alternative embodiments, the wafer holding unit 20 may also be an electrostatic suction cup structure or other known structures that can fix and carry the wafer 100.

[0061] The optical device 30 is used to control the transmission path of the light, and can also be used to control some optical parameters of the light (such as wavelength, frequency, intensity, beam diameter, etc.).

[0062] In this embodiment, the optical device 30 is used to guide the light emitted by the light source 10, and allows at least a portion of the light to be emitted through the output unit 40 to illuminate the wafer carried on the carrying surface 201, undergoing a photochemical reaction with the photosensitive layer on the wafer to form a graphic mark of a set shape.

[0063] During the image marking process, the specific position of the abnormal single chip (die) to be marked can be determined in conjunction with the abnormal overlay formed during the wafer inspection process, and light can be irradiated to the corresponding position of the single abnormal chip on the wafer to form a corresponding graphic mark on the photosensitive layer on the single abnormal chip. The image mark can be recognized and, after development, a permanent characteristic pattern will be left on the photosensitive layer.

[0064] The above-mentioned marking device realizes the marking of abnormal single wafers through non-physical contact exposure, and will not cause secondary damage to the surface of existing wafers. The marking device forms a graphic mark through the photochemical reaction of light and the photosensitive layer on the wafer, which is conducive to the standardization of abnormal marks, can improve the phenomenon of uneven size of the marking graphics, and is also conducive to increasing the WPH (number of wafers produced per unit time) of the mark, which helps to improve the marking efficiency. Moreover, the marking method of the marking device will not adhere additional marking materials to the wafer, and there is no phenomenon of marking falling off, which helps to improve the reliability of the marking. In addition, there is no need to consider the material cost and the bonding strength of the marking material with the wafer surface during the marking process, which helps to simplify the marking process and reduce the cost of marking materials.

[0065] The size of the light spot irradiated on the wafer by the above-mentioned marking device is easy to adjust, and the marking accuracy is high. Therefore, the marking device can be used for marking single wafers of different sizes and has a wider range of applications.

[0066] The above-mentioned marking device uses the method of exposing the photosensitive layer to realize the marking of abnormal single wafers, so that the entire marking process is more closely integrated with the existing wafer processing technology (exposure, development, etching and other processes). Therefore, the marking process can be integrated into the existing wafer processing technology. For example, the existing wafer is coated with a protective insulating layer (such as polyimide, polyimide, abbreviated as PI), and after the pattern exposure (such as polyimide exposure), the marking exposure is immediately performed through the above-mentioned marking device. The entire marking process can be more reasonably integrated into the existing wafer processing technology, so there is no need to set up a separate marking process after the existing wafer processing process is completed, which helps to further integrate and optimize the wafer manufacturing process and improve the wafer manufacturing efficiency.

[0067] Please continue to refer to Figure 1 and Figure 2 As shown, the exposure-type marking device further includes an alignment mark 50 , and the alignment mark 50 is disposed on the film holding unit 20 .

[0068] The wafer unit 20 further includes a base 22, which is a square plate structure as a whole. The wafer stage 21 is arranged on the base 22, and the geometric center point of the base 22 falls on the central axis of the wafer stage 21. An alignment mark 50 is arranged on the base 22, which is used for the initial alignment of the wafer unit 20 and the emission unit 40 (the specific alignment method is described in detail in the following content in conjunction with the structure of the alignment mark 50).

[0069] The exposure marking device further includes a track unit 60, which is disposed on the operating platform 90. The track unit 60 includes an X-direction track and a Y-direction track disposed horizontally, wherein the X-direction track is disposed on the Y-direction track and can be driven to move along the Y-direction on the Y-direction track, and the base 22 is disposed on the X-direction track and can be driven to move along the X-direction on the X-direction track.

[0070] Therefore, by setting the track unit 60, the entire wafer carrier unit 20 can be driven to move in the horizontal direction along the X direction and the Y direction (the X direction and the Y direction are perpendicular to each other), thereby adjusting the position of the wafer carried. The track unit 60 can adopt the existing X / Y grating slide structure. The track unit 60 belongs to the prior art and will not be described in detail here. In other alternative embodiments, the track unit 60 can also select other known existing track structures that can meet the adjustment accuracy of the wafer carrier unit 20.

[0071] Please continue to refer to Figure 1 and Figure 2 As shown, the emission unit 40 includes a first emission unit 41 and a second emission unit 42 .

[0072] Combination Figure 1 and Figure 2 As shown, in this embodiment, the exposure-type marking device further includes an operating platform 90 , and the light source 10 , the film receiving unit 20 and the emission unit 40 are all installed on the operating platform 90 .

[0073] The first emission unit 41 is generally in an approximately inverted "U"-shaped structure, and includes a crossbeam and vertical arms connected to both ends of the crossbeam, and both vertical arms extend vertically downward. One of the vertical arms is used as a connection end ( Figure 2 The right end of the first emission unit 41 in the middle) is connected to the operating platform 90, and the other upright arm serves as the emission end ( Figure 2 The left end of the first emission unit 41 is suspended directly above the film-bearing unit 20, and the emission end of the first emission unit 41 can purchase an existing lens assembly to meet its optical usage requirements.

[0074] The first emitting unit 41 is a hollow structure as a whole, that is, the cross beam and the two upright arms of the first emitting unit 41 are hollow structures, so that the first emitting unit 41 has a main optical channel 411 which is approximately in the shape of an inverted "U" along the direction of the first emitting unit 41. A part of the optical device 30 is arranged in the main optical channel 411, so that part of the light emitted by the light source 10 is emitted along the main optical channel 411 and vertically downward through the emitting end of the first emitting unit 41 to irradiate the wafer carried on the carrying surface 201.

[0075] The second emitting unit 42 is also an inverted "U"-shaped structure as a whole, and the second emitting unit 42 is mounted on the crossbeam of the first emitting unit 41. The second emitting unit 42 is also a hollow structure, so an auxiliary optical channel (not shown in the figure) is formed in the second emitting unit 42 along the direction of its shape. One end of the second emitting unit 42 is connected to the first emitting unit 41, and the auxiliary optical channel is connected to the main optical channel 411. The other end of the first emitting unit 41 is set downward as the emitting end, and the emitting end of the first emitting unit 41 can purchase an existing lens assembly to meet its optical use requirements. The optical device 30 also allows a portion of the light emitted by the light source 10 to enter the auxiliary optical channel, and is emitted through the emitting end of the second emitting unit 42, and irradiated on the alignment mark 50 to align the emitting unit 40 with the carrier unit 20.

[0076] Please refer to Figure 1 and Figure 2 As shown, the optical device 30 includes a spherical mirror 31, a plurality of reflectors 32 and a beam splitting optical element (not shown in the figure), the light source 10 and the spherical mirror 31 are arranged in the main optical channel 411, and the light source 10 and the spherical mirror 31 are arranged near the connection end ( Figure 2 At this time, the connection end of the first emitting unit 41 also serves as a light shield, which is used to cover the outside of the light source 10 to prevent the light emitted by the light source 10 from leaking. Figure 2 The right end of the first emitting unit 41 is used to install the light source 10 and the spherical mirror 31. However, the volume of the light source 10 and the spherical mirror 31 is relatively large, so the connection end ( Figure 2 The cross-sectional shape of the right end of the first emission unit 41 is larger than the cross-sectional shape of the beam of the first emission unit 41 .

[0077] In this embodiment, the connection end ( Figure 2 The first emitting unit 41 is a right end of the first emitting unit 41, which is a rectangular box-shaped structure as a whole. On the one hand, it is used to be fixedly installed on the operating platform 90 to ensure the overall stability of the emitting unit 40; on the other hand, it is also convenient for the installation of components such as the light source 10 and the spherical mirror 31. In other alternative embodiments, the shape of the connecting end of the first emitting unit 41 can be flexibly adjusted based on its use requirements, for example, it can be set to a cylindrical shape or other shapes.

[0078] In this embodiment, the emission end ( Figure 2The left end of the first emission unit 41 in the middle) is an overall cylindrical structure, which is convenient for installing optical lenses and also convenient for purchasing existing optical lenses as its emission end to ensure good optical performance. In other alternative embodiments, the shape of the emission end of the first emission unit 41 can be flexibly adjusted based on its use requirements, for example, it can be set to a rectangular cross-section consistent with the cross-section of the first emission unit 41 or other shapes.

[0079] In this embodiment, the cross beam ( Figure 2 The cross beam of the first emission unit 41 is in the middle of the first emission unit 41 and is in a long strip shape as a whole, and its cross section is a rectangle. In other alternative embodiments, the shape of the cross beam of the first emission unit 41 can be flexibly adjusted based on its use requirements, for example, it can be set to a circular cross section consistent with the emission end of the first emission unit 41 or other shapes.

[0080] In this embodiment, the cross-section of the main optical channel 411 in the first emission unit 41 and the cross-section of the auxiliary optical channel in the second emission unit 42 are both circular. In other alternative embodiments, the cross-sectional shapes of the main optical channel 411 and the cross-sectional shapes of the auxiliary optical channel can be flexibly adjusted based on actual use requirements.

[0081] In this embodiment, the outer dimensions of the first emission unit 41 are greater than the outer dimensions of the second emission unit 42, so that the cross-sectional area of ​​the main optical channel 411 is greater than the cross-sectional area of ​​the auxiliary optical channel, that is, the main optical channel 411 is thicker than the auxiliary optical channel. This setting mode is adapted to the use functions of the main optical channel 411 and the auxiliary optical channel, wherein the main optical channel 411 is used for the transmission of exposure light, which consumes a large amount of light, and is used for the installation of components such as the light source 10, so a thicker main optical channel 411 is set to meet the requirements of light transmission and the installation of other components; the auxiliary optical channel is used for the transmission of alignment light, which consumes a small amount of light, so a thinner main optical channel 411 is set.

[0082] Please continue to refer to Figure 1 and Figure 2As shown, the spherical mirror 31 is located on the side of the light source 10 opposite to the light emission direction, and the concave surface of the spherical mirror 31 faces the light source 10. The scattered light emitted by the light source 10 is collected by the spherical mirror 31 and then introduced into the main optical channel 411. In addition, a plurality of reflectors 32 are arranged in the main optical channel 411 to control the transmission direction of the light so that the light runs along a preset trajectory. In addition, a beam splitting optical element (not shown in the figure) is arranged at a position where the auxiliary optical channel is connected to the main optical channel 411. The beam splitting optical element can be, for example, a polarization beam splitting prism, which can make a part of the incident light be transmitted and the other part be reflected to form two beams of light. One of the two beams of light is transmitted along the main optical channel 411 and emitted through the first emission unit 41, and the other beam of light is introduced into the auxiliary optical channel and emitted through the second emission unit 42. The light beam splitting technology is a prior art and will not be described in detail here. Among them, a plurality of reflectors 32 can also be arranged in the second emission unit 42 to control the transmission direction of the light.

[0083] Combination Figure 1 As shown, the light emitted by the first emission unit 41 is irradiated on the wafer 100 carried by the wafer carrier unit 20, so as to form a mark pattern on the wafer by exposure. The light emitted by the second emission unit 42 is irradiated downward on the alignment mark 50, so as to perform the initial alignment between the wafer carrier unit 20 and the emission unit 40. The alignment mark 50 can be an optical signal receiver. During the alignment process, the position of the wafer carrier unit 20 is adjusted horizontally so that the light emitted by the second emission unit 42 is irradiated on the alignment mark 50. When the alignment mark 50 receives the optical signal, it means that the wafer carrier unit 20 is aligned with the emission unit 40.

[0084] In other alternative embodiments, the alignment mark 50 may also be a reflective mark, and the alignment is determined by detecting the reflectivity of the light emitted by the second emission unit 42. Alternatively, the alignment mark 50 may also be a prominent mark, and real-time images are collected through image recognition and transmitted to the terminal computer, and the alignment is determined by calculating whether the light spot of the light emitted by the second emission unit 42 coincides with the alignment mark 50. The specific structure of the alignment mark 50 can be adaptively adjusted based on the actual alignment method.

[0085] In addition, the light emitted by the first emission unit 41 can also be used for auxiliary alignment of the wafer unit 20 and the wafer 100. Usually, the wafer 100 has a TVPA mark of the front-end process, and the TVPA mark is, for example, a cross mark. By detecting the relative position relationship between the light spot emitted by the first emission unit 41 and the alignment mark on the wafer, it is determined whether the wafer unit 20 and the wafer 100 are aligned relative to the emission unit 40. The alignment mark 50 and the alignment mark on the wafer are used to quickly realize the machine alignment, which helps to improve the alignment accuracy and improve the alignment efficiency. The cooperation between the second emission unit 42 and the alignment mark 50 helps to reduce the mark offset error and reduce the risk of mark abnormality.

[0086] The above-mentioned alignment mark 50 is provided with one, and is aligned with one second emission unit 42. In other alternative embodiments, multiple alignment marks 50 may be provided and are aligned with multiple second emission units 42 to achieve three-dimensional comprehensive alignment.

[0087] In addition, the optical device 30 further includes an exposure lens 33 , which is disposed at the output end of the first emission unit 41 and is used to control optical parameters of the light.

[0088] Furthermore, in this embodiment, the exposure type marking device further includes a light spot adjustment unit 70, and the light spot adjustment unit 70 is disposed at the exit end ( Figure 2 The left end of the first emission unit 41 is used to adjust the spot size of the light emitted by the first emission unit 41. Then the size of the graphic mark formed on the wafer is adjusted to adapt to the marks of single chips of different sizes.

[0089] The light spot adjustment unit 70 may be a lens group, which is an optical system composed of multiple lenses, such as a lens group, a concave lens, etc., to design the optical path and optically adjust the light beam. Through a suitable lens combination and adjustment distance, precise control and scaling of the light spot diameter can be achieved. The lens combination may, for example, use an existing beam expander. The light spot adjustment unit 70 may select an existing optical device based on its use requirements. The specific structure, installation and use methods of the light spot adjustment unit 70 are all prior art and will not be described in detail here.

[0090] In addition, in other alternative embodiments, the shape of the light spot may be adjusted by adding an optical lens or a mask structure, thereby adjusting the shape of the graphic mark.

[0091] In this embodiment, the exposure-type marking device further includes a shading unit 80 , which is movably disposed on the transmission path of the light and is used to block or open the transmission path of the light.

[0092] Please continue to refer to Figure 2 and Figure 3 As shown, in this embodiment, the shading unit 80 includes three shading blades, and the three shading blades form a fan blade structure. The shading unit 80 is installed near the connection end ( Figure 2 The shading unit 80 is located at the right end of the first emitting unit 41 in the light source, and the shading unit 80 is located on one side of the light source 10 along the light emission direction. The shading unit 80 is arranged to rotate, and during the rotation of the shading unit 80, each shading blade will pass through the light transmission path in sequence. The on-off of the light transmission path is controlled by controlling the rotation angle of the shading unit 80. For example, when a shading blade just rotates to the light transmission path, the light is blocked, and the first emitting unit 41 and the second emitting unit 42 have no emitting light; when the shading unit 80 rotates, the two shading blades rotate to the light transmission path, then the light is not blocked, and the first emitting unit 41 and the second emitting unit 42 have emitting light. The shading unit 80 is used to control the exposure timing and exposure duration of the first emitting unit 41.

[0093] The above-mentioned shading unit 80 can be externally connected to a motor or other rotating driving component to drive the rotation.

[0094] In other alternative embodiments, the shading unit 80 may also use linear motion to block and open the light path.

[0095] This implementation also provides a marking method, comprising the following steps:

[0096] Coating: A photosensitive layer is coated on the wafer; the photosensitive layer is a protective insulating layer of the wafer, which is an existing coating in the wafer processing process (exposure, development, etching and other processes), and plays an insulating and protective role for the wafer. For example, the material of the photosensitive layer is a photosensitive material including polyimide (PI).

[0097] Marking exposure: guiding light to illuminate the abnormal single chip on the wafer, and photochemically reacting with the photosensitive layer on the single chip to form a graphic mark of a set shape. The light guiding process can be performed by the exposure marking device described above.

[0098] Furthermore, the coating step and the mark exposure step further include the following steps:

[0099] Pattern exposure: guiding light through the mask to illuminate the wafer, and undergoing a photochemical reaction with the photosensitive layer on the wafer to form a specific pattern.

[0100] Before the above coating step, the wafer test map (CP map) and defect scan map (YE scan map) can be imported to confirm the position that needs to be exposed. In addition, after performing pattern exposure, the abnormality merge map (merge map) can be imported to determine the position of the abnormal single wafer, and then the specific single abnormal wafer can be marked and exposed to form the required graphic mark.

[0101] Pattern exposure can utilize existing processes. In this embodiment, coating and marking exposure are respectively located before and after pattern exposure in order to further highlight the deep integration of the marking method with existing semiconductor process technology. To further explain the integration with existing semiconductor process technology, this embodiment is described by taking the existing polyimide semiconductor process technology as an example.

[0102] Polyimide semiconductor process is an important semiconductor manufacturing technology and is widely used in the semiconductor industry.

[0103] Polyimide is a polymer material with excellent insulation properties and chemical stability. In the field of semiconductor manufacturing, polyimide is used as an important material to make the protective insulation layer of semiconductor devices, which plays the role of isolating conductive materials and protecting devices.

[0104] The polyimide semiconductor process is a process technology that uses photosensitive materials containing polyimide to make semiconductor devices. The polyimide semiconductor process is mainly used for surface passivation of semiconductor devices and multi-layer wiring insulation. In surface passivation, a film containing polyimide is used to protect the surface of semiconductor devices to prevent the external environment from affecting them. In multi-layer wiring insulation, a film containing polyimide is used as an insulating layer to isolate different circuit layers and improve the stability and reliability of the circuit.

[0105] The polyimide semiconductor process includes several key steps, generally including preparation of substrate, coating of photosensitive material containing polyimide, photolithography (including alignment, polyimide exposure and development, etc.), etching, annealing and other process steps. The specific process flow can be adjusted according to actual conditions, but the above steps are the core steps of the polyimide semiconductor process. Among them, polyimide exposure is used to form the patterns required for passivation and insulation on the coating containing polyimide.

[0106] The marking method in this embodiment is integrated into the existing polyimide semiconductor process. The coating step in the marking method can utilize the step of coating the photosensitive material containing polyimide in the polyimide semiconductor process; the pattern exposure in the marking method can utilize the photolithography process (including alignment, pattern exposure and development, etc.) in the polyimide semiconductor process; the marking exposure process in the marking method can be integrated into the photolithography process in the existing polyimide semiconductor process, and in the photolithography process in the polyimide semiconductor process, the marking exposure of this embodiment is performed after the pattern exposure process is performed. Therefore, the marking method in this embodiment can be effectively integrated into the existing polyimide semiconductor process.

[0107] In addition, based on the transmittance of the wafer product in polyimide, select the appropriate polyimide adhesive type. When the transmittance is greater than 50%, choose negative resist, and when the transmittance is less than 50%, use positive resist.

[0108] Combination Figure 4 As shown, a positive photoresist is selected, and the material in the exposed area of ​​the positive photoresist is soluble in the developer; Figure 4 From left to right in the figure, there are coating of positive resist, pattern exposure, mark exposure and development. After development, the positive resist in the exposed area is removed, thus forming the required pattern and graphic mark.

[0109] Combination Figure 5 As shown, a negative resist is selected, and the negative resist is cured in the exposure area, and the material in the exposure area is retained. Figure 5 From left to right in the figure, negative resist coating, pattern exposure, mark exposure and development are performed. After development, the negative resist in the exposed area is solidified, and the material in the remaining area is removed, thus forming the required pattern and graphic mark.

[0110] Combination Figure 4 and Figure 5 As shown, the graphic mark formed by the mark exposure is circular, and the graphic mark does not overlap with the pattern formed by the pattern exposure, so as to maintain the integrity of the graphic mark and facilitate the recognition of the graphic mark. The position of the mark exposure on a single wafer can be adjusted based on the actual pattern exposure pattern to ensure that the graphic mark does not overlap with the pattern formed by the pattern exposure. In addition, the size and shape of the mark exposure can also be adjusted based on the pattern exposure pattern to ensure that the shape of the graphic mark is not interfered with by the pattern exposure pattern, so as to facilitate the recognition of the graphic mark.

[0111] In addition, the marking method in this embodiment may further include an alignment step, and corresponding alignment steps are performed before the mark exposure and before the pattern exposure, wherein the alignment step before the pattern exposure adopts existing technical means, and the alignment step before the mark exposure can utilize the second output unit 42 in the above-mentioned exposure marking device to cooperate with the alignment mark 50 for alignment, and the first output unit 41 can be used to cooperate with the alignment mark on the wafer 100 for auxiliary alignment. The alignment principle has been detailed in the above content and will not be repeated here.

[0112] The above-mentioned marking method illustrates the high integration process of the marking method with the existing process by enumerating the polyimide semiconductor process, wherein the photosensitive material containing polyimide is used as the protective insulating layer of the wafer and will eventually adhere to the surface of the wafer. Therefore, in the subsequent process, except for the photosensitive layer in the exposure area, the rest of the photosensitive layer does not need to be removed, so the above-mentioned exposure marking method will directly leave a graphic mark on the polyimide layer.

[0113] In other alternative embodiments, the photosensitive layer may be made of other photosensitive materials used for wafer insulation or protection. Except for the exposed areas that need to be removed by development, the remaining areas of this type of photosensitive material remain attached to the wafer.

[0114] In other alternative embodiments, the photosensitive layer may also use a non-protective insulating photosensitive material, such as other known ultraviolet photoresists (such as polyvinyl alcohol cinnamate photoresists, polyethylene oxide ethyl cinnamate photoresists and cinnamyl diester photoresists), deep ultraviolet photoresists, X-ray glues (such as fluorine-containing polymethacrylates), electron beam glues (such as polymethyl acrylate) and ion beam glues. Such photosensitive materials need to be completely removed in subsequent processes, so it is impossible to leave graphic marks directly on the photosensitive layer. Such photosensitive layers require subsequent development and etching processes to transfer the graphic marks from the photosensitive layer to the substrate material below the photosensitive layer.

[0115] Therefore, in this embodiment, the marking method further includes the following steps after the marking exposure:

[0116] Development: at least used to remove the photosensitive layer located in the graphic mark area after the photochemical reaction, and expose the substrate material located below the photosensitive layer in the area corresponding to the graphic mark; the development step can use the existing development process, which is mainly used to remove the photosensitive material corresponding to the pattern in the pattern exposure, and at the same time, the photosensitive material in the graphic mark area is also removed;

[0117] Etching: removing the surface material of the exposed substrate to form a marking pattern consistent with the graphic mark on the substrate.

[0118] In the developing step, the corresponding photosensitive material can be removed by dissolving with an existing chemical solution. In the etching step, the surface material of the substrate can be removed by existing dry etching or wet etching. The developing and etching can utilize existing technologies, which will not be described in detail here.

[0119] The above-mentioned marking method can be combined with the top metal process to etch a graphic mark on the aluminum layer of the wafer; or the above-mentioned marking method can be combined with the passivation process to etch a graphic mark on a passivation layer such as tetraethoxysilane (TEOS). The specific marking method is highly integrated with the existing photosensitive material and the photolithography process related to the material, and its integration method is similar to the integration method of the above-mentioned polyimide semiconductor process, which will not be repeated here.

[0120] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0121] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. An exposure marking device, characterized in that: include: Light source, film receiving unit, optical device and emission unit; The light source is used to provide light required for exposure; The wafer carrier unit has a carrying surface, and the carrying surface is used to carry the wafer to be marked; The optical device is used to guide the light so that at least a portion of the light is emitted through the emission unit and irradiates the wafer carried on the carrying surface, undergoes a photochemical reaction with the photosensitive layer on the wafer, and forms a graphic mark of a set shape.

2. The exposure marking device according to claim 1, characterized in that: The emission unit includes a first emission unit and a second emission unit; The exposure type marking device further comprises an alignment mark, and the alignment mark is arranged on the film holding unit; The optical device is used to guide the light so that a portion of the light is emitted through the first emission unit and irradiates the wafer carried on the carrying surface, and a portion of the light is emitted through the second emission unit to align with the alignment mark.

3. The exposure marking device according to claim 1, characterized in that: The sheet-carrying unit is arranged to move relative to the emission unit along a direction parallel to the carrying surface.

4. The exposure marking device according to claim 2, characterized in that: The exposure-type marking device further includes a light spot adjustment unit, which is disposed on the first emission unit and is used to adjust the light spot size of the light emitted through the first emission unit.

5. The exposure marking device according to claim 1, characterized in that: The exposure-type marking device further comprises a shading unit, which is movably disposed on the transmission path of the light and is used to block or open the transmission path of the light.

6. A marking method, characterized in that: The following steps are involved: Coating: coating the wafer with a photosensitive layer; Marking exposure: guiding light to illuminate a single abnormal chip on the wafer, and photochemically reacting with the photosensitive layer on the single chip to form a graphic mark of a set shape.

7. The marking method according to claim 6, characterized in that: The photosensitive layer is a protective insulating layer of the wafer.

8. The marking method according to claim 7, characterized in that: The material of the photosensitive layer includes polyimide.

9. The marking method according to claim 6, characterized in that: In the marking method, after the marking exposure, The following steps are involved: Development: at least used to remove the photosensitive layer located in the graphic mark area after the photochemical reaction, and expose the substrate material located below the photosensitive layer in the area corresponding to the graphic mark; Etching: removing the surface material of the exposed substrate and forming a marking pattern consistent with the graphic mark on the substrate.

10. The marking method according to claim 6, characterized in that: The steps of coating and marking exposure are also included between the step of coating and the step of marking exposure: Pattern exposure: guiding light through the mask to illuminate the wafer, and undergoing a photochemical reaction with the photosensitive layer on the wafer to form a specific pattern.

11. The marking method according to claim 8, characterized in that: The graphic mark does not overlap with the specific pattern.