Processor resource management method and related device

Abstract

The invention provides a processor resource management method and a related device. The electronic device may identify critical threads, critical dependent threads, and non-critical threads. When the key thread and the key dependent thread are operated, the electronic device can dynamically adjust the frequency of the processor according to the task processing conditions of the key thread and the key dependent thread, and accurate supply of processor resources to the key thread and the key dependent thread is achieved. An electronic device may constrained provisioning of processor resources provided to non-critical threads. The method can improve the utilization efficiency of processor resources. According to the electronic equipment, the electric quantity of the electronic equipment can be saved while the experience of smoothly using the electronic equipment is provided for a user, the situation that the temperature of the electronic equipment is too fast is reduced, and balance between equipment performance smoothness and the requirements of long endurance and rapid cooling is achieved.

Description

[0001] This case is a divisional application. The application number of the original application is 202411758108.7, and the original application date is November 29, 2024. The entire contents of the original application are incorporated into this application by reference. Technical Field

[0002] The present application relates to the field of terminal technology, and in particular to a processor resource management method and related devices. Background Art

[0003] With the development of electronic devices, applications in electronic devices such as mobile phones, tablets, and smart watches (for example, video playback applications, game applications, social applications, etc.) provide users with more and more functions, meeting the needs of users in daily life, work, travel, and other aspects. The operation of applications in electronic devices depends on the computing power resources of the processor. The higher the computing power resources provided by electronic devices to applications, the smoother the application runs, but it will also increase the power consumption of electronic devices and increase the temperature of the device. With the growing demand for computing power resources by applications, how to improve the utilization efficiency of processor resources is an urgent problem that needs to be solved. Summary of the invention

[0004] The present application provides a processor resource management method and related devices. Among them, the electronic device can identify critical threads, critical dependent threads and non-critical threads. The electronic device can give priority to supplying processor resources to critical threads and critical dependent threads, and constrain the supply of processor resources provided to non-critical threads. The above method can improve the utilization efficiency of processor resources and provide users with a smooth experience of using electronic devices.

[0005] In the first aspect, the present application provides a processor resource management method. The method is applied to an electronic device, the electronic device includes a first critical thread list, when the first critical thread is run, the electronic device identifies the critical dependent thread of the first critical thread, the first critical thread is any thread in the first critical thread list, the critical dependent thread of the first critical thread includes threads other than the first critical thread on a first critical path, one node on the first critical path corresponds to one thread, the head node and the tail node on the first critical path both correspond to the first critical thread, and there is a wake-up relationship between two adjacent nodes on the first critical path; the electronic device increases the priority of the critical dependent thread of the first critical thread.

[0006] The above key thread list can be found in this application Figure 3B , Figure 4A The key thread information shown. The first key path can refer to this application Figure 3C The critical path shown is: thread x1 - thread x2 - thread x4 - thread x1.

[0007] It can be seen that the above method can identify the threads that the key thread directly and indirectly depends on, and give priority to supplying processor resources to the threads that the key thread depends on, reducing the situation where the indirect dependent threads are blocked when the indirect dependent threads are missed, resulting in the key thread being blocked for a long time. This can increase the speed of the key thread, thereby improving the smoothness of the interaction between the electronic device and the user.

[0008] In combination with the first aspect, in some embodiments, the first critical thread list is associated with the first application scenario, and before the electronic device increases the running priority of the critical dependent thread of the first critical thread, the electronic device determines that the electronic device is in the first application scenario based on the first application running in the foreground.

[0009] It can be seen that the electronic device can identify the key thread and key dependent thread corresponding to the current application scenario, and increase the priority of the key dependent thread corresponding to the current application scenario. This can improve the smoothness of the foreground application and provide users with a smooth experience of using the electronic device.

[0010] In combination with the first aspect, in some embodiments, the electronic device also includes a second critical thread list, and the second critical thread list is associated with a second application scenario; after the electronic device increases the running priority of the critical dependent thread of the first critical thread, the electronic device determines that the electronic device is in the second application scenario based on the second application running in the foreground; the electronic device identifies the critical dependent thread of the second critical thread, the second critical thread is any thread in the second critical thread list, the critical dependent threads of the second critical thread include threads other than the second critical thread on the second critical path, one node on the second critical path corresponds to one thread, the head node and the tail node on the second critical path both correspond to the second critical thread, and there is a wake-up relationship between two adjacent nodes on the second critical path; the electronic device increases the running priority of the critical dependent thread of the second critical thread.

[0011] After the electronic device determines that the electronic device is in the second application scenario according to the application running in the foreground, the electronic device reduces the priority of the key dependent thread of the first key thread.

[0012] It can be seen that when the application scene is switched, the electronic device can prioritize the running of the corresponding thread so as to give priority to the supply of processor resources to the key dependent threads of the application running in the foreground in real time. This can improve the smoothness of the running of the foreground application and provide users with a smooth experience of using the electronic device.

[0013] In combination with the first aspect, in some embodiments, the electronic device identifies a critical dependent thread of a first critical thread, and the electronic device searches for the critical dependent thread of the first critical thread in a first critical dependent thread list, the first critical dependent thread list includes the critical dependent threads of the first critical thread, and the first critical dependent thread list is obtained by the electronic device from a server.

[0014] The first key dependency thread list can refer to this application Figure 3B The server 200 is shown sending a thread protection list to the electronic device 100 .

[0015] It can be seen that the electronic device can directly search for the key dependent thread of the key thread in the first key dependent thread list obtained from the server, which can improve the speed of identifying the key dependent thread.

[0016] In combination with the first aspect, in some embodiments, the electronic device detects a first thread wake-up event, and the first thread wake-up event is used to indicate that the first thread wakes up a first wake-up relationship corresponding to the second thread; the electronic device determines that the second thread is a key dependent thread of the first key thread based on the historical wake-up relationship of the threads in the electronic device, and the historical wake-up relationship includes a first historical number of times the first wake-up relationship occurs, and a second historical number of times when the first wake-up relationship occurs, the first thread and the second thread are actually key dependent threads of the first key thread in history, wherein the first historical number is greater than the first number threshold, and the ratio of the second historical number to the first historical number is greater than the first probability threshold; the electronic device also searches for the key dependent thread of the first key thread in a second key dependent thread list, the second key dependent thread list includes the key dependent threads of the first key thread, and the second key dependent thread list is generated by the electronic device based on the historical wake-up relationship of the threads.

[0017] The first wake-up relationship can refer to this application Figure 4B The wake-up relationship shown is 1.

[0018] For historical wake-up relationships, please refer to this application Figure 4B The historical transfer matrix information shown. Among them, the first historical number can refer to the number of wake-up relationships shown in Table 2 of this application. The second historical number can refer to the number of wake-up relationships shown in Table 3 of this application.

[0019] It can be seen that the electronic device can obtain the latest wake-up relationship between threads in real time according to the running status of the threads, so as to identify the key dependent threads of the key threads in real time.

[0020] In combination with the first aspect, in some embodiments, the second critical dependent thread list does not include the second thread. After the electronic device determines that the second thread is a critical dependent thread of the first critical thread based on the historical wake-up relationship of the threads in the electronic device, the electronic device adds the second thread to the second critical dependent thread list.

[0021] In combination with the first aspect, in some embodiments, after the electronic device adds the second thread to the second critical dependent thread list, the electronic device determines, based on the historical wake-up relationship, that the historical number of times the first wake-up relationship occurs changes to a third historical number, and when the first wake-up relationship occurs, the historical number of times the first thread and the second thread are actually both critical dependent threads of the first critical thread in history changes to a fourth historical number, wherein the ratio of the fourth historical number to the third historical number is less than the first probability threshold; the electronic device removes the second thread from the second critical dependent thread list.

[0022] It can be seen that the electronic device can obtain the latest wake-up relationship between threads in real time according to the running status of the threads, so as to adaptively update the key dependent threads. Moreover, as the electronic device is used for a longer time, the electronic device can more accurately identify the key dependent threads.

[0023] In combination with the first aspect, in some embodiments, the second critical dependent thread list is updated based on the first critical dependent thread list, the first critical dependent thread list is obtained by the electronic device from a server, and the first critical dependent thread list includes critical dependent threads of one or more critical threads in the first critical thread list.

[0024] In combination with the first aspect, in some embodiments, the electronic device divides the threads in the electronic device into a foreground group and a non-foreground group, the foreground group including threads of a foreground application running in the foreground and threads associated with the foreground application in system services, and the non-foreground group including threads not associated with the foreground application in system services and threads of background applications running in the background; the electronic device detects the CPU load rate of the threads of the foreground group; when the CPU load rate of the threads of the foreground group increases, the electronic device determines a first increase in the length of the CPU time slice based on the increase in the CPU load rate of the threads of the foreground group; the electronic device increases the length of the CPU time slice of the threads of the foreground group based on the first increase, and reduces the length of the CPU time slice of the threads of the non-foreground group.

[0025] It can be seen that the threads in the foreground group are threads with high user sensitivity. Based on the above thread grouping, the electronic device can suppress the processor resources obtained by the threads in the non-foreground group when the CPU load rate of the foreground group is high, and provide a longer CPU time slice for the threads in the foreground group. In this way, the threads in the foreground group can obtain more processor resources when the task volume is large, so that the tasks can be completed faster, providing users with a smooth device usage experience. In addition, when the CPU load rate of the foreground group is reduced, the electronic device can provide a longer CPU time slice to the threads in the non-foreground group so that the tasks of the threads in the non-foreground group can be executed quickly. The above method can effectively improve the utilization efficiency of processor resources by grouping and controlling the CPU time slices of different thread groups, and can keep the threads in the non-foreground group running while ensuring the smoothness of device use.

[0026] In combination with the first aspect, in some embodiments, before the electronic device detects the CPU load rate of the threads of the foreground group, the electronic device detects a first foreground event, where the first foreground event includes a change in a foreground application running in the foreground.

[0027] It is understandable that when the first foreground event occurs, the CPU load of the threads in the foreground group may change. When the electronic device detects a foreground event, adjusting the CPU weight ratio based on the change in the CPU load rate of the foreground group can reduce the number of times the electronic device detects the CPU load rate of the foreground group, thereby improving the efficiency of controlling the CPU time slices of each thread group.

[0028] In combination with the first aspect, in some embodiments, the electronic device divides threads in the electronic device into a foreground group and a non-foreground group, the foreground group including threads of a foreground application running in the foreground and threads associated with the foreground application in system services, and the non-foreground group including threads in system services that are not associated with the foreground application and threads of background applications running in the background; the electronic device detects the entire machine load and / or the device case temperature of the electronic device, the entire machine load including the CPU load of threads in the foreground group and the non-foreground group; when the entire machine load is a first load and / or the device case temperature is a first temperature, the electronic device determines a first bandwidth quota amount according to the first load and / or the first temperature, and performs a CPU bandwidth quota on threads in the non-foreground group according to the first bandwidth quota amount.

[0029] It can be seen that the electronic device can suppress the bandwidth quota of threads in the non-foreground group according to the whole machine load and / or the device temperature. The bandwidth quota can reduce the whole machine load per unit time. Among them, the higher the whole machine load, the higher the degree to which the electronic device suppresses the bandwidth quota of threads in the non-foreground group; the higher the device temperature, the higher the degree to which the electronic device suppresses the bandwidth quota of threads in the non-foreground group. The above-mentioned bandwidth quota suppression method can control the whole machine load and device temperature of the electronic device, reduce the situation where the threads in the non-foreground group affect the operation of the threads in the foreground group when the whole machine load is too high, and can reduce the situation where the device temperature is too high.

[0030] In combination with the first aspect, in some embodiments, when the load of the entire machine changes to a second load and / or the device shell temperature changes to a second temperature, the electronic device determines a second bandwidth quota based on the second load and / or the second temperature, and performs CPU bandwidth quota for threads of non-foreground groups based on the second bandwidth quota; wherein, if the second load is higher than the first load and / or the second temperature is higher than the first temperature, the second bandwidth quota is less than the first bandwidth quota.

[0031] In combination with the first aspect, in some embodiments, the electronic device divides the threads in the electronic device into a foreground group, a normal thread group and a restricted thread group, the foreground group includes threads of a foreground application running in the foreground and threads associated with the foreground application in the system service, the restricted thread group includes threads in the system service that are not associated with the foreground application and can be delayed, and threads in the background application running in the background that can be delayed, the normal thread group includes threads in the system service that are not associated with the foreground application and are not in the restricted thread group, and threads in the background application that are not in the restricted thread group; the electronic device continuously performs CPU bandwidth quota on the threads of the restricted thread group according to a third bandwidth quota; the electronic device detects the entire machine load and / or the device shell temperature of the electronic device, the entire machine load including the CPU load of the threads of the foreground group, the non-normal thread group, and the restricted thread group; when the entire machine load is a first load and / or the device shell temperature is a first temperature, the electronic device determines a first bandwidth quota according to the first load and / or the first temperature, and performs CPU bandwidth quota on the threads of the normal thread group according to the first bandwidth quota.

[0032] It can be seen that the electronic device can perform persistent bandwidth quota suppression on threads that can delay high CPU loads to reduce burst load situations. The electronic device can also perform dynamic bandwidth quota suppression on threads outside the restricted thread group in the non-foreground group according to the overall machine load and / or device temperature. This can control the overall machine load and device temperature of the electronic device, reduce the situation where threads in the non-foreground group affect the operation of threads in the foreground group when the overall machine load is too high, and reduce the situation where the device temperature is too high.

[0033] In combination with the first aspect, in some embodiments, the electronic device divides the threads in the electronic device into a foreground group and a non-foreground group, the foreground group includes threads of foreground applications running in the foreground and threads associated with foreground applications in system services, and the non-foreground group includes threads not associated with foreground applications in system services and threads of background applications running in the background; when it is detected that the third thread is waiting for the fourth thread to release the first shared resource or waiting to obtain the first running result from the fourth thread, the electronic device marks the fourth thread with a first label, the third thread is a thread of the foreground group, and the fourth thread is a thread of the non-foreground group; the electronic device performs one or more of the following operations on the thread with the first label: increasing the running priority, increasing the CPU time slice length, and releasing the CPU bandwidth quota; when the fourth thread releases the first shared resource or sends the first running result to the third thread, the electronic device removes the first label of the fourth thread.

[0034] The third thread waiting for the fourth thread to release the first shared resource or waiting to obtain the first execution result from the fourth thread may include the third thread waiting for the fourth thread to release the binder / thread lock.

[0035] It can be seen that when the thread in the foreground group depends on the thread in the non-foreground group, the electronic device can temporarily increase the priority of the thread in the non-foreground group that the foreground group depends on, increase the CPU time slice length of the thread, and release the bandwidth quota suppression on the thread. In addition, the reaction and execution time required to move the thread in the non-foreground group that the foreground group depends on to the foreground group. Compared with changing the thread group of the dependent thread, the above method of setting the critical section can more efficiently reduce the priority inversion and improve the smoothness of the thread operation in the foreground group.

[0036] In combination with the first aspect, in some embodiments, the foreground group includes critical threads in the first critical thread list and critical dependent threads of the critical threads in the first critical thread list.

[0037] In combination with the first aspect, in some embodiments, the electronic device detects the whole machine load and / or the device shell temperature of the electronic device, where the whole machine load includes the load of all threads in the electronic device; the electronic device determines a first CPU frequency based on the whole machine load and / or the device shell temperature, and controls the CPU frequency of the CPU when running non-critical threads to be below the first CPU frequency, where the non-critical threads include critical threads in the first critical thread list and threads other than critical dependent threads of the critical threads in the first critical thread list.

[0038] It can be seen that by suppressing the CPU frequency of non-critical threads, electronic devices can save power and reduce the rapid heating of electronic devices while keeping non-critical threads running.

[0039] In combination with the first aspect, in some embodiments, the first critical thread is used to complete a multi-frame task. During the operation of the first critical thread and the critical dependent thread of the first critical thread, the electronic device determines that the first frequency modulation moment is in the time period when the first frame task in the multi-frame task is running according to the CPU frequency modulation cycle; at the first frequency modulation moment, the electronic device detects whether the first frame task is completed; if the first frame task is not completed, the electronic device increases the CPU frequency to the second CPU frequency according to the first frequency modulation function; wherein the first frequency modulation function is a power function with CPU computing power as the dependent variable, the running time of a frame task in the multi-frame task as the independent variable, and the exponent is a positive number less than 1.

[0040] The first frequency modulation function may refer to the optimal frequency modulation function in the embodiment of the present application.

[0041] In combination with the first aspect, in some embodiments, if the first frame task is completed, the electronic device reduces the CPU frequency to a third CPU frequency.

[0042] In combination with the first aspect, in some embodiments, the time when the first frame task starts running and the time when the running is completed are not the frequency modulation times determined according to the CPU frequency modulation cycle. When it is detected that the first frame task starts running, the electronic device increases the CPU frequency to the fourth CPU frequency; when it is detected that the first frame task is completed, the electronic device reduces the CPU frequency to the fifth CPU frequency.

[0043] It can be seen that the electronic device can increase the CPU frequency in real time when the frame tasks of the critical threads and the critical dependent threads begin, and reduce the CPU frequency in real time when the frame tasks of the critical threads and the critical dependent threads end. During the running of the frame tasks of the critical threads and the critical dependent threads, the electronic device can adjust the CPU frequency according to the optimal frequency modulation function. This can improve the accuracy of the supply of processor resources to the critical threads and the critical dependent threads, thereby improving the utilization efficiency of the processor resources and achieving a balance between the smooth performance of the device and the requirements of long battery life and rapid cooling.

[0044] In combination with the first aspect, in some embodiments, after the first frame task is completed, the electronic device determines, based on the CPU frequency modulation cycle, that the second frequency modulation moment is in the time period in which the second frame task in the multi-frame task is running; at the second frequency modulation moment, the electronic device detects whether the second frame task is completed; if the second frame task is not completed, the electronic device increases the CPU frequency to the sixth CPU frequency according to the first frequency modulation function.

[0045] In combination with the first aspect, in some embodiments, the first key thread is a thread for determining the display content of a user interface, and one frame task in a multi-frame task includes determining the display content of a frame user interface; or, the first key thread is a thread for rendering a user interface, and one frame task in a multi-frame task includes rendering a frame user interface.

[0046] The first frequency modulation function is:

[0047]

[0048] Among them, u(t) is the computing power provided by the CPU of the electronic device at a moment, maxUtil is the maximum computing power of the CPU of the electronic device, Time is the time from the current moment to the moment when the synchronization signal of the current frame task is sent, the synchronization signal of the current frame task is used to instruct the electronic device to run the current frame task, deadline is the cycle of the electronic device refreshing the user interface, margin is determined according to the time it takes for one or more frame tasks before the currently running frame task in the first critical thread to complete the running, kk and α are determined according to the historical running data of one or more threads and the CPU energy efficiency curve of the electronic device, and the one or more threads include the first critical thread and the critical dependent thread of the first critical thread.

[0049] In a second aspect, the present application provides a method for managing processor resources. The electronic device divides threads in the electronic device into a foreground group and a non-foreground group, the foreground group includes threads of foreground applications running in the foreground and threads associated with foreground applications in system services, and the non-foreground group includes threads not associated with foreground applications in system services and threads of background applications running in the background; the electronic device performs one or more of the following operations on threads in the non-foreground group: adjusting the CPU time slice length of one or more threads in the non-foreground group according to the load rate change of the threads in the foreground group, performing a CPU bandwidth quota on one or more threads in the non-foreground group, and controlling the CPU frequency of the CPU to be below the first CPU frequency when the CPU runs one or more threads in the non-foreground group.

[0050] It can be seen that electronic devices can group threads. Electronic devices can use different processor resource management strategies for different thread groups to improve the accuracy of processor resource supply and achieve a balance between smooth device performance and the requirements of long battery life and fast cooling.

[0051] In combination with the second aspect, in some embodiments, when the CPU load rate of the threads of the foreground group increases, the electronic device determines a first increase in the CPU time slice length based on the increase in the CPU load rate of the threads of the foreground group; the electronic device increases the CPU time slice length of one or more threads in the foreground group based on the first increase, and reduces the CPU time slice length of one or more threads in the non-foreground group.

[0052] It can be seen that the threads in the foreground group are threads with high user sensitivity. Based on the above thread grouping, the electronic device can suppress the processor resources obtained by the threads in the non-foreground group when the CPU load rate of the foreground group is high, and provide a longer CPU time slice for the threads in the foreground group. In this way, the threads in the foreground group can obtain more processor resources when the task volume is large, so that the tasks can be completed faster, providing users with a smooth device usage experience. In addition, when the CPU load rate of the foreground group is reduced, the electronic device can provide a longer CPU time slice to the threads in the non-foreground group so that the tasks of the threads in the non-foreground group can be executed quickly. The above method can effectively improve the utilization efficiency of processor resources by grouping and controlling the CPU time slices of different thread groups, and can keep the threads in the non-foreground group running while ensuring the smoothness of device use.

[0053] In combination with the second aspect, in some embodiments, the electronic device detects the whole machine load and / or the device shell temperature of the electronic device, where the whole machine load includes the CPU load of threads in the foreground group and the non-foreground group; when the whole machine load is a first load and / or the device shell temperature is a first temperature, the electronic device determines a first bandwidth quota amount based on the first load and / or the first temperature, and performs CPU bandwidth quota on one or more threads in the non-foreground group based on the first bandwidth quota amount.

[0054] It can be seen that the electronic device can suppress the bandwidth quota of threads in the non-foreground group according to the whole machine load and / or the device temperature. The bandwidth quota can reduce the whole machine load per unit time. Among them, the higher the whole machine load, the higher the degree to which the electronic device suppresses the bandwidth quota of threads in the non-foreground group; the higher the device temperature, the higher the degree to which the electronic device suppresses the bandwidth quota of threads in the non-foreground group. The above-mentioned bandwidth quota suppression method can control the whole machine load and device temperature of the electronic device, reduce the situation where the threads in the non-foreground group affect the operation of the threads in the foreground group when the whole machine load is too high, and can reduce the situation where the device temperature is too high.

[0055] In combination with the second aspect, in some embodiments, when the load of the entire machine changes to a second load and / or the device shell temperature changes to a second temperature, the electronic device determines a second bandwidth quota based on the second load and / or the second temperature, and performs CPU bandwidth quota on one or more threads in the non-foreground group based on the second bandwidth quota; wherein, if the second load is higher than the first load and / or the second temperature is higher than the first temperature, the second bandwidth quota is less than the first bandwidth quota.

[0056] In combination with the second aspect, in some embodiments, the non-foreground group includes an ordinary thread group and a restricted-level thread group, the restricted-level thread group includes threads in the system service that are not associated with the foreground application and can be delayed, and threads in the background application that can be delayed in the background, the ordinary thread group includes threads in the system service that are not associated with the foreground application and are not in the restricted-level thread group, and threads in the background application that are not in the restricted-level thread group; CPU bandwidth quotas are performed on one or more threads in the non-foreground group, and the electronic device continues to perform CPU bandwidth quotas on one or more threads in the restricted-level thread group according to a third bandwidth quota amount; the electronic device detects the entire machine load and / or the device shell temperature of the electronic device, the entire machine load including the CPU load of threads in the foreground group, the non-ordinary thread group, and the restricted-level thread group; when the entire machine load is a first load and / or the device shell temperature is a first temperature, the electronic device determines a first bandwidth quota amount according to the first load and / or the first temperature, and performs CPU bandwidth quotas on one or more threads in the ordinary thread group according to the first bandwidth quota amount.

[0057] It can be seen that the electronic device can perform persistent bandwidth quota suppression on threads that can delay high CPU loads to reduce burst load situations. The electronic device can also perform dynamic bandwidth quota suppression on threads outside the restricted thread group in the non-foreground group according to the overall machine load and / or device temperature. This can control the overall machine load and device temperature of the electronic device, reduce the situation where threads in the non-foreground group affect the operation of threads in the foreground group when the overall machine load is too high, and reduce the situation where the device temperature is too high.

[0058] In combination with the second aspect, in some embodiments, the first CPU frequency is determined based on the entire machine load of the electronic device and / or the device case temperature, where the entire machine load includes the load of all threads in the electronic device.

[0059] In combination with the second aspect, in some embodiments, when it is detected that the third thread is waiting for the fourth thread to release the first shared resource or waiting to obtain the first running result from the fourth thread, the electronic device marks the fourth thread with a first label, the third thread is a thread in the foreground group, and the fourth thread is a thread in the non-foreground group; the electronic device performs one or more of the following operations on the thread with the first label: increasing the running priority, increasing the CPU time slice length, and releasing the CPU bandwidth quota; when the fourth thread releases the first shared resource or sends the first running result to the third thread, the electronic device removes the first label of the fourth thread.

[0060] It can be seen that when the thread in the foreground group depends on the thread in the non-foreground group, the electronic device can temporarily increase the priority of the thread in the non-foreground group that the foreground group depends on, increase the CPU time slice length of the thread, and release the bandwidth quota suppression on the thread. In addition, the reaction and execution time required to move the thread in the non-foreground group that the foreground group depends on to the foreground group. Compared with changing the thread group of the dependent thread, the above method of setting the critical section can more efficiently reduce the priority inversion and improve the smoothness of the thread operation in the foreground group.

[0061] In a third aspect, the present application provides an electronic device. The electronic device may include a memory and a processor. The memory may be used to store a computer program. The processor may be used to call the computer program to execute any possible implementation method in the first aspect or the second aspect.

[0062] In a fourth aspect, the present application provides a computer-readable storage medium storing instructions, which can be executed by a processor to implement any possible implementation method in the first aspect or the second aspect.

[0063] In a fifth aspect, the present application provides a computer program product, which may include computer instructions. When the computer instructions are executed on a processor, any possible implementation method in the first aspect or the second aspect may be implemented.

[0064] In a sixth aspect, the present application provides a chip, which is applied to an electronic device, and the chip includes one or more processors, and the processor is used to call computer instructions to enable the electronic device to execute any possible implementation method as in the first aspect or the second aspect.

[0065] It is understandable that the electronic device provided in the third aspect, the computer-readable storage medium provided in the fourth aspect, the computer program product provided in the fifth aspect, and the chip provided in the sixth aspect are all used to execute the method provided in the embodiment of the present application. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding method, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] Figure 1 is a schematic diagram of processor resource management provided by an embodiment of the present application;

[0067] Figure 2A It is a flow chart of a thread scheduling method provided by an embodiment of the present application;

[0068] Figure 2B is a schematic diagram of thread priority adjustment provided by an embodiment of the present application;

[0069] Figure 3A and Figure 3Bis a schematic diagram of identifying key dependent threads provided by an embodiment of the present application;

[0070] Figure 3C is a schematic diagram of a wake-up relationship tree provided in an embodiment of the present application;

[0071] Figure 4A and Figure 4B is another schematic diagram of identifying key dependent threads provided by an embodiment of the present application;

[0072] Figure 4C to Figure 4G is a schematic diagram of some wake-up relationship trees provided in the embodiments of the present application;

[0073] Figure 5 is a schematic diagram of thread grouping provided in an embodiment of the present application;

[0074] Fig. 6A This is a flow chart of a method for grouping and controlling CPU time slices provided in an embodiment of the present application;

[0075] Figure 6B This is a schematic diagram of grouping and controlling CPU time slices provided by an embodiment of the present application;

[0076] Fig. 7A It is a flow chart of a method for suppressing bandwidth quota based on thread grouping provided in an embodiment of the present application;

[0077] Figure 7B It is a flow chart of another method for suppressing bandwidth quota based on thread grouping provided in an embodiment of the present application;

[0078] Figure 8 is a flow chart of a method for allocating processor resources provided by an embodiment of the present application;

[0079] Fig. 9 This is a flow chart of a method for suppressing CPU frequency of non-critical threads provided by an embodiment of the present application;

[0080] Fig.10 is a schematic diagram of a frequency modulation curve provided in an embodiment of the present application;

[0081] Fig.11A is a schematic diagram of determining an optimal frequency modulation function provided by an embodiment of the present application;

[0082] Fig. 11B is a schematic diagram of a CPU energy efficiency curve provided in an embodiment of the present application;

[0083] Fig. 12A is a flow chart of a method for determining an optimal frequency modulation function provided by an embodiment of the present application;

[0084] Fig. 12BIt is a schematic diagram of a thread operation provided by an embodiment of the present application;

[0085] Fig. 12C It is a flow chart of a method for determining frame loss data and power consumption of a key thread and a key dependent thread based on a set of slope parameters and curvature parameters provided by an embodiment of the present application;

[0086] Fig.12D It is a frequency modulation schematic diagram provided in an embodiment of the present application;

[0087] Fig.13A is a schematic diagram of an interpolation scenario provided in an embodiment of the present application;

[0088] Fig. 13B is a schematic diagram of a frame skipping scenario provided in an embodiment of the present application;

[0089] Fig.14A is a schematic diagram of an optimal frequency modulation curve provided in an embodiment of the present application;

[0090] Fig. 14B is a schematic diagram comparing an optimal frequency modulation curve and a non-optimal frequency modulation curve provided in an embodiment of the present application;

[0091] Fig.15 It is a frequency modulation schematic diagram provided in an embodiment of the present application;

[0092] Fig.16A is a schematic diagram of the hardware structure of an electronic device 100 provided in an embodiment of the present application;

[0093] Fig. 16B It is a schematic diagram of the software structure of an electronic device 100 provided in an embodiment of the present application. DETAILED DESCRIPTION

[0094] The technical solutions in the embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application. Among them, in the description of the embodiments of the present application, the terms used in the following embodiments are only for the purpose of describing specific embodiments, and are not intended to be used as limitations on the present application. As used in the specification and the appended claims of the present application, the singular expressions "a kind", "said", "above", "the" and "this" are intended to also include expressions such as "one or more", unless there is a clear contrary indication in the context. It should also be understood that in the following embodiments of the present application, "at least one", "one or more" refer to one or more (including two). The term "and / or" is used to describe the association relationship of associated objects, indicating that three relationships can exist; for example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in a "or" relationship.

[0095] References to "one embodiment" or "some embodiments" etc. described in this specification mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Thus, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways. The term "connection" includes direct connection and indirect connection, unless otherwise specified. "First" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated.

[0096] In the embodiments of the present application, the words "exemplarily" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplarily" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplarily" or "for example" is intended to present related concepts in a specific way.

[0097] The present application provides a processor resource management method. Figure 1 As shown, the electronic device can manage the processor resources of the electronic device based on the information exchange between the software level and the hardware level (i.e., software and hardware collaboration). The software level of the electronic device may include the system and kernel of the electronic device. At the software level of the electronic device, the electronic device can identify critical threads, critical dependent threads, and non-critical threads. Critical dependent threads may include threads that the critical threads directly or indirectly depend on. At the hardware level of the electronic device, the electronic device can adjust the frequency of the processor in combination with factors such as processor energy efficiency, device temperature, and power consumption of other devices (such as communication modules, cameras, screens, etc.) to achieve processor resource management. Among them, when running critical threads and critical dependent threads, the electronic device can dynamically adjust the frequency of the processor according to the task processing of the critical threads and the critical dependent threads, so as to achieve accurate supply of processor resources to the critical threads and the critical dependent threads. The electronic device can constrain the supply of processor resources provided to non-critical threads. This can not only ensure the operation of non-critical threads, but also reduce the situation where the critical threads and the critical dependent threads are blocked due to excessive processor resources occupied by non-critical threads when the task volume of the critical threads and the critical dependent threads is large.

[0098] It can be seen that the above method accurately allocates appropriate processor resources to different threads by accurately identifying critical threads, critical dependent threads, and non-critical threads. The above method can improve the utilization efficiency of processor resources and reduce the oversupply or undersupply of processor resources to threads. In this way, electronic devices can save power of electronic devices while providing users with a smooth experience of using electronic devices, reduce the situation where electronic devices heat up too quickly, and achieve a balance between smooth device performance and the needs of long battery life and rapid cooling.

[0099] To facilitate understanding, some concepts involved in this application are introduced here.

[0100] Thread: A thread is the smallest unit that the operating system can schedule operations. A thread is an execution unit within a process. A thread can refer to a single sequential control flow in a process. A process is an instance of a running program in the operating system, responsible for resource allocation and scheduling, with an independent address space and other auxiliary data. A process can contain multiple threads, which can share the resources of the same process (such as memory resources, file descriptors, etc.).

[0101] The life cycle of a thread may include: creation state, running state, ready state, blocked state and end state. The creation state may indicate the state in which the thread is being created. The running state may indicate the state in which the thread occupies the central processing unit (CPU) and is running. The ready state may indicate that the thread can currently run, but when it runs specifically depends on when the scheduler schedules the thread. For example, when the current CPU is occupied by other processes, the thread may be in the ready state to wait for the call of the scheduler. The blocked state may indicate that the thread is waiting for the target event to occur (for example, waiting for the resources that need to be accessed to be released by other threads, etc.) and temporarily stops running, actively giving up the right to use the CPU. The end state may indicate the state in which the thread ends running.

[0102] Key thread: A key thread may represent a thread that has a greater impact on the user's perception of the smoothness of the operation of the electronic device. If the key thread is in a blocked state for a long time, the user will obviously feel that the electronic device is stuck and the user interaction is not smooth. In some embodiments, the key thread may include but is not limited to: a user interface (UI) thread, a rendering service (RS) thread, an audio (audio) playback thread, a main thread of the foreground application, and the like. The UI thread can be used to handle the user interface interaction and determine the specific content displayed by the user interface. The RS thread can be used to render the user interface. If the UI thread and the RS thread are in a blocked state for a long time, the electronic device may have slow user operation response, frame loss, interface jamming, etc., affecting the user experience. The RS thread can also be called a graphics thread. The audio playback thread can be used to implement audio playback. If the audio playback thread is in a blocked state for a long time, the electronic device may experience audio playback jamming. The main thread of the application is the starting point of the application and is the thread created by the application when it is started. The main thread of the application can be used to perform the initialization operation of the application, including allocating resources, setting the environment, and the like. The main thread of the application can create one or more child threads. If the main thread of the foreground application is in a blocked state for a long time, the foreground application may start slowly and run jamming after startup.

[0103] Critical dependent threads: Critical dependent threads may include threads that critical threads directly or indirectly depend on. For example, thread 1 is a critical thread. Thread 1 depends on thread 2. Thread 2 depends on thread 3. Then thread 2 and thread 3 are both critical dependent threads. Among them, thread 2 is the thread that thread 1 directly depends on. Thread 3 is the thread that thread 1 indirectly depends on. Electronic devices can accurately supply processor resources to critical dependent threads, which can effectively reduce the situation where critical threads are blocked and improve the smoothness of interaction between electronic devices and users.

[0104] Non-critical threads: Non-critical threads may refer to threads other than critical threads and critical dependent threads. The delay in running non-critical threads by electronic devices usually does not affect the user's perception of the smoothness of the operation of the electronic device. For example, non-critical threads may include background data download threads. The slow running of background data download threads does not affect the user's interaction with foreground applications. In the case of limited processor resources, electronic devices can suppress the processor resources provided by non-critical threads, which can prioritize the fast running of critical threads and critical dependent threads, and improve the smoothness of the interaction between electronic devices and users.

[0105] Dependency: A dependency relationship between two threads means that the operation of one of the two threads depends on the other thread releasing shared resources / returning operation results / sending event notifications, etc. For example, thread 1 depends on thread 2. Thread 2 can be called the dependent thread of thread 1. Thread 1 needs to wait for thread 2 to release the shared resources that thread 1 needs to access, or thread 2 returns the operation results required by thread 1 to thread 1, or thread 2 sends the corresponding event notification to thread 1 before it can enter the ready state. When thread 2 is running, thread 1 is in a blocked state. If thread 2 cannot run in time due to insufficient priority or improper allocation of processor resources, thread 1 will be forced to wait and may be in a blocked state for a long time.

[0106] Dependencies can include explicit dependencies and implicit dependencies. Explicit dependencies can indicate dependencies with direct calling relationships. For example, thread 1 calls thread 2 at runtime and waits for thread 2 to return the running result. After thread 2 obtains the running result required by thread 1, it can wake up thread 1 and send the corresponding running result to thread 1. Thread 1 can continue to run according to the running result of thread 2. In the above process, thread 1 depends on thread 2, and the dependency between the two can be called explicit dependency. Implicit dependencies can indicate dependencies without direct calling relationships. For example, thread 1 needs to access resource A at runtime. Resource A is currently being accessed by thread 3 (that is, thread 3 holds the lock of resource A). Thread 1 needs to wait for thread 3 to release the lock of resource A before it can access resource A. Therefore, during the period when thread 3 holds the lock of resource A, thread 1 enters the blocked state. After thread 3 releases the lock of resource A, thread 1 can enter the ready state and access resource A after obtaining the right to use the CPU. In the above process, thread 1 depends on thread 3, and the dependency between the two can be called implicit dependency.

[0107] Wake-up relationship: The wake-up relationship may include the above-mentioned dependency relationship, as well as the relationship represented by one of two threads that do not have a dependency relationship waking up the other thread. For example, when thread 1 explicitly depends on thread 2, thread 1 and thread 2 have a wake-up relationship. Among them, thread 1 will wake up thread 2 (that is, thread 2 is the awakened thread), and thread 2 will also wake up thread 1 after running for a period of time (that is, thread 1 is the awakened thread). When thread 1 implicitly depends on thread 3, thread 1 and thread 3 have a wake-up relationship. Among them, thread 1 can be equivalent to being awakened by thread 3. When thread 1 and thread 4 do not have a dependency relationship, thread 1 may wake up thread 4 during the running process. Thread 1 and thread 4 have a wake-up relationship. Among them, thread 1 will not enter a blocked state due to the running of thread 4. Thread 1 and thread 4 can run in parallel.

[0108] Processor resources: Processor resources can include the computing power of the CPU. The computing power of the CPU can be described by dhrystone million instructions executed per second (DMIPS). Among them, the computing power of the CPU = the number of CPU cores * main frequency * DMIPS. The main frequency of the CPU can represent the clock frequency at which the CPU core works. It can be seen that the higher the frequency of the CPU when it is working, the more computing power resources the CPU provides, and the smoother the thread runs. However, the more computing power resources the CPU provides, the higher the power consumption of the CPU. The electronic device adjusts the processor resources provided to the thread, including but not limited to: adjusting the CPU time slice occupied by the thread, and adjusting the frequency of the CPU when the thread is running. The CPU time slice can indicate the length of time a thread can run on the CPU at a time.

[0109] Kernel: The kernel is the main component of the operating system (OS) and the core interface between the electronic device hardware and its processes. The kernel can provide the most basic functions of the OS and is responsible for managing the system's processes, memory, device drivers, files, and network systems.

[0110] refer to Figure 2A , Figure 2A The flowchart of a thread scheduling method provided by the present application is exemplified.

[0111] S211. The application program issues a system call request.

[0112] The application may be any application in an electronic device, for example, an instant messaging application, a short video application, or a shopping application.

[0113] System call is an interface provided by the operating system to the application program. The application program obtains the service of the operating system through the system call request. Among them, in order to ensure the stability and security of the operating system and prevent the application program from performing illegal operations, the application program needs to make a service request to the operating system through the system call method when performing resource-related operations (for example, storage allocation, read and write operations, file management, etc.), and the operating system completes it on behalf of the application program. The application program process can switch the running state from user state to kernel state through system calls. When the system call is executed, the running state of the process switches from kernel state to user state.

[0114] S212, the call request enters the kernel.

[0115] S213: The kernel receives the call request and allocates resources to the thread of the application.

[0116] S214. Create a thread.

[0117] The application can create threads according to the resources allocated to the threads to perform corresponding tasks (for example, tasks for updating the user interface, tasks for updating the audio, etc.).

[0118] S215, identifying the critical thread and the critical dependent thread, increasing the scheduling priority of the critical thread and the critical dependent thread, and dynamically adjusting the frequency of the processor when the critical thread and / or the critical dependent thread are running.

[0119] In some embodiments, the electronic device may determine whether the thread created in the above step S214 is a critical thread. Among them, the electronic device may store a list of critical threads corresponding to different application scenarios. The lists of critical threads for different application scenarios may be the same, or partially different, or completely different. The electronic device may determine the current application scenario based on the application currently running in the foreground. For example, application scenarios may include: short video playback and switching scenarios, chat scenarios of instant messaging applications, scenarios of browsing products in shopping applications, and so on. If the thread created in the above step S214 is in the list of critical threads corresponding to the current application scenario, the electronic device may determine that the thread is a critical thread, otherwise, the thread is not a critical thread.

[0120] If the thread created in the above step S214 is a critical thread, the electronic device may further identify a critical dependent thread of the critical thread.

[0121] If the thread created in the above step S214 is not a critical thread, the electronic device may detect whether the thread is a critical dependent thread.

[0122] The method of identifying key dependent threads will be introduced in the subsequent embodiments, which will not be expanded here.

[0123] The electronic device can increase the scheduling priority of the key thread and the key dependent thread. After the scheduling priority is increased, the electronic device can give priority to running the key thread and the key dependent thread. Optionally, for threads with high priority, the electronic device can also allocate longer CPU time slices to them so that these threads can complete the operation quickly.

[0124] like Figure 2B As shown, the scheduler in the electronic device can schedule the threads in sequence according to the arrangement order of the threads in the thread running queue, and allocate the right to use the processor to the currently scheduled thread. Before the electronic device identifies the critical thread and the critical dependent thread, the critical thread and the critical dependent thread are at the end of the thread running queue. After identifying the critical thread and the critical dependent thread, the electronic device can increase the priority of the critical thread and the critical dependent thread. For example, the electronic device can move the critical thread and the critical dependent thread from the end of the thread running queue to the head of the queue. In this way, the scheduler in the electronic device can give priority to scheduling the critical thread and the critical dependent thread.

[0125] In some embodiments, the electronic device may also dynamically adjust the frequency of the processor when the critical thread and / or the critical dependent thread are in a running state.

[0126] For example, when the critical thread or the critical dependent thread needs to perform a large amount of tasks, the electronic device can increase the frequency of the processor so that the critical thread or the critical dependent thread can complete the target task within a certain period of time. This can reduce the shortage of processor resources for the critical thread and the critical dependent thread, resulting in the critical thread and the critical dependent thread being unable to complete the target task in time and causing a jam.

[0127] For another example, when the critical thread or critical dependent thread has a small amount of tasks to perform, or has completed the target task but needs to wait for the subsequent task to be performed, the electronic device can reduce the frequency of the processor to reduce the power consumption of the electronic device. This can reduce the situation where the processor resources of the critical thread and the critical dependent thread are oversupplied, resulting in the waste of processor resources, which is conducive to improving the battery life of the electronic device and reducing the overheating of the device.

[0128] The method for the electronic device to dynamically adjust the frequency of the processor will be introduced in the subsequent embodiments, but will not be expanded here.

[0129] It should be noted that the above-mentioned raising of the scheduling priority of the key thread and the key thread is optional, that is, the electronic device can also dynamically adjust the frequency of the processor only when the key thread and / or the key dependent thread are running.

[0130] In some embodiments, if the thread created in step S214 is a non-critical thread, the electronic device can constrain the processor resources provided by the non-critical thread when running the non-critical thread. The specific method of constraining the supply will be introduced in subsequent embodiments. It will not be expanded here.

[0131] S216: Thread running.

[0132] S217, user interface / audio, etc. updates.

[0133] The tasks performed by the thread running may include user interface / audio update. The embodiment of the present application does not limit the types of the above tasks.

[0134] It can be seen from the above method that the above method accurately identifies critical threads, critical dependent threads, and non-critical threads to raise the priority of critical threads and critical dependent threads, and accurately allocates appropriate processor resources to different threads. The above method can improve the utilization efficiency of processor resources and reduce the oversupply or undersupply of processor resources to threads. In this way, electronic devices can save power of electronic devices while providing users with a smooth experience of using electronic devices, reduce the situation where electronic devices heat up too quickly, and achieve a balance between smooth device performance and the needs of long battery life and rapid cooling.

[0135] The following describes a method for identifying key dependent threads provided by an embodiment of the present application.

[0136] In some embodiments, the electronic device can identify the critical dependent thread based on the offline mode. The offline mode can mean: identifying the critical dependent thread based on the critical thread information and the historical wake-up relationship data of the application thread on the server side. The server can send the information of the critical dependent thread to the electronic device on the user side (for example, a mobile phone, a tablet computer, a smart watch, etc.). The electronic device on the user side can identify whether the currently running thread is a critical dependent thread based on the above-mentioned information of the critical dependent thread, and then determine the corresponding processor resource allocation strategy.

[0137] Figure 3A and Figure 3B A schematic diagram for identifying key dependent threads provided by the present application is exemplified.

[0138] like Figure 3A and Figure 3B As shown, the offline function module may be a module deployed in the server 200. The offline function module may receive historical wakeup relationship data of application threads and key thread information, and output a thread protection list. The thread protection list may include information of key dependent threads.

[0139] Among them, the historical wake-up relationship data of the application thread may include the wake-up relationship between various threads collected based on big data statistics. In some embodiments, when the application is running in an electronic device on the user side, the event tracker in the electronic device can track the running status of the thread and generate a trace file. The above-mentioned event tracker may be a FunctionTrace module (which may be referred to as an ftrace module). The above-mentioned trace file may include data such as the time when the thread runs, the dependency relationship between threads, etc. The above-mentioned historical wake-up relationship data of the application thread may be the data contained in the above-mentioned trace file.

[0140] The key thread information may include the names of the key threads corresponding to different application scenarios. The offline function module may identify the key dependent threads of the key threads in different application scenarios.

[0141] The information of the key dependent thread in the thread protection list may include the application scenario to which the key dependent thread belongs and the name of the key dependent thread.

[0142] like Figure 3B As shown, the offline function module may include a wake-up relationship analysis module, a statistical integration module, and a selection module.

[0143] The wakeup relationship analysis module can be used to construct a wakeup relationship tree based on the historical wakeup relationship data of the application thread. The above wakeup relationship tree can be constructed based on a directed acyclic graph (DAG). Then, the wakeup relationship analysis module can reverse the critical path in the wakeup relationship tree based on the critical thread information to obtain the critical path data.

[0144] Figure 3C A schematic diagram of a wake-up relationship tree is exemplarily shown.

[0145] like Figure 3C As shown, the wake-up relationship analysis module can construct a wake-up relationship tree including threads x1 to x7 based on the historical wake-up relationship data of the application threads. Among them, black circles can represent key threads. White circles can represent threads. A solid line connecting two circles can indicate that the threads represented by the two circles have a dependency relationship. A dotted line connecting two circles can indicate that the threads represented by the two circles have a wake-up relationship.

[0146] like Figure 3C As shown, thread x1 wakes up thread x2 and thread 3, thread x2 wakes up thread x4 and thread x6, thread x3 wakes up thread x5, thread x4 wakes up thread x1, and thread x5 wakes up thread x7. The wake-up relationship analysis module can determine the critical path in the wake-up relationship data by the reverse method. The critical path can refer to a path in which the starting point and the end point of the wake-up path are both the same critical thread. For example, thread x1 is a critical thread. Taking thread x1 as the starting point, the wake-up relationship analysis module can search for the thread that wakes up thread x1 in the wake-up relationship tree, that is, thread x4. Further, taking thread x4 as the starting point, the wake-up relationship analysis module can search for the thread that wakes up thread x4 in the wake-up relationship tree, that is, thread x2. Further, taking thread x2 as the starting point, the wake-up relationship analysis module can search for the thread that wakes up thread x2 in the wake-up relationship tree, that is, thread x1. In this way, the wake-up relationship analysis module can determine that the critical path is thread x1-thread x2-thread x4-thread x1. Threads other than the critical thread in the critical path (that is, thread x2 and thread x4) are critical dependent threads.

[0147] The wakeup relationship analysis module can send the wakeup path data and the critical path data to the statistical integration module. The wakeup path data can include the number of times each wakeup relationship appears in the wakeup relationship tree, the priority of each thread among all threads in the wakeup relationship tree, the running time of the thread in the wakeup relationship tree, etc. The critical path data can include the dependency on the critical path, the priority of the thread on the critical path among all threads on the critical path, etc.

[0148] The statistical integration module can perform statistical integration on the wake-up path data and the critical path data to generate a list of critical dependent threads. The list of critical dependent threads may include the names of the critical dependent threads. Optionally, the list of critical dependent threads may also include one or more information such as the frequency of the critical dependent threads appearing on the critical path, the number of times the critical dependent threads appear in the wake-up relationship, the priority of the critical dependent threads on the critical path, the priority of the critical dependent threads among all threads in the wake-up relationship tree, and the running time of the critical dependent threads.

[0149] The list of key dependent threads can be found in Table 1 below.

[0150]

[0151] Table 1

[0152] The overall priority in Table 1 may represent the priority of the critical dependent thread among all threads in the wake-up relationship tree. Table 1 is only an exemplary introduction to the present application and should not be construed as limiting the present application.

[0153] In some embodiments, the statistics integration module can send the list of critical dependent threads to the selection module. The selection module can filter out a part of the critical dependent threads from all the critical dependent threads according to one or more information such as the frequency of the critical dependent threads appearing on the critical path, the number of times the critical dependent threads appear in the wake-up relationship, the priority of the critical dependent threads on the critical path, the overall priority of the critical dependent threads, the running time of the critical dependent threads, and generate a thread protection list.

[0154] The server 200 may send a thread protection list to the electronic device 100. The electronic device 100 may store the thread protection list, and determine whether the thread it is running is a critical thread or a critical dependent thread based on the thread protection list. The electronic device 100 may be an electronic device on the user side. In some embodiments, the server 200 may send the above-mentioned thread protection list to the electronic device 100 when the system version of the electronic device 100 is upgraded. Optionally, the server 200 may update the above-mentioned thread protection list regularly or irregularly, and send the updated thread protection list to the electronic device 100. This can improve the accuracy of the electronic device 100 in identifying critical threads and critical dependent threads.

[0155] Alternatively, the server 200 may also directly send the information of all key dependent threads to the electronic device 100. That is, the server 200 may not need to use a selection module to screen the key dependent threads.

[0156] like Figure 3B As shown, the electronic device 100 may include an application, a kernel, and a memory. When receiving a thread protection list from the server 200, the electronic device 100 may store the thread protection list in the memory. The memory may also store key thread information. The kernel may include an event tracker and a scheduler. The application may initiate a system call request to the kernel. The system call request may refer to the aforementioned Figure 2A The introduction of step S211 is shown. The event tracker can track and obtain the running information of the corresponding thread based on the above system call request. The scheduler can be used to obtain key thread information and thread protection list, and determine whether the thread priority needs to be adjusted based on the thread protection list.

[0157] Optionally, the electronic device 100 may also include an application scenario detection module. The application scenario detection module can detect the current application scenario of the electronic device 100 based on information such as the application currently running in the foreground of the electronic device and the received user operations. Based on the critical thread information, the thread protection list and the current application scenario of the electronic device 100, the application scenario detection module can determine the critical thread and the critical dependent thread corresponding to the current application scenario. The application scenario detection module can send the critical thread and the critical dependent thread corresponding to the current application scenario to the scheduler. Then, the scheduler can increase the priority of the critical thread and the critical dependent thread corresponding to the current application scenario.

[0158] In some embodiments, the electronic device may identify critical dependent threads based on the online mode. The online mode may indicate that the electronic device on the user side collects and records the wake-up relationships when it runs the threads, and identifies whether the currently running thread is a critical thread based on the critical thread information and the wake-up relationships recorded by the electronic device. As the number of threads running on the electronic device increases, the number of wake-up relationships recorded by the electronic device also increases. The electronic device may update the critical dependent threads it has identified regularly or irregularly (for example, determining a thread that was once a non-critical thread as a critical dependent thread, or determining a critical dependent thread that was once determined as a non-critical thread).

[0159] Figure 4A and Figure 4B Another schematic diagram for identifying key dependent threads provided by the present application is exemplarily shown.

[0160] like Figure 4AAs shown, the electronic device 100 may include an application, a kernel, and a memory. The kernel may include an event tracker, a scheduler, and an online function module. The memory may store critical thread information and a thread protection list.

[0161] In the electronic device 100, an application may initiate a system call request to the kernel. The event tracker may track and obtain the running information of the corresponding thread based on the above system call request. The event tracker may determine the thread wake-up event corresponding to the system call request of the above application according to the running information of the thread. The event tracker may send the above thread wake-up event to the online function module. The online function module may obtain the key thread information from the memory, and determine whether the awakened thread is a key dependent thread according to the thread wake-up event and the key thread information. If the currently awakened thread is a key dependent thread, the online function module may instruct the scheduler to increase the priority of the currently awakened thread.

[0162] Optionally, the electronic device 100 may also include an application scenario detection module. The application scenario detection module can detect the current application scenario of the electronic device 100 based on information such as the application currently running in the foreground of the electronic device and the received user operation. Based on the key thread information, the application scenario detection module can determine the key thread corresponding to the current application scenario. The application scenario detection module can send the key thread corresponding to the current application scenario to the online function module. The online function module can identify the key dependent thread corresponding to the current scenario based on the thread wake-up event and the key thread corresponding to the current application scenario.

[0163] In some embodiments, the online function module can update the thread protection list based on the identification results of the key threads or key dependent threads of multiple threads within a period of time. The scheduler can adjust the priority of the corresponding thread based on the key dependent thread in the thread protection list. In addition, the scheduler can also obtain key thread information and increase the priority of the key thread.

[0164] Online function modules can be Figure 4B The method shown is used to identify whether a thread is a critical thread or a critical dependent thread.

[0165] S411: A thread wakeup event is received, and the thread wakeup event corresponds to wakeup relationship 1.

[0166] The wakeup relationship 1 may include an awakening thread and an awakened thread. For example, the wakeup relationship 1 may be thread x1 (i.e., the awakening thread) awakening thread x2 (i.e., the awakened thread). Alternatively, the wakeup relationship 1 may be thread x2 (i.e., the awakening thread) awakening thread x4 (i.e., the awakened thread). The embodiment of the present application does not limit the wakeup relationship 1.

[0167] S412: Detect whether a wake-up relationship tree is currently being created.

[0168] If there is a wake-up relationship tree being created, the online function module may execute the following step S413.

[0169] If there is no wake-up relationship tree being created currently, the online function module may execute the following step S414.

[0170] S413: Update the wakeup relationship tree according to the wakeup relationship 1.

[0171] In some embodiments, if the wakeup relation 1 does not exist in the wakeup relation tree, and the wakeup thread in the wakeup relation 1 is an existing thread in the wakeup relation tree, the online function module may add the wakeup relation 1 to the wakeup relation tree and execute the following step S415.

[0172] If the wakeup relationship 1 already exists in the wakeup relationship tree, the wakeup relationship tree does not need to be updated.

[0173] If the wakeup thread in wakeup relation 1 is not an existing thread in the wakeup relation tree, the online function module may not need to add wakeup relation 1 to the wakeup relation tree. The online function module may not need to detect whether wakeup relation 1 is on the critical path (i.e., there is no need to perform subsequent steps S415 to S419).

[0174] S414: Create a wakeup relationship tree according to the wakeup relationship 1.

[0175] For example, if wakeup relation 1 is thread x1 waking up thread x2, and the online function module detects that there is no wakeup relation tree being created, the online function module can create Figure 4C As shown in the wake-up relationship tree. Figure 4C As shown, the circle representing thread x1 points to the circle representing thread x2, which may indicate that thread x1 wakes up thread x2.

[0176] In some embodiments, if the wake-up thread in wake-up relation 1 is a critical thread, the online function module may create a wake-up relation tree starting from the critical thread. If the wake-up thread in wake-up relation 1 is not a critical thread, the online function module may not need to create a wake-up relation tree. In other words, if there is no wake-up relation tree being created and the wake-up thread in wake-up relation 1 is not a critical thread, the online function module may not need to detect whether wake-up relation 1 is on the critical path.

[0177] The wakeup relationship tree can be stored in the memory in a tree data structure in the running state. The online function module can perform operations such as adding, deleting, modifying, and checking the wakeup relationship tree.

[0178] S415: Detect whether the wake-up relationship tree is completed.

[0179] The online function module can detect whether the wakeup relationship tree is ended according to the wakeup relationship 1. If the wakeup thread in the wakeup relationship 1 is an existing thread in the wakeup relationship tree, and the awakened thread in the wakeup relationship 1 is a key thread in the wakeup relationship tree, then the wakeup relationship tree is ended. Otherwise, the wakeup relationship tree is not ended.

[0180] If the wake-up relationship tree is not finished, the online function module may execute the following step S416.

[0181] If the wake-up relationship tree ends, the online function module may execute the following step S418.

[0182] S416. Update the historical transfer matrix information and read the historical transfer matrix information. The historical transfer matrix information includes the historical wake-up transfer matrix and the critical path wake-up transfer matrix. The historical wake-up transfer matrix includes the historical number of times the wake-up relationship appears. The critical path wake-up transfer matrix includes the historical number of times the wake-up relationship appears on the critical path.

[0183] The historical wake-up transfer matrix can refer to the following Table 2.

[0184]

[0185] Table 2

[0186] Taking the threads on the critical path including thread x1, thread x2 and thread x4 as an example, the critical path wake-up transfer matrix can refer to the following Table 3.

[0187]

[0188]

[0189] Table 3

[0190] If the wakeup relation 1 already exists in the current wakeup relation tree, the online function module may add 1 to the number of wakeup relation 1 in the historical wakeup transfer matrix.

[0191] For example, if wakeup relation 1 is thread x1 waking up thread x2, and the online function module detects that there is currently Figure 4D The wake-up relationship tree shown in the figure, the online function module does not need to adjust the wake-up relationship tree, but adds 1 to the number of wake-up relationships corresponding to thread x1 waking up thread x2 in the historical wake-up transfer matrix.

[0192] For another example, if wakeup relation 1 is thread x2 waking up thread x4, and the online function module detects that there is currently Figure 4D The wake-up relationship tree shown in the figure can be updated by the online function module. Figure 4D The wake-up relationship tree shown generates Figure 4E As shown in the wake-up relationship tree. Figure 4E As shown, the online function module is Figure 4D Based on the wakeup relationship tree shown, a branch from thread x2 to thread x4 is added. If the historical wakeup transfer matrix already has rows and columns corresponding to thread x4, the online function module does not need to update the historical wakeup transfer matrix. If the historical wakeup transfer matrix does not have rows and columns corresponding to thread x4, the online function module can add rows and columns corresponding to thread x4 in the historical wakeup transfer matrix.

[0193] If the wakeup relation 1 is on an existing critical path, the online function module may add 1 to the number of wakeup relation 1 in the critical path wakeup transfer matrix. The critical path may be a critical path determined by the online function module based on previous wakeup relations and critical thread information.

[0194] For example, if wakeup relationship 1 is thread x2 waking up thread x4, and the existing critical path is thread x1—thread x2—thread x4—thread x1, the online functional module can add 1 to the number of wakeup relationship 1 in the critical path wakeup transfer matrix.

[0195] For another example, if wakeup relation 1 is thread x3 waking up thread x5, and the online function module detects that there is currently Figure 4D The wake-up relationship tree shown in the figure can be updated by the online function module. Figure 4D The wake-up relationship tree shown generates Figure 4F As shown in the wake-up relationship tree. Figure 4F As shown, the online function module is Figure 4D On the basis of the wake-up relationship tree shown, a branch from thread x3 to thread x5 is added. Among them, the online function module can update the historical wake-up transfer matrix according to the introduction of the above embodiment. If the critical path is thread x1-thread x2-thread x4-thread x1, the wake-up relationship 1 is not in the existing critical path, so the online function module does not need to update the critical path wake-up transfer matrix.

[0196] S417 . Detect whether the wakeup relationship 1 is on the critical path according to the historical transfer matrix information.

[0197] In some embodiments, the online function module can detect the probability of the wake-up relationship 1 on the critical path in history based on the historical wake-up transfer matrix and the critical path wake-up transfer matrix. Among them, the probability of the above-mentioned wake-up relationship 1 on the critical path can be predicted using the Markov modeling probability prediction method. Alternatively, the probability of the above-mentioned wake-up relationship 1 on the critical path can be: the number of times the wake-up relationship 1 appears on the critical path in the critical path wake-up transfer matrix ÷ the number of times the wake-up relationship 1 appears in the historical wake-up transfer matrix. The online function module can detect whether the probability of the wake-up relationship 1 on the critical path in history is greater than a preset probability threshold, and whether the number of times the wake-up relationship 1 appears in the historical wake-up transfer matrix is ​​greater than a preset number threshold. For example, the value of the probability threshold can be 0.7, 0.8, etc. The value of the number threshold can be 10, 20, etc. The embodiment of the present application does not limit the values ​​of the above-mentioned probability threshold and the number threshold.

[0198] If the probability of wakeup relation 1 being on the critical path in history is greater than the probability threshold, and the number of times wakeup relation 1 appears in the historical wakeup transfer matrix is ​​greater than the number threshold, the online function module can determine that wakeup relation 1 is on the critical path, that is, the thread in wakeup relation 1 is a critical thread or a critical dependent thread.

[0199] If the historical probability of wakeup relation 1 being on the critical path is less than or equal to the probability threshold, or the number of times wakeup relation 1 appears in the historical wakeup transfer matrix is ​​less than or equal to the number threshold, the online function module can determine that wakeup relation 1 is not on the critical path. That is, the thread awakened in wakeup relation 1 is not a critical dependent thread.

[0200] It is understandable that the currently constructed wake-up relationship tree has not yet ended, and the online function module cannot temporarily infer the critical path of the currently constructed wake-up relationship tree. Since the critical path may change (for example, the thread on which the critical thread depends changes), the wake-up relationship 1 may have been on the critical path but is not currently on the critical path, or may have been not on the critical path but is currently on the critical path. The online function module can predict whether the wake-up relationship 1 is on the critical path of the currently constructed wake-up relationship tree based on the above-mentioned historical transfer matrix information. Among them, the above-mentioned probability of the wake-up relationship 1 being on the critical path in history reflects the probability of the wake-up relationship 1 being on the critical path that has been determined. The greater the probability of the wake-up relationship 1 being on the critical path in history, the greater the probability of the wake-up relationship 1 being on the critical path of the currently constructed wake-up relationship tree. The more times the wake-up relationship 1 appears in history, it can be indicated that the thread in the wake-up relationship 1 is often awakened, and the probability that the thread in the wake-up relationship 1 is a critical dependent thread is also greater.

[0201] If it is determined that the wakeup relation 1 is on the critical path, the online function module may instruct the scheduler to increase the priority of the awakened thread in the wakeup relation 1 .

[0202] S418: reverse the critical path according to the wakeup relationship tree and the critical thread information, and update the historical transfer matrix information.

[0203] For example, when the wake-up relationship tree is determined to be finished in the above step S415, the online function module constructs Figure 4G The wake-up relationship tree shown in FIG. The online function module reversely infers the critical path in the wake-up relationship tree. The method of reversely inferring the critical path can refer to the introduction of the aforementioned embodiment. Here, thread x1 is still taken as the critical thread as an example. Figure 4G As shown in the wake-up relationship tree, the online functional module can determine that the critical path is thread x1 - thread x2 - thread x8 - thread x1.

[0204] If the online function module has determined the critical path to be thread x1-thread x2-thread x4-thread x1, the online function module can update the critical path to Figure 4G The critical path shown is (i.e., thread x1—thread x2—thread x8—thread x1). It can be seen that the wakeup relationship corresponding to thread x2 waking up thread x4 was once on the critical path, but is not on the critical path during the current operation of critical thread x1.

[0205] Among them, when the critical path is updated to thread x1-thread x2-thread x8-thread x1, the online function module can update the above critical path wakeup transfer matrix. The online function module can add the row and column corresponding to thread x8 in the critical path wakeup transfer matrix. In the critical path wakeup transfer matrix, the row and column corresponding to thread x4 can still be retained.

[0206] S419: Delete the wake-up relationship tree.

[0207] When the wake-up relationship tree ends, the online function module can delete the wake-up relationship tree, and when the wake-up relationship event is received next time, the online function module can re-create a new wake-up relationship tree.

[0208] In some embodiments, based on the historical transfer matrix information updated in the above step S418, the online function module can update the thread protection list. The online function module can calculate the probability of each wake-up relationship in the critical path wake-up transfer matrix being on the critical path historically, and the corresponding number of these wake-up relationships in the historical wake-up transfer matrix. The probability of a wake-up relationship being on the critical path historically can be: the number of times the wake-up relationship appears on the critical path in the critical path wake-up transfer matrix ÷ the number of times the wake-up relationship appears in the historical wake-up transfer matrix.

[0209] If the probability of a wake-up relationship on the critical path in history is greater than the probability threshold, and the number of times this wake-up relationship corresponds to in the historical wake-up transfer matrix is ​​greater than the number threshold, the online function module can add threads other than the critical thread in this wake-up relationship to the thread protection list as critical dependent threads.

[0210] If the probability of the wake-up relationship corresponding to the thread once added to the thread protection list on the critical path in history is less than or equal to the probability threshold, or the number of times the wake-up relationship corresponding to the thread in the historical wake-up transfer matrix is ​​less than or equal to the number threshold, the online function module can remove the thread from the thread protection list.

[0211] The embodiment of the present application does not limit the timing of the online function module updating the thread protection list. For example, the online function module may periodically update the thread protection list. Alternatively, the online function module may update the thread protection list after each wake-up relationship tree is constructed and the critical path is obtained by reverse deduction.

[0212] It can be seen that the above-mentioned offline mode and online mode can accurately identify the threads that the critical thread directly and indirectly depends on. This can reduce the situation where the indirect dependent thread is blocked when the indirect dependent thread is missed, resulting in the critical thread being blocked for a long time. Among them, in the offline mode, the electronic device 100 can directly use the thread protection list sent from the server 200 to identify the critical dependent thread. This can increase the speed of identifying the critical dependent thread. In the online mode, the electronic device 100 can obtain the latest wake-up relationship between threads in real time according to the running status of the threads, so as to adaptively update the critical dependent thread. Moreover, as the use time of the electronic device 100 increases, the electronic device 100 can identify the critical dependent thread more accurately.

[0213] In some embodiments, the electronic device 100 may store general critical thread information. The general critical thread information may include thread names that serve as critical threads in multiple application scenarios. For example, the general critical thread information may include RS threads. When it is detected that a critical thread in the above general critical thread information is running, the electronic device 100 may identify a critical dependent thread of the critical thread based on the above offline mode and / or online mode. Then, the electronic device 100 may increase the priority of the operation of the above critical dependent thread.

[0214] In some embodiments, different application scenarios may correspond to different key threads. The electronic device 100 may store key thread information for different application scenarios. The electronic device may determine the key thread according to the current application scenario, and then identify the key dependent thread of the key thread in the current application scenario. The identification method of the application scenario may refer to the introduction of the aforementioned embodiment.

[0215] Exemplarily, when application 1 is running in the foreground of the electronic device 100, the electronic device 100 may identify the current application scenario as application scenario 1. The key thread information associated with application scenario 1 may include: RS thread, UI thread of application 1. The UI thread of application 2 may be used to determine the display content contained in the user interface of application 1. The electronic device 100 may identify the key dependent thread of the UI thread of application 1, and increase the priority of the key dependent thread of the UI thread of application 1. When the application running in the foreground of the electronic device 100 is switched from application 1 to application 2, the electronic device 100 may identify that the current application scenario has changed to application scenario 2. The key thread information of application scenario 2 may include RS thread, UI thread of application 2. The UI thread of application 2 may be used to determine the display content contained in the user interface of application 2. The electronic device 100 may identify the key dependent thread of the UI thread of application 2, and increase the priority of the key dependent thread of the UI thread of application 2. Among them, after the application running in the foreground is switched from application 1 to application 2, application 1 changes to an application running in the background. The electronic device 100 may reduce the priority of the key dependent thread of the UI thread of application 1. In addition, since the RS thread is a critical thread in both application scenario 1 and application scenario 2, the electronic device 100 can set the critical dependent thread of the RS thread to a high priority in both application scenario 1 and application scenario 2.

[0216] In some embodiments, the electronic device may combine the above offline mode and online mode to identify the key dependent thread. Figure 3B The thread protection list sent by the server 200 is shown. The online function module in the electronic device 100 can update the thread protection list based on the thread protection list sent by the server 200 and according to the actual critical path during the thread running process in the electronic device 100.

[0217] In some embodiments, a thread priority configuration file may be stored in the electronic device 100. The embodiment of the present application does not limit the format of the thread priority configuration file. For example, the thread priority configuration file may be an extensible markup language (XML) file.

[0218] The electronic device 100 may be configured according to the above Figure 3B or Figure 4A The thread protection list shown determines the thread priority profile. The thread priority profile may include priority configuration policies for critical threads and critical dependent threads. The scheduler may increase the priority of critical threads and critical dependent threads according to the above thread priority profile. In this way, processor resources may be provided preferentially to critical threads and critical dependent threads.

[0219] When the above thread protection list is updated, the thread priority profile can be updated accordingly.

[0220] In some embodiments, the scheduler in the electronic device 100 creates a related thread group (RTG). RTG provides the ability to optimize the scheduling of a group of threads, supports separate load statistics and predictions for threads in the RTG group, and sets the function of a priority CPU cluster, so as to select the optimal CPU for the threads in the RTG group and select the appropriate CPU frequency adjustment point to run according to the group load. The scheduler in the electronic device 100 can add key threads and key dependent threads to the RTG group, and guarantee the processor resource supply of key threads and key dependent threads based on the mechanism within the RTG group. Among them, the scheduler can update the threads in the RTG group according to the update of the protection thread list. The implementation method of the RTG group is not limited in the embodiment of the present application.

[0221] The above method of increasing the priority of key threads and key dependent threads based on thread priority profiles or RTG grouping is only an exemplary description of the present application. The electronic device 100 may also adopt other methods to increase the priority of key threads and key dependent threads. The present application embodiment does not limit this.

[0222] In some embodiments, the electronic device may group threads and adopt different processor resource management strategies for different thread groups to improve the accuracy of processor resource supply and achieve a balance between smooth device performance and the requirements of long battery life and rapid cooling.

[0223] Figure 5 A schematic diagram of thread grouping provided by the present application is exemplified.

[0224] like Figure 5As shown, the threads in the electronic device may include threads of foreground applications, threads of system services, and threads of background applications. Among them, the foreground application may include an application running in the foreground of the electronic device. The electronic device may display the user interface of the foreground application on the screen, or play the audio of the foreground application. The foreground application may receive user operations and interact with the user. The system service may include a program that executes a specified system function to support the operation of other applications. System services usually run in the background. For example, system services may include but are not limited to: services for managing application windows opened by the device, power management services, services for providing location information, services for network connections, and the like. Background applications may include applications running in the background of the electronic device in addition to system services. When the application runs in the background, the application is usually unable to interact with the user. In some embodiments, the foreground application changes to a background application after retreating to the background; the background application may also be brought to the foreground to run and change to a foreground application. For example, the electronic device runs a shopping application in the foreground (i.e., displays the user interface of the shopping application) and runs an instant messaging application in the background. In response to the operation of calling up the user interface of the instant messaging application, the electronic device may display the user interface of the instant messaging application on the screen and cancel the display of the user interface of the shopping application. In this way, the shopping application changes from a foreground application to a background application, and the instant messaging application changes from a background application to a foreground application.

[0225] In some embodiments, the electronic device may divide threads into different service groups according to parameters such as the foreground and background running states of the application or service to which the thread belongs, and the type of task that the thread needs to perform.

[0226] Exemplarily, the electronic device may divide the threads of the foreground application, the threads of the system service, and the threads of the background application into one or more of the following service groups: foreground service, foreground associated service, system resident service, system delayable service, background delayable service, and background unimportant service. Among them, the foreground service may include the thread of the foreground application. The foreground associated service may include a part of the threads of the system service that need to be called by the foreground service. The system resident service may include the threads in the system service that need to run for a long time. The system delayable service may include the threads in the system service that can be delayed. The background delayable service may include the threads in the background application that can be delayed. The background unimportant service may include the threads in the background application that are outside the background delayable service.

[0227] Optionally, the foreground service and the foreground associated service may also be divided into a service group. The system delayable service and the background delayable service may also be divided into a service group. The system delayable service and the background delayable service may include but are not limited to: threads for upload / download services, threads for application compilation and installation services, threads for software upgrade and update services, etc. The embodiments of the present application do not limit the method for identifying system delayable services and background delayable services.

[0228] In some embodiments, the threads in one or more of the above service groups can be dynamically changed. For example, when application 1 is running in the foreground and application 2 is running in the background, the thread of application 1 can be divided into the foreground service, and the thread of application 2 can be divided into the background delayable service or the background unimportant service. When application 2 changes to running in the foreground and application 1 changes to a background application, the thread of application 1 can be moved from the foreground service to the background delayable service or the background unimportant service, and the thread of application 2 can be moved to the foreground service. Among them, the thread in the foreground associated service can also be changed from the thread associated with the thread of application 1 to the thread associated with the thread of application 2.

[0229] In some embodiments, the electronic device may further divide threads into different CPU groups according to the urgency of allocating processor resources to the threads. The electronic device may divide different CPU groups based on the above service groups. The more important a thread is or the higher the user sensitivity is, the more urgent it is for the electronic device to allocate processor resources to the thread. The higher the user sensitivity of the thread is, the easier it is for the user to notice that the thread is blocked or delayed.

[0230] Exemplarily, the electronic device may divide the above service groups into one or more of the following CPU groups: top thread group, secondary thread group, normal system thread group, restricted thread group, and normal background thread group. The above CPU groups may be arranged from high to low according to the urgency of allocating processor resources to threads: top thread group, secondary thread group, normal system thread group, normal background thread group, and restricted thread group. Among them, the top thread group may include threads in foreground services. The top thread group may also be referred to as a top-app group. The secondary thread group may include threads in foreground associated services. The secondary thread group may also be referred to as a foreground group. The normal system thread group may include threads in system resident services. The normal system thread group may also be referred to as a system group. The restricted thread group may include threads in system delayable services and background delayable services. The restricted thread group may also be referred to as a limit-background group. The normal background thread group may include threads in background unimportant services. The normal background thread group may also be referred to as a background group. The names of the above CPU groups are only exemplary descriptions of the present application and should not be construed as limiting the present application.

[0231] Optionally, the top-level thread group and the secondary thread group may also be divided into one CPU group. The general system thread group, the restricted thread group, and the general background thread group may also be divided into one CPU group. Alternatively, the general system thread group and the general background thread group may be divided into one CPU group.

[0232] In some embodiments, the above threads may have priorities. The priority of a thread determines the importance of the thread when it is scheduled. Threads with high priorities may be scheduled more frequently when competing for processor resources to ensure timely response.

[0233] The electronic device may include a real-time (RT) scheduler and a completely fair scheduler (CFS). The RT scheduler and the CFS scheduler may use different scheduling strategies to schedule threads. The RT scheduler and the CFS scheduler may be used to schedule threads with different priorities, respectively. For example, the CFS scheduler may be used to schedule threads with priorities within a priority range 1. The RT scheduler may be used to schedule threads with priorities within a priority range 2. The embodiments of the present application do not limit the values ​​of the priority range 1 and the priority range 2. For example, the priority range 1 may be [1, 40]. The priority range 2 may be [41, 139]. That is, if the priority of a thread is greater than or equal to 1 and less than or equal to 40, the thread may be scheduled by the CFS scheduler. If the priority of a thread is greater than or equal to 41 and less than or equal to 139, the thread may be scheduled by the RT scheduler.

[0234] The CFS scheduler can be used to determine the thread's demand for processor resources based on parameters such as thread type and thread priority, and then allocate processor resources to each thread as needed, and ensure that the processor resources allocated to each thread are relatively fair.

[0235] The RT scheduler can be used to schedule threads according to their priorities. The highest priority thread will get the processor resources first. In addition, high priority threads can preempt low priority resources.

[0236] In the above CPU grouping, the top-level thread group and the secondary thread group may contain threads with priorities in priority range 1 and threads with priorities in priority range 2. The threads with priorities in priority range 1 in the top-level thread group and the secondary thread group may be scheduled by the CFS scheduler. The threads with priorities in priority range 2 in the top-level thread group and the secondary thread group may be scheduled by the RT scheduler. The threads in the ordinary system thread group, the restricted thread group, and the ordinary background thread group may all be threads with priorities in priority range 1, and therefore, the threads therein may all be scheduled by the CFS scheduler.

[0237] In some embodiments, the electronic device can identify critical threads, critical dependent threads, and non-critical threads. For details, please refer to the introduction of the aforementioned embodiments. If the electronic device identifies that a thread in any service group of system resident services, system deferred services, background deferred services, and background unimportant services is a critical dependent thread, the electronic device can move this thread from the ordinary system thread group / restricted level thread group / ordinary background thread group to the top thread group / secondary thread group. Optionally, if the electronic device identifies that a thread in the foreground service or the foreground associated service is a non-critical dependent thread, the electronic device can move this thread from the top thread group / secondary thread group to the ordinary system thread group / restricted level thread group / ordinary background thread group.

[0238] It should be noted that the above service grouping and CPU grouping of threads are only exemplary descriptions of the present application and should not be construed as limiting the present application. The electronic device may also divide threads into more or fewer service groups and divide threads into more or fewer CPU groups.

[0239] In some embodiments, based on the above Figure 5 With the CPU grouping shown, the electronic device can group and manage the CPU time slices allocated to the threads.

[0240] Fig. 6A A flow chart of a method for grouping and controlling CPU time slices is exemplified.

[0241] S611. Initialize the ratio of the CPU weights of each group in the CPU group to an equal-proportional weight. The CPU weight corresponding to a group is used to indicate the length of the CPU time slice allocated by the scheduler to the threads in this group.

[0242] In some embodiments, the CPU grouping of threads may include a top-level thread group, a secondary thread group, a normal system thread group, a restricted-level thread group, and a normal background thread group. The electronic device may initialize the CPU weights of the top-level thread group, the secondary thread group, the normal system thread group, the restricted-level thread group, and the normal background thread group to 1:1:1:1:1. Figure 6B As shown in the figure, the CPU time slice ratio of the top thread group, secondary thread group, ordinary system thread group, restricted thread group, and ordinary background thread group can all be 20%. The length of the CPU time slice assigned to a CPU group is: total CPU time * CPU time slice ratio of the CPU group. The total CPU time can be the total length of the CPU time slice that the scheduler can allocate, that is, the size of the scheduler's scheduling area. The scheduling area can also be called the scheduling cycle.

[0243] The scheduler can allocate CPU time slices to multiple threads in a CPU group according to the length of the CPU time slice allocated to the CPU group. The lengths of the CPU time slices allocated to multiple threads in a CPU group can be the same or different.

[0244] It should be noted that the ratio of the CPU weights of the above groups can be the basis for the CFS scheduler to allocate CPU time slices to the threads it manages. The CPU time slice ratio of the above top-level thread group can specifically be: the ratio of the CPU time slices occupied by the threads managed by the CFS scheduler in the top-level thread group in the scheduling area of ​​the CFS scheduler. The CPU time slice ratio of the above secondary thread group can specifically be: the ratio of the CPU time slices occupied by the threads managed by the CFS scheduler in the secondary thread group in the scheduling area of ​​the CFS scheduler. The CPU time slices of the threads managed by the RT scheduler in the top-level thread group and the secondary thread group can be allocated by the RT scheduler, rather than determined by the CPU weights of the above groups.

[0245] S612: When a foreground event is detected, a CPU load rate of a foreground group is calculated, where the foreground group includes a top-level thread group and a secondary thread group.

[0246] Foreground events can be used to indicate events corresponding to foreground application execution tasks, including but not limited to: application startup events, audio and video switching events, page update or switching events, etc. The above-mentioned page update or / switching events may include events in which the application running in the foreground changes (for example, the user interface displayed by the electronic device switches from the user interface of application 1 to the user interface of application 2). The embodiment of the present application does not limit the method for detecting foreground events.

[0247] When a foreground event is detected, the electronic device can calculate the CPU load rate of the foreground group. Among them, the CPU load of a thread can represent the number of times a thread needs to perform CPU operations. The more tasks a thread needs to perform, the higher the CPU load of this thread. The embodiment of the present application does not limit the method for detecting the CPU load of a thread. For example, the CPU load can be calculated based on the CPU window-assisted load tracing (windows-assist load tracing, WALT) scheduling cycle.

[0248] In some embodiments, the CPU load rate of the foreground group may specifically include: the ratio of the CPU load of threads managed by the CFS scheduler in the top-level thread group and the secondary thread group to the CPU load of all threads managed by the CFS scheduler.

[0249] Alternatively, the CPU load rate of the foreground group may include: a ratio of the CPU load of all threads in the top-level thread group and the secondary thread group to the CPU load of all threads of the electronic device.

[0250] S613. According to the change of the CPU load rate of the foreground group, adjust the CPU weight ratio of each group in the CPU group.

[0251] In some embodiments, when the CPU load rate of the current group increases, the electronic device may increase the CPU time slice ratio of the foreground group by the same period.

[0252] like Figure 6B As shown, when the CPU load rate of the foreground group increases by 10%, the CPU time slice ratio of the foreground group can increase by 10%. It can be seen that before the CPU load rate of the foreground group increases, the CPU time slice ratio of the top thread group and the secondary thread group is 40% in total. After the CPU load rate of the foreground group increases by 10%, the CPU time slice ratio of the top thread group and the secondary thread group is 50% in total, that is, an increase of 10%. Correspondingly, after the CPU load rate of the foreground group increases by 10%, the CPU time slice ratio of the non-foreground group (i.e., the ordinary system thread group, the restricted thread group, and the ordinary background thread group) is reduced from 60% to 50%.

[0253] In some embodiments, since the foreground group includes a top thread group and a secondary thread group, the electronic device can increase the CPU time slice ratio of the top thread group and the secondary thread group according to the increase in the CPU time slice ratio of the foreground group. For example, the increase in the CPU time slice ratio of the top thread group and the secondary thread group can be the same. When the CPU time slice ratio of the foreground group increases by 10%, the CPU time slice ratio of the top thread group and the secondary thread group can both increase by 5% (i.e., both increase from 20% to 25%). Alternatively, the electronic device can determine the CPU time slice ratio of the top thread group and the secondary thread group according to the CPU load of the top thread group and the CPU load of the secondary thread group. If the CPU load of the top thread group is greater than the CPU load of the secondary thread group, the increase in the CPU time slice ratio of the top thread group can be greater than the increase in the CPU time slice ratio of the secondary thread group. Similarly, since the non-foreground group includes an ordinary system thread group, a restricted thread group, and an ordinary background thread group, the electronic device can reduce the CPU time slice ratio of the ordinary system thread group, the restricted thread group, and the ordinary background thread group according to the decrease in the CPU time slice ratio of the non-foreground group. The CPU time slice ratios of the ordinary system thread group, the restricted thread group, and the ordinary background thread group can be reduced equally or unequally.

[0254] like Figure 6B As shown, when the load rate of the foreground group increases by 10%, the electronic device can change the CPU weights of the top thread group, the secondary thread group, the ordinary system thread group, the restricted thread group, and the ordinary background thread group from 1:1:1:1:1 to 3:3:2:2:2. The CFS scheduler of the electronic device can allocate CPU time slices to the threads in each CPU group according to the CPU weight of 3:3:2:2:2.

[0255] In some embodiments, when the CPU load rate of the foreground group decreases, the electronic device can reduce the CPU time slice ratio of the foreground group year-on-year. The method of reducing the CPU time slice ratio of the foreground group year-on-year can refer to the method of increasing the CPU time slice ratio of the foreground group year-on-year. No further details are given here.

[0256] The embodiment of the present application does not limit the method by which the electronic device adjusts the CPU weight ratio according to the change in the CPU load rate of the foreground group. In addition to increasing or decreasing the CPU time slice ratio of the foreground group year-on-year, the electronic device can also increase or decrease the CPU time slice ratio of the foreground group at different ratios. For example, when the CPU load rate of the foreground group increases by X%, the electronic device can increase the CPU time slice ratio of the foreground group by 2X%. When the CPU load rate of the foreground group decreases by X%, the electronic device can reduce the CPU time slice ratio of the foreground group by 0.5X%.

[0257] It is understandable that when the foreground event occurs, the CPU load of the threads in the foreground group may change. When the electronic device detects the foreground event, adjusting the CPU weight ratio based on the change in the CPU load rate of the foreground group can reduce the number of times the electronic device detects the CPU load rate of the foreground group, and improve the efficiency of controlling the CPU time slices of each thread group.

[0258] In some embodiments, not limited to the above-mentioned detection of foreground events, the electronic device can also calculate the CPU load rate of the foreground group at other times. For example, the electronic device can periodically calculate the CPU load rate of the foreground group, and adjust the above-mentioned CPU weight ratio when the CPU load rate of the foreground group changes, thereby adjusting the length of the CPU time slice allocated to each thread group. The embodiment of the present application does not limit the timing when the electronic device calculates the CPU load rate of the foreground group and adjusts the CPU weight ratio.

[0259] S614: When the current event ends, the CPU weight of each group in the CPU group is restored to the initial weight.

[0260] The end of the foreground event may indicate that the task corresponding to the foreground event has been executed. When the foreground time ends, the electronic device may restore the CPU weight of each group in the CPU group to an initial weight, such as an equal-proportional weight.

[0261] It can be seen from the above method that the threads in the foreground group are threads with high user sensitivity. Based on the above CPU grouping, the electronic device can suppress the processor resources obtained by the threads in the non-foreground group when the CPU load rate of the foreground group is high, and provide a longer CPU time slice for the threads in the foreground group. In this way, the threads in the foreground group can obtain more processor resources when the task volume is large, so that the tasks can be completed faster, providing users with a smooth device usage experience. In addition, when the CPU load rate of the foreground group is reduced, the electronic device can provide a longer CPU time slice to the threads in the non-foreground group so that the tasks of the threads in the non-foreground group can be executed quickly. The above method can effectively improve the utilization efficiency of processor resources by grouping and controlling the CPU time slices of different CPU groups, and can keep the threads in the non-foreground group running while ensuring the smoothness of device use.

[0262] In some embodiments, based on the above Figure 5 For the CPU grouping shown, the electronic device can suppress the bandwidth quota of the processor resources obtained by different CPU groups.

[0263] Among them, bandwidth quota is a mechanism for limiting the CPU running time slice according to absolute time. As can be seen from the above embodiments, the electronic device can allocate CPU time slices for threads. The bandwidth quota can mean that within the CPU time slice allocated to the thread, only a fixed time quota (quota) is allowed for the thread to run. When the time quota is exceeded, the thread will be restricted from running. After obtaining the next CPU time slice, the thread can continue to run within the corresponding time quota.

[0264] Fig. 7A A flowchart of a method for suppressing bandwidth quota based on thread grouping is exemplified.

[0265] S711. Obtain the entire device load and / or device temperature of the electronic device.

[0266] The whole machine load can indicate the ratio of the CPU computing power required by all threads running in the electronic device within a period of time to the maximum computing power that the CPU can provide. The higher the whole machine load, the greater the current CPU computing power consumption, and the faster the electronic device consumes power and heats up.

[0267] The device temperature may be a shell temperature of the electronic device, such as a temperature of a rear shell, or the device temperature may be a temperature of a processor of the electronic device.

[0268] S712. Determine the bandwidth quota of the processor according to the whole machine load and / or the device temperature, and perform bandwidth quota on one or more groups of the common system thread group, the restricted level thread group, and the common background thread group according to the bandwidth quota.

[0269] In some embodiments, the electronic device may store a correspondence between the whole machine load and / or the device temperature and the bandwidth quota. Based on the above correspondence, the electronic device may determine the current bandwidth quota of the processor.

[0270] For the correspondence between the whole machine load and the bandwidth quota, please refer to the following Table 4.

[0271] Machine load Bandwidth quota ＞90％ 10％ (80％，90％] 30％ (60％，80％] 50％

[0272] Table 4

[0273] As can be seen from Table 4, when the whole machine load is greater than 90%, the bandwidth quota can be 10%. The bandwidth quota can be 10%, which can indicate that the time quota allowed by the electronic device to run the thread is 10% of the CPU time slice of the thread. For example, when the CPU time slice allocated to the thread by the electronic device is 100ms, the time quota for the electronic device to run the thread is 10ms. When the whole machine load is greater than 80% and less than or equal to 90%, the bandwidth quota can be 30% (i.e., the time quota is 30% of the corresponding CPU time slice). When the whole machine load is greater than 60% and less than or equal to 80%, the bandwidth quota can be 50% (i.e., the time quota is 50% of the corresponding CPU time slice). It can be seen that the higher the whole machine load, the smaller the bandwidth quota, and the higher the degree of bandwidth quota suppression of the thread by the electronic device.

[0274] The corresponding relationship between device temperature and bandwidth quota can be found in the following Table 5.

[0275] Equipment temperature (℃) Bandwidth quota ＞46 10％ (42，46] 30％ (38，42] 50％

[0276] Table 5

[0277] As shown in Table 5, when the device temperature is greater than 46°C, the bandwidth quota can be 10%. When the device temperature is greater than 42°C and less than or equal to 46°C, the bandwidth quota can be 30%. When the device temperature is greater than 38°C and less than or equal to 42°C, the bandwidth quota can be 50%. It can be seen that the higher the device temperature, the smaller the bandwidth quota, and the higher the degree of bandwidth quota suppression of the electronic device on the thread.

[0278] Tables 4 and 5 are merely exemplary descriptions of the present application and should not be construed as limiting the present application. Not limited to the above table lookup method, the electronic device may also determine the bandwidth quota corresponding to the current whole machine load or device temperature according to a corresponding model or calculation formula.

[0279] In some embodiments, the electronic device can determine the bandwidth quota in combination with the whole machine load and the device temperature. For example, based on the correspondence between the whole machine load and the bandwidth quota shown in Table 4 above, and the correspondence between the device temperature and the bandwidth quota shown in Table 5 above, the electronic device can use the smaller value of the bandwidth quota corresponding to the current whole machine load and the bandwidth quota corresponding to the current device temperature for bandwidth quota, or the electronic device can use the average value of the bandwidth quota corresponding to the current whole machine load and the bandwidth quota corresponding to the current device temperature for bandwidth quota. The embodiment of the present application does not limit the method for determining the bandwidth quota based on the whole machine load and the device temperature.

[0280] When the whole machine load and / or device temperature changes, the electronic device can dynamically adjust the degree of bandwidth quota suppression on the thread.

[0281] In some embodiments, the electronic device may set bandwidth quotas for one or more groups in the general system thread group, the restricted level thread group, and the general background thread group. Figure 5 The threads in the top-level thread group and the secondary thread group are relatively important threads, and therefore, the electronic device may not need to perform bandwidth quotas on the top-level thread group and the secondary thread group.

[0282] In some embodiments, when the whole machine load is less than a preset threshold (e.g., 60%), and / or the device temperature is less than a preset threshold (e.g., 38°C), the electronic device may stop allocating bandwidth to the common system thread group, the restricted thread group, and the common background thread group. The embodiment of the present application does not limit the value of the above threshold.

[0283] It can be seen from the above method that the electronic device can suppress the bandwidth quota of threads in the non-foreground group according to the whole machine load and / or the device temperature. The bandwidth quota can reduce the whole machine load per unit time. Among them, the higher the whole machine load, the higher the degree to which the electronic device suppresses the bandwidth quota of threads in the non-foreground group; the higher the device temperature, the higher the degree to which the electronic device suppresses the bandwidth quota of threads in the non-foreground group. The above-mentioned bandwidth quota suppression method can control the whole machine load and device temperature of the electronic device, reduce the situation where the threads in the non-foreground group affect the operation of the threads in the foreground group when the whole machine load is too high, and can reduce the situation where the device temperature is too high.

[0284] Figure 7B Another method flow chart for suppressing bandwidth quota based on thread grouping is exemplarily shown.

[0285] S721. Perform a persistent bandwidth quota on the restricted-level thread group according to the bandwidth quota amount 1 of the processor.

[0286] The bandwidth quota amount 1 may be preset. The embodiment of the present application does not limit the value of the bandwidth quota amount 1. For example, the bandwidth quota amount 1 may be 10%.

[0287] In some embodiments, the electronic device may identify threads in the restricted thread group that are deferrable and have a high CPU load. The CPU load of the thread may refer to the aforementioned Fig. 6A The thread with high CPU load may include a thread with a CPU load greater than a preset load threshold. The electronic device may use bandwidth quota amount 1 to perform a persistent bandwidth quota on the above-mentioned delayable thread with high CPU load.

[0288] S722. Determine the bandwidth quota 2 of the processor according to the whole machine load and / or the device temperature, and perform bandwidth quotas on the common system thread group and the common background thread group according to the bandwidth quota 2.

[0289] The method for determining bandwidth quota 2 based on the whole machine load and / or device temperature can refer to the above Fig. 7A Introduction to the method shown.

[0290] It can be seen from the above method that the electronic device can perform persistent bandwidth quota suppression on threads that can delay high CPU loads to reduce burst load situations. The electronic device can also perform dynamic bandwidth quota suppression on threads outside the restricted thread group in the non-foreground group according to the overall machine load and / or device temperature. In this way, the overall machine load and device temperature of the electronic device can be controlled, and the situation in which threads in the non-foreground group affect the operation of threads in the foreground group when the overall machine load is too high can be reduced, and the situation in which the device temperature is too high can be reduced.

[0291] In some embodiments, the electronic device can perform persistent bandwidth quotas on the common system thread group, the restricted level thread group, and the common background thread group according to the preset bandwidth quota amount. The embodiment of the present application does not limit the value of the preset bandwidth quota amount.

[0292] In some embodiments, priority inversion may occur during the execution of threads. Priority inversion may mean that when a high-priority thread needs to access a shared resource, the shared resource is already occupied by a low-priority thread, and the low-priority thread may be preempted by other medium-priority threads when accessing the shared resource, resulting in the high-priority thread being blocked by many threads with lower priorities.

[0293] In order to solve the above-mentioned priority inversion problem, the electronic device can set a critical section and add the threads in the non-foreground group that are relied on by the foreground group to the critical section. The electronic device can implement fast running of the threads in the critical section based on one or more of the following measures: increasing the priority of the threads in the critical section, releasing the bandwidth quota suppression on the threads in the critical section, increasing the length of the CPU time slice of the threads in the critical section, etc.

[0294] Figure 8 A flowchart of a method for allocating processor resources is exemplified.

[0295] S811. When it is detected that thread 1 in the foreground group is waiting for the release of the binder / thread lock held by thread 2 in the non-foreground group, thread 2 is marked with a critical section label. The non-foreground group includes a normal system thread group, a restricted thread group, and a normal background thread group.

[0296] Binder is a mechanism for inter-process communication that allows data transmission and method calls between different processes. In some embodiments, if thread 1 needs to use the running result of thread 2 during its running, thread 1 can wake up thread 2 based on binder. At this time, thread 2 holds the binder that thread 1 depends on, and thread 1 needs to wait for thread 2 to release the binder before it can continue to run.

[0297] Thread locks can be used to lock shared resources to prevent multiple threads from accessing or modifying shared resources at the same time. When multiple threads need to modify or access shared resources, thread locks can ensure that only one thread can read and write to the shared resources. In some embodiments, if thread 2 holds the thread lock of a shared resource, thread 1 needs to wait for thread 2 to release the thread when it needs to access the shared resource.

[0298] In some embodiments, the electronic device can detect whether the thread in the foreground group is waiting for the binder / thread lock held by the thread in the non-foreground group to be released. It can be seen from the aforementioned embodiments that the electronic device may have performed operations such as CPU time slice shortening and / or bandwidth quota suppression on the threads in the non-foreground group. If the thread in the foreground group is waiting for the binder / thread lock held by the thread in the non-foreground group to be released, the above-mentioned CPU time slice shortening and / or bandwidth quota suppression may cause the thread in the foreground group to be blocked for a long time, affecting the smoothness of the operation of the electronic device.

[0299] Here, the thread 1 in the foreground group is waiting for the binder / thread lock held by the thread 2 in the non-foreground group to be released as an example. The electronic device can label the thread 2 with a critical section label. Labeling the thread 2 with a critical section label can indicate that the thread 2 is added to the critical section. The embodiment of the present application does not limit the implementation method of the above critical section label.

[0300] S812. Perform one or more of the following operations on the thread with the critical section label: increase the priority, increase the CPU time slice length, and release the bandwidth quota suppression.

[0301] In some embodiments, the CFS scheduler in the electronic device may perform one or more of the following operations on thread 2: increase priority, increase CPU time slice length, and release bandwidth quota suppression.

[0302] Among them, raising the priority of thread 2 can reduce the situation where processor resources are preempted by other threads with higher priority when thread 2 is running. This can reduce the situation where threads with lower priority than thread 1 run before thread 1 because of their higher priority than thread 2, resulting in thread 1 being blocked for a long time while waiting for thread 2 to release the binder / thread lock.

[0303] Among them, increasing the length of the CPU time slice and releasing the bandwidth quota suppression can both enable thread 2 to run quickly, so that thread 2 can release the binder / lock that thread 1 depends on as soon as possible.

[0304] S813: When thread 2 releases the binder / thread lock, the critical section label of thread 2 is removed.

[0305] When thread 2 releases the binder / thread lock that thread 1 depends on, the electronic device can remove the critical section tag of thread 2. Removing the critical section tag of thread 2 can mean moving thread 2 out of the critical section. When the critical section tag of thread 2 is removed, the CFS scheduler in the electronic device can restore the priority and CPU time slice length of thread 2 to the initial state (that is, the state in which thread 2 joins the critical section). In addition, the electronic device can Fig. 7A or Figure 7B The method shown suppresses the bandwidth quota of thread 2.

[0306] It can be seen from the above method that when the threads in the foreground group (such as the top-level thread group / secondary thread group) depend on the threads in the non-foreground group (such as the ordinary system thread group / restricted-level thread group / ordinary background thread group), the electronic device can temporarily increase the priority of the thread in the non-foreground group that the foreground group depends on, increase the CPU time slice length of the thread, and release the bandwidth quota suppression on the thread. In addition, the reaction and execution time required to move the thread in the non-foreground group that the foreground group depends on to the foreground group. Compared with changing the thread group of the dependent thread, the above method of setting the critical section can more efficiently reduce the priority inversion situation and improve the smoothness of the thread operation in the foreground group.

[0307] In some embodiments, based on the non-critical threads determined in the aforementioned embodiments, the electronic device may suppress the CPU frequency of the non-critical threads.

[0308] Fig. 9 A flow chart of a method for suppressing CPU frequency of non-critical threads is exemplified.

[0309] S911. Determine a maximum CPU frequency corresponding to a non-critical thread according to parameters such as the entire machine load and / or the device temperature.

[0310] The whole machine load and equipment temperature can refer to the above Fig. 7A Non-critical threads may include threads other than critical threads and critical dependent threads among threads running in electronic devices. The method for confirming critical dependent threads can refer to the aforementioned Figure 3A and Figure 3B or refer to the above Figure 4A and Figure 4B Introduction.

[0311] In some embodiments, the electronic device may store a correspondence between the entire machine load and / or the device temperature and the maximum CPU frequency corresponding to the non-critical thread.

[0312] The corresponding relationship between the whole machine load and the maximum CPU frequency corresponding to the non-critical thread can be referred to the following Table 6.

[0313] Machine load Maximum CPU frequency corresponding to non-critical threads Load range 1 Frequency 1 Load range 2 Frequency 2 Load range 3 Frequency 3

[0314] Table 6

[0315] The corresponding relationship between the device temperature and the maximum CPU frequency corresponding to the non-critical thread can be referred to the following Table 7.

[0316] Equipment temperature Maximum CPU frequency corresponding to non-critical threads Temperature range 1 Frequency 1 Temperature range 2 Frequency 2 Temperature range 3 Frequency 3

[0317] Table 7

[0318] The above Table 6 and Table 7 are merely exemplary descriptions of the present application and should not be construed as limiting the present application.

[0319] It should be noted that when the whole machine load is higher, the maximum CPU frequency corresponding to the non-critical thread is lower, and the electronic device suppresses the CPU frequency of the non-critical thread more. When the device temperature is higher, the maximum CPU frequency corresponding to the non-critical thread is lower, and the electronic device suppresses the CPU frequency of the non-critical thread more.

[0320] In some embodiments, the electronic device can determine the maximum CPU frequency corresponding to the non-critical thread in combination with the whole machine load and the device temperature. When the whole machine load and / or the device temperature changes, the electronic device can dynamically adjust the CPU frequency suppression degree of the non-critical thread.

[0321] In addition to the whole machine load and device temperature, the electronic device can also determine the maximum CPU frequency corresponding to the non-critical thread based on other factors. For example, the electronic device can also determine the maximum CPU frequency corresponding to the non-critical thread based on the current power consumption of the electronic device. The higher the current power consumption of the electronic device, the lower the maximum CPU frequency corresponding to the non-critical thread.

[0322] S912. When running a non-critical thread, control the CPU operating frequency to be lower than the maximum CPU frequency corresponding to the non-critical thread.

[0323] In some embodiments, when a non-critical thread is running, the operating frequency of the CPU may be changed dynamically, and the operating frequency of the CPU does not exceed the maximum CPU frequency corresponding to the non-critical thread.

[0324] S913: When one or more non-critical threads are confirmed as critical dependent threads, release the CPU frequency suppression of the one or more non-critical threads.

[0325] By the aforementioned Figure 4A and Figure 4B As can be seen from the method shown, the electronic device can detect the critical dependent threads in real time based on the online mode. When it is detected that one or more threads change from non-critical threads to critical dependent threads, the electronic device does not need to control the CPU frequency below the maximum CPU frequency corresponding to the non-critical threads (i.e., release the CPU frequency suppression) when the one or more threads are running. The above-mentioned change from a non-critical thread to a critical dependent thread may include updating the aforementioned Figure 4A When the thread protection list is shown, the thread newly added to the thread protection list.

[0326] In some embodiments, when a thread changes from a critical dependent thread to a non-critical thread, the electronic device can control the CPU operating frequency to be below the maximum CPU frequency corresponding to the non-critical thread when the thread is running (i.e., suppress the CPU frequency of the thread). The above-mentioned thread changing from a critical dependent thread to a non-critical thread may include updating the above-mentioned Figure 4A When the thread protection list is shown, the thread is removed from the thread protection list.

[0327] It can be seen from the above method that by suppressing the CPU frequency of non-critical threads, the electronic device can save power of the electronic device and reduce the rapid heating of the electronic device while keeping the non-critical threads running.

[0328] In some embodiments, the electronic device may further divide the threads in the electronic device into group 1 and group 2. Group 1 may include key threads in the current application scenario and their key dependent threads and threads of foreground applications. Group 2 may include other threads outside of group 1. The electronic device may calculate the CPU load rate of group 1, and adjust the ratio of the CPU weights of group 1 to group 2 according to the change in the load rate of group 1, thereby adjusting the CPU time slice lengths of the threads in group 1 and group 2 (for details, please refer to the aforementioned Fig. 6A method shown).

[0329] Optionally, the electronic device may allocate CPU bandwidth quotas to threads in group 2 (for details, please refer to the aforementioned Fig. 7A The electronic device may also identify deferrable threads in group 2 and perform a persistent CPU bandwidth quota on the deferrable threads.

[0330] Optionally, the electronic device may also detect whether the thread in group 1 is waiting for the binder / thread lock held by the thread in group 2 to be released. For example, if thread a1 in group 1 is waiting for the binder / thread lock held by thread a2 in group 2 to be released, the electronic device may add the thread a2 to the critical section (for details, refer to the aforementioned Figure 8 method shown).

[0331] Optionally, the electronic device may suppress the frequency of the threads in group 2 (for details, please refer to the above Fig. 9 method shown).

[0332] In some embodiments, the electronic device may dynamically adjust the frequency of the critical threads and the critical dependent threads in the electronic device to achieve accurate supply of processor resources to the critical threads and the critical dependent threads.

[0333] In the subsequent embodiments of this application, the method of dynamic frequency modulation is specifically introduced by taking the thread related to the drawing frame (referred to as the drawing frame thread) as an example. Among them, the drawing frame may refer to the user interface displayed by the drawing electronic device. The number of times the electronic device refreshes the drawn image on the screen per unit time can be determined by the refresh rate of the electronic device screen. For example, if the refresh rate of the electronic device is 120 hertz (Hz), the electronic device can refresh the screen every 8.3ms, that is, draw a frame of image every 8.3ms. Threads related to drawing frames may include UI threads, RS threads, key dependent threads that the UI threads depend on, and key dependent threads that the RS threads depend on.

[0334] Fig.10 The schematic diagram of a frequency modulation curve is shown as an example. The electronic device can be Fig.10 The frequency modulation curve shown dynamically modulates the frame drawing thread.

[0335] Fig.10 The frequency modulation function corresponding to the frequency modulation curve shown can refer to the following formula (1):

[0336]

[0337] Among them, u(t) can represent the CPU computing power provided to the thread at a certain moment. maxUtil can represent the maximum computing power that the CPU can provide. For example, maxUtil can be 1024. Time can represent the length of time that the electronic device has been drawing when drawing a frame of an image, that is, the length of time from the moment when the frame drawing instruction (such as a frame synchronization signal) for drawing a frame of an image is issued to the current moment. Deadline can represent the frame duration or frame cycle, which can be determined by the refresh rate of the screen. For example, if the refresh rate of the screen is 120Hz, the deadline can be 8.3ms. If the refresh rate of the screen is 60Hz, the deadline can be 16.67ms. Margin can represent the length of time it takes for each frame in history to complete the corresponding frame task. For example, margin can be a cumulative amount determined by the historical average running time. If the historical frame runs overtime (for example, the frame drawing task is not completed within 8.3ms), the margin will increase. If the historical frame running time is shortened (for example, the frame drawing task is completed in less than 8.3ms), the margin will decrease.

[0338] exist Fig.10 In the coordinate axes shown, the vertical axis may be u(t) and the horizontal axis may be the above-mentioned Time. It can be seen that when the margin is fixed, the CPU computing power provided to the frame drawing thread by the electronic device during the process of drawing a frame of an image by the frame drawing thread increases linearly with time. Among them, the electronic device may store a frequency point computing power table. The electronic device may adjust the CPU frequency based on the computing power determined by the above-mentioned frequency modulation curve.

[0339] The frequency point computing power table can be found in Table 8 below.

[0340] Hashrate Frequency Hashrate 1 Frequency 1 Hashrate 2 Frequency 2 …… ……

[0341] Table 8

[0342] In some embodiments, the CPU of the electronic device may include multiple CPU cores. Different CPU cores may operate at different frequencies. Different CPU cores may run different threads and process different tasks at the same time. The above frequency point computing power table may include the frequencies of different CPU cores under one CPU computing power. In this way, the electronic device can adjust the frequency of the CPU core running the thread based on the computing power provided to the thread.

[0343] Not limited to the above frequency point computing power table, electronic devices can also adjust the CPU frequency according to computing power in other ways.

[0344] Depend on Fig.10It can be seen from the frequency modulation curve shown that the computing power provided by the electronic device to the frame drawing thread in the early stage of drawing a frame of image is small, and the frame drawing thread completes the task slowly. If the frame drawing thread needs to complete a large amount of tasks to draw a frame of image, the frame drawing task may not be completed in time, resulting in frame loss. In addition, the computing power provided by the electronic device to the frame drawing thread in the background of drawing a frame of image is large. If the frame drawing thread needs to complete a small amount of tasks to draw a frame of image, the frame drawing task may have been completed long ago, and the electronic device still provides high computing power, which leads to a waste of processor resources. Therefore, Fig.10 The frequency modulation curve shown is not conducive to efficient utilization of processor resources.

[0345] In order to improve the utilization efficiency of processor resources, the electronic device can perform dynamic frequency modulation based on the frequency modulation function shown in the following formula (2).

[0346]

[0347] Wherein, kk is a slope parameter, which can be used to change the slope of the frequency modulation function. α is a curvature parameter, which can be used to change the curvature of the frequency modulation function.

[0348] In some embodiments, the server can perform simulation based on historical CPU load data to determine the values ​​of kk and α under the optimal frequency modulation function. Then, the server can send the optimal frequency modulation function to the electronic device on the user side. The electronic device on the user side can use the optimal frequency modulation function to dynamically modulate the key threads such as the frame drawing thread and the key dependent threads. The method for determining the optimal frequency modulation function provided by the present application is described in detail below.

[0349] Fig.11A A schematic diagram for determining an optimal frequency modulation function is exemplarily shown.

[0350] like Fig.11A As shown, the server 200 may include a workload generation module and a frequency modulation simulator.

[0351] The task volume generation module can generate a task data list based on the historical CPU load data and the frequency point computing power table. Among them, the historical CPU load data may include the duration of thread operation and the CPU frequency when the thread is running. In some embodiments, the historical CPU load data may be a trace file generated by tracking the running threads of the electronic device. For example, the historical CPU load data may include the thread running data (such as running duration, CPU frequency during operation, etc.) after the electronic device opens one or more applications within a period of time (such as 12 hours, or 24 hours, etc.).

[0352] The task data list may include the frame task volume of the key thread and the key dependent thread. For example, the above historical CPU load data may include the multi-frame task volume of the frame drawing thread drawing multiple frames of images. Each frame task volume may correspond to a frame sequence number. The frame task volume for drawing a frame of image can be calculated by the running time of the frame drawing thread executing this frame task volume and the computing power corresponding to the CPU frequency.

[0353] The task volume generation module can send the task data list to the frequency modulation simulator.

[0354] The frequency modulation simulator can determine the optimal frequency modulation function based on the task data list and the CPU energy efficiency curve.

[0355] The CPU energy efficiency curve can be used to reflect the corresponding relationship between the CPU's computing power and power consumption during operation. The CPU energy efficiency curves of different CPU models may be different.

[0356] Fig. 11B A schematic diagram of a CPU energy efficiency curve is shown as an example.

[0357] like Fig. 11B As shown in the figure, the horizontal axis u of the coordinate axis of the CPU energy efficiency curve can represent the computing power provided by the CPU, and the vertical axis g(u) can represent the power consumption of the CPU under a certain computing power, that is, the power consumption required for the CPU to complete a unit task. It can be seen that the greater the computing power provided by the CPU, the higher the power consumption of the CPU. In addition, the CPU energy efficiency curve is a convex downward curve. This means that as the computing power provided by the CPU increases, the increase in CPU power consumption increases for each unit increase in CPU computing power.

[0358] For example, the optimal energy efficiency part of the CPU energy efficiency curve can be Fig. 11B The computing power shown is in the part corresponding to u1~u2. It can be understood that in the part of the CPU energy efficiency curve where the computing power is less than that corresponding to u1, although the CPU power consumption is low, the CPU computing power is too small, which will cause the thread to run slowly and the device performance to be unsmooth. In the part of the CPU energy efficiency curve where the computing power is greater than that corresponding to u2, the increase in CPU power consumption is too high for each unit increase in CPU computing power, that is, the power consumption cost caused by increasing computing power is too large. Therefore, the computing power provided by the electronic device is in the range of u1~u2, which is conducive to the fast running of threads, and can perform more tasks with less power consumption, saving power of the electronic device. The above values ​​of u1 and u2 are related to the function expression of the CPU energy efficiency curve. The embodiments of the present application do not limit the values ​​of u1 and u2.

[0359] Fig. 11B The CPU energy efficiency curve shown is only an exemplary description of the present application and should not constitute a limitation on the present application.

[0360] The frequency modulation simulator can traverse the value ranges of the slope parameter and the curvature parameter of the frequency modulation function based on the simulation granularity, and determine the frequency modulation function under different value combinations of the slope parameter and the curvature parameter.

[0361] The slope parameter is kk in the above formula (2). The curvature parameter is α in the above formula (2). The above simulation granularity, the value range of kk, and the value range of α can all be preset. For example, the value range of kk can be a range corresponding to greater than or equal to 0.1 and less than or equal to 20. The value range of α can be a range corresponding to greater than or equal to 0.1 and less than or equal to 5. The simulation granularity can be 0.1. Based on the simulation granularity, the frequency modulation simulator can determine 200 values ​​from the value range of kk and 50 values ​​from the value range of α, thereby determining 10,000 groups of different value combinations of kk and α (i.e., 10,000 different frequency modulation functions). The above simulation granularity, the value range of kk and α are only exemplary descriptions of the present application and should not constitute a limitation on the present application. In some embodiments, the simulation granularity used to take values ​​in the value range of kk may be different from the simulation granularity used to take values ​​in the value range of α.

[0362] The frequency modulation simulator can traverse the task data list, simulate the frame loss data and power consumption of the key thread and the key dependent thread under different frequency modulation functions, and determine the optimal frequency modulation function based on the frame loss data and power consumption. The power consumption of the key thread and the key dependent thread can be determined based on the CPU energy efficiency curve.

[0363] The server 200 may send the optimal frequency modulation function determined by the frequency modulation simulator to the electronic device 100. The CPU energy efficiency curve used by the frequency modulation simulator in the server 200 may be the CPU energy efficiency curve of the CPU in the electronic device 100. In this way, the electronic device 100 may realize accurate supply of processor resources when running key threads and key dependent threads based on the optimal frequency modulation function.

[0364] Below Fig.11A The method for the server 200 to determine the optimal frequency modulation function is specifically introduced.

[0365] Fig. 12A A flow chart of a method for determining an optimal frequency modulation function is exemplarily shown.

[0366] S1211. Obtain historical CPU load data, CPU energy efficiency curve, and frequency point computing power table. The historical CPU load data includes the running time of the thread and the CPU frequency when the thread is running.

[0367] S1212: Extract the running time and CPU frequency of the key thread and the key dependent thread from the historical CPU load data.

[0368] In some embodiments, the task volume generation module in the server 200 can extract the running time and the CPU frequency of the frame drawing thread during operation from the historical load data, for example, the running time and the CPU frequency of the UI thread and the key dependent threads of the UI thread, and the running time and the CPU frequency of the RS thread and the key dependent threads of the RS thread.

[0369] Fig. 12B The schematic diagram exemplarily shows the operation of the UI thread and the RS thread.

[0370] like Fig. 12B As shown, the electronic device can send a frame synchronization signal based on the frame period. The above frame synchronization signal can be used to instruct the UI thread and the RS thread to perform corresponding frame drawing tasks frame by frame. For example, when the screen refresh rate is 120Hz, the frame period can be 8.3ms. Among them, the frame drawing task performed by the UI thread may include determining the specific content displayed in each frame of the user interface. The frame drawing task performed by the RS thread may include rendering and displaying each frame of the user interface according to the specific content of each frame of the user interface determined by the UI thread. When the UI thread performs a frame drawing task within a frame period, it may need to rely on the operation of one or more key dependent threads. Similarly, when the RS thread performs a frame drawing task within a frame period, it may need to rely on the operation of one or more key dependent threads.

[0371] For example, Fig. 12B As shown, when receiving the frame synchronization signal 1, the UI thread can determine the display content of the first frame user interface, and send a frame drawing instruction for drawing the first frame user interface to the RS thread through interprocess communication (IPC). When receiving the frame synchronization signal 2, the RS thread can draw the first frame user interface according to the above-mentioned frame drawing instruction for drawing the first frame user interface. Among them, the RS thread can instruct the graphics processing unit (GPU) to draw the user interface. In addition, when receiving the frame synchronization signal 2, the UI thread can determine the display content of the second frame user interface, and send a frame drawing instruction for drawing the second frame user interface to the RS thread through IPC. The time interval between the frame synchronization signal 1 and the frame synchronization signal 2, and the time interval between the frame synchronization signal 2 and the frame synchronization signal 3 are the frame period. When receiving the frame synchronization signal 3, the RS thread can draw the second frame user interface according to the above-mentioned frame drawing instruction for drawing the second frame user interface. By analogy, the UI thread and the RS thread can realize frame-by-frame refresh of the user interface on the screen.

[0372] The running time of the UI thread may include the running time of the UI thread executing each frame drawing task. The running time of the UI thread executing a frame drawing task is related to the amount of tasks of this frame drawing task. When the computing power provided by the CPU remains unchanged, the more tasks a frame drawing task has, the longer the running time of the UI thread executor a frame drawing task. For example, the running time of the UI thread executing a frame drawing task may be less than 8.3ms, or it may exceed 8.3ms. It should be noted that the running time of the UI thread executing a frame drawing task may include the time the UI thread waits for its key dependent thread to run in order to execute this frame task.

[0373] The running time of the RS thread can refer to the running time of the above UI thread.

[0374] S1213. Determine a task data list of the critical thread and the critical dependent thread according to the frequency point computing power table, the running time of the critical thread and the critical dependent thread, and the CPU frequency during running, wherein the task data list includes the frame task amount of the critical thread and the critical dependent thread.

[0375] The task volume generation module in the server 200 can determine the CPU computing power corresponding to the CPU frequency when the key thread and the key dependent thread are running according to the frequency point computing power table. The task volume generation module can calculate the frame task volume of each frame task executed by the key thread and the key dependent thread, and then generate a task data list. The task data list can refer to the following Table 9.

[0376] Frame number Frame workload 1 Task 1 2 Task 2 …… ……

[0377] Table 9

[0378] The frame numbers may be arranged in sequence according to the execution order of each frame task. For example, in each frame task executed by the UI thread and the RS thread, the frame number may be Fig. 12B The task amount of a frame task can be the product of the running time of this frame task and the computing power of the CPU when this frame task is running, or it can be the integral of the computing power of the CPU and the running time of this frame task. In some embodiments, the above frame task amount can be a normalized task amount.

[0379] The above task data list may include the task volume corresponding to each frame task executed by the UI thread, and the task volume corresponding to each frame task executed by the RS thread.

[0380] The frame tasks performed by the UI thread and RS thread can refer to the above Fig. 12BIn some embodiments, if the key thread is an audio playback thread, the task amount of one frame of tasks performed by the audio playback thread may include the task amount of playing one frame of audio. The embodiment of the present application does not limit the task type of each frame task performed by the key thread and the key dependent thread.

[0381] S1214, obtaining the form of the frequency modulation function, as well as the value range and simulation granularity of the slope parameter and the curvature parameter in the frequency modulation function.

[0382] The frequency modulation function form can refer to the aforementioned formula (2).

[0383] S1215. Determine the frequency modulation function by traversing the value range of the slope parameter and the curvature parameter according to the simulation granularity.

[0384] S1216, traversing the task data list, simulating the frame loss data and power consumption of the key thread and the key dependent thread when the key thread and the key dependent thread are dynamically frequency modulated using the frequency modulation function according to the CPU energy efficiency curve.

[0385] The method for determining the frame loss data and power consumption of the key thread and the key dependent thread can be referred to in the subsequent section of this application. Fig. 12C The method shown.

[0386] S1217. Determine whether the value ranges of the slope parameter and the curvature parameter have been traversed.

[0387] If the value ranges of the slope parameter and the curvature parameter are completely traversed, the FM simulator in the server 200 may execute the following step S1218.

[0388] If the value ranges of the slope parameter and the curvature parameter have not been completely traversed, the FM simulator in the server 200 may continue to execute the above step S1215.

[0389] S1218. Determine an optimal frequency modulation function according to the frame loss data and power consumption corresponding to the frequency modulation function under multiple groups of different value combinations of slope parameters and curvature parameters.

[0390] The frequency modulation simulator can determine different frequency modulation functions according to different value combinations of slope parameters and curvature parameters. The frequency modulation simulator can simulate the frame loss data and power consumption corresponding to different frequency modulation functions when the same key thread and key dependent thread are frequency modulated.

[0391] In some embodiments, the frequency modulation simulator may first select the frequency modulation function with the smallest frame loss data, and determine the frequency modulation function with the smallest power consumption among the frequency modulation functions with the smallest frame loss data as the optimal frequency modulation function. Alternatively, the frequency modulation simulator may first select the frequency modulation function with the smallest power consumption, and determine the frequency modulation function with the smallest frame loss data among the frequency modulation functions with the smallest power consumption as the optimal frequency modulation function. Alternatively, the frequency modulation simulator may perform a weighted summation of the frame loss data and power consumption corresponding to the frequency modulation function, and determine the frequency modulation function with the smallest weighted summation value as the optimal frequency modulation function.

[0392] The above method of determining the optimal frequency modulation function based on the frame loss data and power consumption corresponding to the frequency modulation function is only an exemplary description of the present application and should not constitute a limitation to the present application.

[0393] Fig. 12C The flowchart of a method for determining the frame loss data and power consumption of a critical thread and a critical dependent thread based on a set of slope parameters and curvature parameters is exemplarily shown.

[0394] S1221. Determine the frame-CPU frequency modulation allocation result according to the frame period and the CPU frequency modulation period.

[0395] In some embodiments, the frame period may represent the time interval between two adjacent frame synchronization signals. Fig. 12B The CPU frequency adjustment period can represent the time interval between two adjacent CPU frequency adjustments.

[0396] The CPU frequency modulation period and the frame period may be different. For example, the frame period may be 8.3 ms. The CPU frequency modulation period may be 4 ms. Therefore, the moment when the electronic device modulates the CPU frequency may be at different moments in different frame periods.

[0397] For example, the electronic device may perform the first CPU frequency modulation at 4ms, the second CPU frequency modulation at 8ms, the third CPU frequency modulation at 12ms, and the fourth CPU frequency modulation at 16ms. The key thread of the electronic device runs the first frame task within 0-8.3ms, and runs the second frame task within 8.3ms-16.6ms. Then, the first CPU frequency modulation of the electronic device may be performed at 4ms of the frame period of the first frame task. The second CPU frequency modulation of the electronic device may be performed at 8ms of the frame period of the first frame task. The third CPU frequency modulation of the electronic device may be performed at 3.7ms of the frame period of the second frame task. The fourth CPU frequency modulation of the electronic device may be performed at 7.7ms of the frame period of the second frame task.

[0398] The frame-CPU frequency modulation allocation result can be used to indicate the correspondence between the CPU frequency modulation period and the frame period, so as to determine in which frame period the current CPU frequency modulation is located. In this way, the electronic device can determine whether to increase or decrease the frequency according to whether the frame task in the frame period where the current CPU frequency modulation is located is completed.

[0399] S1222. Determine frequency modulation function 1 corresponding to the CPU computing power, slope parameter 1, and curvature parameter 1 of the first frame.

[0400] The first frame CPU computing power may be preset. The frequency modulation simulator may determine the first frame CPU frequency corresponding to the first frame computing power according to the frequency modulation computing power table. The embodiment of the present application does not limit the value of the first frame CPU computing power.

[0401] S1223. Determine whether the task data list has been processed.

[0402] The task data list is processed, which means that the frequency modulation simulator simulates all the frame tasks in the task data list using the frequency modulation function 1. Among them, using the frequency modulation function 1 to simulate a frame task can mean that the frequency modulation simulator uses the frequency modulation function 1 to adjust the CPU frequency during the running of a frame task, thereby determining the running time and power consumption of this frame task under the action of the frequency modulation function 1.

[0403] In some embodiments, the frequency modulation simulator may use the frequency modulation function 1 to sequentially simulate each frame task in the task data list according to the arrangement order of the frame numbers in the task data list.

[0404] If the task data list processing is completed, the frequency modulation simulator can execute the following step S1227.

[0405] If the task data list has not been processed, the frequency modulation simulator may execute the following step S1224.

[0406] S1224. According to the currently processed frame sequence number, the remaining task amount of the previous frame, the historical CPU computing power simulation list, and the frame-CPU frequency modulation allocation result, determine the running time simulation result and the computing power simulation result corresponding to the current frame task when the frequency modulation function 1 is used for frequency modulation.

[0407] The frequency modulation simulator can obtain the frame number currently being processed, and then determine the task amount of the current frame task according to the frame number.

[0408] In some embodiments, the previous frame task of the current frame task may not complete all the task amounts within the frame period (e.g., 8.3ms) in which it is running. Then, the remaining task amount of the previous frame can be continued within the frame period corresponding to the current frame task. Among them, within the frame period corresponding to the current frame task, the frequency modulation simulator can first complete the remaining task amount of the previous frame, and then start running the current frame task. If there is no remaining task amount of the previous frame task, the frequency modulation simulator can directly start running the current frame task within the frame period corresponding to the current frame task.

[0409] The historical CPU computing power simulation list may include the frame tasks before the current frame task, the running time under the action of the frequency modulation function 1, and the computing power corresponding to the running stage. The frequency modulation simulator can determine the value of the margin in the frequency modulation function 1 based on the current data in the historical CPU computing power simulation list, and then simulate the current frame task based on the frequency modulation function 1 corresponding to the margin. In some embodiments, the value of the margin can be the average running time of the current frame tasks in the historical CPU computing power simulation list.

[0410] Fig.12D The schematic diagram exemplarily shows a simulation of different frame tasks of a thread based on the frequency modulation function 1.

[0411] like Fig.12D As shown, the CPU frequency modulation period is 4ms. The CPU frequency modulation period can also be called the computing power regulation period. The frame drawing period can be 8.3ms. The frame drawing period can be the frame period of the frame drawing thread (such as the UI thread, RS thread). The CPU computing power of the first frame can be u12. The frequency modulation simulator can run the first frame task of the frame drawing thread from 0ms.

[0412] The frequency modulation simulator can start running the first frame task of the frame drawing thread at 0 ms, that is, simulate the first frame task.

[0413] In the 0-4ms, the CPU computing power provided by the frequency modulation simulator to the frame drawing thread can be u12. The 4ms can be the CPU frequency modulation moment. At the 4ms, the frequency modulation simulator can determine whether the 1st frame task is completed. If not, the frequency modulation simulator can increase the CPU computing power provided to the frame drawing thread from u12 to u12 according to the frequency modulation function 1. Fig.12DThe u14 shown, that is, to increase the CPU frequency. Within the 4th-8th ms, the CPU computing power provided by the frequency modulation emulator to the frame drawing thread can be u14. Among them, when the frequency modulation function 1 is used to modulate the frequency during the running of the 1st frame task, the value of margin in the frequency modulation function 1 can be preset. For example, the value of margin can be 6ms. In addition, when the CPU frequency is modulated in the above 4th ms, since the running time of the 1st frame task is 4ms, the value of Time in the frequency modulation function 1 can be 4ms. In this way, the frequency modulation emulator can calculate the adjusted CPU frequency when the CPU frequency is modulated in the 4th ms according to the frequency modulation function 1.

[0414] like Fig.12D As shown, the completion time of the first frame task is 6.2ms. It can be understood that 6.2ms can include the time for the frame drawing thread (such as the UI thread or the RS thread) to run the first frame task and the time for the frame drawing thread to wait for its key dependent thread to run in order to run the first frame task.

[0415] The 8th ms can be the CPU frequency modulation moment. Since the 8th ms is still within the frame drawing period of the first frame, the frequency modulation simulator can determine whether the task of the first frame is completed. If completed, the frequency modulation simulator can reduce the CPU computing power provided to the frame drawing thread from u14 to Fig.12D The u11 shown, that is, the CPU frequency is reduced. In the 8th to 12th ms, the CPU computing power provided by the frequency modulation simulator to the frame drawing thread can be u11. The value of u11 can be preset. The value of u11 in the embodiment of the present application is not limited.

[0416] The frequency modulation simulator can start running the second frame task of the frame drawing thread at 8.3 ms, that is, simulate the second frame task.

[0417] The 12th ms is the CPU frequency modulation moment. Since the 12th ms is within the frame drawing period of the second frame, the frequency modulation simulator can determine whether the second frame task is completed. If not, the frequency modulation simulator can increase the CPU computing power provided to the frame drawing thread from u11 to u11 according to frequency modulation function 1. Fig.12D u13 shown. Among them, when frequency modulation function 1 is used to modulate the frequency during the running of the second frame task, the value of margin in frequency modulation function 1 can be the running time of the first frame task (for example, 6.2ms). In addition, when the CPU frequency is modulated at the 12th ma, since the running time of the second frame task is 3.7ms (i.e., 12ms-8.3ms), the value of Time in frequency modulation function 1 can be 3.7ms. In this way, the frequency modulation simulator can calculate the adjusted CPU frequency when the CPU frequency is modulated at the 12th ms according to frequency modulation function 1.

[0418] like Fig.12DAs shown, the completion time of the second frame task is 7.5ms. It can be seen that the second frame task is completed at 15.8ms (i.e. 8.3ms+7.5ms). It can be understood that 7.5ms can include the time for the frame drawing thread (such as the UI thread or the RS thread) to run the second frame task and the time for the frame drawing thread to wait for its key dependent thread to run in order to run the second frame task.

[0419] The 16th ms is the CPU frequency modulation moment. Since the 16th ms is within the frame drawing period of the second frame, the frequency modulation simulator can determine whether the second frame task is completed. If completed, the frequency modulation simulator can reduce the CPU computing power provided to the frame drawing thread from u13 to Fig.12D u11 shown.

[0420] Similarly, the frequency modulation simulator can start running the third frame task of the frame drawing thread at 16.6ms, that is, simulate the third frame task. When frequency modulation function 1 is used to modulate the frequency during the running of the third frame task, the value of margin in frequency modulation function 1 can be the average running time of the first frame task and the second frame task, that is, (6.2+7.5) / 2=6.85ms. Similarly, the frequency modulation simulator can use frequency modulation function 1 to complete the simulation of all frame tasks in the task data list.

[0421] When the frequency modulation function 1 is used to simulate each frame task, the frequency modulation simulator can use the frequency modulation function 1 to modulate the frequency, and the corresponding running time simulation results and computing power simulation results of each frame task.

[0422] For example, Fig.12D As shown, when frequency modulation function 1 is used for frequency modulation, the simulation result of the running time of the first frame task is 6.2ms, and the computing power simulation result may include: the CPU computing power within the 0th-4ms of the running of the first frame task is u12, and the CPU computing power within the 4th-6.2ms is u14.

[0423] When frequency modulation function 1 is used for frequency modulation, the simulation result of the running time of the second frame task is 7.5ms, and the computing power simulation result may include: the CPU computing power is u11 within 0-3.7ms of the running of the second frame task, and the CPU computing power is u13 within 3.7-7.5ms.

[0424] Fig.12D The computing power value adjustment process shown is only an exemplary description of the present application and should not constitute a limitation on the present application.

[0425] S1225. Determine the remaining task amount of the current frame, update the thread running time list according to the running time simulation result corresponding to the current frame task, and update the historical computing power simulation list according to the computing power simulation result corresponding to the current frame task.

[0426] If the task amount of the current frame task is not completed within the frame period (e.g., 8.3ms) corresponding to the current frame task, the remaining task amount of the current frame can be performed within the frame period corresponding to the next frame task. The simulation result of the running time corresponding to the current frame task can represent: the time taken to complete all the task amounts of the current frame task when frequency modulation function 1 is used for frequency modulation.

[0427] For a list of thread running times, please refer to Table 10 below.

[0428] Frame number Run time simulation results (ms) 1 6.2 2 7.5 3 T3 …… ……

[0429] Table 10

[0430] The historical computing power simulation list can be found in Table 11 below.

[0431]

[0432] Table 11

[0433] The above Tables 10 and 11 are merely exemplary descriptions of the present application and should not be construed as limiting the present application.

[0434] The frequency modulation simulator can add the running time simulation result corresponding to the current frame task to the above-mentioned thread running time list, and add the computing power simulation result corresponding to the current frame task to the above-mentioned historical computing power simulation list.

[0435] S1226. Increase the frame number by 1.

[0436] The frequency modulation simulator can add 1 to the frame number of the current frame task in the above steps S1223 and S1225, and execute step S1223 to determine whether the task data list is processed. If the frame number after the frame number is added by 1 does not exist in the above task data list, the frequency modulation simulator can determine that the task data list is processed. If the frame number after the frame number is added by 1 exists in the above task data list, the frequency modulation simulator can determine the frame number after the frame number is added by 1 as the frame number currently being processed, and use the frequency modulation function 1 to simulate the current frame task according to the method of the above steps S1224 and S1225.

[0437] S1227. Determine, according to the thread running time list and the historical computing power simulation list, the frame loss data and power consumption of the key thread and the key dependent thread when frequency modulation function 1 is used for frequency modulation.

[0438] After simulating all frame tasks in the task data list using frequency modulation function 1, the frequency modulation simulator can determine the frame loss data and power consumption of the key threads and key dependent threads when frequency modulation function 1 is used based on the thread running time list and the historical computing power simulation list.

[0439] In some embodiments, the thread running time list and the historical computing power simulation list may include the running data of the multi-frame task of the UI thread under the frequency modulation function 1. The frequency modulation simulator may calculate the frame loss data and power consumption of the UI thread under the frequency modulation function 1. The frame loss data may include the number of lost frames (or referred to as the frame loss amount).

[0440] The number of frames lost by the UI thread under the frequency modulation function 1 can be calculated according to the following formula (3).

[0441]

[0442] Among them, n1 can represent the total number of frame tasks of the UI thread in the task data list. For example, if the task data list contains 100 frame tasks of the UI thread, n1 is 100. The simulation result of the running time of the i-th frame task in the UI thread can be obtained by checking the thread running time list. The duration threshold 1 can be preset. For example, the duration threshold 1 can be 8.33ms, or 16.66ms, or 33.33ms and other values. The embodiment of the present application does not limit the value of the duration threshold 1.

[0443] The simulation result of the running time of the i-th frame task is greater than the duration threshold 1, which can indicate that the i-th frame task has frame loss. It can be understood that after completing a frame task, the UI thread will instruct the RS thread to draw the image corresponding to the corresponding frame. If the running time of a frame task of the UI thread is greater than the frame drawing period, the user interface may not actually lose frames. Therefore, the duration threshold 1 can be greater than the frame drawing period (for example, 8.3ms). The power consumption of the UI thread under the frequency modulation function 1 can be calculated according to the following formula (4).

[0444]

[0445] Among them, m can represent the total number of frequency modulations during the running of the frame task of the UI thread in the task data list. Computing power i can represent the computing power value after the i-th frequency modulation. Running time i can represent the running time of the frame task of the UI thread after the i-th frequency modulation. Referring to the above Table 11, for example, the first frame task is the frame task of the UI thread. The computing power value of the frequency modulation simulator after the first frequency modulation is u12, and the running time of the frame task of the UI thread is 4ms. Therefore, computing power 1×running time 1=4×u12. The computing power value of the frequency modulation simulator after the second frequency modulation is u14, and the running time of the frame task of the UI thread is 2.2ms. Therefore, computing power 2×running time 2=2.2×u12. f() can be a conversion formula for power consumption and computing power. f() can be determined by the CPU energy efficiency curve.

[0446] In some embodiments, the thread running time list and the historical computing power simulation list may include the running data of the multi-frame tasks of the RS thread under the frequency modulation function 1. The frequency modulation simulator may calculate the frame loss data and power consumption of the RS thread under the frequency modulation function 1.

[0447] The number of frames lost by the RS thread under the frequency modulation function 1 can be calculated according to the following formula (5).

[0448]

[0449] Among them, n2 can represent the total number of frame tasks of the RS thread in the task data list. For example, if the task data list contains 100 frame tasks of the RS thread, n2 is 100. The simulation result of the running time of the i-th frame task in the RS thread can be obtained by checking the thread running time list. The duration threshold 2 can be preset. The duration threshold 2 can be the same as or different from the above-mentioned duration threshold 1. It can be understood that the frame tasks of the RS thread are directly related to the rendering and display of the user interface. The running time of a frame task of the RS thread is greater than the drawing frame cycle, and the probability of frame loss in the user interface is relatively high. Therefore, the value of the duration threshold 2 can be smaller than the value of the above-mentioned duration threshold 1. This can more accurately reflect the number of frame losses.

[0450] The power consumption of the RS thread under the frequency modulation function 1 can refer to the calculation method of the above formula (4).

[0451] Since both the UI thread and the RS thread are frame drawing threads, the frequency modulation simulator can determine the total number of lost frames according to the number of lost frames of the UI thread and the RS thread under the frequency modulation function 1. For example, the frequency modulation simulator can determine the total number of lost frames as the sum of the number of lost frames of the UI thread and the RS thread under the frequency modulation function 1. Alternatively, the frequency modulation simulator can perform a weighted summation of the number of lost frames of the UI thread and the RS thread under the frequency modulation function 1 to determine the total number of lost frames.

[0452] The frequency modulation simulator can also determine the total power consumption according to the power consumption of the UI thread and the RS thread under the frequency modulation function 1. For example, the frequency modulation simulator can determine the sum of the power consumption of the UI thread and the RS thread under the frequency modulation function 1 as the total power consumption.

[0453] The method for the frequency modulation simulator to perform simulation using the frequency modulation functions corresponding to other slope parameters and curvature parameters can refer to the method for performing simulation using the frequency modulation function 1 described above.

[0454] The frequency modulation simulator can determine the optimal frequency modulation function according to the total number of frame drops and total power consumption of the UI thread and RS thread in the task data list when using different frequency modulation functions. The above different frequency modulation functions may include frequency modulation functions under different combinations of slope parameters and curvature parameters.

[0455] In some embodiments, not limited to UI threads and RS threads, the FM simulator can also combine the number of frame losses and power consumption of other types of key threads (such as audio playback threads, etc.) under the action of the FM function to determine the total number of frame losses and total power consumption corresponding to the FM function, and then select the optimal FM function. Optionally, the FM simulator can use the number of frame losses and power consumption of the UI thread under the action of the FM function alone to determine the total number of frame losses and total power consumption corresponding to the FM function, and then select the optimal FM function. Alternatively, the FM simulator can use the number of frame losses and power consumption of the RS thread under the action of the FM function alone to determine the total number of frame losses and total power consumption corresponding to the FM function, and then select the optimal FM function.

[0456] In some embodiments, when the FM simulator uses the FM function (eg, FM function 1) to simulate a frame task, it may also consider frame insertion scenarios and / or frame skipping scenarios to improve the accuracy of the simulation results.

[0457] Frame insertion can be used to run short frame tasks in advance so that the subsequent long frame tasks can be completed within the corresponding frame period. Frame insertion can reduce frame loss caused by frame task timeout. Short frame tasks can refer to frames with a small frame task amount that can be completed in advance within the frame period. Long frame tasks can refer to frames with a large frame task amount that cannot be completed within the period.

[0458] Fig.13A A schematic diagram of an interpolation scene is exemplarily shown.

[0459] like Fig.13A As shown, the first and second frame tasks of the UI thread are both short frame tasks, and the third frame task is a long frame task. In the absence of interpolation, the UI thread can start running the third frame task when it receives the frame synchronization signal 3. Since the task volume of the third frame task is large, the task volume of the third frame task has not been completed when the UI thread receives the frame synchronization signal 4.

[0460] When the interpolation strategy is adopted, the electronic device can detect the completion time of each frame task. When a short frame task is completed ahead of schedule within the frame period, the electronic device can send a virtual synchronization signal to the UI thread to instruct the UI thread to start running the next frame task.

[0461] For example, Fig.13AAs shown, when it is detected that the first frame task has completed running at time t11, the electronic device can send a virtual frame synchronization signal 2 to the UI thread. Time t11 can be a moment within the frame period corresponding to frame synchronization signal 1 and frame synchronization signal 2. According to the virtual frame synchronization signal 2, the UI thread can start running the second frame task. When it is detected that the second frame task has completed running at time t12, the electronic device can send a virtual frame synchronization signal 3 to the UI thread. Time t12 is earlier than the sending time of frame synchronization signal 3. According to the virtual frame synchronization signal 3, the UI thread can start running the third frame task. It can be seen that since the UI thread has started running the third frame task before the arrival of frame synchronization signal 3, the UI thread can complete all the task amounts of the third frame task before the arrival of frame synchronization signal 4. This can avoid the remaining task amount of the third frame task that needs to be run in the next frame period.

[0462] The frequency modulation simulator can use the frame insertion strategy when simulating frame tasks using the frequency modulation function. Among them, since frame insertion will advance the running time of a frame task or multiple frame tasks, the frequency modulation simulator can determine which frame task is actually running at each frequency modulation, and then determine the running time of each frame task and the CPU computing power during the running time.

[0463] Frame skipping can be used to discard tasks that have been waiting for too long. Frame skipping can reduce the number of dropped frames by reducing the backlog of frame tasks.

[0464] Fig. 13B A schematic diagram of a frame skipping scenario is exemplified.

[0465] Here we take RS thread frame skipping as an example to introduce the frame skipping scenario.

[0466] like Fig. 13B As shown, the UI thread can run the corresponding frame task according to the received frame synchronization signal. Fig. 12B As can be seen from the introduction, after the UI thread completes a frame task, it will send the drawing instruction corresponding to this frame task to the RS thread to instruct the RS thread to draw the user interface corresponding to this frame task.

[0467] For example, after receiving the frame synchronization signal 3, the UI thread can run the third frame task of the UI thread (for example, determine the display content of the third frame user interface). The task amount of the third frame task of the UI thread is relatively large. After receiving the frame synchronization signal 4, the UI thread can continue to run the remaining task amount of the third frame task of the UI thread, and after the third frame task is completed, start running the fourth frame task of the UI thread.

[0468] After the UI thread's 3rd frame task is completed, the UI thread can send a frame drawing instruction for drawing the 3rd frame user interface to the RS thread. Based on the frame drawing instruction, the RS thread can run the 3rd frame task of the RS thread (for example, rendering and displaying the 3rd frame user interface). The task volume of the 3rd frame task of the RS thread is also large. Before the RS thread receives the frame synchronization signal 6, the 3rd frame task of the RS thread is still not completed. Therefore, after receiving the frame synchronization signal 6, the RS thread can continue to run the 3rd frame task of the RS thread.

[0469] After receiving the frame synchronization signal 5, the UI thread can run the 5th frame task of the UI thread, and after receiving the frame synchronization signal 6, run the 6th frame task of the UI thread. Among them, after the UI thread runs the 4th frame task of the UI thread, it can send a frame drawing instruction for drawing the 4th frame user interface to the RS thread, and after running the 5th frame task of the UI thread, it sends a frame drawing instruction for drawing the 5th frame user interface to the RS thread. However, since the RS thread is running the 3rd frame task of the RS thread, the 4th frame task (such as rendering and displaying the 4th frame user interface) and the 5th frame task (such as rendering and displaying the 5th frame user interface) of the RS thread both need to wait for the 3rd frame task of the RS thread to complete.

[0470] In some embodiments, when the waiting time for a frame task to run exceeds a preset time threshold, the thread can skip this frame and directly run the next frame task. The embodiment of the present application does not limit the value of the above time threshold. For example, when the 3rd frame task of the RS thread completes the execution, the waiting time for the 4th frame task of the RS thread is T4, and the waiting time for the 5th frame task of the RS thread is T5. If T4 and T5 are both greater than the above time threshold, the RS thread can skip the 4th frame task and the 5th frame task of the RS thread. Among them, after the RS thread finishes running the 3rd frame task of the RS thread, it can run the 6th frame task of the RS thread according to the frame synchronization signal 7 (for example, render and display the 6th frame user interface).

[0471] The frequency modulation simulator can adopt a frame skipping strategy when simulating a frame task using a frequency modulation function. Among them, frame skipping will cancel the running of one frame task or multiple frame tasks. The frequency modulation simulator can determine the number of lost frames based on the number of frame skipping. The number of lost frames may include the number of frame skipping. In addition, since the skipped frame task is not run, the frequency modulation simulator does not need to calculate the power consumption corresponding to the skipped frame task when calculating the power consumption of the thread.

[0472] It is understandable that in the actual operation scenario of the thread, the electronic device may adopt a frame insertion strategy and / or a frame skipping strategy for the frame task of the thread. The frequency modulation simulator adopts a frame insertion strategy and / or a frame skipping strategy when using the frequency modulation function for simulation, which can more realistically simulate the actual operation process of the thread, thereby more accurately finding the optimal frequency modulation function.

[0473] Based on the simulation of the frequency modulation simulator, the optimal frequency modulation function determined by the frequency modulation simulator has the following characteristics: the curvature parameter of the optimal frequency modulation function is less than 1 (i.e., the frequency modulation curve corresponding to the optimal frequency modulation function is an upward convex curve), the convexity of the frequency modulation curve corresponding to the optimal frequency modulation function is positively correlated with the convexity of the CPU energy efficiency curve, and the increase of the optimal frequency modulation function slows down as the frame task running time (i.e., Time in the above formula (2)) increases, which is consistent with the trend that the task volume of the frame task decreases as the frame task running time increases. The frequency modulation curve corresponding to the optimal frequency modulation function can be called the optimal frequency modulation curve.

[0474] Fig.14A A schematic diagram of an optimal frequency modulation curve is shown as an example.

[0475] like Fig.14A As shown in Figure 2, the optimal frequency modulation curve is an upward convex curve. The coordinate axis of the optimal frequency modulation curve can be referred to as Fig.10 The coordinate axis of the frequency modulation curve shown in the figure. It can be seen that in the period of time when the frame task starts running (that is, when the time t is small), the computing power u(t) increases by a large margin. As time t (that is, Time in the frequency modulation function) increases, the increase in computing power u(t) gradually decreases.

[0476] The slope parameter and curvature parameter of the optimal frequency modulation curve are related to the CPU energy efficiency curve. The optimal frequency modulation curves corresponding to different CPU energy efficiency curves may be different. In some embodiments, the server 200 may be based on Fig.11A The frequency modulation simulator shown in the figure simulates and obtains the optimal frequency modulation function corresponding to any type of CPU. The frequency modulation simulator can determine the optimal frequency modulation function of a type of CPU based on the historical CPU load data of a type of CPU running in a period of time and the CPU energy efficiency curve of this type of CPU. The method for determining the optimal frequency modulation function can refer to the above Fig. 12A and Fig. 12C The method shown.

[0477] Fig. 14B A schematic diagram showing an example of comparison between an optimal frequency modulation curve and a non-optimal frequency modulation curve is shown.

[0478] like Fig. 14B As shown, the black line can represent the optimal frequency modulation curve, and the gray line can represent the non-optimal frequency modulation curve. The non-optimal frequency modulation curve can refer to the aforementioned Fig.10 It can be understood that all frequency modulation curves other than the optimal frequency modulation curve are non-optimal frequency modulation curves. Fig. 14B The non-optimal frequency modulation curve shown is only an example of a non-optimal frequency modulation curve.

[0479] Comparing the optimal FM curve and the non-optimal FM curve, we can see that the optimal FM curve and the non-optimal FM curve intersect at time t3. Before time t3, the computing power on the optimal FM curve at the same time is greater. After time t3, the computing power on the optimal FM curve at the same time is smaller.

[0480] The time period with a smaller time t may be the time period when a frame task just starts to run. At this time, there must be a task amount to be completed for this frame task. The time period with a larger time t is the time period after a frame task has been running for a period of time. At this time, the task amount of this frame task may have been completed.

[0481] Compared with the non-optimal frequency modulation curve, the optimal frequency modulation curve can improve the CPU computing power more quickly when the time t is small (that is, at the head of a frame task). This can not only increase the running speed of the frame task so that the frame task can complete the corresponding task volume faster, but also reduce the situation of emergency and violent frequency increase at the end of a frame task. Compared with the non-optimal frequency modulation curve, the optimal frequency modulation curve can reduce the speed of CPU computing power growth when the time t is large (that is, at the end of a frame task). This can reduce the situation where the CPU computing power is still increased rapidly after a frame task has been completed, thereby reducing the waste of CPU computing power.

[0482] By the aforementioned Fig. 11B From the energy efficiency curve shown, it can be seen that when the computing power is between u1 and u2, the CPU's energy efficiency is optimal (that is, under the same power consumption, the CPU can perform the most tasks).

[0483] like Fig. 14B As shown in the figure, the computing power corresponding to the optimal frequency modulation curve at time t1 is u1, and the computing power corresponding to time t5 is u2. The computing power corresponding to the non-optimal frequency modulation curve at time t2 is u1, and the computing power corresponding to time t4 is u2. Among them, time t1 is earlier than time t2, and time t5 is later than time t4. Compared with the non-optimal frequency modulation curve, when the frequency is modulated based on the optimal frequency modulation curve, the CPU can be in the state of optimal energy efficiency for a longer period of time. This is conducive to the efficient use of CPU resources and the completion of more tasks with less power consumption.

[0484] It can be seen that the above optimal frequency modulation curve can increase the running speed of the frame task so that the frame task can be completed within the corresponding frame period. This can reduce the performance problems such as the freezing of electronic devices caused by frame loss. In addition, the above optimal frequency modulation curve can reduce the power consumption of electronic devices when the frame task is running, thereby increasing the battery life of electronic devices and reducing the situation where electronic devices heat up too quickly.

[0485] In some embodiments, the aforementioned Fig.11A The task generation module and frequency modulation simulator shown can be used as an optimal frequency modulation function determination tool for developers. The optimal frequency modulation function determination tool can help developers determine the optimal frequency modulation function of any model of CPU. Among them, the optimal frequency modulation function determination tool can provide an input interface for developers to input historical CPU load data, CPU energy efficiency curve, slope parameter and curvature parameter value range and simulation granularity and other parameters. Based on the parameters input by the developer, the optimal frequency modulation function determination tool can generate and output the optimal frequency modulation function.

[0486] In some embodiments, in addition to using the optimal frequency modulation function to modulate the frequency, the electronic device can also combine one or more other frequency modulation strategies to modulate the frequency. For example, the electronic device can also detect the start and end times of the running of each frame task of the critical thread and the critical dependent thread. In addition to using the optimal frequency modulation function to modulate the frequency according to the preset CPU frequency modulation cycle, the electronic device can also increase the frequency at the start time of the running of a frame task and reduce the frequency at the end time of the running of a frame task. This can better save the power of the electronic device.

[0487] Fig.15 A frequency modulation schematic diagram provided by the present application is exemplified.

[0488] Here we still take the CPU frequency modulation period of 4ms and the frame drawing period of 8.3ms as an example to introduce the schematic diagram of CPU frequency modulation when the frame drawing thread is running.

[0489] like Fig.15 As shown, the electronic device can start running the first frame task of the frame drawing thread at 0ms. When it is detected that 0ms is the starting moment of the first frame task running, the electronic device can increase the CPU computing power to u22. According to the frequency point computing power table, the electronic device can adjust the CPU frequency to the CPU frequency corresponding to u22. The above adjustment of the CPU frequency may include adjusting the frequency of the CPU core of the first frame task of the above-mentioned frame drawing thread. The embodiment of the present application does not limit the size of the CPU computing power (i.e., u22) increased by the electronic device at the starting moment of the frame task running.

[0490] In the 0th to 4th ms, the CPU used to run the first frame task of the frame drawing thread can maintain the CPU frequency at the CPU frequency corresponding to u22. In the 0th to 4th ms, if the key thread in the frame drawing thread (such as the UI thread or the RS thread) is suspended and waits for the key dependent thread in the frame drawing thread (such as the key dependent thread of the UI thread or the key dependent thread of the RS thread) to run, the key dependent thread can obtain more processor resources when running, so as to run quickly to reduce the waiting time of the key thread.

[0491] The 4th ms may be the CPU frequency modulation time determined according to the CPU frequency modulation cycle. At the 4th ms, the electronic device may determine whether the first frame task is completed. If not, the electronic device may increase the CPU computing power to u24 according to the optimal frequency modulation function. The determination method of u24 may refer to the aforementioned Fig.12D The determination method of u14 is shown. According to the frequency point computing power table, the electronic device can adjust the CPU frequency to the CPU frequency corresponding to u24.

[0492] like Fig.15 As shown, the completion time of the first frame task is 6.2ms. When it is detected that 6.2ms is the end time of the first frame task, the electronic device can reduce the CPU computing power to u21. According to the frequency point computing power table, the electronic device can adjust the CPU frequency to the CPU frequency corresponding to u21. The embodiment of the present application does not limit the size of the CPU computing power (i.e., u21) reduced by the electronic device at the end time of the frame task operation.

[0493] The 8th ms may be the CPU frequency modulation moment determined according to the CPU frequency modulation cycle. Since the 8th ms is still within the frame drawing cycle of the 1st frame, the electronic device can determine whether the 1st frame task is completed. It can be seen that the 1st frame task has been completed before the 8th ms. Since the electronic device has already reduced the CPU frequency when the 1st frame task is completed, the electronic device does not need to adjust the CPU frequency according to the optimal frequency modulation function at the 8th ms.

[0494] The electronic device may start running the second frame task of the frame drawing thread at 8.3 ms. When detecting that 8.3 ms is the start time of running the second frame task, the electronic device may increase the CPU computing power to u22.

[0495] The 12th ms can be the CPU frequency modulation moment determined according to the CPU frequency modulation cycle. Since the 12th ms is within the frame drawing cycle of the second frame, the electronic device can determine whether the second frame task is completed. If not, the electronic device can increase the CPU computing power to u23 according to the optimal frequency modulation function. The determination method of u23 can refer to the above Fig.12DThe determination method of u13 is shown. According to the frequency point computing power table, the electronic device can adjust the CPU frequency to the CPU frequency corresponding to u23.

[0496] like Fig.15 As shown, the completion time of the second frame task is 7.5ms. When it is detected that the 15.8ms (i.e. 8.3ms+7.5ms) is the end time of the second frame task, the electronic device can reduce the CPU computing power to u21.

[0497] The 16th ms can be the CPU frequency modulation moment determined according to the CPU frequency modulation cycle. Since the 16th ms is within the frame drawing cycle of the second frame, the electronic device can determine whether the second frame task is completed. It can be seen that the second frame task has been completed before the 16th ms. Since the electronic device has already reduced the CPU frequency when the second frame task is completed, the electronic device does not need to adjust the CPU frequency according to the optimal frequency modulation function at the 16th ms.

[0498] Depend on Fig.15 It can be seen that the electronic device can increase the CPU frequency in real time when the frame tasks of the critical threads and the critical dependent threads begin, and reduce the CPU frequency in real time when the frame tasks of the critical threads and the critical dependent threads end. During the operation of the frame tasks of the critical threads and the critical dependent threads, the electronic device can adjust the CPU frequency according to the optimal frequency modulation function. This can improve the accuracy of supplying processor resources to the critical threads and the critical dependent threads, thereby improving the utilization efficiency of the processor resources and achieving a balance between the smooth performance of the device and the requirements of long battery life and rapid cooling.

[0499] The structure of the electronic device involved in this application is introduced below.

[0500] Fig.16A A schematic diagram of the hardware structure of an electronic device 100 is exemplarily shown.

[0501] like Fig.16A As shown, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc.

[0502] It is to be understood that the structure illustrated in the embodiment of the present application does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0503] The processor 110 may include one or more processing units, for example, the processor 110 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0504] The controller may be the nerve center and command center of the electronic device 100. The controller may generate an operation control signal according to the instruction operation code and the timing signal to complete the control of fetching and executing instructions.

[0505] The processor 110 may also be provided with a memory for storing instructions and data. In some examples, the memory in the processor 110 is a cache memory. The memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0506] In the present application, a computer program may be stored in the memory, which is used to enable the controller or processor to implement the audio transmission method of the present application through an interface or protocol. Exemplarily, the computer program stored in the memory can be used to: identify critical threads, critical dependent threads, and non-critical threads; increase the priority of critical threads and critical dependent threads; group control of CPU time slices allocated to threads; perform CPU bandwidth quotas on threads in the target group; perform one or more of the following operations on threads that threads in the foreground group temporarily depend on: increase priority, increase CPU time slice length, and release bandwidth quota suppression; perform CPU frequency suppression on threads in the target group; dynamically adjust the CPU frequency when critical threads and critical dependent threads are running according to the optimal frequency modulation function, etc.

[0507] The USB interface 130 is an interface that complies with USB standard specifications, and may be a Mini USB interface, a Micro USB interface, a USB Type C interface, etc. The USB interface 130 may be used to connect a charger to charge the electronic device 100, or may be used to transmit data between the electronic device 100 and a peripheral device. It may also be used to connect headphones to play audio through the headphones.

[0508] The charging management module 140 is used to receive charging input from a charger. The charger can be a wireless charger or a wired charger. While the charging management module 140 charges the battery 142, it can also power the electronic device through the power management module 141.

[0509] The power management module 141 is used to connect the battery 142, the charging management module 140 and the processor 110. The power management module 141 receives input from the battery 142 and / or the charging management module 140 to power the processor 110, the internal memory 121, the external memory, the display screen 194, the camera 193, and the wireless communication module 160.

[0510] The wireless communication function of the electronic device 100 can be implemented through the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modem processor and the baseband processor.

[0511] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve the utilization of antennas. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.

[0512] The mobile communication module 150 can provide solutions for wireless communications including 2G / 3G / 4G / 5G, etc., applied to the electronic device 100. The mobile communication module 150 may include at least one filter, a switch, a power amplifier, a low noise amplifier (LNA), etc. The mobile communication module 150 can receive electromagnetic waves from the antenna 1, and filter, amplify, etc. the received electromagnetic waves, and transmit them to the modulation and demodulation processor for demodulation. The mobile communication module 150 can also amplify the signal modulated by the modulation and demodulation processor, and convert it into electromagnetic waves for radiation through the antenna 1.

[0513] The wireless communication module 160 can provide wireless communication solutions including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., which are applied to the electronic device 100. The wireless communication module 160 can be one or more devices integrating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, modulates the frequency of the electromagnetic wave signal and performs filtering, and sends the processed signal to the processor 110. The wireless communication module 160 can also receive the signal to be sent from the processor 110, modulate the frequency of it, amplify it, and convert it into electromagnetic waves for radiation through the antenna 2.

[0514] The electronic device 100 implements the display function through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, which is connected to the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering.

[0515] The display screen 194 is used to display images, videos, etc. In some embodiments, the electronic device 100 may include 1 or N display screens 194 , where N is a positive integer greater than 1.

[0516] The electronic device 100 can realize the shooting function through ISP, camera 193, video codec, GPU, display screen 194 and application processor.

[0517] The ISP is used to process data fed back by the camera 193. For example, when taking a photo, the shutter is opened, light is transmitted to the camera photosensitive element through the lens, and the light signal is converted into an electrical signal. The camera photosensitive element transmits the electrical signal to the ISP for processing and converts it into an image visible to the naked eye.

[0518] The camera 193 is used to capture still images or videos. In some embodiments, the electronic device 100 may include 1 or N cameras 193, where N is a positive integer greater than 1.

[0519] The digital signal processor is used to process digital signals, and can process not only digital image signals but also other digital signals. For example, when the electronic device 100 is selecting a frequency point, the digital signal processor is used to perform Fourier transform on the frequency point energy.

[0520] NPU is a neural network (NN) computing processor. By drawing on the structure of biological neural networks, such as the transmission mode between neurons in the human brain, it can quickly process input information and can also continuously self-learn. Through NPU, applications such as intelligent cognition of electronic device 100 can be realized, such as image recognition, face recognition, voice recognition, text understanding, etc.

[0521] The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external memory interface 120 to implement a data storage function, such as storing music, video and other files in the external memory card.

[0522] The internal memory 121 can be used to store computer executable program codes, which include instructions. The processor 110 executes various functional applications and data processing of the electronic device 100 by running the instructions stored in the internal memory 121. The internal memory 121 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc. The data storage area may store data created during the use of the electronic device 100 (such as audio data, a phone book, etc.), etc. In addition, the internal memory 121 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.

[0523] The electronic device 100 can implement audio functions such as music playing and recording through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor.

[0524] The audio module 170 is used to convert digital audio information into analog audio signal output, and is also used to convert analog audio input into digital audio signals. The audio module 170 can also be used to encode and decode audio signals. In some embodiments, the audio module 170 can be arranged in the processor 110, or some functional modules of the audio module 170 can be arranged in the processor 110.

[0525] The speaker 170A, also called a "speaker", is used to convert an audio electrical signal into a sound signal. The electronic device 100 can listen to music or listen to a hands-free call through the speaker 170A.

[0526] The receiver 170B, also called a "earpiece", is used to convert audio electrical signals into sound signals. When the electronic device 100 receives a call or voice message, the voice can be heard by placing the receiver 170B close to the human ear.

[0527] Microphone 170C, also called "microphone" or "microphone", is used to convert sound signals into electrical signals. When making a call or sending a voice message, the user can speak by approaching the microphone 170C with his mouth to input the sound signal into the microphone 170C.

[0528] The earphone jack 170D is used to connect a wired earphone.

[0529] In the present application, the above-mentioned speaker 170A, receiver 170B, and microphone 170C are all optional.

[0530] The sensor module 180 may include a pressure sensor, a gyro sensor, an air pressure sensor, a magnetic sensor, an acceleration sensor, a gravity sensor, a distance sensor, a proximity light sensor, a fingerprint sensor, a temperature sensor, a touch sensor, an ambient light sensor, a bone conduction sensor, an angle sensor, and the like.

[0531] The buttons 190 include a power button, a volume button, etc. The motor 191 can generate a vibration prompt. The indicator 192 can be an indicator light, which can be used to indicate the charging status, power change, messages, missed calls, notifications, etc.

[0532] The SIM card interface 195 is used to connect a SIM card. The SIM card can be connected to and separated from the electronic device 100 by inserting it into the SIM card interface 195 or removing it from the SIM card interface 195. The electronic device 100 can support 1 or N SIM card interfaces, where N is a positive integer greater than 1. The electronic device 100 interacts with the network through the SIM card to implement functions such as calls and data communications. In some examples, the electronic device 100 uses an eSIM, i.e., an embedded SIM card. The eSIM card can be embedded in the electronic device 100 and cannot be separated from the electronic device 100.

[0533] The electronic device 100 may be a mobile phone, a tablet computer, a smart watch, a smart bracelet, a speaker, a television, etc. The embodiment of the present application does not limit the type of the electronic device 100.

[0534] Fig. 16B A schematic diagram of the software structure of an electronic device 100 is exemplarily shown.

[0535] An operating system may be run in the electronic device 100. The operating system may be various operating systems currently used in the industry, including but not limited to: an operating system developed based on OpenHarmony, such as HarmonyOS; or other operating systems such as Mobile operating system; it can also be various open source operating systems or their derivative operating systems, such as Linux OS, and other embedded operating systems; it can also be a new operating system in the future, such as an AI operating system based on artificial intelligence. The operating system is a set of interrelated system software programs that manage and control the operation of electronic devices, use and run hardware and software resources, and provide public services to organize user interactions. The operating system is in a connecting position in electronic devices, connecting the physical devices at the hardware layer downward and providing an operating environment for application software upward.

[0536] The following uses HarmonyOS as an example to illustrate the software structure of the electronic device 100. Based on this, those skilled in the art can deduce the implementation of the embodiment of the present application under other specific operating systems.

[0537] like Fig. 16B As shown, the software structure of the electronic device 100 can be divided into several layers. In some embodiments, from bottom to top, they are: kernel layer, system service layer, framework layer and application layer; the layers communicate with each other through software interfaces. System functions can be cut, added or combined according to subsystem granularity in different device form deployment scenarios, and each subsystem can be cut, added or combined according to functional granularity. The electronic device 100 may also include a hardware layer. The hardware layer may include hardware devices such as CPU, GPU, flash memory (FLASH), liquid crystal display (LCD), Bluetooth, camera, battery, heat dissipation module, etc. The application of the application layer in the electronic device 100 can control the hardware devices in the hardware layer through the framework layer, system service layer, and kernel layer.

[0538] The kernel layer may include a kernel abstraction layer (KAL), a kernel subsystem, and a driver subsystem. The kernel abstraction layer provides basic kernel capabilities to the upper layer by shielding the differences between multiple kernels, including but not limited to process / thread management, memory management, file system, network management, and peripheral management. The kernel subsystem may support the selection of suitable OS kernels for different resource-constrained devices, not limited to the Linux kernel, Hongmeng kernel, LiteOS, etc. The driver subsystem may include a driver framework. The driver framework is the basis for the openness of the system hardware ecosystem, providing unified peripheral access capabilities and a driver development and management framework. The driver framework includes: display driver, camera driver, audio driver, Bluetooth driver, sensor driver, etc. The kernel layer may also include a scheduler. The scheduler can be used to schedule the running order of threads and allocate resources such as CPU computing power to threads.

[0539] The system service layer includes the core capabilities of the system and provides services to applications through the framework layer. This layer includes a set of subsystems, but is not limited to the following:

[0540] System basic capability subsystem set: provides basic capabilities for the operation, scheduling, migration and other operations of distributed applications on multiple devices; for example, it can include global resource scheduling subsystem, distributed data management, distributed soft bus, compiler / runner; it also includes multi-mode input subsystem, graphics subsystem, security subsystem, etc.

[0541] Basic software service subsystem set: provides common and general software services; for example, event notification subsystem, telephone service subsystem, multimedia subsystem, etc.

[0542] Enhanced software service subsystem set: provides differentiated capability-enhanced software services for different devices; for example, it may include smart screen-specific business subsystems, wearable-specific business subsystems, IoT-specific business subsystems, etc.

[0543] Hardware service subsystem set: provides hardware services; for example, it may include location service subsystem, user IAM (Identity and Access Management) subsystem, wearable proprietary hardware service subsystem, biometric recognition, IoT proprietary hardware service subsystem, etc.

[0544] The global resource scheduling subsystem may be used to manage and schedule software and hardware resources in the electronic device 100 , such as processor resources.

[0545] In some embodiments, the global resource scheduling subsystem may set parameters related to thread running priorities so that a scheduler in the kernel layer can adjust the thread priorities.

[0546] In some embodiments, the global resource scheduling subsystem may also adjust the CPU weight ratio of thread groups based on the CPU load rates of threads in different thread groups so that the scheduler in the kernel layer can adjust the length of CPU time slices allocated to different thread groups.

[0547] In some embodiments, the global resource scheduling subsystem may also set parameters related to the CPU bandwidth quota of the thread so that the scheduler in the kernel layer can allocate bandwidth quotas to the thread when scheduling the corresponding thread.

[0548] In some embodiments, the global resource scheduling subsystem may also mark the threads on which the threads in the foreground group temporarily depend with critical section tags, so that the scheduler in the kernel layer may give priority to scheduling threads with critical section tags, allocate longer CPU time slices to threads with critical section tags, and lift the bandwidth quota suppression on threads with critical section tags.

[0549] In some embodiments, the global resource scheduling subsystem can also adjust the CPU frequency through the kernel layer. For example, when running non-critical threads, the CPU frequency is controlled below the preset maximum frequency. This can suppress the CPU frequency of non-critical threads, save device power, and reduce the rapid heating of the device. For another example, when running critical threads and critical dependent threads, the CPU frequency is dynamically adjusted based on the optimal frequency modulation function. This can achieve accurate supply of processor resources to critical threads and critical dependent threads, and reduce the oversupply or undersupply of processor resources. The above-mentioned adjustment of the CPU frequency can improve the efficiency of processor resource utilization while ensuring the process operation of critical threads and critical dependent threads, providing users with a smooth experience of using electronic devices.

[0550] Distributed data management can realize data synchronization, data storage, data sharing and data access functions in all scenarios and across devices.

[0551] The distributed soft bus provides communication-related capabilities, including: WLAN service capabilities, Bluetooth service capabilities, soft bus, inter-process communication RPC (Remote Procedure Call) and other communication capabilities.

[0552] The compiler / runner is a unified compilation and runtime platform designed to support the joint compilation and operation of multiple programming languages ​​and multiple chip platforms. For example, the compiler / runner may be the Ark Compiler.

[0553] The framework layer provides application programming interfaces (APIs) and programming frameworks for applications in the application layer, such as the UI framework module (the UI framework module provides a complete infrastructure for UI development of system applications, including UI functions such as components, layouts, animations, and interactive events, as well as real-time interface preview tools), user program frameworks, and Ability frameworks (Ability is a lightweight application that schedules and manages the operation and life cycle of Ability). Different devices may have different operating systems, and the APIs they support may also be different.

[0554] HarmonyOS API is a series of open capabilities provided to support HarmonyOS application development. HarmonyOS API can be set at the framework layer or independently of the framework layer. For example: Audio API (audio service), Push API (push service), Account API (account service), etc.

[0555] Applications can include system applications and extended applications / third-party applications. System applications can include desktop, control bar, settings, contacts, phone, camera, etc. Extended applications / third-party applications can include social applications, travel applications, short video applications, shopping applications, etc.

[0556] The embodiment of the present application further provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments can be implemented.

[0557] The embodiment of the present application also provides a computer program product, including a computer program. When the computer program runs on a processor, the steps in the above-mentioned method embodiments can be implemented.

[0558] The embodiment of the present application also provides a chip system, the chip system includes a processing circuit and an interface circuit, the interface circuit is used to receive code instructions and transmit the processing circuit, and the processing circuit is used to run the code instructions so that the chip system implements the steps of any method embodiment of the present application. The chip system can be a single chip or a chip module composed of multiple chips.

[0559] It is understandable that the various user interfaces described in the embodiments of the present application are only example interfaces and do not limit the present application scheme. In other embodiments, the user interface may adopt a different interface layout, may include more or fewer controls, and may increase or decrease other functional options, as long as they are based on the same inventive concept provided by the present application, they are all within the scope of protection of the present application.

[0560] It should be noted that, without causing any contradiction or conflict, any feature in any embodiment of the present application, or any part of any feature, can be combined, and the combined technical solution is also within the scope of the embodiments of the present application.

[0561] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A processor resource management method, characterized in that: The method is applied to an electronic device, the electronic device includes a first critical thread list, and the method includes: When running a first critical thread, the electronic device identifies a critical dependent thread of the first critical thread; The first key thread list is associated with a first application scenario, and the electronic device determines that the electronic device is in the first application scenario according to a first application running in the foreground; The electronic device increases the running priority of the critical dependent thread of the first critical thread.

2. The method according to claim 1, characterized in that The electronic device further includes a second key thread list, wherein the second key thread list is associated with a second application scenario; After the electronic device increases the priority of the critical dependent thread of the first critical thread, the method further includes: The electronic device determines, according to the second application running in the foreground, that the electronic device is in the second application scenario; The electronic device identifies a key dependent thread of a second key thread, the second key thread is any thread in the second key thread list, the key dependent threads of the second key thread include threads other than the second key thread on a second key path, one node on the second key path corresponds to one thread, the head node and the tail node on the second key path both correspond to the second key thread, and there is a wake-up relationship between two adjacent nodes on the second key path; The electronic device increases the priority of the critical dependent thread of the second critical thread.

3. The method according to claim 2, characterized in that After the electronic device determines, according to the application running in the foreground, that the electronic device is in the second application scenario, the method further includes: The electronic device reduces the priority of the critical dependent thread of the first critical thread.

4. The method according to any one of claims 1 to 3, characterized in that The electronic device identifies a key dependent thread of the first key thread, specifically including: The electronic device searches for a key dependent thread of the first key thread in a first key dependent thread list, wherein the first key dependent thread list includes key dependent threads of the first key thread, and the first key dependent thread list is obtained by the electronic device from a server.

5. The method according to any one of claims 1 to 3, characterized in that: The electronic device identifies a key dependent thread of the first key thread, specifically including: The electronic device detects a first thread wake-up event, where the first thread wake-up event is used to indicate that the first thread wakes up a first wake-up relationship corresponding to the second thread; The electronic device determines, according to a historical wake-up relationship of threads in the electronic device, that the second thread is a key dependent thread of the first key thread, wherein the historical wake-up relationship includes a first historical number of times the first wake-up relationship occurs, and a second historical number of times the first thread and the second thread are actually both key dependent threads of the first key thread in history when the first wake-up relationship occurs, wherein the first historical number is greater than a first number threshold, and a ratio of the second historical number to the first historical number is greater than a first probability threshold; The electronic device also searches for key dependent threads of the first key thread in a second key dependent thread list, the second key dependent thread list includes key dependent threads of the first key thread, and the second key dependent thread list is generated by the electronic device according to the historical wake-up relationship of the threads.

6. The method according to claim 5, characterized in that The second critical dependent thread list does not include the second thread, and after the electronic device determines that the second thread is a critical dependent thread of the first critical thread according to the historical wake-up relationship of threads in the electronic device, the method further includes: The electronic device adds the second thread to the second critical dependency thread list.

7. The method according to claim 6, characterized in that After the electronic device adds the second thread to the second critical dependent thread list, the method further includes: The electronic device determines, according to the historical wake-up relationship, that the historical number of occurrences of the first wake-up relationship changes to a third historical number, and that the historical number of occurrences of the first thread and the second thread that are actually both key dependent threads of the first key thread in history when the first wake-up relationship occurs changes to a fourth historical number, wherein a ratio of the fourth historical number to the third historical number is less than the first probability threshold; The electronic device removes the second thread from the second critical dependent thread list.

8. The method according to any one of claims 5 to 7, characterized in that: The second critical dependency thread list is updated based on the first critical dependency thread list, the first critical dependency thread list is obtained by the electronic device from a server, and the first critical dependency thread list includes critical dependency threads of one or more critical threads in the first critical thread list.

9. The method according to any one of claims 1 to 8, characterized in that The method further comprises: The electronic device divides the threads in the electronic device into a foreground group and a non-foreground group, wherein the foreground group includes threads of a foreground application running in the foreground and threads associated with the foreground application in a system service, and the non-foreground group includes threads in the system service not associated with the foreground application and threads of a background application running in the background; The electronic device detects the CPU load rate of the thread of the foreground group; When the CPU load rate of the threads of the foreground group increases, the electronic device determines a first increase in the length of the CPU time slice according to the increase in the CPU load rate of the threads of the foreground group; The electronic device increases the CPU time slice length of the thread of the foreground group according to the first increase amount, and reduces the CPU time slice length of the thread of the non-foreground group.

10. The method according to claim 9, characterized in that Before the electronic device detects the CPU load rate of the thread of the foreground group, the method further includes: The electronic device detects a first foreground event, where the first foreground event includes a change in a foreground application running in the foreground.

11. The method according to any one of claims 1 to 10, characterized in that The method further comprises: The electronic device divides the threads in the electronic device into a foreground group and a non-foreground group, wherein the foreground group includes threads of a foreground application running in the foreground and threads associated with the foreground application in a system service, and the non-foreground group includes threads in the system service not associated with the foreground application and threads of a background application running in the background; The electronic device detects the whole machine load and / or the device shell temperature of the electronic device, where the whole machine load includes the CPU load of the threads of the foreground group and the non-foreground group; When the whole machine load is a first load and / or the device shell temperature is a first temperature, the electronic device determines a first bandwidth quota according to the first load and / or the first temperature, and performs a CPU bandwidth quota on the threads of the non-foreground group according to the first bandwidth quota.

12. The method according to claim 11, characterized in that The method further comprises: When the whole machine load changes to a second load and / or the device shell temperature changes to a second temperature, the electronic device determines a second bandwidth quota amount according to the second load and / or the second temperature, and performs a CPU bandwidth quota on the threads of the non-foreground group according to the second bandwidth quota amount; If the second load is higher than the first load and / or the second temperature is higher than the first temperature, the second bandwidth quota amount is smaller than the first bandwidth quota amount.

13. The method according to any one of claims 1 to 10, characterized in that The method further comprises: The electronic device divides threads in the electronic device into a foreground group, a common thread group, and a restricted thread group, wherein the foreground group includes threads of a foreground application running in the foreground and threads associated with the foreground application in a system service, the restricted thread group includes threads in the system service that are not associated with the foreground application and can be delayed, and threads in a background application running in the background that can be delayed, and the common thread group includes threads in the system service that are not associated with the foreground application and are not in the restricted thread group, and threads in the background application that are not in the restricted thread group; The electronic device continuously allocates CPU bandwidth quota to the threads of the restricted-level thread group according to the third bandwidth quota amount; The electronic device detects the whole machine load and / or the device shell temperature of the electronic device, wherein the whole machine load includes the CPU load of the threads of the foreground group, the non-ordinary thread group, and the restricted-level thread group; When the whole machine load is a first load and / or the device shell temperature is a first temperature, the electronic device determines a first bandwidth quota according to the first load and / or the first temperature, and performs CPU bandwidth quota on the threads of the common thread group according to the first bandwidth quota.

14. The method according to any one of claims 1 to 13, characterized in that The method further comprises: The electronic device divides the threads in the electronic device into a foreground group and a non-foreground group, wherein the foreground group includes threads of a foreground application running in the foreground and threads associated with the foreground application in a system service, and the non-foreground group includes threads in the system service not associated with the foreground application and threads of a background application running in the background; When it is detected that the third thread is waiting for the fourth thread to release the first shared resource or waiting to obtain the first operation result from the fourth thread, the electronic device marks the fourth thread with a first label, the third thread is a thread of the foreground group, and the fourth thread is a thread of the non-foreground group; The electronic device performs one or more of the following operations on the thread with the first tag: increasing the priority of the operation, increasing the length of the CPU time slice, and releasing the CPU bandwidth quota; When the fourth thread releases the first shared resource or sends the first execution result to the third thread, the electronic device removes the first tag of the fourth thread.

15. The method according to any one of claims 9 to 14, characterized in that: The foreground group includes the critical threads in the first critical thread list and the critical dependent threads of the critical threads in the first critical thread list.

16. The method according to claim 1, characterized in that The electronic device detects the whole machine load and / or the device shell temperature of the electronic device, where the whole machine load includes the loads of all threads in the electronic device; The electronic device determines a first CPU frequency according to the whole machine load and / or the device shell temperature, and controls the CPU frequency when the CPU runs a non-critical thread to be below the first CPU frequency, wherein the non-critical thread includes a critical thread in the first critical thread list and threads other than critical dependent threads of the critical threads in the first critical thread list.

17. The method according to any one of claims 1 to 16, characterized in that The first key thread is used to complete a multi-frame task, and the method further includes: During the running of the first critical thread and the critical dependent thread of the first critical thread, the electronic device determines, according to the CPU frequency modulation cycle, that the first frequency modulation moment is in the time period in which the first frame task in the multi-frame task is running; At the first frequency modulation moment, the electronic device detects whether the first frame task is completed; If the first frame task is not completed, the electronic device increases the CPU frequency to a second CPU frequency according to the first frequency modulation function; Among them, the first frequency modulation function is a power function with CPU computing power as the dependent variable, the running time of one frame task in the multi-frame tasks as the independent variable, and the exponent being a positive number less than 1.

18. The method according to claim 17, characterized in that The method further comprises: If the first frame task is completed, the electronic device reduces the CPU frequency to a third CPU frequency.

19. The method according to claim 17, characterized in that The time when the first frame task starts running and the time when the first frame task finishes running are not frequency modulation times determined according to the CPU frequency modulation cycle, and the method further includes: When detecting that the first frame task starts to run, the electronic device increases the CPU frequency to a fourth CPU frequency; When detecting that the first frame task has finished running, the electronic device reduces the CPU frequency to the fifth CPU frequency.

20. The method according to any one of claims 17 to 19, characterized in that After the first frame task is completed, the method further includes: The electronic device determines, according to the CPU frequency modulation cycle, that the second frequency modulation moment is located in the time period when the second frame task in the multi-frame task is running; At the second frequency modulation moment, the electronic device detects whether the second frame task is completed; If the second frame task is not completed, the electronic device increases the CPU frequency to a sixth CPU frequency according to the first frequency modulation function.

21. The method according to any one of claims 17 to 20, characterized in that The first key thread is a thread for determining the display content of a user interface, and one frame task in the multi-frame task includes determining the display content of one frame of the user interface; or, the first key thread is a thread for rendering a user interface, and one frame task in the multi-frame task includes rendering one frame of the user interface.

22. A processor resource management method, characterized in that: The method comprises: The electronic device divides the threads in the electronic device into a foreground group and a non-foreground group, wherein the foreground group includes threads of a foreground application running in the foreground and threads associated with the foreground application in a system service, and the non-foreground group includes threads in the system service not associated with the foreground application and threads of a background application running in the background; The electronic device performs one or more of the following operations on the threads in the non-foreground group: adjusting the CPU time slice length of one or more threads in the non-foreground group, performing CPU bandwidth quota on one or more threads in the non-foreground group, and controlling the CPU frequency of the CPU when running one or more threads in the non-foreground group.

23. The method according to claim 22, characterized in that The adjusting the CPU time slice length of one or more threads in the non-foreground group according to the load rate change of the thread in the foreground group specifically includes: When the CPU load rate of the threads of the foreground group increases, the electronic device determines a first increase in the length of the CPU time slice according to the increase in the CPU load rate of the threads of the foreground group; The electronic device increases the CPU time slice length of one or more threads in the foreground group according to the first increase, and decreases the CPU time slice length of one or more threads in the non-foreground group.

24. The method according to claim 22 or 23, characterized in that The performing of CPU bandwidth quota on one or more threads in the non-foreground group specifically includes: The electronic device detects the whole machine load and / or the device shell temperature of the electronic device, where the whole machine load includes the CPU load of the threads of the foreground group and the non-foreground group; When the whole machine load is a first load and / or the device shell temperature is a first temperature, the electronic device determines a first bandwidth quota according to the first load and / or the first temperature, and performs CPU bandwidth quota for one or more threads in the non-foreground group according to the first bandwidth quota.

25. The method according to claim 24, characterized in that The method further comprises: When the whole machine load changes to a second load and / or the device shell temperature changes to a second temperature, the electronic device determines a second bandwidth quota amount according to the second load and / or the second temperature, and performs a CPU bandwidth quota on one or more threads in the non-foreground group according to the second bandwidth quota amount; If the second load is higher than the first load and / or the second temperature is higher than the first temperature, the second bandwidth quota amount is smaller than the first bandwidth quota amount.

26. The method according to any one of claims 22 to 25, characterized in that The first CPU frequency is determined according to the entire machine load of the electronic device and / or the device shell temperature, and the entire machine load includes the load of all threads in the electronic device.

27. The method according to any one of claims 22 to 26, characterized in that The method further comprises: When it is detected that the third thread is waiting for the fourth thread to release the first shared resource or waiting to obtain the first operation result from the fourth thread, the electronic device marks the fourth thread with a first label, the third thread is a thread of the foreground group, and the fourth thread is a thread of the non-foreground group; The electronic device performs one or more of the following operations on the thread with the first tag: increasing the priority of the operation, increasing the length of the CPU time slice, and releasing the CPU bandwidth quota; When the fourth thread releases the first shared resource or sends the first execution result to the third thread, the electronic device removes the first tag of the fourth thread.

28. An electronic device, characterized in that: The electronic device comprises a memory and a processor, wherein the memory is used to store a computer program; and the processor executes the computer program to implement the method according to any one of claims 1 to 27.

29. A computer-readable storage medium storing instructions, characterized in that: When the instructions are executed by a processor, the method according to any one of claims 1 to 27 is implemented.

30. A computer program product, characterized in that The computer program product comprises computer instructions, and when the computer instructions are executed by a processor, the method according to any one of claims 1 to 27 is implemented.

Images