Simulation method and simulation system of power electronic converter

Abstract

The invention belongs to the related technical field of simulation modeling, and discloses a simulation method and a simulation system of a power electronic converter, and the method comprises the steps: obtaining system parameters at a k-1 moment, inputting the system parameters into an equivalent discrete system state equation, and solving to obtain a state vector at a k moment; wherein the discrete system state equation is an equivalent discrete system state equation constructed after each switch on the half bridge is equivalent to a voltage-controlled current source model. According to the method provided by the invention, after a Ron / Roff switch model is further equivalent to a voltage-controlled current source model, an equivalent system state equation is constructed, coefficient matrixes in the system state equation are constant matrixes, and all multiplication calculations in the state equation are multiplication calculations of constants and variables, so that the equivalent system state equation is obtained. When the FPGA is realized, shift additive operation can be adopted to replace multiplication operation, so that the use of a limited number of multipliers is avoided, and the problem that the simulation scale of the power electronic converter is limited is solved.

Description

Technical Field

[0001] The present invention belongs to the technical field related to simulation modeling, and more specifically, relates to a simulation method and a simulation system for a power electronic converter. Background Art

[0002] Binary resistor (R on / R off ) switch model is one of the most commonly used switch models in real-time simulation of power electronic converters. on / R off Switch model, when the switch is turned on, the switch is equivalent to a small resistor R on ; When the switch is turned off, the switch is equivalent to a large resistor R off Compared with other ideal switch models such as the adjoint discrete circuit model and the switch function model, the R on / R off The real-time simulation model of the power electronic converter established by the switch model has higher accuracy.

[0003] However, when using R on / R off When modeling the switch model, complex multiplication operations are involved in determining the state of the diode and updating the state variables. The larger the scale of the power electronic converter, the greater the amount of multiplication operations involved. If simulation based on field programmable gate array (FPGA) is used, due to the limited multiplier resources of FPGA, it is impossible to simulate large-scale power electronic converters, which limits the simulation scale. Summary of the invention

[0004] In view of the above defects or improvement needs of the prior art, the present invention provides a simulation method and a simulation system for a power electronic converter, the purpose of which is to construct a simulation model that can implement multiplication operations using shift addition operations to solve the problem of limited simulation scale.

[0005] To achieve the above object, the present invention provides a simulation method for a power electronic converter, which comprises:

[0006] Obtaining system parameters at time k-1 and inputting an equivalent discrete system state equation, and solving to obtain a state vector at time k; the state vector is a vector composed of the inductor current and capacitor voltage of the converter;

[0007] The discrete system state equation is an equivalent discrete system state equation constructed by equating each switch on the half bridge to a voltage-controlled current source model. The discrete system state equation reflects the relationship between the state vector at time k and the system parameters at time k-1. The voltage-controlled current source model includes an equivalent resistor R in parallel. sn and the equivalent controlled current source j sw , the equivalent resistance R sn The resistance is equal to R off , when the switch is in the off state, the equivalent controlled current source j sw The current is 0, when the switch is in the on state, the equivalent controlled current source j sw The admittance In the formula, R on is the equivalent on-resistance of the switch, R off is the equivalent off resistance of the switch.

[0008] Optionally, the discrete system state equation is:

[0009] x(k)=[I+Δt·A1]·x(k-1)+Δt·A2·u(k-1)+Δt·A3·j sw (k-1)

[0010] In the formula, x(k) is the state vector at time k, x(k-1) is the input vector at time k-1, u(k-1) is the input vector at time k-1, and j sw (k-1) is the vector formed by the currents of all equivalent controlled current sources at time k-1, Δt is the simulation step size, A1, A2, A3 are constant matrices determined by constructing the Kirchhoff voltage equation for the inductor voltage of the converter and the Kirchhoff current equation for the capacitor current of the converter, and I is the unit matrix;

[0011] The system parameters at time k-1 input into the discrete system state equation include x(k-1), u(k-1) and j sw (k-1); When the switch is in the on state, the equivalent controlled current source in the upper arm of the half-bridge and an equivalent controlled current source in the lower arm of the half-bridge The calculation formula is as follows:

[0012]

[0013] In the formula, i h and v h are the input current and input voltage of the corresponding half-bridge respectively.

[0014] Optionally, the discrete system state equation is:

[0015]

[0016] In the formula, x(k) is the state vector at time k, x(k-1) is the input vector at time k-1, and u(k-1) is the input vector at time k-1. is a vector of current-related quantities of all equivalent controlled current sources at time k-1, Δt is the simulation step, A1, A2, A3 are constant matrices determined by constructing Kirchhoff voltage equation for the inductor voltage of the converter and Kirchhoff current equation for the capacitor current of the converter, and I is the unit matrix;

[0017] The system parameters at time k-1 input into the discrete system state equation include x(k-1), u(k-1) and When the switch is in the off state, the current-related quantity of the corresponding equivalent controlled current source is 0. When the switch is in the on state, the current-related quantity of the equivalent controlled current source located in the upper arm of the half-bridge is and the current-related quantity of the equivalent controlled current source located in the lower arm of the half-bridge The calculation formula is as follows:

[0018]

[0019] In the formula, i h and v h are the input current and input voltage of the corresponding half-bridge respectively.

[0020] Optionally, the equivalent off resistance R off In kΩ level, the equivalent on-resistance R on It is in the mΩ level.

[0021] Optionally, after solving the state vector at time k, the state of each switch at time k is determined based on the state vector at time k and the gating signal at time k, and then based on the state of each switch, system parameters related to the equivalent controlled current source in the discrete system state equation to be input at time k+1 are constructed and recorded for simulation at time k+1.

[0022] Optionally, the simulation method is implemented based on an FPGA chip, and shift addition operations are used in the FPGA chip to implement multiplication calculations in the discrete system state equation.

[0023] Optionally, the power electronic converter is any one of an LLC resonant converter, a series load resonant converter, a dual active bridge converter, and a three-phase inverter.

[0024] The present invention also provides a simulation system for a power electronic converter, comprising:

[0025] An input module is used to obtain the system parameters at time k-1 and input the equivalent discrete system state equation;

[0026] A calculation module, used for solving the discrete system state equation to obtain a state vector at time k, wherein the state vector is a vector composed of the inductor current and the capacitor voltage of the converter;

[0027] The discrete system state equation is an equivalent discrete system state equation constructed by equating each switch on the half bridge to a voltage-controlled current source model. The discrete system state equation reflects the relationship between the state vector at time k and the system parameters at time k-1. The voltage-controlled current source model includes an equivalent resistor R in parallel. sn and the equivalent controlled current source j sw , the equivalent resistance R sn The resistance is equal to R off , when the switch is in the off state, the equivalent controlled current source j sw The current of the equivalent controlled current source j is 0. When the switch is in the on state, sw The admittance In the formula, R on is the equivalent on-resistance of the switch, R off is the equivalent off resistance of the switch.

[0028] Optionally, an updating module is also included, which is used to update the system parameters at time k after obtaining the state vector at time k for simulation at time k+1.

[0029] Optionally, the simulation system is implemented by an FPGA chip, and shift addition operations are used in the FPGA chip to implement multiplication calculations in the discrete system state equation.

[0030] In general, the above technical solutions conceived by the present invention have the following beneficial effects compared with the prior art:

[0031] 1. The method proposed by the present invention comprises: on / R off After the switch model is further equivalent to a voltage-controlled current source model, an equivalent system state equation is constructed. The coefficient matrices in the system state equation are all constant matrices, and all multiplication calculations in the state equation are multiplication operations of constants and variables. Therefore, when implementing in FPGA, shift addition operations can be used instead of multiplication operations to avoid the use of a limited number of multipliers, thereby solving the problem of limited simulation scale of power electronic converters. Moreover, since multiplication operations can be avoided, the method proposed in the present invention can achieve extremely low simulation step lengths, thereby reducing the cumulative error of the numerical discrete method and being able to achieve oversampling of the gate signal at high switching frequencies.

[0032] 2. Optionally, in one embodiment of the present invention, By inputting the corresponding system state equation, the amount of calculation can be reduced and less FPGA resource consumption can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 The present invention relates to an R on / R off Equivalent switch model of switch model;

[0034] Figure 2 The present invention adopts R on / R off Schematic diagram of the half-bridge equivalent structure of the switch model and the voltage-controlled current source switch model;

[0035] Figure 3 It is a schematic diagram of a simulation process in one embodiment of the present invention;

[0036] Figure 4 is a schematic diagram of a DAB converter circuit topology simulated by an embodiment of the present invention;

[0037] Figure 5 It is an off-line simulation comparison diagram of the DAB converter model constructed by the present invention and the MATLAB / Simulink reference model;

[0038] FIG. 6( a ) is a diagram showing the inductor current i of a real-time simulation model of a DAB converter constructed according to an embodiment of the present invention and a physical experiment. Lp Waveform comparison chart:

[0039] FIG. 6( b ) is a diagram showing the inductor current i of the real-time simulation model of the DAB converter constructed according to an embodiment of the present invention and the actual experiment. Lp Schematic diagram of absolute error. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0041] In order to facilitate the understanding of the present invention, the traditional method of simulating a power electronic converter based on a binary resistance model is first introduced. The power electronic converter can be an LLC resonant converter, a series load resonant converter, a dual active bridge converter, a three-phase inverter, etc.

[0042] The traditional method uses R on / R offWhen modeling the switch model, the state equation shown in formula (1) is used to describe the behavior of the power electronic converter:

[0043]

[0044] In the formula, x is the state vector, u is the input vector, and A σ is the state matrix of the time domain system, B σ is the input matrix of the time domain system, and σ is the switch state combination of the system.

[0045] The state vector is a vector composed of the inductor current and capacitor voltage of the converter; the input vector is a vector composed of the external excitation signal source of the converter.

[0046] In order to simplify the modeling calculation, formula (1) is discretized using the forward Euler discretization method.

[0047]

[0048] Where k is the discrete system sampling time, I is the unit matrix, Δt is the simulation step size, and F σ is the state matrix of the discrete system, H σ is the input matrix of the discrete system.

[0049] From formula (2), we can see that since the coefficient matrix F σ and H σ are all matrices that change all the time, and x and u are both vectors composed of variables, so when calculating formula (2), all multiplication operations are multiplication operations between variables. For FPGA, multiplication operations between variables need to be completed by multipliers DSP48s. Since the number of DSP48s in FPGA is very small, the traditional method of using formula (2) will limit the scale of the power electronic converter model due to the insufficient number of multipliers DSP48s.

[0050] In order to solve the above problems, the present invention proposes a new simulation method for power electronic converters, which can complete all modeling calculations without the need for FPGA multiplier DSP48s. By establishing an equivalent state equation, the coefficient matrix is ​​realized to be a constant matrix, so that the multiplication operation is replaced by shift addition operation when implementing FPGA, avoiding the use of DSP48s, and greatly increasing the ability of FPGA for real-time simulation modeling of power electronic converters.

[0051] like Figure 1 FIG. 1 is a diagram showing the R of a switch in one embodiment of the present invention. on / R off Schematic diagram of the structure of the model and its equivalent voltage-controlled current source model.

[0052] For any switch tube, such as MOSFET and diode, when using R on / R off When modeling the switch model, it can be equivalent to Figure 1 The form shown. Figure 1 In, v sw is the voltage across the switch tube, and its positive direction is set to the conduction direction of the diode or anti-parallel diode; i sw is the current flowing through the switch tube, and its forward direction is set to the conduction direction of the diode or anti-parallel diode; g is the gate signal; R sw is the equivalent resistance of the switch. When the switch is turned on, R sw is a small resistor R on , when the switch is off, R sw The large resistor R off ; Usually, the equivalent off resistance R off The equivalent on-resistance is in the kΩ level and the equivalent on-resistance is in the mΩ level. on / R off The switch model is equivalent to a voltage-controlled current source model, R sn is an equivalent parallel resistance, j sw They are equivalent controlled current sources and the two are in parallel relationship.

[0053] For the controlled current source j sw , which satisfies the following conditions (3) and (4):

[0054] j sw =G sw ·v sw (3)

[0055]

[0056] In the formula, G sw is the switch equivalent admittance. When the switch is turned on, G sw is the admittance G on , when the switch is turned off G sw is 0. A flag signal is used to record whether the switch is turned on and is recorded as σ sw When the switch is turned on, σ sw is 1, otherwise, σ sw is 0.

[0057] Therefore, the controlled current source j sw Satisfy the condition of formula (5).

[0058]

[0059] In the formula, as well as They are the controlled current sources when the switch is on and off respectively.

[0060] In order to make the constructed voltage-controlled current source model consistent with R on / R off The switch models are equivalent, and the conditions for their equivalence need to be analyzed.

[0061] For R on / R off The analysis conditions for the switch model and the voltage-controlled current source switch model to be equivalent are as follows.

[0062] If two models are equivalent, then for the same switch input characteristics, the models will always show the same output characteristics. For these two switch models, the input is the switch voltage v sw , the output is the switching current i sw .

[0063] For R on / R off Switch model, switch current i sw The calculation formula is shown in formula (6):

[0064]

[0065] For the voltage-controlled current source switch model, the switch current i sw The calculation formula is shown in formula (7):

[0066]

[0067] Therefore, as long as equation (6) and equation (7) are set in “σ sw =1" under the condition that the two switch currents i sw Equal, and let equation (6) and equation (7) in "σ sw = 0" under the condition that the two switch currents i sw If they are equal, then R on / R off The switch model is equivalent to the voltage-controlled current source switch model.

[0068] Therefore, the conditions for the equivalence of the two switch models are shown in equation (8).

[0069]

[0070] As long as the condition of formula (8) is satisfied, that is, the equivalent resistance R sn Equal to the equivalent off resistance R of the switch off , when the switch is in the off state, the equivalent controlled current source j sw The current is 0, when the switch is in the on state, the equivalent controlled current source j sw The admittance R on / Roff The switch model is equivalent to the voltage-controlled current source switch model, so the same modeling accuracy can be achieved, ensuring R on / R off The switch model has high precision characteristics.

[0071] like Figure 2 The present invention is shown in an embodiment of the invention using R on / R off The schematic diagram of the half-bridge equivalent structure of the switch model and the voltage-controlled current source switch model. The half-bridge structure includes an upper tube S a , a down tube S b , half-bridge input current i h , half-bridge input voltage v h 、Top tube S a The switching voltage v swa , down tube S b The switching voltage v swb 、Top tube S a The switch equivalent controlled current source j swa , down tube S b The switch equivalent controlled current source j swb Usually, h is the inductor current, v h is the capacitor voltage or the input DC voltage.

[0072] When the switch is equivalent to a voltage-controlled current source model, the equivalent system state equation of the power electronic converter can be constructed based on the Kirchhoff voltage law relationship of the inductor voltage and the Kirchhoff current law relationship of the capacitor current of the power electronic converter, as shown in the following equation (9):

[0073]

[0074] In the formula, x is the vector of state variables, u is the vector of input variables, and j is sw The switch-controlled current source j equivalent to all switches in the system sw The dimension of the vector is consistent with the number of switches. Wherein, A1, A2, A3 are constant matrices determined based on the Kirchhoff voltage law relationship of the inductor voltage and the Kirchhoff current law relationship of the capacitor current of the power electronic converter.

[0075] In order to simplify the modeling process, the forward Euler method is used to update equation (9) to obtain the equivalent discrete system state equation as shown in equation (10):

[0076]

[0077] In the formula, x(k) is the state vector at time k, x(k-1) is the input vector at time k-1, u(k-1) is the input vector at time k-1, and j sw (k-1) is the vector composed of the currents of all equivalent controlled current sources at time k-1, and Δt is the simulation step size.

[0078] Through the above equivalent transformation, the time-varying matrix coefficients of the traditional solution formula (2) can be converted into a fixed constant matrix, so that the multiplication operation can be replaced by the shift addition operation to avoid the call of the multiplier.

[0079] Among them, j sw (k-1) is the vector of currents of all equivalent controlled current sources at time k-1. Each equivalent controlled current source can be calculated to construct j sw (k-1), x(k-1), u(k-1) and j at time k-1 sw Substitute (k-1) into the above equation (10) and calculate the state vector x(k) at time k.

[0080] Specifically, the equivalent circuit topology can be analyzed to calculate each equivalent controlled current source. The specific analysis process is as follows.

[0081] According to Kirchhoff's law, for R on / R off Switch model, switch voltage v swa and v swb The formula shown in formula (11) is satisfied. This switch voltage formula is also applicable to the voltage-controlled current source model when the condition of formula (8) is satisfied.

[0082]

[0083] In the formula, R a and R b are the equivalent resistances of the upper bridge arm and the lower bridge arm respectively. When the switch is turned on, the corresponding switch has an equivalent on-resistance R on , when the switch is turned off, the corresponding switch has an equivalent off resistance R off .

[0084] Substituting equation (11) into equation (3), we can obtain the controlled current source j swa and swb The calculation formula is shown in formula (12):

[0085]

[0086] In the formula, G swa and G swb Switch S a and S bIt is equivalent to the switch equivalent admittance of the voltage-controlled current source model.

[0087] From equation (5), we can see that if the switch is turned off, its controlled current source as well as is zero, so we only need to calculate the as well as As shown in formula (13):

[0088]

[0089] As shown in equation (13), the controlled current source in the on state is related to the resistance value of another switch on the half-bridge arm, that is, it is related to the state of the other switch. With R b related, With R a Related, further analysis is needed.

[0090] for Figure 2 The half-bridge structure shown in FIG. 1 has only four switch state combinations of formula (14), and the half-bridge switch state combination is denoted by σ h , the four switching state combinations of the half bridge are σ h0 , σ h1 , σ h2 , σ h3 , corresponding to blocking mode, lower conduction mode, upper conduction mode and error mode respectively:

[0091]

[0092] When the upper tube S a When turned on, there are two possible modes, namely mode σ h2 and σ h3 , now manage S b When turned on, there are two possible modes, namely mode σ h1 , and σ h3 Therefore, we discuss formula (13) in different cases and get the matrix-vector operation of formula (15) as follows:

[0093]

[0094] In the formula, Switch S a and S b A controlled current source that turns on when the half-bridge is in different combinations of switching states.

[0095] In fact, σ h3 The condition for existence is that the half-bridge input voltage v h<0, this is a mode that cannot exist under normal circumstances, that is, an error mode. If an error mode is identified, no simulation will be performed, and only the normal state of the system will be simulated. Therefore, in the actual modeling process, only and Then equation (13) can be simplified to the form shown in equation (16).

[0096]

[0097] Substituting the equivalent condition of formula (8) into formula (16), we can further obtain formula (17).

[0098]

[0099] Based on the above formula (17), the current of each equivalent controlled current source when the switch is turned on can be calculated. When the switch is turned off, the current of the equivalent controlled current source is directly 0. Therefore, we can construct

[0100] x(k-1), u(k-1) and j at time k-1 sw Substitute (k-1) into the above equation (10) and solve the state vector at time k.

[0101] Furthermore, in order to reduce the amount of calculation, an intermediate variable is introduced and are the current-related quantities of the equivalent controlled current source of the upper arm of the half-bridge when the switch is turned on and the current-related quantities of the equivalent controlled current source of the lower arm of the half-bridge when the switch is turned on, and further deformation of equation (17) yields the following equations (18) and (19):

[0102]

[0103] Therefore, we can introduce the variable as well as They represent the current-related quantities of the equivalent controlled current source of the upper arm of the half-bridge and the current-related quantities of the equivalent controlled current source of the lower arm of the half-bridge, respectively. a When conducting for When the switch is off is 0. At switch S b When conducting for When the switch is off is 0, and is updated according to the following equations (20) and (21):

[0104]

[0105] At this time, by adjusting equation (10) in combination with equation (18), the optimized discrete system state equation of equation (22) is obtained:

[0106]

[0107] In the formula, It is a vector consisting of the current-related quantities of all equivalent controlled current sources at time k-1.

[0108] At this time, x(k-1), u(k-1) and Input the above equation (22) and solve the state vector at time k.

[0109] Compared with the state equation of equation (17), the main improvement of equation (22) is to make all controlled current sources as well as Constitutes a vector The state equation of formula (17) is to convert j swa and swb Constitutes the vector j sw From the above analysis, we can see that The computational complexity is relatively large compared to j sw The amount of calculation is small, so using formula (22) consumes less FPGA resources and has greater advantages.

[0110] It can be seen that whether it is formula (17) or formula (22), its coefficient matrix [I+Δt·A1], ΔtA2, Δt·A3 or They are all constant matrices and will not change with time. When updating the state equation (17) or (22), only the multiplication operation of variables and constants is involved (the elements in x and u are variables, and the elements in the coefficient matrix are constants). Therefore, all multiplications can be replaced by shift addition operations when writing code in FPGA.

[0111] In addition, the update formula (17) or the update formula (19) also only contains the variable (i h and v h ) and a constant, so shift and addition operations can also be used instead of multiplication operations when writing code for FPGA.

[0112] Since the switch state of the switch needs to be determined in advance when using formula (17) or formula (19), only when the switch is in the on state will formula (17) or formula (19) be used for calculation, otherwise, the current or current-related quantity of the equivalent controlled current source of the switch is directly taken as 0. The switch state can be determined according to conventional methods, where for natural switches (such as diodes) that are not controlled by gate signals or gate signals g on half bridges a (k) = 0 and gb (k) = 0, the switch state combination update formula of the half-bridge is shown in formula (23). For the gate control signal g on the half-bridge a (k) = 1 or g b When (k) = 1, the switch state combination update formula of the half bridge is shown in formula (24):

[0113]

[0114]

[0115] The multiplication in formula (23) is also the variable (i h With v h ) and constant (R on , R off ). In summary, all multiplication calculations can be replaced by shift addition operations during modeling.

[0116] The simulation process of the present invention is described below by taking equation (19) and equation (22) as examples.

[0117] like Figure 3 The flowchart of the simulation method of the power electronic converter in one embodiment of the present invention includes the following steps:

[0118] Step S1: R on / R off The switch model is equivalent to a voltage-controlled current source model, and an equivalent discrete system state equation is constructed.

[0119] Specifically, the equivalent discrete system state equation can be in the form of equation (22) above, where the coefficient matrix All of them can be calculated based on the system topology.

[0120] Step S2: The input vector u(k-1) at the last moment, the state vector x(k-1) at the last moment, and the related quantity vector of the controlled current source at the last moment are converted into Input the discrete system state equation and obtain the state vector x(k) at the current moment.

[0121] Step S3: Determine the switch state combination σ of each half bridge according to the current state vector x(k) h (k) and determine the controlled current source on each half bridge All controlled current sources Composition vector For simulation at time k+1.

[0122] Specifically, the controlled current source in the on state is calculated in real time within this step And according to the half-bridge switch state combination σh (k) Thus, the controlled current source is determined is a controlled current source in the selected conduction mode Or a controlled current source in shutdown mode Among them, all switches are controlled current sources are all zero. When updating all controlled current sources Then further set all the controlled current sources Composed of controlled current source vector Used to update x(k+1) in the next simulation step. Return to step S2 at the start time of the next simulation step.

[0123] Accordingly, the present invention also relates to a simulation system for a power electronic converter, comprising:

[0124] An input module is used to obtain the system parameters at time k-1 and input the equivalent discrete system state equation;

[0125] A calculation module, used for solving the discrete system state equation to obtain the state vector at time k;

[0126] The discrete system state equation is an equivalent discrete system state equation constructed by equating each switch on the half bridge to a voltage-controlled current source model. The discrete system state equation reflects the relationship between the state vector at time k and the system parameters at time k-1. The voltage-controlled current source model includes an equivalent resistor R in parallel. sn and the equivalent controlled current source j sw , the equivalent resistance R sn The resistance is equal to the equivalent off resistance R of the switch off , when the switch is in the off state, the equivalent controlled current source j sw The current of the equivalent controlled current source j is 0. When the switch is in the on state, sw The admittance In the formula, R on is the equivalent on-resistance of the switch.

[0127] It can be understood that the above system can be used to implement the simulation method mentioned above, and each module therein can be used to implement the corresponding steps in the simulation method. For details, please refer to the above introduction and will not be repeated here.

[0128] Specifically, the system also includes an updating module, which is used to update the system parameters at time k after obtaining the state vector at time k for simulation at time k+1.

[0129] Specifically, the simulation system is implemented by an FPGA chip.

[0130] In order to verify the practicability of the method proposed in the present invention, the present invention simulated a dual active bridge (DAB) converter offline and in real time, and compared them with the actual experiment. Figure 4 The simulated DAB converter includes an inductor L p , an output capacitor C o , a load R o , a transformer with a transformation ratio of n:1. The primary side full bridge of the DAB converter model includes a first switch tube S1, a second switch tube S2, a third switch tube S3 and a fourth switch tube S4, and the secondary side full bridge of the DAB converter model includes a fifth switch tube S5, a sixth switch tube S6, a seventh switch tube S7 and an eighth switch tube S8. Lp is the current flowing through the inductor L p The current, u o is the output capacitor C o The voltage on in is the input DC voltage. g 1-4 For switch S 1-4 The gating signal, g 5-8 For switch S 5-8 The gate signal of the switching frequency is f s The control strategy of the model is single phase shift modulation, and the switching frequency is f s The frequency is 50kHz and the dead time is 200ns.

[0131] The circuit parameters of the DAB converter model are set as shown in the table:

[0132]

[0133] for Figure 4 For the DAB converter, the system state equation can be obtained by constructing the KVL equation of the inductor voltage and the KCL equation of the capacitor current.

[0134] The KVL and KCL equations are:

[0135]

[0136] In the formula, v sw2 , v sw4 , v sw5 , v sw7 are the switching voltages of switches S2, S4, S5, and S7 respectively. sw5 and sw7 is the controlled current source of switches S5 and S7 updated by equation (5).

[0137] For the switching voltage:

[0138]

[0139] Where v sw1 , v sw3 , v sw6 , v sw8 are the switching voltages of switches S1, S3, S6, and S8 respectively. sw1 , j sw2 , j sw3 , j sw4 , j sw6 , j sw7 is the controlled current source of switches S1, S2, S3, S4, S6, S7 updated by equation (5).

[0140] Substituting (26) and (27) into (25), we can obtain (28).

[0141]

[0142] By writing equation (28) in matrix form, we obtain the system state equation (29) of the DAB converter in the continuous time domain according to the present invention:

[0143]

[0144] Therefore, the A1, A2, A3 matrices in formula (22) are:

[0145]

[0146] A2=0(31)

[0147]

[0148] Figure 5 The waveform comparison between the DAB converter model established by writing m language code in System generator software and the MATLAB / Simulink reference model is given. The model established by the present invention is recorded as "model" and the MATLAB / Simulink reference model is recorded as "reference". In order to ensure the modeling accuracy, fixed-point numbers are used to establish the model. The state variables, input variables, and controlled current source variables all use a 40-bit bit width, including 30 decimal places, 9 integers, and 1 sign bit. The model simulation step is 20ns. Figure 5 (a), (b), (c), and (d) show the inductor current i of the constructed model and the MATLAB / Simulink reference model respectively. Lp Comparison of capacitor voltage v o The comparison of the inductor current i Lp The absolute error of the capacitor voltage v o The absolute error can be obtained from Figure 5It can be seen that the model constructed by the present invention achieves extremely high accuracy compared with the MATLAB / Simulink reference model. Lp and the capacitor voltage v o The absolute error is less than 0.1A and 1.569V.

[0149] In order to further verify the reliability of the method proposed in the present invention, real-time simulation and physical experiment comparison verification were carried out. A real-time simulation model of the DAB converter was established by writing Verilog code in Vivado software. The real-time simulation platform of this experiment is composed of an AX7325BFPGA development board of Alinx Company. The FPGA model is XC7K325TFFG900-2, with 203,800 lookup tables (LUTs), 840 DSP48 slices (DSP48s), 445 Block RAMs (BRAMs) and 407,600 Flipflops. The digital signal generated by the FPGA generates analog variables through the AD9767 digital-to-analog chip and is displayed on the oscilloscope. The established DAB converter experimental platform, MOSFET S 1-8 The model is FF6MR12W2M1-B11, the transformer core material is ferrite EE50, and the circuit parameters refer to the circuit parameters of the DAB converter model given above.

[0150] Figure 6(a) and Figure 6(b) show the test waveforms of real-time simulation and physical experiment, including the inductor current i Lp And the inductor current i Lp The simulation step size can be as low as 20ns, and the switching frequency is 50kHz. It can be seen that the model can operate normally under the simulation step size of 20ns and the real-time simulation is consistent with the offline simulation, which verifies the reliability of the model built by the present invention. The simulation step size of 20ns also far guarantees the oversampling requirement of the 50kHz switching frequency. The simulation waveform of Figure 6(a) has a high degree of fit with the waveform of the actual experiment, and it can be seen from Figure 6(b) that the inductor current i Lp The maximum absolute error is less than 3 A. The real-time simulation model can accurately simulate the behavior of the actual hardware circuit, so the control algorithm can be effectively verified.

[0151] The test results of the DAB converter real-time simulation model resources are shown in the following table:

[0152] parameter Numeric Total resources LUTs 3203(1.57％) 203800 DSP48s 0 840 BRAMs 0 445 Flipflops 121(0.03％) 407600

[0153] As can be seen from the table, the DAB converter model has extremely low resource consumption and does not consume multiplier DSP48s. The most consumed is LUTs resources, but LUTs resources are very abundant in FPGA, so the method proposed in the present invention can significantly alleviate the FPGA calculation pressure, making FPGA capable of simulating larger-scale power electronic converters.

[0154] In summary, the present invention can not only obtain on / R off The high modeling accuracy of the switch model is the same as that of the original model, and because the equivalent system state equation is established, all multiplication operations can be replaced by shift addition operations, thereby greatly reducing the amount of modeling calculations and greatly reducing the consumption of FPGA computing resources. At the same time, the DAB converter model can also run normally at a simulation step size of 20ns, indicating that the method proposed in the present invention can also ensure the oversampling of the gate signal at a high switching frequency, thereby improving the computing efficiency of the FPGA.

[0155] The technical features of the above-mentioned embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification. It should be noted that "in one embodiment", "for example", "for example", etc. of the present invention are intended to illustrate the present invention, rather than to limit the present invention.

[0156] The above-mentioned embodiments only express several implementation methods of the present invention, and the description is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent application. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention.

Claims

1. A simulation method for a power electronic converter, characterized in that: include: Obtaining system parameters at time k-1 and inputting an equivalent discrete system state equation, and solving to obtain a state vector at time k; the state vector is a vector composed of the inductor current and capacitor voltage of the converter; The discrete system state equation is an equivalent discrete system state equation constructed by equating each switch on the half bridge to a voltage-controlled current source model. The discrete system state equation reflects the relationship between the state vector at time k and the system parameters at time k-1. The voltage-controlled current source model includes an equivalent resistor R in parallel. sn and the equivalent controlled current source j sw , the equivalent resistance R sn The resistance is equal to R off , when the switch is in the off state, the equivalent controlled current source j sw The current is 0, when the switch is in the on state, the equivalent controlled current source j sw The admittance In the formula, R on is the equivalent on-resistance of the switch, R off is the equivalent off resistance of the switch.

2. The simulation method of a power electronic converter according to claim 1, characterized in that: The discrete system state equation is: x(k)=[I+Δt·A1]·x(k-1)+Δt·A2·u(k-1)+Δt·A3·j sw (k-1) In the formula, x(k) is the state vector at time k, x(k-1) is the input vector at time k-1, u(k-1) is the input vector at time k-1, and j sw (k-1) is the vector formed by the currents of all equivalent controlled current sources at time k-1, Δt is the simulation step size, A1, A2, A3 are constant matrices determined by constructing the Kirchhoff voltage equation for the inductor voltage of the converter and the Kirchhoff current equation for the capacitor current of the converter, and I is the unit matrix; The system parameters at time k-1 input into the discrete system state equation include x(k-1), u(k-1) and j sw (k-1); When the switch is in the on state, the equivalent controlled current source in the upper arm of the half-bridge and an equivalent controlled current source in the lower arm of the half-bridge The calculation formula is as follows: In the formula, i h and v h are the input current and input voltage of the corresponding half-bridge respectively.

3. The simulation method of a power electronic converter according to claim 1, characterized in that: The discrete system state equation is: In the formula, x(k) is the state vector at time k, x(k-1) is the input vector at time k-1, and u(k-1) is the input vector at time k-1. is a vector of current-related quantities of all equivalent controlled current sources at time k-1, Δt is the simulation step, A1, A2, A3 are constant matrices determined by constructing Kirchhoff voltage equation for the inductor voltage of the converter and Kirchhoff current equation for the capacitor current of the converter, and I is the unit matrix; The system parameters at time k-1 input into the discrete system state equation include x(k-1), u(k-1) and When the switch is in the off state, the current-related quantity of the corresponding equivalent controlled current source is 0. When the switch is in the on state, the current-related quantity of the equivalent controlled current source located in the upper arm of the half-bridge is and the current-related quantity of the equivalent controlled current source located in the lower arm of the half-bridge The calculation formula is as follows: In the formula, i h and v h are the input current and input voltage of the corresponding half-bridge respectively.

4. The simulation method of a power electronic converter according to claim 1, characterized in that: The equivalent off resistance R off In kΩ level, the equivalent on-resistance R on It is in the mΩ level.

5. The simulation method of a power electronic converter according to claim 1, characterized in that: After solving the state vector at time k, the state of each switch at time k is determined based on the state vector at time k and the gating signal at time k. Then, based on the state of each switch, the system parameters related to the equivalent controlled current source in the discrete system state equation to be input at time k+1 are constructed and recorded for simulation at time k+1.

6. The simulation method of a power electronic converter according to claim 1, characterized in that: The simulation method is implemented based on an FPGA chip, and shift addition operations are used in the FPGA chip to implement multiplication calculations in discrete system state equations.

7. The simulation method of a power electronic converter according to claim 1, characterized in that: The power electronic converter is any one of an LLC resonant converter, a series load resonant converter, a dual active bridge converter, and a three-phase inverter.

8. A simulation system for a power electronic converter, characterized in that: include: An input module is used to obtain the system parameters at time k-1 and input the equivalent discrete system state equation; A calculation module, used for solving the discrete system state equation to obtain a state vector at time k, wherein the state vector is a vector composed of the inductor current and the capacitor voltage of the converter; The discrete system state equation is an equivalent discrete system state equation constructed by equating each switch on the half bridge to a voltage-controlled current source model. The discrete system state equation reflects the relationship between the state vector at time k and the system parameters at time k-1. The voltage-controlled current source model includes an equivalent resistor R in parallel. sn and the equivalent controlled current source j sw , the equivalent resistance R sn The resistance is equal to R off , when the switch is in the off state, the equivalent controlled current source j sw The current of the equivalent controlled current source j is 0. When the switch is in the on state, sw The admittance In the formula, R on is the equivalent on-resistance of the switch, R off is the equivalent off resistance of the switch.

9. The simulation system for a power electronic converter according to claim 8, characterized in that: The system also includes an updating module, which is used to update the system parameters at time k after obtaining the state vector at time k so as to be used for simulation at time k+1.

10. The simulation system for a power electronic converter according to claim 8 or 9, characterized in that: The simulation system is implemented by an FPGA chip, in which shift addition operations are used to implement multiplication calculations in discrete system state equations.

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