Pixel circuit and display panel

Abstract

The present invention discloses a pixel circuit and a display panel. The pixel circuit includes a driving transistor, a first storage unit, a threshold compensation unit, and a data writing unit. The first gate of the driving transistor is connected to the first storage unit and the first end of the threshold compensation unit, the first electrode of the driving transistor is connected to the second end of the threshold compensation unit and the data writing unit, the data writing unit is used to write a data voltage into the first gate of the driving transistor through the threshold compensation unit, the second gate of the driving transistor is connected to the first potential terminal, and the second electrode of the driving transistor is connected to the first voltage input terminal. The first potential terminal provides an adjustable first potential, which can increase the threshold compensation range of the pixel circuit and improve display uniformity.

Description

Technical Field

[0001] Embodiments of the present invention relate to the technical field of display, and in particular to a pixel circuit and a display panel. Background Art

[0002] Active-matrix organic light-emitting diode (OLED) displays are driven by current to generate light. The electrical properties of thin-film transistors (TFTs) directly affect the grayscale brightness of the display. Excessive differences in the electrical properties of TFTs within different sub-pixels can lead to uneven image quality. Summary of the Invention

[0003] The present invention provides a pixel circuit and a display panel, so as to improve the threshold compensation effect of the pixel circuit and the display uniformity of the display panel.

[0004] In a first aspect, an embodiment of the present invention provides a pixel circuit, comprising a driving transistor, a first storage unit, a threshold compensation unit, and a data writing unit;

[0005] The first gate of the driving transistor is connected to the first storage unit and the first end of the threshold compensation unit, the first electrode of the driving transistor is connected to the second end of the threshold compensation unit and the data writing unit, the data writing unit is used to write the data voltage into the first gate of the driving transistor through the threshold compensation unit, the second gate of the driving transistor is connected to the first potential end, the second electrode of the driving transistor is connected to the first voltage input end, and the first potential provided by the first potential end is adjustable.

[0006] Optionally, the pixel circuit also includes a first initialization unit and a second storage unit; the first initialization unit and the data writing unit are connected to the first electrode of the driving transistor through the second storage unit, the first initialization unit and the data writing unit are turned on in time-sharing, the first initialization unit is used to write the first initialization signal to the second storage unit, and the data writing unit is used to write the data voltage to the second storage unit; the second storage unit is used to couple the data voltage after initialization according to the first initialization signal.

[0007] Optionally, the pixel circuit further includes a second initialization unit, a third initialization unit and a light emitting control unit;

[0008] The second initialization unit is connected to the first gate of the driving transistor, and is used to initialize the first gate of the driving transistor and the first storage unit, and initialize the second storage unit through the threshold compensation unit;

[0009] The third initialization unit is connected to the cathode of the light-emitting device, the anode of the light-emitting device is connected to the second voltage input terminal, and the third initialization unit is used to initialize the cathode of the light-emitting device;

[0010] The light emitting control unit is connected between the cathode of the light emitting device and the first electrode of the driving transistor, and is used to control a current path.

[0011] Optionally, the first storage unit includes a first capacitor, a first electrode of the first capacitor is connected to the first gate of the driving transistor, and a second electrode of the first capacitor is connected to the first voltage input terminal;

[0012] Preferably, the threshold compensation unit includes a first transistor, a first electrode of the first transistor serves as a first end of the threshold compensation unit, a second electrode of the first transistor serves as a second end of the threshold compensation unit, and a gate of the first transistor is connected to a light emitting control signal input end;

[0013] Preferably, the first transistor is an N-type transistor;

[0014] Preferably, the data writing unit includes a second transistor, a first electrode of the second transistor is connected to the data voltage input terminal, a second electrode of the second transistor is connected to the first electrode of the driving transistor via the second storage unit, and a gate of the second transistor is connected to the first scanning signal input terminal;

[0015] Preferably, the second transistor is an N-type transistor.

[0016] Optionally, the first initialization unit includes a third transistor, a first electrode of the third transistor is connected to the first initialization signal input terminal, a second electrode of the third transistor is connected to the first electrode of the driving transistor via the second storage unit, and a gate of the third transistor is connected to the second scan signal input terminal;

[0017] Preferably, the second storage unit includes a second capacitor, and the first initialization unit and the data writing unit are connected to the first electrode of the driving transistor via the second capacitor;

[0018] Preferably, the third transistor is an N-type transistor.

[0019] Optionally, in one frame, the effective level of the second scanning signal provided by the second scanning signal input terminal is earlier than the effective level of the first scanning signal provided by the first scanning signal input terminal;

[0020] Preferably, the effective level time of the second scanning signal is adjustable;

[0021] Preferably, a start time of the effective level of the second scanning signal corresponding to the pixel circuits in the previous row is one row earlier than a start time of the effective level of the second scanning signal corresponding to the pixel circuits in the current row.

[0022] Optionally, the second initialization unit includes a fourth transistor; a first electrode of the fourth transistor is connected to the second initialization signal input terminal, a second electrode of the fourth transistor is connected to the first gate of the driving transistor, and a gate of the fourth transistor is connected to the third scan signal input terminal;

[0023] Preferably, the second initialization signal provided by the second initialization signal input terminal is greater than the sum of the first voltage provided by the first voltage input terminal and the threshold voltage of the driving transistor;

[0024] Preferably, the fourth transistor is an N-type transistor;

[0025] Preferably, the third initialization unit includes a fifth transistor, a first electrode of the fifth transistor is connected to the second potential terminal, a second electrode of the fifth transistor is connected to the cathode of the light-emitting device, and a gate of the fifth transistor is connected to the third scan signal input terminal;

[0026] Preferably, the fifth transistor is an N-type transistor;

[0027] Preferably, the second voltage input terminal is multiplexed as the second potential terminal;

[0028] Preferably, the light emitting control unit includes a sixth transistor, a gate of the sixth transistor is connected to the light emitting control signal input terminal, a first electrode of the sixth transistor is connected to the cathode of the light emitting device, and a second electrode of the sixth transistor is connected to the first electrode of the driving transistor;

[0029] Preferably, the type of the sixth transistor is opposite to that of the first transistor;

[0030] Preferably, the sixth transistor is a P-type transistor.

[0031] Optionally, the pixel circuit further includes a potential fixing unit, the second electrode of the driving transistor is connected to the first voltage input terminal via the potential fixing unit, and the potential fixing unit is used to fix the potential of the second electrode of the driving transistor.

[0032] Optionally, the potential fixing unit includes a seventh transistor, a first electrode of the seventh transistor is connected to the first voltage input terminal, a second electrode of the seventh transistor is connected to the second electrode of the driving transistor, and a gate of the seventh transistor is connected to the first scan signal input terminal;

[0033] Preferably, the seventh transistor is a P-type transistor.

[0034] In a second aspect, an embodiment of the present invention further provides a display panel comprising the pixel circuit described in the first aspect.

[0035] The technical solution of an embodiment of the present invention connects the second gate of the driving transistor to the first potential terminal, and the first potential provided by the first potential terminal is adjustable. When the threshold voltage of the first gate of the driving transistor is negative, the voltage difference between the second gate and the second terminal of the driving transistor can be adjusted to a negative value by adjusting the first potential, thereby adjusting the threshold voltage of the first gate of the driving transistor to a positive value. This allows the threshold compensation unit to still use diode compensation to compensate for the threshold voltage of the first gate of the driving transistor, thereby increasing the threshold compensation range of the pixel circuit and improving display uniformity. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0037] Figure 2 A schematic diagram of a simulation curve of a voltage difference between a second gate and a second electrode of a driving transistor and a threshold voltage of a first gate of the driving transistor provided by an embodiment of the present invention;

[0038] Figure 3 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0039] Figure 4 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0040] Figure 5 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0041] Figure 6 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0042] Figure 7 A timing diagram of a scanning signal provided by an embodiment of the present invention;

[0043] Figure 8 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0044] Figure 9 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0045] Figure 10 A schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

[0046] Figure 11 A signal timing diagram of a pixel circuit provided by an embodiment of the present invention;

[0047] Figure 12 A schematic structural diagram of a display panel provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0048] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.

[0049] Figure 1 Schematic diagram of a pixel circuit provided by an embodiment of the present invention. Figure 1 As shown, the pixel circuit includes a driving transistor T0, a first storage unit 110, a threshold compensation unit 120 and a data writing unit 130; the first gate TG of the driving transistor T0 is connected to the first storage unit 110 and the first end of the threshold compensation unit 120, the first electrode d of the driving transistor T0 is connected to the second end of the threshold compensation unit 120 and the data writing unit 130, the data writing unit 130 is used to write the data voltage into the first gate TG of the driving transistor T0 through the threshold compensation unit 120, the second gate BG of the driving transistor T0 is connected to the first potential terminal V1, the second electrode s of the driving transistor T0 is connected to the first voltage input terminal VSS, and the first potential provided by the first potential terminal V1 is adjustable.

[0050] Specifically, Figure 1 It is exemplarily shown that the driving transistor T0 is an N-type transistor. Exemplarily, the driving transistor T0 may be an oxide transistor. The driving transistor T0 may be a four-port device. In some embodiments, the first gate TG of the driving transistor T0 may be a top gate, and the second gate BG of the driving transistor T0 may be a bottom gate. Alternatively, the first gate TG of the driving transistor T0 may be a bottom gate, and the second gate BG of the driving transistor T0 may be a top gate. The first voltage input terminal VSS may provide a first voltage signal with a fixed potential, for example, a low-level voltage. When the second electrode s of the driving transistor T0 is connected to the first voltage input terminal VSS, the second electrode s of the driving transistor T0 may input a first voltage signal with a fixed potential. The second gate BG of the driving transistor T0 is connected to the first potential terminal V1. When the first potential provided by the first potential terminal V1 is adjustable, the voltage difference between the second gate BG and the second electrode s of the driving transistor T0 may be adjusted, thereby adjusting the threshold voltage of the first gate TG of the driving transistor T0. Exemplarily, Figure 2A schematic diagram of a simulation curve of the voltage difference between the second gate and the second electrode of a driving transistor and the threshold voltage of the first gate of the driving transistor provided by an embodiment of the present invention. The horizontal axis is the voltage difference V between the first gate TG and the second electrode s of the driving transistor T0. GS The vertical axis is the current I between the first electrode d and the second electrode s of the driving transistor T0 DS Different curves correspond to different voltage differences V between the second gate BG and the second electrode s of the driving transistor T0. BS On the basis that the channel width and length of the driving transistor T0 are fixed and the voltage difference between the first electrode d and the second electrode s of the driving transistor T0 is unchanged, the smaller the voltage difference between the second gate BG and the second electrode s of the driving transistor T0, the greater the threshold voltage of the first gate TG of the driving transistor T0. For example, Figure 2 In the example, the channel length L of the driving transistor T0 is 10 μm, the channel width W is 20 μm, and the voltage difference V between the first electrode d and the second electrode s of the driving transistor T0 is DS =5.1V as an example, the voltage difference V between the second gate BG and the second electrode s of the driving transistor T0 is obtained by simulation. BS Relationship with the threshold voltage of the first gate TG of the driving transistor T0.

[0051] The control terminal of the threshold compensation unit 120 is connected to the emission control signal input terminal EM, the first terminal of the data write unit 130 is connected to the data voltage input terminal DATA, the second terminal of the data write unit 130 is connected to the first electrode d of the driving transistor T0, the control terminal of the data write unit 130 is connected to the first scan signal input terminal S1, the first terminal of the first storage unit 110 is connected to the first gate TG of the driving transistor T0, and the second terminal of the first storage unit 110 is connected to the first voltage input terminal VSS. Before the threshold compensation phase of the pixel circuit operation, the driving transistor T0 is in an on state. During the threshold compensation phase of the pixel circuit operation, the emission control signal provided by the emission control signal input terminal EM controls the threshold compensation unit 120 to be in a connected state. The threshold compensation unit 120 connects the first gate TG of the driving transistor T0 and the first electrode d, so that the threshold compensation unit 120 can compensate the threshold voltage of the first gate TG of the driving transistor T0 using a diode compensation method, causing the first gate TG of the driving transistor T0 to discharge to the first voltage input terminal VSS through the threshold compensation unit 120 and the driving transistor T0, until the driving transistor T0 is turned off. At this time, the threshold voltage of the first gate TG of the driving transistor T0 is the sum of the threshold voltage of the first gate TG of the driving transistor T0 and the first voltage signal, and is stored in the first storage unit 110 to achieve threshold voltage compensation of the driving transistor T0. During the data writing phase of the pixel circuit, the first scan signal provided by the first scan signal input terminal S1 controls the data writing unit 130 to write the data voltage into the first gate TG of the driving transistor T0 through the threshold compensation unit 120, so that the driving transistor T0 forms a driving current based on the data voltage and the threshold voltage stored in the first storage unit 110, and then outputs the driving current to the light-emitting device corresponding to the pixel circuit, driving the light-emitting device to emit light. During the manufacturing process of the pixel circuit, due to process errors and other reasons, the threshold voltage of the first gate TG of the driving transistor T0 can be positive or negative. When the threshold voltage of the first gate TG of the driving transistor T0 is negative, the first potential can be adjusted so that the voltage difference between the second gate BG and the second electrode s of the driving transistor T0 is negative, thereby adjusting the threshold voltage of the first gate TG of the driving transistor T0 to a positive value, so that the threshold compensation unit 120 can still use the diode compensation method to compensate for the threshold voltage of the first gate TG of the driving transistor T0, thereby increasing the threshold compensation range of the pixel circuit and improving display uniformity.

[0052] The technical solution of this embodiment connects the second gate of the driving transistor to the first potential terminal, and the first potential provided by the first potential terminal is adjustable. When the threshold voltage of the first gate of the driving transistor is negative, the voltage difference between the second gate of the driving transistor and the second terminal can be adjusted to a negative value by adjusting the first potential, thereby adjusting the threshold voltage of the first gate of the driving transistor to a positive value. This allows the threshold compensation unit to still use diode compensation to compensate for the threshold voltage of the first gate of the driving transistor, thereby increasing the threshold compensation range of the pixel circuit and improving display uniformity.

[0053] Figure 3 Schematic diagram of a pixel circuit provided by an embodiment of the present invention. Figure 3 As shown, the pixel circuit also includes a first initialization unit 140 and a second storage unit 150; the first initialization unit 140 and the data writing unit 130 are connected to the first electrode d of the driving transistor T0 through the second storage unit 150, the first initialization unit 140 and the data writing unit 130 are turned on in a time-sharing manner, the first initialization unit 140 writes the first initialization signal to the second storage unit 150, and the data writing unit 130 writes the data voltage to the second storage unit 150; the second storage unit 150 is used to couple the data voltage after initialization according to the first initialization signal.

[0054] Specifically, such as Figure 3As shown, the first terminal of the first initialization unit 140 is connected to the first initialization signal input terminal Vint, the second terminal of the first initialization unit 140 is connected to the first terminal n of the second storage unit 150, the control terminal of the first initialization unit 140 is connected to the second scan signal input terminal S2, and the second terminal of the second storage unit 150 is connected to the first electrode d of the driving transistor T0. During the initialization phase of the pixel circuit, the second scan signal provided by the second scan signal input terminal S2 controls the first initialization unit 140 to write the first initialization signal to the first terminal n of the second storage unit 150, thereby initializing the first terminal n of the second storage unit 150. At the same time, during the threshold compensation phase of the pixel circuit, the first initialization unit 140 can continue to fix the potential of the first terminal n of the second storage unit 150 to the first initialization signal, so that when the first gate TG of the driving transistor T0 is discharged through the threshold compensation unit 120, the potential of the first terminal n of the second storage unit 150 can be fixed. During the data writing phase of the pixel circuit, the data writing unit 130 writes the data voltage to the first terminal n of the second storage unit 150, causing the potential of the first terminal n of the second storage unit 150 to jump from the first initialization signal to the data voltage. The coupling effect of the second storage unit 150 causes the potential of the first electrode d of the driving transistor T0 to jump simultaneously, and is transmitted to the first gate TG of the driving transistor T0 through the threshold compensation unit 120, so that the potential of the first gate TG of the driving transistor T0 simultaneously includes the data voltage and the threshold voltage of the first gate TG of the driving transistor T0. Because the first initialization unit 140 and the data writing unit 130 transmit the first initialization signal and the data voltage to the first terminal n of the second storage unit 160 in a time-sharing manner, the threshold compensation phase and the data writing phase of the pixel circuit can be separated. In this case, the time when the first initialization unit 140 transmits the first initialization signal can be adjusted according to the compensation time required by the pixel circuit, thereby meeting the compensation requirements of the pixel circuit and improving display uniformity. When the display panel includes multiple rows of pixel circuits, the first initialization units 140 in different rows of pixel circuits can share the compensation time, which is beneficial for the display panel to achieve high resolution and high refresh rate while meeting the compensation requirements of the pixel circuit. During the light emitting phase of the pixel circuit, the driving transistor T0 generates a driving current according to the potential of the first gate TG and the potential of the second electrode s, thereby driving the light emitting device to emit light.

[0055] Figure 4 Schematic diagram of a pixel circuit provided by an embodiment of the present invention. Figure 4As shown, the pixel circuit further includes a second initialization unit 160, a third initialization unit 170 and a light emitting control unit 180; the second initialization unit 160 is connected to the first gate TG of the driving transistor T0, and the second initialization unit 170 is used to initialize the first gate TG of the driving transistor T0 and the first storage unit 110, and initialize the second storage unit 150 through the threshold compensation unit 120; the third initialization unit 170 is connected to the cathode of the light emitting device D1, the anode of the light emitting device D1 is connected to the second voltage input terminal VDD, and the third initialization unit 170 is used to initialize the cathode of the light emitting device D1; the light emitting control unit 180 is connected between the cathode of the light emitting device D1 and the first electrode d of the driving transistor T0, and the light emitting control unit 180 is used to control the current path.

[0056] Specifically, a first terminal of the second initialization unit 160 is connected to the second initialization signal input terminal VREF1, a second terminal of the second initialization unit 160 is connected to the first gate electrode TG of the driving transistor T0, a first terminal of the third initialization unit 170 is connected to the second potential terminal V2, a second terminal of the third initialization unit 170 is connected to the first electrode d of the driving transistor T0, and a control terminal of the second initialization unit 160 and a control terminal of the third initialization unit 170 are connected to the third scan signal input terminal S3. During the initialization phase of the pixel circuit, the light emission control signal controls the threshold compensation unit 120 to be in a connected state. The third scan signal provided by the third scan signal input terminal S3 controls the second initialization unit 160 to output the second initialization signal to the first gate electrode TG of the driving transistor T0 and the first electrode of the first storage unit 110. Simultaneously, the first electrode d of the driving transistor T0 and the second terminal of the second storage unit 150 are initialized by the threshold compensation unit 120 to initialize the first initialization unit 140. At the same time, the second scan signal controls the first initialization unit 140 to output the first initialization signal to the first terminal n of the second storage unit 150, thereby turning on the driving transistor T0 and fixing the potentials at both ends of the first storage unit 110 and the second storage unit 150. Furthermore, the second potential provided by the second potential terminal V2 is transmitted to the cathode of the light-emitting device D1 via the third initialization unit 170, resetting the cathode potential of the light-emitting device D1 and improving the smear phenomenon of the display panel.

[0057] A first terminal of the light-emitting control unit 180 is connected to the cathode of the light-emitting device D1, a second terminal of the light-emitting control unit 180 is connected to the first electrode d of the driving transistor T0, and a control terminal of the light-emitting control unit 180 is connected to the light-emitting control signal input terminal EM. During the light-emitting phase of the pixel circuit, the light-emitting control signal provided by the light-emitting control signal input terminal EM controls the light-emitting control unit 180 to be in a connected state, enabling the drive current provided by the driving transistor T0 to be output to the light-emitting device D1 through the light-emitting control unit 180, thereby causing the light-emitting device D1 to emit light. Furthermore, when the driving transistor T0 generates the drive current, the potential of the second electrode s of the driving transistor T0 is fixed and is independent of the voltage across the light-emitting device D1. This prevents the equivalent impedance of the light-emitting device D1 from affecting the drive current. This prevents factors such as process uniformity and the lifespan of the light-emitting device D1 from affecting the drive current, further improving display uniformity.

[0058] In some embodiments, the second potential is adjustable. When the second potential resets the cathode potential of the light-emitting device D1 during the initialization phase, the voltage difference between the anode and cathode of the light-emitting device D1 can be adjusted, thereby adjusting the brightness of the first frame of the display panel.

[0059] Figure 5 Schematic diagram of a pixel circuit provided by an embodiment of the present invention. Figure 5 As shown, the first storage unit 110 includes a first capacitor C1 , a first electrode of the first capacitor C1 is connected to the first gate TG of the driving transistor T0 , and a second electrode of the first capacitor C1 is connected to the first voltage input terminal VSS.

[0060] Specifically, the first voltage provided by the first voltage input terminal VSS can fix the potential of the second electrode of the first capacitor C1. The first electrode of the first capacitor C1 is connected to the first gate TG of the driving transistor T0. In the initialization stage of the pixel circuit, the second initialization unit 160 initializes the first gate TG of the driving transistor T0 and the first electrode of the first capacitor C1, so that the potential of the first electrode of the first capacitor C1 is the second initialization signal, and the voltage difference between the two electrodes of the first capacitor C1 is the difference between the second initialization signal and the first voltage. In the threshold compensation stage of the pixel circuit, the potential of the first gate TG of the driving transistor T0 is discharged to the first voltage input terminal VSS through the threshold compensation unit 120 and the driving transistor T0 until the potential difference between the first gate TG of the driving transistor T0 and the second electrode s of the driving transistor T0 reaches the threshold voltage, that is, the sum of the first voltage and the threshold voltage of the first gate TG of the driving transistor T0. The driving transistor T0 is turned off. At this time, the first capacitor C1 maintains the potential of the first gate TG of the driving transistor T0, thereby achieving threshold voltage compensation of the first gate TG of the driving transistor T0.

[0061] Continue to refer Figure 5The threshold compensation unit 120 includes a first transistor T1, a first electrode of the first transistor T1 serves as a first end of the threshold compensation unit 120, a second electrode of the first transistor T1 serves as a second end of the threshold compensation unit 120, and a gate of the first transistor T1 is connected to the light emitting control signal input end EM.

[0062] Specifically, Figure 5 The first transistor T1 is exemplarily shown as an N-type transistor. When the light-emission control signal provided by the light-emission control signal input terminal EM is at a high level, the first transistor T1 is turned on; when the light-emission control signal is at a low level, the first transistor T1 is turned off. During the initialization phase, threshold compensation phase, and data writing phase of the pixel circuit, the light-emission control signal controls the first transistor T1 to be turned on, so that the first gate TG and the first electrode d of the driving transistor T0 are electrically connected. In this way, the first electrode d of the driving transistor T0 can be initialized by the second initialization unit 160 through the first transistor T1 during the initialization phase. During the threshold compensation phase, the first gate TG of the driving transistor T0 is threshold-compensated in a diode-connected manner through the first transistor T1. In addition, during the data writing phase, the data writing unit 130 writes the data voltage to the first gate TG of the driving transistor T0 through the second storage unit 150 and the first transistor T1. In some embodiments, the first transistor T1 can also be a P-type transistor. In this case, the light-emission control signal can be controlled to be at a low level during the initialization phase, threshold compensation phase, and data writing phase to control the first transistor T1 to be turned on. This will not be described in detail here.

[0063] Continue to refer Figure 5 The data writing unit 130 includes a second transistor T2, a first electrode of the second transistor T2 is connected to the data voltage input terminal DATA, a second electrode of the second transistor T2 is connected to the first electrode d of the driving transistor T0 through the second storage unit 150, and a gate of the second transistor T2 is connected to the first scan signal input terminal S1.

[0064] Specifically, Figure 5The second transistor T2 is exemplarily shown as an N-type transistor. When the first scan signal provided by the first scan signal input terminal S1 is at a high level, the second transistor T2 is turned on, and when the first scan signal is at a low level, the second transistor T2 is turned off. In the data writing phase of the pixel circuit, the first scan signal is at a high level, and the data voltage provided by the data voltage input terminal DATA is output to the first terminal n of the second storage unit 150 through the second transistor T2. The potential of the first terminal n of the second storage unit 150 jumps from the first initialization signal to the data voltage, and after the coupling effect of the second storage unit 150, it is output to the first gate TG of the driving transistor T0 through the first transistor T1, thereby realizing the writing of the data voltage. In some embodiments, the second transistor T2 can also be a P-type transistor. In this case, the first scan signal can be controlled to be a low level in the data writing phase to control the second transistor T2 to be turned on. No further details are given here.

[0065] Figure 6 Schematic diagram of a pixel circuit provided by an embodiment of the present invention. Figure 6 As shown, the first initialization unit 140 includes a third transistor T3, a first electrode of the third transistor T3 is connected to the first initialization signal input terminal Vint, a second electrode of the third transistor T3 is connected to the first electrode d of the driving transistor T0 through the second storage unit 150, and a gate of the third transistor T3 is connected to the second scan signal input terminal S2.

[0066] Specifically, Figure 6 The third transistor T3 is exemplarily shown as an N-type transistor. When the second scanning signal provided by the second scanning signal input terminal S2 is at a high level, the third transistor T3 is turned on. When the second scanning signal is at a low level, the third transistor T3 is turned off. In the initialization stage and the threshold compensation stage of the pixel circuit, the second scanning signal is at a high level, which controls the third transistor T3 to be turned on. The first initialization signal is transmitted to the first terminal n of the second storage unit 150 through the third transistor T3, so that the potential of the first terminal n of the second storage unit 150 can be fixed, so that the potential change at both ends of the second storage unit 150 can be determined in the data writing stage. In some embodiments, the third transistor T3 can also be a P-type transistor. In this case, the second scanning signal can be controlled to be at a low level in the data writing stage to control the third transistor T3 to be turned on. No further details are given here.

[0067] Continue to refer Figure 6 The second storage unit 150 includes a second capacitor C2, and the first initialization unit 140 and the data writing unit 130 are connected to the first electrode d of the driving transistor T0 through the second capacitor C2.

[0068] Specifically, the first electrode of the second capacitor C2 serves as the first terminal n of the first initialization unit 140 and is connected to the second terminal of the data writing unit 130 and the second terminal of the first initialization unit 140. The second electrode of the second capacitor C2 serves as the second terminal of the first initialization unit 140 and is connected to the first electrode d of the driving transistor T0. The second capacitor C2 has a coupling effect. When the potential of the first electrode of the second capacitor C2 jumps from the first initialization signal to the data voltage, the potential of the second electrode of the second capacitor C2 also jumps, so that the data voltage can be coupled to the second electrode of the second capacitor C2 and then transmitted to the first gate TG of the driving transistor T0 through the threshold compensation unit 120. Therefore, the data voltage can be written into the first gate TG of the driving transistor T0, thereby realizing the writing of the data voltage.

[0069] Figure 7 A timing diagram of a scanning signal provided by an embodiment of the present invention. Among them, s1 is a timing diagram of the first scanning signal, s21 is a timing diagram of the second scanning signal corresponding to a row of pixel circuits, and s22 is a timing diagram of the second scanning signal corresponding to the next row of pixel circuits. Figure 7 As shown, in one frame, the effective level of the second scan signal provided by the second scan signal input terminal S2 is earlier than the effective level of the first scan signal provided by the first scan signal input terminal S1.

[0070] Specifically, the third transistor T3 and the second transistor T2 are both N-type transistors for illustration. At this time, the effective levels of the second scanning signal and the first scanning signal are both high. In the initialization phase and the threshold compensation phase of the pixel circuit, the second scanning signal is high and the first scanning signal is low, so that the third transistor T3 is turned on, the second transistor T2 is turned off, and the first electrode potential of the second capacitor C2 is maintained at the first initialization signal. In the data writing phase, the first scanning signal is high and the second scanning signal is low, so that the second transistor T2 is turned on, the third transistor T3 is turned off, and the first electrode potential of the second capacitor C2 jumps to the data voltage, thereby realizing the writing of the data voltage. By setting the second transistor T2 and the third transistor T3 to be controlled by different scanning signals, the threshold compensation phase and the data writing phase of the pixel circuit can be separated, so that the time of the threshold compensation phase can be adjusted according to the threshold compensation requirements, which is conducive to improving the threshold compensation effect of the pixel circuit.

[0071] Continue to refer Figure 7 , the effective level start time of the second scanning signal corresponding to the pixel circuit of the previous row is one row earlier than the effective level start time of the second scanning signal corresponding to the pixel circuit of the current row.

[0072] Specifically, the display panel may include multiple rows of pixel circuits. A frame time may include the scanning time for each row and vertical blanking. The second scanning signals corresponding to different rows of pixel circuits are shifted row by row, so that the time difference between the effective levels of the second scanning signals corresponding to different rows of pixel circuits is only the scanning time of one row of pixel circuits. This allows the second scanning signals of different rows of pixel circuits to share a portion of the compensation time, which is conducive to achieving high resolution and high refresh rate of the display panel.

[0073] In some embodiments, the effective level time of the second scanning signal is adjustable, so that when the threshold voltage of the first gate TG of the driving transistor T0 changes, the effective level time of the second scanning signal can be adjusted to ensure that the time of the threshold compensation stage meets the threshold voltage compensation requirements, thereby improving the display uniformity of the display panel.

[0074] Figure 8 Schematic diagram of a pixel circuit provided by an embodiment of the present invention. Figure 8 As shown, the second initialization unit 160 includes a fourth transistor T4; the first electrode of the fourth transistor T4 is connected to the second initialization signal input terminal VREF2, the second electrode of the fourth transistor T4 is connected to the first gate TG of the driving transistor T0, and the gate of the fourth transistor T4 is connected to the third scan signal input terminal S3.

[0075] Specifically, Figure 8 The fourth transistor T4 is exemplarily shown as an N-type transistor. When the third scan signal provided by the third scan signal input terminal S3 is at a high level, the fourth transistor T4 is turned on. When the third scan signal is at a low level, the fourth transistor T4 is turned off. During the initialization phase of the pixel circuit, the third scan signal is at a high level, controlling the fourth transistor T4 to be turned on. The fourth transistor T4 outputs the second initialization signal provided by the second output signal input terminal VREF2 to the first gate TG of the driving transistor T0 and the first electrode of the first capacitor C1, thereby initializing the first gate TG of the driving transistor T0 and the first electrode of the first capacitor C1. At the same time, the light-emitting control signal controls the first transistor T1 to be turned on, so that the fourth transistor T4 initializes the first electrode d of the driving transistor T0 through the first transistor T1, thereby initializing the first capacitor C1, the first gate TG of the driving transistor T0, and the first electrode d. In some embodiments, the fourth transistor T4 can also be a P-type transistor. In this case, the third scan signal can be controlled to be at a low level during the initialization phase to control the fourth transistor T4 to be turned on. This will not be described in detail here.

[0076] In some embodiments, the second initialization signal provided by the second initialization signal input terminal VREF2 is greater than the sum of the first voltage provided by the first voltage input terminal VSS and the threshold voltage of the driving transistor T0 .

[0077] Specifically, during the initialization phase, the potential of the second electrode s of the driving transistor T0 is a first voltage, and the potential of the first gate TG of the driving transistor T0 is a second initialization signal. By setting the second initialization signal to be greater than the sum of the first voltage and the threshold voltage of the driving transistor T0, the driving transistor T0 can be turned on after the initialization phase. Thus, during the threshold compensation phase, the voltage can be discharged through the driving transistor T0 to the first voltage input terminal VSS, thereby achieving threshold compensation of the first gate TG of the driving transistor T0.

[0078] Continue to refer Figure 8 The third initialization unit 170 includes a fifth transistor T5, a first electrode of the fifth transistor T5 is connected to the second potential terminal V2, a second electrode of the fifth transistor T5 is connected to the cathode of the light emitting device D1, and a gate of the fifth transistor T5 is connected to the third scan signal input terminal S3.

[0079] Specifically, Figure 8 The fifth transistor T5 is exemplarily shown as an N-type transistor. When the third scan signal input terminal S3 is at a high level, the fifth transistor T5 is turned on, and when the third scan signal input terminal S3 is at a low level, the fifth transistor T5 is turned off. The second potential provided by the second potential terminal V2 can be a fixed potential. The anode of the light-emitting device D1 is connected to the second voltage input terminal VDD, so that the anode potential of the light-emitting device D1 is the second voltage. During the initialization stage of the pixel circuit, the third scan signal is at a high level, which controls the fifth transistor T5 to be turned on. The fifth transistor T5 outputs the second potential provided by the second potential terminal V2 to the cathode of the light-emitting device D1, so that the cathode potential of the light-emitting device D1 is greater than the difference between the second voltage and the on-state voltage of the light-emitting device D1, thereby turning off the light-emitting device D1 and preventing the light-emitting device D1 from being secretly lit.

[0080] Figure 9 Schematic diagram of a pixel circuit provided by an embodiment of the present invention. Figure 9 As shown, the second voltage input terminal VDD is multiplexed as the second potential terminal V2.

[0081] Specifically, when the second voltage input terminal VDD is multiplexed as the second potential terminal V2, the cathode potential of the light-emitting device D1 is equal to the anode potential, and the light-emitting device D1 is also turned off. This also avoids the need for an additional signal line corresponding to the second potential terminal V2, simplifying the wiring of the display panel.

[0082] Continue to refer Figure 9 The light emitting control unit 180 includes a sixth transistor T6, a gate of the sixth transistor T6 is connected to the light emitting control signal input terminal EM, a first electrode of the sixth transistor T6 is connected to the cathode of the light emitting device D1, and a second electrode of the sixth transistor T6 is connected to the first electrode d of the driving transistor T0.

[0083] Specifically, the type of the sixth transistor T6 is different from that of the first transistor T1. When the gates of the first transistor T1 and the sixth transistor T6 are both connected to the light-emitting control signal input terminal EM, the first transistor T1 and the sixth transistor T6 can be controlled to be turned on in a time-sharing manner to meet the operating requirements of the pixel circuit. Figure 9 The figure exemplarily shows that the first transistor T1 is an N-type transistor and the sixth transistor T6 is a P-type transistor. During the light-emitting phase of the pixel circuit, the light-emitting control signal provided by the light-emitting control signal input terminal EM is at a low level, the first transistor T1 is turned off, and the sixth transistor T6 is turned on. The driving current provided by the driving transistor T0 can be transmitted to the light-emitting device D1 through the sixth transistor T6, driving the light-emitting device D1 to emit light.

[0084] It should be noted that, in other embodiments, the gate of the first transistor T1 and the gate of the sixth transistor T6 can be connected to different signal input terminals respectively. In this case, the types of the first transistor T1 and the sixth transistor T6 can be matched with the signals provided by the corresponding connected signal input terminals, thereby meeting the requirements of the pixel circuit.

[0085] Figure 10 Schematic diagram of a pixel circuit provided by an embodiment of the present invention. Figure 10 As shown, the pixel circuit further includes a potential fixing unit 190 , through which the second electrode s of the driving transistor T0 is connected to the first voltage input terminal VSS. The potential fixing unit 190 is used to fix the potential of the second electrode of the driving transistor T0 .

[0086] Specifically, the second electrode s of the driving transistor T0 is connected to the first voltage input terminal VSS via the potential fixing unit 190. During the initialization and threshold compensation stages, the first voltage can be controlled to be provided to the second electrode s of the driving transistor T0 via the potential fixing unit 190, so that the second electrode s of the driving transistor T0 has a fixed potential, thereby improving the initialization and threshold compensation effects of the driving transistor T0. During the light-emitting stage, the potential fixing unit 190 can also conduct electricity between the second electrode s of the driving transistor T0 and the first voltage input terminal VSS, so that the driving current of the driving transistor T0 has a current loop between the first voltage input terminal VSS and the second voltage input terminal VDD, thereby driving the light-emitting device D1 to emit light.

[0087] Continue to refer Figure 10 The potential fixing unit 190 includes a seventh transistor T7, a first electrode of the seventh transistor T7 is connected to the first voltage input terminal VSS, a second electrode of the seventh transistor T7 is connected to the second electrode s of the driving transistor T0, and a gate of the seventh transistor T7 is connected to the first scan signal input terminal S1.

[0088] Specifically, the type of the seventh transistor T7 is different from that of the second transistor T2. When the gate of the seventh transistor T7 and the gate of the second transistor T2 are both connected to the first scan signal input terminal S1, the seventh transistor T7 and the second transistor T2 can be controlled to be turned on in a time-sharing manner to meet the working requirements of the pixel circuit. Figure 10 The example shows that the second transistor T2 is an N-type transistor and the seventh transistor T7 is a P-type transistor. In the initialization stage and the threshold compensation stage, the first scan signal is at a low level, so that the second transistor T2 is turned off and the seventh transistor T7 is turned on, which not only controls the potential of the second electrode s of the driving transistor T0 to be fixed, but also prevents the data voltage from being written to the first end of the second capacitor C2. In the data writing stage, the first scan signal is at a high level, so that the second transistor T2 is turned on and the seventh transistor T7 is turned off, and the data voltage can be written to the first electrode of the second capacitor C2 through the second transistor T2. In the light-emitting stage, the first scan signal is at a low level, so that the second transistor T2 is turned off and the seventh transistor T7 is turned on. The seventh transistor T7 can provide a current loop between the first voltage input terminal VSS and the second electrode s of the driving transistor T0 for the driving current provided by the driving transistor T0.

[0089] Figure 11 The following is a signal timing diagram of a pixel circuit provided by an embodiment of the present invention. Among them, s1 is the timing diagram of the first scanning signal, s2 is the timing diagram of the second scanning signal, s3 is the timing diagram of the third scanning signal, and em is the timing diagram of the light emitting control signal. Figure 10 and Figure 11 Describe the working process of the pixel circuit.

[0090] In the initialization phase t1, the first scan signal is at a low level, the second scan signal is at a high level, the third scan signal is at a high level, and the light-emitting control signal is at a high level. At this time, the first transistor T1, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the seventh transistor T7 are turned on, and the second transistor T2 and the sixth transistor T6 are turned off. The first initialization signal is transmitted to the first electrode of the second capacitor C2 via the third transistor T3, and the second initialization signal is transmitted to the first gate TG of the driving transistor T0 and the first electrode of the first capacitor C1 via the fourth transistor T4, and is transmitted to the first electrode d of the driving transistor T0 via the first transistor T1, i.e., the second electrode of the second capacitor C2, to initialize the first capacitor C1, the second capacitor C2, and the first gate TG and the first electrode d of the driving transistor T0, and the driving transistor T0 is in the on state.

[0091] In the threshold compensation phase t2, the first scanning signal is at a low level, the second scanning signal is at a high level, the third scanning signal is at a low level, and the light-emitting control signal is at a high level. At this time, the first transistor T1, the third transistor T3, and the seventh transistor T7 are turned on, and the second transistor T2, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are turned off. The first initialization signal continues to be transmitted to the first electrode of the second capacitor C2 through the third transistor T3, maintaining the potential of the first electrode of the second capacitor C2 unchanged. At the same time, the potential of the first gate TG of the driving transistor T0 is discharged to the first voltage input terminal VSS through the first transistor T1, the driving transistor T0, and the seventh transistor T7 until the potential of the first gate TG of the driving transistor T0 is the sum of the first voltage and the threshold voltage of the first gate TG of the driving transistor T0, that is, Vth+Vss, where Vss is the first voltage. The driving transistor T0 is turned off. The first capacitor C1 stores the potential of the first gate TG of the driving transistor T0.

[0092] During the data writing phase t3, the first scan signal is high, the second scan signal is low, the third scan signal is low, and the light-emitting control signal is high. At this point, the first transistor T1 and the second transistor T2 are turned on, while the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are turned off. The data voltage is written to the first electrode of the second capacitor C2 via the second transistor T2, and the potential of the first electrode of the second capacitor C2 changes from the first initialization signal to the data voltage. Simultaneously, the first transistor T1 is turned on, connecting the first gate TG of the driving transistor T0 to the second electrode of the second capacitor C2. Through the coupling effect of the second capacitor C2, the potential of the first gate TG of the driving transistor T0 is Vtg = Vss + Vth + c2 / (c2 + c1) × (Vdata - vint), where c1 is the capacitance of the first capacitor C1, c2 is the capacitance of the second capacitor C2, Vdata is the data voltage provided by the data voltage input terminal DATA, and vint is the first initialization signal.

[0093] In the light-emitting stage t4, the first scanning signal is at a low level, the second scanning signal is at a low level, the third scanning signal is at a low level, and the light-emitting control signal is at a low level. At this time, the sixth transistor T6 and the seventh transistor T7 are turned on, and the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are turned off. The potential of the second electrode s of the driving transistor T0 is the first voltage, the driving transistor T0 is turned on, and a driving current is generated according to the voltage difference between the first gate TG and the second electrode s. Driving current I = 1 / 2*u×Cox×W / L×(Vgs-Vth) 2 =1 / 2*u×Cox×W / L×(Vg-Vs-Vth) 2=1 / 2*u×Cox×W / L×(c2 / (c1+c2)×(Vdata-vint)) 2 . Wherein, Vg is the potential of the first gate TG of the driving transistor T0, Vs is the potential of the second electrode s of the driving transistor T0, Vgs is the potential difference between the first gate TG and the second electrode s of the driving transistor T0, and u is the average drift velocity of the carriers in the driving transistor T0 under a unit electric field. Cox is the channel capacitance per unit area of ​​the driving transistor T0. W / L is the channel width-to-length ratio of the driving transistor T0. It can be seen from the formula of the driving current that the driving current is not affected by the first voltage and the second voltage, and is not affected by the conduction voltage drop of the light-emitting device D1, which improves the stability of the driving current and thereby improves the display consistency of the display panel. After the driving transistor T0 forms the driving current, the driving current is transmitted to the light-emitting device D1 through the sixth transistor T6, driving the light-emitting device D1 to emit light.

[0094] An embodiment of the present invention further provides a display panel. Figure 12 Schematic diagram of the structure of a display panel provided by an embodiment of the present invention. Figure 12 As shown, the display panel 100 includes the pixel circuit 10 provided by any embodiment of the present invention. Since the display panel 100 includes the pixel circuit 10 provided by any embodiment of the present invention, it has the same beneficial effects as the pixel circuit 10 provided by any embodiment of the present invention, and will not be described in detail here. The display panel 100 can be, for example, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a smart wearable device, an information inquiry machine in a public place lobby, or any other product or component with a display function.

[0095] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A pixel circuit, characterized in that: comprising a driving transistor, a first storage unit, a threshold compensation unit and a data writing unit; The first gate of the driving transistor is connected to the first storage unit and the first end of the threshold compensation unit, the first electrode of the driving transistor is connected to the second end of the threshold compensation unit and the data writing unit, the data writing unit is used to write the data voltage into the first gate of the driving transistor through the threshold compensation unit, the second gate of the driving transistor is connected to the first potential end, the second electrode of the driving transistor is connected to the first voltage input end, and the first potential provided by the first potential end is adjustable; Also included is a second storage unit; The threshold compensation unit includes a first transistor, a first electrode of the first transistor serves as a first end of the threshold compensation unit, a second electrode of the first transistor serves as a second end of the threshold compensation unit, and a gate of the first transistor is connected to a light emitting control signal input end; The first transistor is an N-type transistor; The data writing unit includes a second transistor, a first electrode of the second transistor is connected to the data voltage input terminal, a second electrode of the second transistor is connected to the first electrode of the driving transistor through the second storage unit, and a gate of the second transistor is connected to the first scanning signal input terminal; The second transistor is an N-type transistor; The light emitting control unit includes a sixth transistor, a gate of the sixth transistor is connected to the light emitting control signal input terminal, a first electrode of the sixth transistor is connected to the cathode of the light emitting device, and a second electrode of the sixth transistor is connected to the first electrode of the driving transistor; The type of the sixth transistor is opposite to the type of the first transistor; The sixth transistor is a P-type transistor; It also includes a potential fixing unit, the second electrode of the driving transistor is connected to the first voltage input terminal through the potential fixing unit, and the potential fixing unit is used to fix the potential of the second electrode of the driving transistor; The potential fixing unit includes a seventh transistor, a first electrode of the seventh transistor is connected to the first voltage input terminal, a second electrode of the seventh transistor is connected to the second electrode of the driving transistor, and a gate of the seventh transistor is connected to the first scan signal input terminal; The seventh transistor is a P-type transistor.

2. The pixel circuit according to claim 1, wherein: It also includes a first initialization unit; the first initialization unit and the data writing unit are connected to the first electrode of the driving transistor through the second storage unit, the first initialization unit and the data writing unit are turned on in time-sharing mode, the first initialization unit is used to write a first initialization signal to the second storage unit, and the data writing unit is used to write the data voltage to the second storage unit; the second storage unit is used to couple the data voltage after initialization according to the first initialization signal.

3. The pixel circuit according to claim 2, wherein: It also includes a second initialization unit, a third initialization unit and a light emitting control unit; The second initialization unit is connected to the first gate of the driving transistor, and is used to initialize the first gate of the driving transistor and the first storage unit, and initialize the second storage unit through the threshold compensation unit; The third initialization unit is connected to the cathode of the light-emitting device, the anode of the light-emitting device is connected to the second voltage input terminal, and the third initialization unit is used to initialize the cathode of the light-emitting device; The light emitting control unit is connected between the cathode of the light emitting device and the first electrode of the driving transistor, and is used to control a current path.

4. The pixel circuit according to claim 3, wherein: The first storage unit includes a first capacitor, a first electrode of the first capacitor is connected to the first gate of the driving transistor, and a second electrode of the first capacitor is connected to the first voltage input terminal.

5. The pixel circuit according to claim 4, wherein: The first initialization unit includes a third transistor, a first electrode of the third transistor is connected to the first initialization signal input terminal, a second electrode of the third transistor is connected to the first electrode of the driving transistor through the second storage unit, and a gate of the third transistor is connected to the second scan signal input terminal.

6. The pixel circuit according to claim 5, wherein: The second storage unit includes a second capacitor, and the first initialization unit and the data writing unit are connected to the first electrode of the driving transistor via the second capacitor.

7. The pixel circuit according to claim 5, wherein: The third transistor is an N-type transistor.

8. The pixel circuit according to claim 5, wherein: In one frame, the effective level of the second scanning signal provided by the second scanning signal input terminal is earlier than the effective level of the first scanning signal provided by the first scanning signal input terminal.

9. The pixel circuit according to claim 8, wherein: The effective level time of the second scanning signal is adjustable.

10. The pixel circuit according to claim 9, wherein: The effective level start time of the second scanning signal corresponding to the pixel circuits in the previous row is one row earlier than the effective level start time of the second scanning signal corresponding to the pixel circuits in the current row.

11. The pixel circuit according to claim 4, wherein: The second initialization unit includes a fourth transistor; a first electrode of the fourth transistor is connected to the second initialization signal input terminal, a second electrode of the fourth transistor is connected to the first gate of the driving transistor, and a gate of the fourth transistor is connected to the third scan signal input terminal.

12. The pixel circuit according to claim 11, wherein: The second initialization signal provided by the second initialization signal input terminal is greater than the sum of the first voltage provided by the first voltage input terminal and the threshold voltage of the driving transistor.

13. The pixel circuit according to claim 12, wherein: The fourth transistor is an N-type transistor.

14. The pixel circuit according to claim 13, wherein: The third initialization unit includes a fifth transistor, a first electrode of the fifth transistor is connected to the second potential terminal, a second electrode of the fifth transistor is connected to the cathode of the light emitting device, and a gate of the fifth transistor is connected to the third scan signal input terminal.

15. The pixel circuit according to claim 14, wherein: The fifth transistor is an N-type transistor.

16. The pixel circuit according to claim 15, wherein: The second voltage input terminal is multiplexed as the second potential terminal.

17. A display panel, characterized in that: The pixel circuit comprises the pixel circuit according to any one of claims 1 to 16.

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