Dry etching equipment and wafer etching method
By introducing a thermal conduction ring into the dry etching device to reduce the temperature of the wafer limit edge, the problem of characteristic size and trench depth deviation in the dry etching technology is solved, and a more uniform etching effect and higher device yield are achieved.
Patent Information
- Application Number
- CN202311313324.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-10-10
- Publication Date
- 2025-04-11
AI Technical Summary
The existing dry etching technology has deviations in the feature size and trench depth at the wafer limit edge, resulting in a decrease in device yield and a worse process accuracy.
A dry etching device is designed, including a thermal conduction ring, a base ring, a focus ring and a wafer heating and bearing abutment. The thermal conduction ring is arranged between the base ring and the focus ring and contacts the wafer heating and bearing abutment. The temperature of the wafer edge is reduced by physically conducting heat and slows down the chemical reaction rate.
By reducing the temperature of the wafer limit edge, the uniformity of feature size and trench depth is improved, and the yield and process accuracy of the device are improved.
Smart Images
Figure CN119811970A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the semiconductor field, and in particular to a dry etching device and a wafer etching method. Background Art
[0002] The shallow trench isolation process is a common semiconductor isolation technology. Its main feature is to form some shallow trenches on the surface of the wafer to achieve the effect of protecting the device and reducing the electronic interference between devices.
[0003] At present, the shallow trench isolation process adopts dry etching, and the current etching has the following problems: first, the critical dimension (CD) at the extreme edge of the wafer (wafer radius R≥143mm) is smaller than that at the center of the wafer, and deviates greatly from the center area of the wafer; second, the groove depth at the extreme edge of the wafer (wafer radius R≥143mm) is deeper than that at the center of the wafer, and deviates greatly from the center area of the wafer. These problems will in turn lead to the following problems: First, the shallow trench resistance in the extreme edge area of the wafer increases, resulting in a decrease in device yield; second, the overlay accuracy of the polysilicon gate lithography process deteriorates, and it will also affect the overlay accuracy of subsequent process layers, which will directly affect the device yield; third, the F1Pad measurement area of the shallow trench chemical mechanical polishing is distorted, resulting in silicon nitride residue and defects, affecting the device yield; fourth, if exposure measurement correction (Dose Mapper, Doma) is used to compensate for the trench depth in the edge area, it will cause center compensation distortion and introduce bridging defects, causing the patterns to contact each other and generate leakage current.
[0004] Therefore, how to improve the characteristic size of the wafer limit edge and the groove depth is a technical problem that needs to be solved urgently by those skilled in the art. Summary of the invention
[0005] The purpose of this application is to provide a dry etching device and a wafer etching method to improve the uniformity of the characteristic dimensions and groove depth in the extreme edge area and center area of the wafer and improve the yield.
[0006] In order to solve the above technical problems, the present application provides a dry etching device, including a wafer heating and carrying base, a base ring, a focusing ring, and a heat conducting ring;
[0007] The base ring surrounds the wafer heating and carrying base; the focusing ring is arranged on the upper surface of the base ring; the heat conductive ring is arranged between the base ring and the focusing ring, and the heat conductive ring is in contact with the wafer heating and carrying base on a side close to the wafer heating and carrying base.
[0008] Optionally, the cross section of the heat-conducting ring is in an inverted T-shape, and the heat-conducting ring comprises a horizontal heat conductor and a vertical heat conductor that intersect vertically;
[0009] The outer side surface and the lower surface of the vertical heat conductor are in contact with the wafer heating and carrying base; the upper surface of the horizontal heat conductor, the upper surface of the vertical heat conductor and the target area of the inner side surface of the vertical heat conductor are in contact with the focusing ring;
[0010] The target area of the inner side surface of the vertical heat conductor is an area of the inner side surface of the vertical heat conductor located above the horizontal heat conductor.
[0011] Optionally, the horizontal heat conductor and the vertical heat conductor are rectangular.
[0012] Optionally, the length range of the horizontal heat conductor is 4.5 mm to 4.7 mm, and the width range of the horizontal heat conductor is 0.2 mm to 0.4 mm; the length range of the vertical heat conductor is 0.3 mm to 0.5 mm, and the width range of the horizontal heat conductor is 4 mm to 4.5 mm.
[0013] Optionally, the target areas of the outer side surface, the lower surface, the upper surface of the vertical heat conductor and the inner side surface of the vertical heat conductor are curved surfaces; and the upper surface of the horizontal heat conductor is a curved surface.
[0014] Optionally, the curved surface includes a spherical surface, an ellipsoidal surface, a wavy surface, or a sawtooth surface.
[0015] Optionally, the material of the heat conductive ring includes: silicon carbide and anodized aluminum.
[0016] Optionally, the cross-section of the heat conductive ring is rectangular.
[0017] Optionally, the height range of the focusing ring is 7 mm to 7.5 mm.
[0018] The present application also provides a wafer etching method, which is performed based on any of the above-mentioned dry etching devices, and includes:
[0019] Placing a wafer on a wafer heating and carrying base of the dry etching equipment;
[0020] The wafer is etched using the dry etching equipment to form grooves on the wafer.
[0021] A dry etching device provided in the present application includes a wafer heating and carrying base, a base ring, a focusing ring, and a heat-conducting ring; the base ring surrounds the wafer heating and carrying base; the focusing ring is arranged on the upper surface of the base ring; the heat-conducting ring is arranged between the base ring and the focusing ring, and the heat-conducting ring is in contact with the wafer heating and carrying base on a side close to the wafer heating and carrying base.
[0022] It can be seen that the dry etching equipment in the present application includes a heat-conducting ring, which is arranged between the base ring and the focusing ring and is in contact with the wafer heating and the supporting base. The heat-conducting ring can conduct heat from the wafer heating and the supporting base and the focusing ring, thereby reducing the temperature of the wafer limit edge, so as to reduce the chemical reaction rate, thereby improving the performance of the characteristic size and groove depth of the wafer limit edge, so that the difference between the characteristic size and groove depth of the wafer limit edge and the characteristic size and groove depth of the central area is reduced, thereby improving the yield of the device.
[0023] In addition, the present application also provides a wafer etching method having the above advantages. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to more clearly illustrate the embodiments of the present application or the technical solutions of the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0025] Figure 1 It is a schematic diagram of the local structure of a dry etching device in the related art;
[0026] Figure 2 This is a characteristic line width dimension diagram at different positions of the wafer after the shallow trench etching process is performed using dry etching equipment in the relevant technology;
[0027] Figure 3 This is a trench depth map at different positions of the wafer after the shallow trench etching process is performed using dry etching equipment in the relevant technology;
[0028] FIG4( a ) is a schematic cross-sectional view of the center area of a wafer after a shallow trench etching process is performed using a dry etching device in the related art;
[0029] FIG4( b ) is a schematic cross-sectional view of the wafer edge region after a shallow trench etching process is performed using a dry etching device in the related art;
[0030] FIG5(a) is a schematic cross-sectional view of the center area of a wafer after a shallow trench etching process is performed using a dry etching device in the related art and oxide is filled in the trench;
[0031] FIG5( b ) is a schematic cross-sectional view of the wafer edge region after a shallow trench etching process is performed using a dry etching device in the related art and after oxide is filled in the trench;
[0032] Figure 6 A schematic diagram of the local structure of a dry etching device provided in an embodiment of the present application Figure 1 ;
[0033] Figure 7 A schematic diagram of the local structure of a dry etching device provided in an embodiment of the present application Figure 2 ;
[0034] Figure 8 A schematic diagram of the structure of a heat-conducting ring provided in an embodiment of the present application;
[0035] Fig. 9 A schematic diagram of the etching process using dry etching equipment in the related art;
[0036] Fig.10 A schematic diagram of the etching process using the dry etching equipment provided in the embodiment of the present application;
[0037] Fig.11 A comparison chart of etching rates at different positions on a wafer when a shallow trench etching process is performed using a dry etching device provided in an embodiment of the present application and in related technologies;
[0038] Fig.12 A comparison diagram of characteristic line width dimensions at different positions of a wafer when a shallow trench etching process is performed using the dry etching equipment provided in the embodiments of the present application and in related technologies;
[0039] In the figure, 1. wafer heating and supporting base, 2. base ring, 3. focusing ring, 4. wafer, 5. thermal conductive ring, 51. horizontal thermal conductor, 52. vertical thermal conductor, 6. silicon substrate, 7. first silicon oxide layer, 8. silicon nitride layer, 9. second silicon oxide layer, 10. third silicon oxide layer, 11. coil. DETAILED DESCRIPTION
[0040] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.
[0041] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.
[0042] At present, the shallow trench isolation process adopts dry etching, and the dry etching equipment includes a wafer heating and carrying base 1, a base ring 2, and a focusing ring 3. Figure 1As shown, the wafer is placed on the wafer heating and supporting base. The current etching has the following problems: First, the feature size at the extreme edge of the wafer (wafer radius R ≥ 143mm) is smaller than that at the center of the wafer, and the deviation from the center area of the wafer is large; second, the groove depth at the extreme edge of the wafer (wafer radius R ≥ 143mm) is deeper than that at the center of the wafer, and the deviation from the center area of the wafer is large, such as Figure 2 As shown in Figure 5. Figure 2 The horizontal axis is the distance from the center of the wafer, and the vertical axis is the feature size. Figure 2 It can be seen that the feature size is significantly reduced in the edge area of the wafer. Figure 3 The horizontal axis is the distance from the center of the wafer, and the vertical axis is the depth of the groove. Figure 3 It can be seen that the groove depth increases significantly in the edge area of the wafer. Figure 4(a) is a cross-sectional schematic diagram of the center area of the wafer after the shallow trench etching process, with the first silicon oxide layer 7 and the silicon nitride layer 8 deposited on the silicon substrate 6. Figure 4(b) is a cross-sectional schematic diagram of the extreme edge area of the wafer after the shallow trench etching process, with the first silicon oxide layer 7 and the silicon nitride layer 8 deposited on the silicon substrate 6. It can be seen from Figures 4(a) and 4(b) that the groove depth in the extreme edge area of the wafer is greater than that in the center area. Figure 5(a) is a cross-sectional schematic diagram of the center area of the wafer after the second silicon oxide layer 9 and the third silicon oxide layer 10 are filled in the groove. Figure 5(b) is a cross-sectional schematic diagram of the extreme edge area of the wafer after the second silicon oxide layer 9 and the third silicon oxide layer 10 are filled in the groove. It can be seen from Figures 5(a) and 5(b) that the groove depth in the extreme edge area of the wafer is greater than that in the center area after the filling.
[0043] One of the fundamental reasons for the above problems is as follows: First, during the plasma etching process, the movement of electrons in the plasma etching chamber is disordered, and a tip effect is easily generated at the edge of the wafer, causing charge accumulation, increased potential, and changes in the direction of the electric field, thereby causing electric field distortion and resulting in distortion of the plasma sheath.
[0044] Second, during the shallow trench isolation dry etching process, the high temperature generated by the high plasma density at the extreme edge of the wafer, as well as the high temperature generated by the wafer heating and the supporting base cannot be conducted away in time, so more heat accumulates at the extreme edge of the wafer than in the central area. In the shallow trench etching process, the film etching from top to bottom is an endothermic reaction, so the chemical etching rate at the extreme edge of the wafer is significantly higher than that in the central area of the wafer.
[0045] Therefore, due to the dual increase in chemical etching and physical bombardment rates at the extreme edge of the wafer, the etching rate at the extreme edge of the wafer increases exponentially, which leads to a large difference in the feature size and groove depth of the edge area compared with the central area.
[0046] In view of this, the present application provides a dry etching device, please refer to Figure 6 and Figure 7 , including a wafer heating and carrying base 1, a base ring 2, a focusing ring 3, and a heat conducting ring 5;
[0047] The base ring 2 surrounds the wafer heating and carrying base 1; the focusing ring 3 is arranged on the upper surface of the base ring 2; the thermal conductive ring 5 is arranged between the base ring 2 and the focusing ring 3, and the thermal conductive ring 5 is in contact with the wafer heating and carrying base 1 on the side close to the wafer heating and carrying base 1.
[0048] The dry etching device in the present application is a plasma etching device, and the dry etching device also includes other components such as a coil 11 disposed above the wafer heating and supporting base 1. For details, please refer to the relevant technology and will not be described in detail here. The setting position of the coil 11 is as follows: Fig.10 shown.
[0049] The wafer heating and carrying base 1 is used to carry the wafer 4 and heat the wafer 4 .
[0050] The heat-conducting ring 5 is arranged between the base ring 2 and the focusing ring 3. The heat-conducting ring 5 is in contact with the focusing ring 3, and one side of the heat-conducting ring 5 is in contact with the wafer heating and supporting base 1. Therefore, the heat-conducting ring 5 can timely extract the heat of the wafer heating and the supporting base 1 and the edge of the focusing ring 3 by physical heat transfer, reduce the temperature of the edge of the wafer 4, and then reduce the chemical reaction rate, thereby improving the characteristic size of the edge of the wafer 4, the uniformity of the groove depth and the center area.
[0051] The material of the heat conductive ring 5 includes but is not limited to silicon carbide, anodized aluminum and other materials with high strength, high hardness, good corrosion resistance, excellent wear resistance, good high temperature stability and excellent thermal conductivity.
[0052] It should be noted that the shape of the heat conducting ring 5 in this embodiment is not specifically limited and can be set at will.
[0053] As an implementation method, Figure 6 As shown, the cross section of the heat conducting ring 5 is rectangular.
[0054] As another possible implementation, Figure 7 As shown, the cross section of the heat-conducting ring 5 is an inverted T-shape, and the heat-conducting ring 5 includes a horizontal heat-conducting body 51 and a vertical heat-conducting body 52 that intersect vertically;
[0055] The outer side surface and the lower surface of the vertical heat conductor 52 are in contact with the wafer heating and carrying base 1; the upper surface of the horizontal heat conductor 51, the upper surface of the vertical heat conductor 52 and the target area of the inner side surface of the vertical heat conductor 52 are in contact with the focusing ring 3;
[0056] The target area of the inner side surface of the vertical heat conductor 52 is an area where the inner side surface of the vertical heat conductor 52 is located above the horizontal heat conductor 51 .
[0057] The inverted T-shape in this embodiment is obtained by rotating the T-shape 90 degrees to the right.
[0058] The outer side surface of the vertical heat conductor 52 is the surface of the vertical heat conductor 52 facing away from the horizontal heat conductor 51 ; the inner side surface of the vertical heat conductor 52 is the surface opposite to the horizontal heat conductor 51 , that is, the surface in contact with the horizontal heat conductor 51 .
[0059] Setting the cross section of the heat-conducting ring 5 to an inverted T-shape can increase the contact area between the heat-conducting ring 5 and the wafer heating and supporting base 1 and the focusing ring 3, thereby enhancing the heat transfer effect and further reducing the chemical reaction rate in the edge area of the wafer 4, thereby reducing the difference in characteristic dimensions and groove depth between the edge and center areas of the wafer 4 and improving uniformity.
[0060] When the cross section of the heat-conducting ring 5 is in an inverted T-shape, the shapes of the vertical heat conductor 52 and the horizontal heat conductor 51 are not specifically limited in the present application and are respectively introduced below.
[0061] As an implementation method, Figure 8 As shown, the horizontal heat conductor 51 and the vertical heat conductor 52 are rectangular. That is, the surfaces of the horizontal heat conductor 51 and the vertical heat conductor 52 are both planes.
[0062] The sizes of the horizontal heat conductor 51 and the vertical heat conductor 52 can be set freely and are not specifically limited in this application.
[0063] In one embodiment of the present application, the length range of the horizontal heat conductor 51 is 4.5mm~4.7mm, for example, the length can be 4.5mm, 4.6mm, 4.6mm, etc., and the width range of the horizontal heat conductor 51 is 0.2mm~0.4mm, for example, the width can be 0.2mm, 0.3mm, 0.4mm, etc.; the length range of the vertical heat conductor 52 is 0.3mm~0.5mm, for example, the length can be 0.3mm, 0.4mm, 0.5mm, etc., and the width range of the horizontal heat conductor 51 is 4mm~4.5mm, for example, the width can be 4mm, 4.2mm, 4.5mm, etc.
[0064] As another possible implementation, the target area of the outer side surface, lower surface, upper surface of the vertical heat conductor 52 and the inner side surface of the vertical heat conductor 52 is a curved surface; the upper surface of the horizontal heat conductor 51 is a curved surface. That is, the surface of the vertical heat conductor 52 in contact with the wafer heating and carrying base 1 and the surface in contact with the focus ring 3 are curved surfaces, and the surface of the horizontal heat conductor 51 in contact with the focus ring 3 is a curved surface, so that the contact area between the vertical heat conductor 52 and the horizontal heat conductor 51 and the wafer heating and carrying base 1 and the focus ring 3 is increased, further improving the heat transfer effect.
[0065] The curved surface includes but is not limited to a spherical surface, an ellipsoidal surface, a wavy surface, and a sawtooth surface.
[0066] The dry etching device in this embodiment includes a heat-conducting ring 5, which is arranged between the base ring 2 and the focus ring 3 and is in contact with the wafer heating and carrying base 1. The heat-conducting ring 5 can conduct the heat of the wafer heating and the carrying base 1 and the focus ring 3, thereby reducing the temperature of the edge of the wafer 4, so as to reduce the chemical reaction rate, thereby improving the characteristic size and groove depth of the edge of the wafer 4, so that the difference between the characteristic size and groove depth of the edge of the wafer 4 and the characteristic size and groove depth of the central area is reduced, thereby improving the yield of the device.
[0067] Based on any of the above embodiments, in one embodiment of the present application, Figure 7 As shown, the height of the focusing ring 3 ranges from 7 mm to 7.5 mm.
[0068] The height of the focusing ring 3 can be 7 mm, 7.1 mm, 7.3 mm, 7.5 mm, etc. The specific height value can be set as needed.
[0069] In the related art, the height of the focusing ring 3 is 5 mm. The schematic diagram of plasma etching the wafer 4 using a dry etching device is as follows: Fig. 9 As shown, the change in ion bombardment angle (deviation from the vertical direction) leads to the warping problem, thereby increasing the physical bombardment rate at the edge of wafer 4. The non-uniformity of the plasma itself leads to the non-uniformity of the sheath, which increases the difference between the feature size and groove depth of the edge area of wafer 4 and the central area.
[0070] In this embodiment, by increasing the height of the focus ring 3, when the wafer 4 is subjected to plasma etching using a dry etching device, as shown in FIG. Fig.10 As shown, the focusing ring 3 can change the distribution of plasma at the edge of the wafer 4, effectively reduce the plasma concentration at the edge of the wafer 4, make the plasma more continuous, optimize the distribution of the shell voltage, improve the physical angle of ion bombardment, and reduce the physical bombardment rate of the edge of the wafer 4. The physical bombardment of the wafer 4 from the center to the edge is more uniform, so that the characteristic size and groove depth of the edge area of the wafer 4 are reduced compared with the central area, and a better process effect is obtained.
[0071] When using Figure 7 When the dry etching device shown (the dry etching device includes a heat-conducting ring 5, and the height range of the focusing ring 3 is 7 mm to 7.5 mm) performs plasma etching on the wafer 4, the heat-conducting ring 5 timely heats the wafer and transfers the heat from the edge of the supporting base 1 and the focusing ring 3 by physical heat transfer, thereby reducing the temperature of the edge of the wafer 4, so that the chemical reaction rate is reduced; the focusing ring 3 with increased height changes the distribution of plasma at the edge of the wafer 4, making the plasma more continuous, optimizing the distribution of the shell voltage, and improving the physical angle of ion bombardment, resulting in a reduction in the physical bombardment rate of the edge of the wafer 4, and a more uniform physical bombardment of the wafer 4 from the center to the edge. Through the cooperation of the heat-conducting ring 5 and the focusing ring 3 with increased height, the etching rate at the edge of the wafer 4 can be reduced exponentially, and the problem of warping will no longer occur.
[0072] When using Figure 7 The dry etching equipment shown in the figure and the dry etching equipment in the related art when performing dry etching on the wafer are compared as shown in the figure. Fig.11 As shown in the figure, the horizontal axis is the distance from the center of the wafer, and the vertical axis is the etching rate. Fig.11 It can be seen that in the edge area of the wafer (R≥143 mm), the etching rate when using the dry etching equipment in the present application is significantly lower than the etching rate of the dry etching equipment in the related art.
[0073] When using Figure 7 After the dry etching equipment shown in the figure and the dry etching equipment in the related art perform dry etching on the wafer, the characteristic size comparison diagram at different positions of the wafer is as follows Fig.12 As shown in the figure, the horizontal axis is the distance from the center of the wafer, and the vertical axis is the feature size. Fig.12 It can be seen that the difference between the feature size at the edge of the wafer (R≥143mm) and the feature size in the central area is reduced, and the uniformity is significantly improved.
[0074] In summary, this application slows down the edge etching rate by physically conducting heat and improving ion physical bombardment, thereby improving the characteristic size performance of the wafer limit edge (R≥143mm) and greatly improving the yield. By optimizing the machine hardware parameters, the space inside the cavity is not changed, only the size and material of the components are optimized, which solves the edge etching rate problem in principle, with high efficiency and low cost.
[0075] The present application also provides a wafer etching method, which is performed based on the dry etching equipment described in any of the above embodiments, and includes:
[0076] Placing a wafer on a wafer heating and carrying base of the dry etching equipment;
[0077] The wafer is etched using the dry etching equipment to form grooves on the wafer.
[0078] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.
[0079] The above is a detailed introduction to the dry etching equipment and wafer etching method provided by the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.
Claims
1. A dry etching device, characterized in that: Including wafer heating and carrying base, base ring, focusing ring, and thermal conductive ring; The base ring surrounds the wafer heating and carrying base; The focusing ring is arranged on the upper surface of the base ring; the heat conductive ring is arranged between the base ring and the focusing ring, and the side of the heat conductive ring close to the wafer heating and carrying base is in contact with the wafer heating and carrying base.
2. The dry etching equipment according to claim 1, characterized in that: The cross section of the heat-conducting ring is an inverted T-shape, and the heat-conducting ring comprises a horizontal heat-conducting body and a vertical heat-conducting body that intersect vertically; The outer side surface and the lower surface of the vertical heat conductor are in contact with the wafer heating and carrying base; the upper surface of the horizontal heat conductor, the upper surface of the vertical heat conductor and the target area of the inner side surface of the vertical heat conductor are in contact with the focusing ring; The target area of the inner side surface of the vertical heat conductor is an area of the inner side surface of the vertical heat conductor located above the horizontal heat conductor.
3. The dry etching equipment according to claim 2, characterized in that: The horizontal heat conductor and the vertical heat conductor are rectangular.
4. The dry etching equipment according to claim 3, characterized in that: The length of the transverse heat conductor ranges from 4.5 mm to 4.7 mm, and the width of the transverse heat conductor ranges from 0.2 mm to 0.4 mm; the length of the vertical heat conductor ranges from 0.3 mm to 0.5 mm, and the width of the transverse heat conductor ranges from 4 mm to 4.5 mm.
5. The dry etching equipment according to claim 2, characterized in that: The target areas of the outer side surface, the lower surface, the upper surface of the vertical heat conductor and the inner side surface of the vertical heat conductor are curved surfaces; and the upper surface of the horizontal heat conductor is a curved surface.
6. The dry etching equipment according to claim 5, characterized in that: The curved surface includes a spherical surface, an ellipsoidal surface, a wavy curved surface, and a sawtooth curved surface.
7. The dry etching equipment according to claim 1, characterized in that: The materials of the heat-conducting ring include: silicon carbide and anodized aluminum.
8. The dry etching equipment according to claim 1, characterized in that: The cross section of the heat conducting ring is rectangular.
9. The dry etching device according to any one of claims 1 to 8, characterized in that: The height of the focusing ring ranges from 7 mm to 7.5 mm.
10. A wafer etching method, characterized in that: The wafer etching method is performed based on the dry etching equipment according to any one of claims 1 to 9, comprising: Placing a wafer on a wafer heating and carrying base of the dry etching equipment; The wafer is etched using the dry etching equipment to form grooves on the wafer.