Chip sealing ring structure for reducing stress and warpage of a transition board

Abstract

The application relates to a chip sealing ring structure for reducing the stress and warping of a transition plate, which comprises a rewiring layer of a wafer chip, and a cutting path for cutting and separating each wafer chip; a sealing ring area is formed in a region outside the rewiring layer and inside the cutting path; a closed metal ring is embedded in the sealing ring area along a circumferential direction; the metal ring is composed of a plurality of line segments or a plurality of arc lines which are connected at the head and tail, and an included angle greater than 90 DEG is formed between adjacent line segments; the cross section of the metal ring comprises a plurality of metal layers which are arranged in an upper and lower interval mode, and the adjacent metal layers are interconnected; by changing the metal ring appearance, the single-point stress between the metal and the medium is transferred, so that the stress is uniformly distributed along a curve or a broken line, thereby effectively relieving the stress and warping caused by the mismatch of the thermal expansion coefficients, solving the warping, sealing ring cracking and delamination problems, and greatly ensuring the reliability and stability of the package.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor chip packaging, and particularly relates to a chip sealing ring structure for reducing stress and warping of a conversion board. BACKGROUND

[0002] In 2.5D / 3D packaging technology, warping of an organic conversion board caused by mismatch of thermal expansion coefficients (CTE) between different materials is a problem to be solved. It not only affects packaging quality, but also can cause mechanical stress concentration, reducing reliability and service life of a product. A sealing ring structure formed by interlacing of a passivation layer and a metal layer on the organic conversion board can be used as a stress buffering structure, which helps to reduce stress concentration and packaging cracking caused by mechanical stress during temperature change or cutting, and enhances mechanical strength of the packaging.

[0003] In existing organic conversion board design, a metal layer of the sealing ring usually adopts a linear frame design, as shown in FIG. 1, and stress is concentrated at an interface between the metal and the medium, which is prone to cause cracking and delamination of the sealing ring, and cannot effectively relieve warping of the conversion board. Figure 1

[0004] Therefore, it is necessary to introduce a sealing ring structure design with a stress release structure, which absorbs and disperses interface stress, and reduces warping, cracking and delamination of the sealing ring of the conversion board. SUMMARY

[0005] To solve the above problems, the present application provides a chip sealing ring structure for reducing stress and warping of a conversion board, which effectively relieves stress and warping caused by mismatch of thermal expansion coefficients, solves warping, cracking and delamination of the sealing ring, and greatly ensures reliability and stability of the packaging.

[0006] The technical scheme adopted by the present application is as follows:

[0007] The chip sealing ring structure for reducing stress and warping of a conversion board comprises a redistribution layer constituting a wafer chip, and a cutting path for cutting and separating the wafer chips, a region located outside the redistribution layer and inside the cutting path constitutes a sealing ring region, and a closed metal ring is embedded in the sealing ring region along a circumferential direction; the metal ring is composed of a plurality of line segments or a plurality of arc lines connected at their heads and tails along the circumferential direction, and a clamping angle greater than 90° is formed between adjacent line segments; the metal ring comprises a plurality of metal layers arranged in layers and separated by upper and lower layers, and adjacent metal layers are interconnected.

[0008] Further improvement of the above technical scheme is as follows:

[0009] The sealing ring region comprises a plurality of passivation layers arranged in layers from a substrate to an upper layer, and the metal ring is embedded in the plurality of passivation layers. ​

[0010] An interconnection hole is formed on the passivation layer between adjacent metal layers, and metal is filled in the interconnection hole to interconnect the adjacent metal layers.

[0011] The adjacent interconnection holes are staggered in the vertical direction, and the metal ring is sequentially arranged in two columns in the vertical direction on the same vertical section.

[0012] The ratio of the distance between the two columns of interconnection holes to the width of the metal layer is greater than 1:5.

[0013] The lowermost metal layer is located above the lowermost passivation layer, the bottom surface of the uppermost metal layer is attached to the bottom surface of the uppermost passivation layer, and there is a distance between the top surface of the uppermost metal layer and the top surface of the uppermost passivation layer.

[0014] The thickness of the lowermost metal layer is greater than the thickness of the other metal layers, and the thickness of the other metal layers except the lowermost metal layer is the same; the thickness ratio of the lowermost metal layer to the other metal layers is 2:1.

[0015] The thickness of the passivation layer is thicker than the thickness of the corresponding metal layer in the layer, and the thickness of the lowermost passivation layer is thicker than the thickness of the other passivation layers; the thickness of the passivation layer with the lowermost metal layer and the uppermost metal layer is 2-3 microns thicker than the thickness of the other passivation layers.

[0016] The sealing ring area is formed by repeated operations of coating, exposure, development, hard baking and curing, and electroplating metal to form a stacked structure of passivation layer and metal layer, and the metal ring is embedded in the sealing ring area of the passivation layer.

[0017] The metal ring is a wave-shaped structure composed of a plurality of arc lines connected end to end along the circumference, the adjacent arc lines on the straight edge are opposite in curvature, and the adjacent arc lines at the corner jointly form an outwardly convex structure.

[0018] Compared with the prior art, the present application has the following beneficial effects:

[0019] The structure of the present application changes the morphology of the metal ring, introduces a stress release structure, transfers the single-point stress between the metal and the medium, and makes the stress uniformly distributed along the curve or the broken line, thereby effectively reducing the stress concentration around the sealing ring, relieving the stress and warping caused by the mismatch of the thermal expansion coefficient, solving the problems of warping, cracking and delamination of the sealing ring, and greatly ensuring the reliability and stability of the package.

[0020] The present application also has the following advantages:

[0021] The metal layer and the passivation layer are formed into a spring-like structure, which can control the deformation in the plane during high and low temperature cycles, transfer stress through stretching and compression in the plane, avoid warping, reduce the warping of the adapter plate, and effectively prevent the cracking and delamination of the sealing ring.

[0022] By arranging the closed metal ring in the circumferential direction in the sealing ring area, the closed ring structure can block water vapor and chemical substances from entering the package, enhancing the reliability of the package. On the other hand, the mechanical force generated during cutting can be blocked by the metal ring to prevent the chip from being damaged by the mechanical force. By forming a spring-like structure in the cross section of the metal ring, the deformation can be locked in the plane during temperature cycling, stress transfer can be achieved, and the warping of the adapter plate can be reduced.

[0023] By staggering the interconnection holes in the vertical direction into two columns, the positions of the interconnection holes of adjacent two layers are staggered and do not completely coincide with each other, so as to avoid stress concentration caused by direct stacking of metal, which leads to fracture of the passivation layer after solidification. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 It is a schematic diagram of the arrangement of the existing metal ring.

[0025] Figure 2 It is a schematic diagram of the arrangement of the metal ring of the present application (Example 1).

[0026] Figure 3 It is a schematic diagram of the arrangement of the metal ring of the present application (Example 2).

[0027] Figure 4 It is a schematic diagram of the arrangement of the metal ring of the present application (Example 3).

[0028] Figure 5 It is a schematic diagram of the structure of the cross section of the metal ring of the present application.

[0029] Wherein: 10, cutting channel; 20, metal ring; 30, redistribution layer; 40, passivation layer; 50, substrate; 21, metal layer; 22, interconnection hole. DETAILED DESCRIPTION

[0030] The specific embodiments of the present application will be described below with reference to the accompanying drawings.

[0031] As shown in Figure 2 , Figure 3 and Figure 4 , the chip sealing ring structure for reducing the stress and warping of the adapter plate of the present embodiment includes a redistribution layer 30 constituting a wafer chip and a cutting channel 10 for cutting and separating each wafer chip. The area outside the redistribution layer 30 and inside the cutting channel 10 constitutes a sealing ring area, and a closed metal ring 20 is embedded in the sealing ring area along the circumferential direction. The metal ring 20 is composed of a plurality of line segments or a plurality of arc lines connected end to end along the circumferential direction, and the included angle between adjacent line segments is greater than 90°. Figure 5 As shown in , the cross section of the metal ring 20 includes a plurality of metal layers 21 spaced apart by upper and lower layers, and the adjacent metal layers 21 are interconnected.

[0032] In the embodiment, by changing the shape of the metal ring 20, introducing a stress release structure, transferring the single-point stress between the metal and the medium, making the stress uniformly distributed along the curve or broken line, thereby effectively reducing the stress concentration around the sealing ring, relieving the stress and warping caused by the mismatch of the thermal expansion coefficient, solving the warping, cracking and delamination problems of the sealing ring.

[0033] The sealing ring area includes a plurality of passivation layers 40 arranged layer by layer upward from the substrate 50, and the metal ring 20 is embedded in the plurality of passivation layers 40.

[0034] In the embodiment, the metal layer 21 and the passivation layer 40 are constructed to form a spring-like structure, which can control the deformation in the plane during high and low temperature cycles, and transfer stress through stretching and compression in the plane to avoid warping and reduce the warping of the adapter plate, effectively preventing cracking and delamination of the sealing ring.

[0035] Interconnection holes 22 are formed in the passivation layer 40 between adjacent metal layers 21, and the adjacent metal layers 21 are interconnected by filling metal in the interconnection holes 22.

[0036] In the embodiment, the passivation layers 40 of different layers can use the same medium material and generation method, and the metal layers 21 and the interconnection holes 22 of different layers can use the same metal material and generation method.

[0037] The adjacent interconnection holes 22 are staggered in the vertical direction, and the interconnection holes 22 on the same vertical section of the metal ring 20 are orderly arranged into two columns in the vertical direction.

[0038] In the embodiment, by staggering the interconnection holes 22 in the vertical direction to form two columns, the positions of the interconnection holes 22 of adjacent two layers are staggered and do not completely coincide, so as to avoid stress concentration caused by direct stacking of metal and lead to cracking of the passivation layer 40 after solidification.

[0039] In the embodiment, the adjacent interconnection holes 22 are staggered in the vertical direction, and the interconnection holes 22 on the same vertical section are orderly arranged into two columns, that is, the interconnection holes 22 of odd-numbered layers are aligned above and below to form a column, and the interconnection holes 22 of even-numbered layers are aligned above and below to form a column.

[0040] The ratio of the distance between the two columns of interconnection holes 22 to the width of the metal layer 21 is greater than 1:5, thereby effectively ensuring the structural strength of the metal ring 20 and effectively ensuring its sealing performance.

[0041] The lowermost metal layer 21 is located above the lowermost passivation layer 40, the top surface of the uppermost metal layer 21 is attached to the bottom surface of the uppermost passivation layer 40, and there is a distance between the top surface of the uppermost metal layer 21 and the top surface of the uppermost passivation layer 40; thereby realizing stable and reliable embedding of the metal ring 20 in the passivation layer 40.

[0042] The thickness of the lowermost metal layer 21 is greater than the thickness of other metal layers 21, which enhances reliability and prevents water vapor from penetrating into the package from the lower part; the thickness of other metal layers 21 except the lowermost metal layer 21 is the same; and the thickness ratio of the lowermost metal layer 21 to other metal layers 21 is 2:1.

[0043] In the embodiment, the thickness of the metal layer 21 can be adjusted according to the requirements and needs of the actual package.

[0044] The thickness of the passivation layer 40 is greater than the thickness of the corresponding metal layer 21 in the layer, and the thickness of the lowermost passivation layer 40 is greater than the thickness of other passivation layers 40, for example, 2 times, to enhance the adhesion and reliability of the passivation layer 40 and prevent the passivation layer 40 from delaminating and falling off after solidification; the thickness of the passivation layer 40 provided with the lowermost metal layer 21 and the uppermost metal layer 21 is 2-3 microns greater than the thickness of other passivation layers 40.

[0045] In the embodiment, the thickness ratio of the passivation layer 40 to the thickness of the metal layer 21 inside it can be set to about 2:1, thereby effectively ensuring that the metal layer 21 combined with the passivation layer 40 forms a stable and reliable spring-like structure. Of course, in actual use, the ratio can also be adjusted according to actual needs.

[0046] In the embodiment, the thickness of the lower second passivation layer 40 is slightly thicker than that of other upper passivation layers 40 by 2 microns due to the influence of the thickness of the internal first metal layer 21; the thickness of the uppermost passivation layer 40 is also slightly thicker by 2-3 microns to reduce the generation and expansion of cracks in subsequent cutting and other processes, while enhancing the protection effect on the lower metal layer; the thickness of other passivation layers 40 except the lowermost passivation layer 40, the lower second passivation layer 40, and the uppermost passivation layer 40 is the same.

[0047] The sealing ring area is formed by repeated operations of coating, exposure, development, hard baking and solidification, and metal plating of dielectric materials and metals to form a stacked structure of the passivation layer 40 and the metal layer 21, thereby forming a sealing ring area in which the metal ring 20 is embedded in the passivation layer 40.

[0048] The metal ring 20 is a wave-shaped structure composed of a plurality of arc lines connected end to end along the circumference, the adjacent arc lines on the straight edge are opposite in curvature, and the adjacent arc lines at the corner jointly form an outwardly convex structure.

[0049] In Figure 2 In the first embodiment shown in the figure, the metal ring 20 is composed of arc lines in a wave shape in the circumferential direction. The outer frame line and the area outside the outer frame line are the cutting channel 10 area, and through cutting of the cutting channel 10, the chips on the wafer can be separated from each other; the inner frame line is the outer boundary of the redistribution layer 30, and the area between the inner and outer frame lines is the sealing ring area, and the wave-shaped metal frame line is the metal ring 20 with width and thickness.

[0050] InFigure 3 In the second embodiment shown, the metal ring 20 is composed of line segments in the circumferential direction to form a tooth-like structure. The outer frame line and the area outside the outer frame line are the cutting path 10, and through cutting of the cutting path 10, the chips on the wafer can be separated from each other. The inner frame line is the outer boundary of the redistribution layer 30, and the area between the inner and outer frame lines is the sealing ring area. The tooth-like metal frame line is the metal ring 20 with width and thickness.

[0051] In Figure 4 In the third embodiment shown, the metal ring 20 is composed of line segments in the circumferential direction to form a track-like structure. The outer frame line and the area outside the outer frame line are the cutting path 10, and through cutting of the cutting path 10, the chips on the wafer can be separated from each other. The inner frame line is the outer boundary of the redistribution layer 30, and the area between the inner and outer frame lines is the sealing ring area. The track-like metal frame line is the metal ring 20 with width and thickness.

[0052] In this embodiment, by setting the included angle between adjacent line segments to be greater than 90°, the photoresist of the sealing ring passivation layer 40 after exposure and development is effectively prevented from being left over in the process, effectively ensuring the packaging effect.

[0053] In this embodiment, by arranging a closed metal ring 20 in the circumferential direction in the sealing ring area, the closed ring structure can block water vapor and chemical substances from entering the package, enhancing the reliability of the package. On the other hand, the mechanical force generated during cutting can be blocked by the metal ring 20, preventing the chips from being damaged by the mechanical force. By forming a spring-like structure in the cross section of the metal ring 20, the deformation can be locked in the plane during temperature cycling, stress transfer is achieved, and the warping of the adapter board is reduced.

[0054] The present application effectively reduces the stress concentration around the sealing ring, relieves the stress and warping caused by the mismatch of the thermal expansion coefficient, solves the warping and cracking of the sealing ring, and greatly ensures the reliability and stability of the package.

[0055] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other.

[0056] The above description is an explanation of the present application, not a limitation of the application. The scope of the present application is defined by the claims, and any modification within the scope of the present application can be made.

Claims

1. A chip sealing ring structure for reducing stress and warpage of an adapter plate, comprising a redistribution layer (30) constituting a wafer chip, and a cutting path (10) for cutting and separating individual wafer chips, characterized in that: The area outside the redistribution layer (30) and inside the cutting path (10) constitutes a sealing ring area, wherein a closed metal ring (20) is buried along the circumferential direction in the sealing ring area; the metal ring (20) is composed of a plurality of line segments connected end to end or a plurality of arcs connected end to end along the circumferential direction, and an angle greater than 90° is formed between adjacent line segments; the cross section of the metal ring (20) includes a plurality of metal layers (21) provided in upper and lower spacer layers, and adjacent metal layers (21) are interconnected; The sealing ring region includes a multi-layer passivation layer (40) layered upward from a base (50), and the metal ring (20) is buried in the multi-layer passivation layer (40); An interconnection hole (22) is provided on the passivation layer (40) located between adjacent metal layers (21), and metal is filled in the interconnection hole (22) so that the adjacent metal layers (21) are interconnected; Adjacent interconnected holes (22) are staggered in the vertical direction, and the interconnected holes (22) on the same vertical cross section of the metal ring (20) are orderly arranged into two vertical rows; The thickness of the bottom metal layer (21) is greater than the thickness of the other metal layers (21), and the thickness of the other metal layers (21) except the bottom metal layer is the same; the thickness ratio of the bottom metal layer (21) to the other metal layers (21) is 2:

1.

2. The chip seal ring structure for reducing stress and warpage of an adapter plate according to claim 1, wherein: The ratio of the distance between two rows of interconnected holes (22) to the width of the metal layer (21) is greater than 1:

5.

3. The chip seal ring structure for reducing stress and warpage of an adapter plate according to claim 1, wherein: The bottom metal layer (21) is located above the bottom passivation layer (40), the bottom surface of the top metal layer (21) is attached to the bottom surface of the top passivation layer (40), and there is a distance between the top surface of the top metal layer (21) and the top surface of the top passivation layer (40).

4. The chip seal ring structure for reducing stress and warpage of an adapter plate according to claim 1, wherein: The thickness of the passivation layer (40) is thicker than the thickness of the corresponding metal layer (21) in the layer, and the thickness of the bottom passivation layer (40) is thicker than the thickness of other passivation layers (40); the thickness of the passivation layer (40) provided with the bottom metal layer (21) and the top metal layer (21) is 2-3 microns thicker than the thickness of other passivation layers (40).

5. The chip seal ring structure for reducing stress and warpage of an adapter plate according to claim 1, wherein: The sealing ring area is formed by repeatedly coating, exposing, developing, hard baking and curing the dielectric material and the metal, and electroplating the metal to form a stacked structure of a passivation layer (40) and a metal layer (21), forming a sealing ring area in which the metal ring (20) is buried in the passivation layer (40).

6. The chip seal ring structure for reducing stress and warpage of an adapter plate according to claim 1, wherein: The metal ring (20) is a wavy structure formed by a plurality of arcs connected end to end along the circumferential direction, the arc directions of adjacent arcs located on the straight sides are opposite, and the adjacent arcs located at the corners together form an outward convex structure.

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