Packaging structure and method for improving heat dissipation and warping of product

Abstract

The invention discloses a packaging structure for improving heat dissipation and warpage of a product, which is beneficial to reducing the warpage of the product, improving the heat dissipation capability of the product and improving the packaging reliability. The display panel comprises a substrate, and a first reinforcing layer is arranged in the substrate; an IC chip; a second reinforcing layer; a plastic package body; a first passivation adhesive layer; a second passivation adhesive layer; and a pad; a first reinforcing layer is arranged on the substrate, an IC chip is arranged over the substrate corresponding to the first reinforcing layer, a plurality of spliced second reinforcing layers are annularly distributed on the periphery of the IC chip, the surface, where the IC chip is arranged, of the substrate is filled with the plastic package body, and the area between the IC chip and the second reinforcing layers is filled with the plastic package body. The heights of the second reinforcing layer and the plastic package body are flush with the height of the IC chip to form an equivalent package plane, the first passivation adhesive layer is stacked on the equivalent package plane, the first passivation adhesive layer is provided with a wire, the bottom of the wire is communicated with the IC chip, and the upper layer of the wire is exposed and connected with a corresponding bonding pad.

Description

Technical Field

[0001] The invention relates to the technical field of IC chip packaging, in particular to a packaging structure for improving heat dissipation and warping of products. The invention also provides a packaging method for the packaging structure. Background Art

[0002] With the development of packaging technology, packaging technology is developing towards packaging structures with smaller packaging volume and higher packaging density. Among them, in plastic packaging technology, the surface of the substrate with IC chips will be wrapped by the plastic packaging body, and the problem it faces is the heat dissipation of the IC chips set on the substrate; in addition, since the substrate and the plastic packaging body are made of different materials, during the entire process of the plastic packaging structure, the substrate will produce a large warp corresponding to the cooling stage, which will bring more serious product quality problems to the subsequent process. Therefore, it is urgent to develop a new packaging structure to improve the heat dissipation performance of the plastic packaging structure and reduce the warping of the substrate in the process, thereby improving the reliability of the packaged product. Summary of the invention

[0003] In view of the above problems, the present invention provides a packaging structure for improving product heat dissipation and warping, which is beneficial to reducing product warping, increasing product heat dissipation capacity, and improving packaging reliability.

[0004] A packaging structure for improving heat dissipation and warping of a product, characterized in that it comprises:

[0005] A substrate, wherein the substrate has a first strengthening layer built therein;

[0006] IC chips;

[0007] Second reinforcement layer;

[0008] Plastic sealing body;

[0009] First passivation glue layer;

[0010] Second passivation glue layer;

[0011] and pads;

[0012] An IC chip is arranged on the substrate just above the first strengthening layer, and a plurality of assembled second strengthening layers are arranged around the periphery of the IC chip. The plastic encapsulation body is filled on the surface of the substrate where the IC chip is arranged, and the plastic encapsulation body is filled in the area between the IC chip and the second strengthening layer. The height of the second strengthening layer and the plastic encapsulation body is flush with the height of the IC chip to form an equivalent packaging plane. The first passivation adhesive layer is stacked on the equivalent packaging plane. The first passivation adhesive layer is provided with wiring, the bottom of the wiring is connected to the IC chip, the upper layer of the wiring is exposed and connected to a corresponding pad, the upper surface of the first passivation adhesive layer is provided with the second passivation adhesive layer, and the upper surface of the pad is convex to the second passivation adhesive layer.

[0013] The first strengthening layer and the second strengthening layer are made of the same material, which is a material with high thermal conductivity and high strength, and has low electrical conductivity or insulation performance.

[0014] It is further characterized by:

[0015] The first strengthening layer and the second strengthening layer are made of silicon;

[0016] The first strengthening layer is located in the middle of the thickness direction of the substrate, and the distance between the upper surface of the first strengthening layer and the upper surface of the substrate is equal to the distance between the lower surface of the first strengthening layer and the lower surface of the substrate, which ensures that the substrate can be operated on both sides;

[0017] The second strengthening layer is arranged around the periphery of the overall structure composed of the IC chip to form a closed structure;

[0018] Or the second strengthening layer is composed of four independent strengthening structures scattered on the corresponding four sides of the overall structure composed of the IC chip to form an enclosed structure with gaps;

[0019] The upper surface of the pad is planted with balls or provided with an electroplated tin-silver layer.

[0020] A packaging method for improving product heat dissipation and warping, which is used to improve product heat dissipation and warping packaging structure packaging, characterized in that it includes the following steps:

[0021] S1, embedding a first strengthening layer in a set area of ​​the substrate;

[0022] S2, pasting the IC chip and the second strengthening layer on the upper surface of the substrate, and then plastic-sealing the upper surface of the substrate with a plastic sealing body;

[0023] S3, lead out the electrical signal of the IC chip;

[0024] S4. Cut into single dies.

[0025] In step S1, a groove is etched on the substrate, and then a first strengthening layer is buried in the etched groove, and then the upper area of ​​the post-etched groove is filled with the same material of the substrate to form an integral substrate;

[0026] Alternatively, before the substrate is formed, the first strengthening layer is preset in the corresponding material area of ​​the substrate, and the remaining plastic sealing material of the substrate covers the first strengthening layer, and then enters the mold to complete the overall plastic sealing to obtain the overall substrate;

[0027] Step S3 includes the following steps: setting a first passivation glue layer, exposing the circuit position through a mask, then rewiring, and then setting a second passivation glue layer, and exposing the pad position through a process glue, and finally planting a ball or electroplating a tin-silver layer on the pad.

[0028] After adopting the structure of the present invention, the first strengthening layer is filled in the inner cavity of the substrate, and the second strengthening layer is arranged on the upper surface of the substrate corresponding to the surroundings of the IC chip, which enables the substrate to have anti-warping performance, and the second strengthening layer is arranged around the IC chip. Since the first strengthening layer and the second strengthening layer are made of the same material, which is a material with high thermal conductivity and high strength, the heat generated by the IC chip can be reliably distributed to the periphery through the strengthening layer, which is beneficial to reducing product warping, and is beneficial to increasing the product's heat dissipation capacity and improving packaging reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a structural schematic diagram of a specific embodiment 1 of the structure of the present invention;

[0030] Figure 2 It is a structural schematic diagram of a specific embodiment 2 of the structure of the present invention;

[0031] Figure 3 is a schematic diagram of a first arrangement mode of the second strengthening layer of the present invention;

[0032] Figure 4 is a schematic diagram of a second arrangement mode of the second strengthening layer of the present invention;

[0033] Figure 5 It is a schematic diagram of the process of the method of the present invention;

[0034] The names corresponding to the serial numbers in the figure are as follows:

[0035] The substrate 10 , the IC chip 20 , the second strengthening layer 30 , the plastic package 40 , the first passivation glue layer 50 , the second passivation glue layer 60 , the pad 70 , the first strengthening layer 80 , the wiring 90 , the planting ball 100 , and the electroplated tin-silver layer 110 . DETAILED DESCRIPTION

[0036] A packaging structure that improves product heat dissipation and warpage, see Figure 1-Figure 4, which includes a substrate 10, an IC chip 20, a second strengthening layer 30, a plastic package 40, a first passivation glue layer 50, a second passivation glue layer 60, and a pad 70;

[0037] The substrate 10 has a first strengthening layer 80 built therein;

[0038] An IC chip 20 is arranged on the substrate 10 corresponding to the first strengthening layer 80, and a plurality of assembled second strengthening layers 30 are arranged around the periphery of the IC chip 20. A plastic package 40 is filled on the surface of the substrate 10 where the IC chip 20 is arranged, and the plastic package 40 is filled in the area between the IC chip 20 and the second strengthening layer 30. The heights of the second strengthening layer 30 and the plastic package 40 are arranged flush with the height of the IC chip 20 to form an equivalent packaging plane. A first passivation adhesive layer 50 is stacked on the equivalent packaging plane, and a wiring 90 is arranged on the first passivation adhesive layer 50. The bottom of the wiring 90 is connected to the IC chip 20, and the upper layer of the wiring 90 is exposed and connected to a corresponding pad 70. A second passivation adhesive layer 60 is arranged on the upper surface of the first passivation adhesive layer 50, and the upper surface of the pad 70 is convex to the second passivation adhesive layer 60.

[0039] The first strengthening layer 80 and the second strengthening layer 30 are made of the same material, which is a material with high thermal conductivity and high strength, and which has low electrical conductivity or insulation properties;

[0040] The first strengthening layer 80 and the second strengthening layer 30 are made of silicon;

[0041] The first strengthening layer 80 is located in the middle of the thickness direction of the substrate 10. The distance between the upper surface of the first strengthening layer 80 and the upper surface of the substrate 10 is equal to the distance between the lower surface of the first strengthening layer 80 and the lower surface of the substrate 10, which ensures that the substrate 10 can be double-sided.

[0042] Specific embodiment 1, see Figure 1 and Figure 3 The second strengthening layer 30 is disposed around the periphery of the overall structure composed of the IC chip 20 to form a closed structure; the ball 100 is planted on the upper surface of the pad 70 .

[0043] Specific embodiment 2, see Figure 2 and Figure 4 The second strengthening layer 30 is composed of four independent strengthening structures scattered on the corresponding four sides of the overall structure composed of the IC chip 20 to form an enclosure structure with a gap; the upper surface of the pad 70 is provided with an electroplated tin-silver layer 110.

[0044] Packaging methods to improve product heat dissipation and warpage, see Figure 5 :It is used to improve the heat dissipation of products and the packaging of warping packaging structures, and includes the following steps:

[0045] S1, embedding a first strengthening layer 80 in a set area of ​​the substrate 10;

[0046] A groove is etched on the substrate 10, and then the first strengthening layer 80 is buried in the etched groove, and then the upper area of ​​the post-etched groove is filled with the same material of the substrate 10 to form an integral substrate 10;

[0047] Alternatively, before the substrate 10 is formed, the first strengthening layer 80 is preset in the corresponding material area of ​​the substrate 10, and the remaining plastic packaging material of the substrate 10 covers the first strengthening layer 80, and then enters the mold to complete the overall plastic packaging to obtain the overall substrate 10;

[0048] S2, pasting the IC chip 20 and the second strengthening layer 30 on the upper surface of the substrate 10, and then plastic-sealing the upper surface of the substrate 10 with a plastic sealing body 40;

[0049] S3, lead out the electrical signal of IC chip 20;

[0050] A first passivation glue layer 50 is provided, and the circuit position is exposed through a mask, and then the wiring is re-wired 90, and then a second passivation glue layer 60 is provided, and the position of the pad 70 is exposed through a process glue, and finally a ball is planted 100 or a tin-silver layer 110 is electroplated on the pad 70;

[0051] S4. Cut into single dies.

[0052] The beneficial effects are as follows: the first strengthening layer is filled in the inner cavity of the substrate, and the second strengthening layer is arranged on the upper surface of the substrate corresponding to the surroundings of the IC chip, which enables the substrate to have anti-warping performance, and the second strengthening layer is arranged around the IC chip. Since the first strengthening layer and the second strengthening layer are made of the same material, which is a material with high thermal conductivity and high strength, the heat generated by the IC chip can be reliably dispersed to the periphery through the strengthening layer, which is beneficial to reducing product warping, and is beneficial to increasing the product's heat dissipation capacity and improving packaging reliability.

[0053] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0054] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A packaging structure for improving heat dissipation and warping of a product, characterized in that: It includes: A substrate, wherein the substrate has a first strengthening layer built therein; IC chips; Second reinforcement layer; Plastic sealing body; First passivation glue layer; Second passivation glue layer; and pads; An IC chip is arranged on the substrate just above the first strengthening layer, and a plurality of assembled second strengthening layers are arranged around the periphery of the IC chip. The plastic encapsulation body is filled on the surface of the substrate where the IC chip is arranged, and the plastic encapsulation body is filled in the area between the IC chip and the second strengthening layer. The height of the second strengthening layer and the plastic encapsulation body is flush with the height of the IC chip to form an equivalent packaging plane. The first passivation adhesive layer is stacked on the equivalent packaging plane. The first passivation adhesive layer is provided with wiring, the bottom of the wiring is connected to the IC chip, the upper layer of the wiring is exposed and connected to a corresponding pad, the upper surface of the first passivation adhesive layer is provided with the second passivation adhesive layer, and the upper surface of the pad is convex to the second passivation adhesive layer. The first strengthening layer and the second strengthening layer are made of the same material, which is a material with high thermal conductivity and high strength, and has low electrical conductivity or insulation performance.

2. A packaging structure for improving heat dissipation and warping of a product according to claim 1, characterized in that: The first strengthening layer and the second strengthening layer are made of silicon.

3. A packaging structure for improving heat dissipation and warping of a product according to claim 1, characterized in that: The first strengthening layer is located in the middle region of the substrate in the thickness direction, and the distance between the upper surface of the first strengthening layer and the upper surface of the substrate is equal to the distance between the lower surface of the first strengthening layer and the lower surface of the substrate.

4. A packaging structure for improving heat dissipation and warping of a product according to claim 1, characterized in that: The second strengthening layer is arranged around the periphery of the overall structure composed of the IC chip to form a closed structure.

5. The packaging structure for improving heat dissipation and warping of a product according to claim 1, characterized in that: The second strengthening layer consists of four independent strengthening structures scattered on the corresponding four sides of the overall structure composed of the IC chip to form an enclosed structure with gaps.

6. A packaging structure for improving heat dissipation and warping of a product according to claim 1, characterized in that: The upper surface of the pad is planted with balls or provided with an electroplated tin-silver layer.

7. A packaging method for improving product heat dissipation and warping, which is used to package the packaging structure for improving product heat dissipation and warping as claimed in any one of claims 1 to 6, characterized in that: It includes the following steps: S1, embedding a first strengthening layer in a set area of ​​the substrate; S2, pasting the IC chip and the second strengthening layer on the upper surface of the substrate, and then plastic-sealing the upper surface of the substrate with a plastic sealing body; S3, lead out the electrical signal of the IC chip; S4. Cut into single dies.

8. The packaging method for improving heat dissipation and warping of a product according to claim 7, characterized in that: In step S1 , a groove is etched on the substrate, and then a first strengthening layer is buried in the etched groove, and then the upper area of ​​the post-etched groove is filled with the same material of the substrate to form an integral substrate.

9. A packaging structure for improving heat dissipation and warping of a product according to claim 7, characterized in that: In step S1, before the substrate is formed, the first strengthening layer is preset in the corresponding material area of ​​the substrate, and the remaining plastic packaging material of the substrate covers the first strengthening layer, and then enters the mold to complete the overall plastic packaging to obtain the overall substrate.

10. A packaging structure for improving heat dissipation and warping of a product according to claim 7, characterized in that: Step S3 includes the following steps: setting a first passivation glue layer, exposing the circuit position through a mask, then rewiring, and then setting a second passivation glue layer, and exposing the pad position through a process glue, and finally planting a ball or electroplating a tin-silver layer on the pad.

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