Device and method for suppressing voltage stress of power transistor, and power converter

Abstract

The invention discloses a device and a method for suppressing voltage stress of a power transistor, and a power converter, and belongs to the technical field of electric power. The device for suppressing the voltage stress of the power transistor comprises a control module and a speed reduction module, the speed reduction module is arranged between the gate pole of the target power transistor and the driving circuit of the power transistor; the deceleration module is connected in parallel with the target power transistor; the control module is used for determining whether the speed of driving the target power transistor needs to be changed or not based on the expected voltage stress of the target power transistor; when the rate of driving the target power transistor needs to be changed, the speed reduction module is controlled so that the total impedance of the driving circuit and the speed reduction module is changed to change the rate of driving the target power transistor. According to the device and method for suppressing the voltage stress of the power transistor and the power converter, the effect of suppressing the voltage stress of the power transistor is better, and the performance and stability of the power converter can be improved.

Description

Technical Field

[0001] The present application belongs to the field of electric power technology, and in particular relates to a device and method for suppressing voltage stress of a power transistor, and a power converter. Background Art

[0002] In a power converter, the drive circuit is a key component that connects the control circuit and the power conversion circuit. The drive circuit is used to amplify the control signal output by the control circuit to drive the power transistor in the power conversion circuit to achieve power conversion.

[0003] In the actual operation of the power converter, it is necessary to change the driving rate of the drive circuit according to the voltage stress of the power transistor under specific working conditions. At present, the commonly used methods for changing the driving rate of the drive circuit include: fixedly changing the driving resistance of the drive circuit, fixedly changing the driving voltage of the drive circuit, and using multiple driving voltage branches. However, the above methods all have the disadvantage of causing the performance and stability of the power converter to decrease. Summary of the invention

[0004] The present application aims to solve at least one of the technical problems existing in the prior art. To this end, the present application proposes a device and method for suppressing voltage stress of a power transistor, and a power converter, which has a better effect of suppressing voltage stress of the power transistor.

[0005] In a first aspect, the present application provides a device for suppressing voltage stress of a power transistor, the device comprising: a control module and a deceleration module; the deceleration module is arranged between a gate of a target power transistor and a driving circuit of the power transistor; the deceleration module is connected in parallel with the target power transistor;

[0006] The control module is used to determine whether it is necessary to change the rate of driving the target power transistor based on the expected voltage stress of the target power transistor; if it is necessary to change the rate of driving the target power transistor, control the deceleration module so that the total impedance of the drive circuit and the deceleration module changes to change the rate of driving the target power transistor.

[0007] According to the device for suppressing the voltage stress of a power transistor of the present application, when the speed of driving the target power transistor needs to be changed, the control module controls the deceleration module disposed between the gate of the target power transistor and the driving circuit of the power transistor and connected in parallel with the target power transistor, changes the total impedance of the driving circuit and the deceleration module, thereby reducing the rate of change of the gate voltage of the target power transistor, suppressing the voltage stress of the target power transistor, and suppressing the voltage stress of the power transistor. The effect of suppressing the voltage stress of the power transistor is better, and the performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor can be reduced or even eliminated, and the performance and stability of the power converter can be improved. In addition, the device for suppressing the voltage stress of the power transistor provided in the embodiment of the present application has a wider regulation dimension compared with the related art.

[0008] According to one embodiment of the present application, the control module includes:

[0009] A control unit, configured to determine whether a rate of driving the target power transistor needs to be changed based on an expected voltage stress of the target power transistor; and output a control signal if the rate of driving the target power transistor needs to be changed;

[0010] The soft switching unit is used to buffer the control signal and then input it into the deceleration module to control the deceleration module so that the total impedance of the driving circuit and the deceleration module changes to change the rate of driving the target power transistor.

[0011] According to one embodiment of the present application, the deceleration module includes: a first fixed capacitor device and a switch unit;

[0012] The control module is specifically used to control the switch unit to switch between on and off states when the speed of driving the target power transistor needs to be changed.

[0013] According to one embodiment of the present application, the deceleration module includes a variable capacitance device;

[0014] The control module is specifically configured to adjust the capacitance value of the variable capacitance device when the speed of driving the target power transistor needs to be changed.

[0015] According to one embodiment of the present application, the deceleration module includes a fixed capacitor and a variable resistor; the fixed capacitor and the variable resistor are connected in series;

[0016] The control module is specifically used to adjust the resistance value of the variable resistance device when the speed of driving the target power transistor needs to be changed.

[0017] According to an embodiment of the present application, the deceleration module further includes a fixed resistance device; the fixed resistance device, the first fixed capacitance device and the switch unit are connected in series.

[0018] According to one embodiment of the present application, the deceleration module further includes a first fixed resistance device and a second fixed resistance device;

[0019] The first fixed resistance device and the switch unit are connected in parallel and connected in series with the second fixed resistance device;

[0020] The first fixed resistance device or the switch unit is connected to the first fixed capacitance device; the second fixed resistance device is connected to the first fixed capacitance device.

[0021] According to one embodiment of the present application, the deceleration module further includes a first fixed resistance device and a second fixed resistance device;

[0022] The first fixed resistance device is connected to the first fixed capacitance device through the switch unit; the first fixed resistance device is also connected to the first fixed capacitance device through the second fixed resistance device; the switch unit is connected in parallel with the second fixed resistance device.

[0023] According to one embodiment of the present application, the deceleration module further includes a fixed resistance device and a second fixed capacitance device;

[0024] The second fixed capacitor and the switch unit are connected in parallel and in series with the first fixed capacitor;

[0025] The first fixed capacitor is connected to the fixed resistor; the second fixed capacitor or the switch unit is connected to the fixed resistor.

[0026] According to an embodiment of the present application, the deceleration module further includes a second fixed capacitor; the second fixed capacitor is connected in parallel with the switch unit.

[0027] According to an embodiment of the present application, the deceleration module further includes a fixed resistance device; the fixed resistance device is connected in series with the variable capacitance device.

[0028] According to one embodiment of the present application, the deceleration module further includes a fixed capacitor component and a fixed resistor component;

[0029] The fixed capacitor, the fixed resistor and the variable capacitor are connected in series; or the fixed capacitor and the variable capacitor connected in parallel are connected in series with the fixed resistor.

[0030] According to one embodiment of the present application, the variable resistance device includes a variable resistance element and a fixed resistance element; the variable resistance element is connected in series or in parallel with the fixed resistance element;

[0031] The control module is specifically used to adjust the resistance value of the variable resistance element when the speed of driving the target power transistor needs to be changed.

[0032] In a second aspect, the present application provides a method for suppressing voltage stress of a power transistor, wherein a deceleration module is provided between a gate of a target power transistor and a driving circuit of the target power transistor; the deceleration module is connected in parallel with the target power transistor; the method comprises:

[0033] determining whether a rate of driving the target power transistor needs to be changed based on an expected voltage stress of the target power transistor;

[0034] In the case that the speed of driving the target power transistor needs to be changed, the deceleration module is controlled so that the total impedance of the driving circuit and the deceleration module changes to change the speed of driving the target power transistor.

[0035] According to an embodiment of the present application, when the rate of driving the target power transistor needs to be changed, controlling the deceleration module includes:

[0036] In the case where the speed of driving the target power transistor needs to be reduced, the deceleration module is controlled so that the total impedance of the driving circuit and the deceleration module is reduced.

[0037] According to an embodiment of the present application, when the rate of driving the target power transistor needs to be changed, controlling the deceleration module includes:

[0038] In the case where the speed of driving the target power transistor needs to be increased, the deceleration module is controlled so that the total impedance of the driving circuit and the deceleration module increases.

[0039] According to an embodiment of the present application, after determining whether it is necessary to change the rate of driving the target power transistor based on the expected voltage stress of the target power transistor and before controlling the deceleration module, the method further includes:

[0040] The dead time of the target power transistor is increased.

[0041] According to an embodiment of the present application, after controlling the deceleration module, the method further includes:

[0042] The dead time of the target power transistor is reduced.

[0043] In a third aspect, the present application provides a power converter, comprising: a device for suppressing power transistor voltage stress, a drive circuit and a power conversion circuit as described in the first aspect; the power conversion circuit includes at least one pair of target power transistors.

[0044] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0046] Figure 1 It is one of the structural schematic diagrams of a device for suppressing voltage stress of a power transistor in the related art;

[0047] Figure 2 This is the second structural schematic diagram of a device for suppressing voltage stress of a power transistor in the related art;

[0048] Figure 3 This is the third structural schematic diagram of a device for suppressing voltage stress of a power transistor in the related art;

[0049] Figure 4 This is one of the structural schematic diagrams of the device for suppressing voltage stress of a power transistor provided in an embodiment of the present application;

[0050] Figure 5 This is the second structural schematic diagram of the device for suppressing voltage stress of a power transistor provided in an embodiment of the present application;

[0051] Figure 6 It is one of the structural schematic diagrams of the deceleration module provided in the embodiment of the present application;

[0052] Figure 7 This is the second structural schematic diagram of the deceleration module provided in the embodiment of the present application;

[0053] Figure 8 This is the third structural schematic diagram of the deceleration module provided in the embodiment of the present application;

[0054] Fig. 9 This is the fourth structural schematic diagram of the deceleration module provided in the embodiment of the present application;

[0055] Fig.10 This is the fifth structural diagram of the deceleration module provided in the embodiment of the present application;

[0056] Fig.11 This is the sixth structural diagram of the deceleration module provided in the embodiment of the present application;

[0057] Fig.12 This is the seventh structural diagram of the deceleration module provided in the embodiment of the present application;

[0058] Fig.13 This is the eighth structural diagram of the deceleration module provided in the embodiment of the present application;

[0059] Fig.14 This is the ninth structural diagram of the deceleration module provided in the embodiment of the present application;

[0060] Fig.15 This is the tenth structural diagram of the deceleration module provided in the embodiment of the present application;

[0061] Fig.16 This is the eleventh structural diagram of the deceleration module provided in the embodiment of the present application;

[0062] Fig.17 This is the twelfth structural diagram of the deceleration module provided in the embodiment of the present application;

[0063] Fig.18 is a flow chart of a method for suppressing voltage stress of a power transistor provided in an embodiment of the present application;

[0064] Fig.19 It is a schematic diagram of operating waveforms of two speed driving power transistors provided in an embodiment of the present application;

[0065] Fig. 20 It is one of the control logic schematic diagrams of the method for suppressing power transistor voltage stress provided by the embodiment of the present application;

[0066] Fig.21 This is the thirteenth structural diagram of the deceleration module provided in the embodiment of the present application;

[0067] Fig. 22 This is the second control logic diagram of the method for suppressing power transistor voltage stress provided by an embodiment of the present application;

[0068] Fig.23 This is the fourteenth structural diagram of the deceleration module provided in the embodiment of the present application;

[0069] Fig.24 This is the second control logic diagram of the method for suppressing power transistor voltage stress provided by an embodiment of the present application;

[0070] Fig.25 is a schematic diagram of the structure of a control module provided in an embodiment of the present application;

[0071] Fig.26 It is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0072] The following will be combined with the drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments in the present application belong to the scope of protection of this application.

[0073] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0074] In the related technology, the voltage stress of the power transistor may exceed its maximum tolerance under some working conditions. For example, the national standard GB / T 19964 "Technical Regulations for Photovoltaic Power Station Access to the Power System" points out: "When a fault in the power system causes the voltage at the grid connection point of the photovoltaic power station to increase, the photovoltaic power station should have a high voltage ride-through capability of up to 1.3 times". The higher AC voltage will pass through the photovoltaic inverter to raise the DC bus voltage, thereby increasing the voltage stress of the power transistor. The structure of the traditional drive circuit is fixed, so the implementation of this solution is relatively simple and does not require an additional adjustment mechanism, but it is difficult to achieve a balance between reducing the voltage stress of the power transistor and reducing the loss of the power transistor and the drive circuit. In addition, in order to ensure the reliability of the system, it is also necessary to design a large safety margin for the power transistor and the drive circuit, which increases the overall cost of the power converter.

[0075] In order to solve the above problems, it is necessary that under the working condition where the voltage stress of the power transistor may reach the maximum tolerance capacity, the driving circuit should be able to reduce its own driving rate to suppress the voltage of the power transistor from rising too quickly, so that the voltage stress of the power transistor is below the limit, and / or under the working condition where the voltage stress of the power transistor is significantly lower than the maximum tolerance capacity, the driving circuit should be able to increase its own driving rate to reduce the voltage-current overlap time in the power transistor and the voltage-current overlap time of the driving circuit, thereby reducing the loss of the power transistor and the driving circuit.

[0076] The basic structure of the conventional device for suppressing voltage stress of power transistors can be as follows: Figure 1As shown, the control module 110 generates a driving signal, and the driving circuit 130 processes the driving signal to control n pairs of power transistors in the power conversion circuit 140. Wherein, n is a positive integer.

[0077] Common methods for changing the driving rate of the driving circuit include: fixedly changing the driving resistance of the driving circuit, fixedly changing the driving voltage of the driving circuit, and using multiple driving voltage branches, etc. The above methods all involve constant changes to the structure and / or parameters of the driving circuit.

[0078] The advantages of the method of fixedly changing the driving resistance of the driving circuit include the ability to directly adjust the charging and discharging rates of the power transistor gate, but the limitations of this method include: a larger driving resistance will change the driving rate of all stages of the power transistor switching process, causing a sharp increase in the switching loss of the power transistor, and directly adjusting the driving impedance may cause oscillation of the power transistor gate, affecting its stable operation.

[0079] The advantages of the method of fixedly changing the driving voltage of the driving circuit include that the driving circuits of all power transistors can be uniformly adjusted, but the limitations of this method include: the driving voltage is usually filtered by a large-capacity capacitor, resulting in a slow voltage change rate, making it difficult to quickly respond to the need to adjust the driving rate.

[0080] The advantages of using multiple driving voltage branches include the ability to provide more flexible driving rate adjustment capabilities, but the limitations of this method include: the introduction of multiple driving voltage branches may cause some branches to be idle, which not only greatly increases the cost of the power converter, but also reduces its power density.

[0081] The circuit structure of the conventional device for suppressing voltage stress of power transistors can be as follows: Figure 3 In addition to the control module 110 and the driving circuit 130, the circuit structure may also include a driving signal transmission unit 160. The circuit structure includes several key components that work together to achieve effective driving of the power transistor.

[0082] The control module 110 may also be referred to as a control circuit. The control module 110 is used to generate a driving signal. The driving signal generated by the control module 110 is transmitted to the driving signal transmission unit 160 .

[0083] The drive signal transmission unit 160 can further process the signal to adapt to different application scenarios. The above processing may include but is not limited to signal modulation and demodulation, signal buffering or signal stabilization, etc. In some cases, the drive signal transmission unit 160 can also provide isolation and signal amplification functions to ensure the stability and strength of the signal.

[0084] The driving signal processed by the driving signal transmission unit 160 is then transmitted to the driving impedance network. The driving impedance network 170 is used to represent the equivalent impedance of the driving circuit 130. The driving impedance network 170 is used to adjust and optimize the transmission of the signal. The design of the driving impedance network 170 can be flexible and can selectively configure the series impedance network and / or the parallel impedance network according to the specific requirements of the circuit to achieve optimal performance.

[0085] The gate of the power transistor receives a driving signal processed by the driving impedance network 170, thereby achieving effective control of the power transistor.

[0086] In conjunction with the accompanying drawings, the following describes in detail the device and method for suppressing voltage stress of a power transistor and the power converter provided in the embodiments of the present application through specific embodiments and their application scenarios.

[0087] refer to Figure 4 , a device for suppressing voltage stress of a power transistor, comprising: a control module 110 and a deceleration module 120; the deceleration module 120 is arranged between the gate of a target power transistor and a driving circuit 130 of the power transistor; the deceleration module 120 is connected in parallel with the target power transistor.

[0088] In actual implementation, it can be done in related technologies (such as Figure 3 On the basis of the circuit structure shown in FIG. 1 , a deceleration module 120 is introduced between the driving circuit 130 of the power transistor and the gate of the target power transistor, thereby forming a new driving impedance network 170. The new driving impedance network 170 is used to represent the overall equivalent impedance of the driving circuit 130 and the deceleration module 120. The purpose of introducing the deceleration module 120 is to achieve precise control of the driving rate.

[0089] In some embodiments, the driving circuit 130 may include a series impedance network and / or a parallel impedance network. The parallel impedance network is an impedance network connected in parallel with the target power transistor, that is, the two ends of the parallel impedance network are respectively connected to the gates of a pair of target power transistors. The series impedance network is an impedance network connected in parallel with the target power transistor, that is, one end of the series impedance network is connected to the gate of the target power transistor, and the other end can be connected to the driving signal transmission unit 160.

[0090] It can be understood that the target power transistors may include n pairs of power transistors (n is a positive integer) in the power conversion circuit 140. A deceleration module 120 corresponding to each pair of target power transistors may be provided between the gates of each pair of target power transistors and the drive circuit 130. For each pair of target power transistors, both ends of the deceleration module 120 corresponding to the pair of target power transistors may be connected to the gates of the two target power transistors, respectively, thereby forming a structure in which the deceleration module 120 corresponding to the pair of target power transistors is connected in parallel with the pair of target power transistors.

[0091] The control module 110 is used to determine whether it is necessary to change the rate of driving the target power transistor based on the expected voltage stress of the target power transistor; if it is necessary to change the rate of driving the target power transistor, the deceleration module 120 is controlled so that the total impedance of the driving circuit 130 and the deceleration module 120 is changed to change the rate of driving the target power transistor.

[0092] In actual implementation, the control module 110 may determine whether to change the speed of driving the target power transistor based on the expected voltage stress of the target power transistor. Changing the speed of driving the target power transistor may include increasing the speed of driving the target power transistor and decreasing the speed of driving the target power transistor.

[0093] It should be noted that the device for suppressing voltage stress of power transistors can adopt a structure with sampling feedback function in the related art. This structural design allows accurate measurement of DC bus voltage. Figure 2 The sampling feedback function can generally be implemented based on the sampling circuit 150. The sampling circuit 150 can directly measure the DC bus voltage, or indirectly measure a voltage proportional to the bus voltage to obtain the voltage information of the DC bus. The above sampling value is transmitted to the control module 110 for further processing.

[0094] The control module 110 can perform accurate calculations based on the received sampled values ​​to determine the expected voltage stress of the target power transistor. In some embodiments, after obtaining the DC bus voltage Vdc, the control module 110 can predict and calculate the voltage stress of the target power transistor by combining at least one of experimental data, simulation results, and calculation formulas. For example, the control module 110 measures the DC bus voltage as Vdc, and the expected voltage stress of the target power transistor can be estimated by the formula Vdc+ΔV. Among them, ΔV can represent the incremental value of the voltage stress obtained in advance.

[0095] In some embodiments, the control module 110 may compare the acquired expected voltage stress of the target power transistor with a preset reference threshold. Based on the comparison result, the control module 110 may determine whether the drive circuit 130 operates in a low drive rate mode or a high drive rate mode. When the drive circuit 130 operates in the low drive rate mode, the target power transistor is driven at a lower first rate, while when the drive circuit 130 operates in the high drive rate mode, the target power transistor is driven at a lower second rate. The first rate is less than the second rate.

[0096] In actual implementation, when the speed of driving the target power transistor needs to be changed, the control module 110 can control the deceleration module 120 to change the total impedance of the driving circuit 130 and the deceleration module 120, thereby changing the speed of driving the target power transistor.

[0097] In some embodiments, controlling the deceleration module 120 may include at least one of controlling the deceleration module 120 to be connected to or not connected to the circuit and changing the impedance of the deceleration module 120 .

[0098] It can be understood that the total impedance of the driving circuit 130 and the deceleration module 120 is different when the deceleration module 120 is connected to the entire circuit compared to when the deceleration module 120 is not connected to the entire circuit. Therefore, by controlling whether the deceleration module 120 is connected to the circuit or not, the total impedance of the driving circuit 130 and the deceleration module 120 can be changed. When the deceleration module 120 is connected to the entire circuit, the total impedance of the driving circuit 130 and the deceleration module 120 can also be changed by changing the impedance of the deceleration module 120.

[0099] In some embodiments, when the deceleration module 120 includes a switch device, the control module 110 can control the deceleration module 120 to be connected to or not connected to the circuit and change the impedance of the deceleration module 120 by controlling the switch device.

[0100] In some embodiments, when the deceleration module 120 does not include a switch device, the deceleration module 120 may include an impedance-adjustable component (such as a variable resistor or a variable capacitor, etc.), and the control module 110 may change the impedance of the deceleration module 120 by controlling the above components. In some embodiments, the deceleration module 120 may include a capacitor device. In some embodiments, the control module 110 may control the deceleration module 120 by outputting a control signal to the deceleration module 120.

[0101] It should be noted that the control module 110 can still output a driving signal as in the related art. The driving signal is processed by the driving signal transmission unit 160 and then transmitted to the new driving impedance network 170 to drive the target power transistor. However, since the deceleration module 120 is controlled by the control signal, the total impedance of the driving circuit 130 and the deceleration module 120 is changed, so that the speed of driving the target power transistor is also changed.

[0102] It should be noted that the challenges faced by adjusting the driving rate of the power converter in the related art include: high loss of the switching power transistor, easy to cause power transistor gate oscillation and slow response speed. The above problems will affect the performance and stability of the power converter. In order to solve the above problems, the embodiment of the present application adopts an innovative idea, that is, by adjusting the speed reduction unit connected in parallel to the power transistor gate to adjust the change rate of the power transistor gate voltage, thereby reducing the power transistor voltage stress caused by parasitic inductance.

[0103] Compared with the method of fixedly changing the driving resistance of the driving circuit in the related art, the device for suppressing the voltage stress of the power transistor provided in the embodiment of the present application can reduce the loss of the switching power transistor. Compared with the method of fixedly changing the driving voltage of the driving circuit in the related art, the device for suppressing the voltage stress of the power transistor provided in the embodiment of the present application can achieve a faster response speed, that is, the speed of suppressing the voltage stress of the power transistor is faster. Compared with the method of using multiple driving voltage branches in the related art, the device for suppressing the voltage stress of the power transistor provided in the embodiment of the present application will not cause idle circuits, will not greatly increase the cost of the power converter, and will not reduce the power density of the power converter.

[0104] According to the device for suppressing the voltage stress of a power transistor provided in the embodiment of the present application, when the speed of driving the target power transistor needs to be changed, the control module controls the deceleration module disposed between the gate of the target power transistor and the driving circuit of the power transistor and connected in parallel with the target power transistor, changes the total impedance of the driving circuit and the deceleration module, thereby reducing the rate of change of the gate voltage of the target power transistor, suppressing the voltage stress of the target power transistor, and suppressing the voltage stress of the power transistor. The effect of suppressing the voltage stress of the power transistor is better, and the performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor can be reduced or even eliminated, and the performance and stability of the power converter can be improved. In addition, the device for suppressing the voltage stress of the power transistor provided in the embodiment of the present application has a wider regulation dimension compared with the related art.

[0105] In some embodiments, reference Figure 5 The control module 110 includes: a control unit 111 and a soft switching unit 112.

[0106] In actual implementation, the control module 110 may mainly consist of a control unit 111 and a soft switching unit 112 .

[0107] The control unit 111 is used to determine whether the speed of driving the target power transistor needs to be changed based on the expected voltage stress of the target power transistor; if the speed of driving the target power transistor needs to be changed, output a control signal.

[0108] In actual implementation, the control unit 111 can be used to implement the main functions of the aforementioned control module 110: based on the expected voltage stress of the target power transistor, determine whether it is necessary to change the speed of driving the target power transistor; if it is necessary to change the speed of driving the target power transistor, output a control signal. The control signal is used to control the deceleration module 120.

[0109] The soft switching unit 112 is used to buffer the control signal and then input it into the deceleration module 120 to control the deceleration module 120 so that the total impedance of the driving circuit 130 and the deceleration module 120 changes to change the speed of driving the target power transistor.

[0110] In actual execution, the control signal can be directly input into the control end of the deceleration module 120 to control the deceleration module 120 , or the control signal can be buffered by the soft switching unit 112 and then input into the control end of the deceleration module 120 to control the deceleration module 120 .

[0111] It should be noted that the voltage of the capacitor device in the deceleration module 120 may be inconsistent with the gate voltage of the target power transistor, which may cause the capacitor device to quickly change the gate voltage of the target power transistor when the two voltages do not match, thereby affecting the switching state of the target power transistor and the stability of the overall system (such as a power conversion circuit or the entire power converter).

[0112] A soft switching unit 112 is provided between the control unit 111 and the deceleration module 120, the purpose of which is to slow down the speed at which the deceleration module 120 is connected to or cut out of the entire circuit, or the speed at which the impedance of the deceleration module 120 changes, thereby avoiding a rapid change in the gate voltage of the target power transistor, so as to ensure the stability of the gate voltage of the target power transistor.

[0113] In some embodiments, when the deceleration module 120 includes a switch device, the soft switching unit 112 can be specifically used to slow down the rate of change of the control signal received by the switch device. When the deceleration module 120 includes the aforementioned impedance adjustable component, the soft switching unit 112 can be specifically used to slow down the rate of change of the control signal received by the impedance adjustable component.

[0114] In some embodiments, the soft switching unit 112 may use an RC (resistance-capacitance) circuit or an RCD (resistance-capacitance-diode) circuit, etc. By connecting the RC (resistance-capacitance) circuit or the RCD (resistance-capacitance-diode) circuit, etc. in series on the transmission path of the control signal, the RC (resistance-capacitance) circuit or the RCD (resistance-capacitance-diode) circuit, etc. may buffer the control signal output by the control unit 111, thereby achieving a reduction in the rate of change of the control signal received by the switch device and the switch device / or the impedance-adjustable component included in the deceleration module 120.

[0115] According to the device for suppressing power transistor voltage stress provided in the embodiment of the present application, by setting a soft switching unit to slow down the speed of change of the total impedance of the driving circuit and the deceleration module, the stability of the target power transistor gate voltage can be improved, and it has the advantages of higher stability and stronger adaptability.

[0116] In some embodiments, reference Figure 6 The deceleration module 120 includes: a first fixed capacitor device and a switch unit.

[0117] In actual implementation, the deceleration module 120 may have various forms. In a basic form, the deceleration module 120 may include a first fixed capacitor and a switch unit.

[0118] In some embodiments, the first fixed capacitor device may be a fixed capacitor with a fixed capacitance, for example Figure 6 The capacitor C1 in the embodiment of the present application is not limited to the specific parameters and type of the first fixed capacitor.

[0119] The switch unit can be Figure 6 As shown in the switch K1 in FIG. The type of the switch unit is not limited in the embodiment of the present application. For example, the switch unit may be a switch tube or a common switch. In some embodiments, the switch K1 may be a unidirectional conductive switch device or a bidirectional conductive switch device.

[0120] In some embodiments, reference Figure 6 , the first fixed capacitance device and the switch unit may be connected in series.

[0121] The control module 110 is specifically used to control the switch unit to switch between the on and off states when the speed of driving the target power transistor needs to be changed.

[0122] In actual implementation, when the speed of driving the target power transistor needs to be reduced, the control module 110 may control the switch unit (eg Figure 6The switch K1 in the circuit is turned on, and the switch unit is switched from the open state to the closed state, so that the deceleration module 120 is connected to the entire circuit, and the first fixed capacitor device (for example Figure 6 The capacitor C1 in the embodiment is connected in parallel to the gate of the target power transistor, and the total impedance of the driving circuit 130 and the deceleration module 120 is reduced, thereby reducing the speed of driving the target power transistor.

[0123] When the speed of driving the target power transistor needs to be increased, the control module 110 may control the switch unit (eg Figure 6 The switch K1 in the circuit is turned off, and the switch unit is switched from the closed state to the open state, so that the deceleration module 120 is cut off from the entire circuit and is not connected to the entire circuit. The first fixed capacitor device (for example Figure 6 The capacitor C1 in the control circuit 10 is no longer connected in parallel to the gate of the target power transistor, and the total impedance of the driving circuit 130 and the deceleration module 120 increases, thereby increasing the speed of driving the target power transistor.

[0124] According to the device for suppressing the voltage stress of a power transistor provided in an embodiment of the present application, the deceleration module includes a first fixed capacitor device and a switching unit, and the total impedance of the driving circuit and the deceleration module can be changed through the deceleration module, thereby reducing the change rate of the gate voltage of the target power transistor, thereby suppressing the voltage stress of the target power transistor, and the effect of suppressing the voltage stress of the power transistor is better. The performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor can be reduced or even eliminated, and the performance and stability of the power converter can be improved.

[0125] In some embodiments, reference Figure 7 , the deceleration module 120 includes a variable capacitance device.

[0126] In actual implementation, the deceleration module 120 may have various forms. In another basic form, the deceleration module 120 may include a variable capacitance device.

[0127] Variable capacitance devices can be Figure 7 The specific parameters and types of the variable capacitor element are not limited in the present embodiment. For example, the variable capacitor element can be any equivalent capacitor element with variable capacitance characteristics.

[0128] The control module 110 is specifically configured to adjust the capacitance value of the variable capacitance device when the speed of driving the target power transistor needs to be changed.

[0129] In actual implementation, when the speed of driving the target power transistor needs to be reduced, the control module 110 may control the variable capacitance device (eg Figure 7The capacitance C1 in the variable capacitance device increases, and the total impedance of the driving circuit 130 and the deceleration module 120 decreases, thereby reducing the speed of driving the target power transistor.

[0130] When the speed of driving the target power transistor needs to be increased, the control module 110 may control the variable capacitance device (eg Figure 7 The capacitance C1 in the variable capacitance device is reduced, and the total impedance of the driving circuit 130 and the deceleration module 120 is increased, thereby increasing the speed of driving the target power transistor.

[0131] According to the device for suppressing the voltage stress of a power transistor provided in an embodiment of the present application, the deceleration module includes a variable capacitor device, and the total impedance of the driving circuit and the deceleration module can be changed through the deceleration module, thereby reducing the change rate of the gate voltage of the target power transistor, thereby suppressing the voltage stress of the target power transistor, and the effect of suppressing the voltage stress of the power transistor is better. The performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor can be reduced or even eliminated, and the performance and stability of the power converter can be improved.

[0132] In some embodiments, reference Figure 8 and Fig. 9 The deceleration module 120 includes a fixed capacitor and a variable resistor; the fixed capacitor and the variable resistor are connected in series.

[0133] In actual implementation, the deceleration module 120 may include a fixed capacitor and a variable resistor connected in series. The fixed capacitor may be Figure 8 and Fig. 9 The specific parameters and types of the fixed capacitor components are not limited in the present embodiment.

[0134] The specific parameters and types of the variable resistor device are not limited in the embodiments of the present application. For example, the variable resistor device can be any equivalent resistor device with a variable capacitance characteristic. For example, Figure 8 and Fig. 9 The variable resistance device shown is formed by connecting a fixed resistor R1 and a variable resistor R3 in series and in parallel, respectively, or the variable resistance device may also use only the variable resistor R3.

[0135] The control module 110 is specifically configured to adjust the resistance value of the variable resistance device when the speed of driving the target power transistor needs to be changed.

[0136] In actual implementation, when it is necessary to reduce the rate of driving the target power transistor, the control module 110 can control the variable resistor device so that the resistance of the variable resistor device is reduced, and the total impedance of the driving circuit 130 and the deceleration module 120 is reduced, thereby reducing the rate of driving the target power transistor.

[0137] When the speed of driving the target power transistor needs to be increased, the variable resistance device increases the resistance value of the variable resistance device, and the total impedance of the driving circuit 130 and the deceleration module 120 increases, thereby increasing the speed of driving the target power transistor.

[0138] According to the device for suppressing the voltage stress of a power transistor provided in an embodiment of the present application, the deceleration module includes a fixed capacitor device and a variable resistor device connected in series, so that the total impedance of the driving circuit and the deceleration module can be changed through the deceleration module, thereby reducing the change rate of the gate voltage of the target power transistor, thereby suppressing the voltage stress of the target power transistor, and the effect of suppressing the voltage stress of the power transistor is better. The performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor can be reduced or even eliminated, and the performance and stability of the power converter can be improved.

[0139] In some embodiments, reference Fig.10 The deceleration module 120 also includes a fixed resistance device; the fixed resistance device, the first fixed capacitance device and the switch unit are connected in series.

[0140] In actual implementation, a fixed resistance device may be provided in the deceleration module 120, and the fixed resistance device is connected in series with the first fixed capacitance device and the switch unit. The fixed resistance device may function as a current limiting resistor.

[0141] In some embodiments, the fixed resistance device may be a fixed resistor with a fixed resistance value, for example Fig.10 The resistor R1 in the embodiment of the present application is not limited to the specific parameters and types of the fixed resistor device.

[0142] contrast Fig.10 and Figure 6 It is known that in Figure 6 On the basis of Fig.10 A fixed resistor device is added (specifically, it can be Fig.10 The fixed resistor R1 in the

[0143] According to the device for suppressing the voltage stress of the power transistor provided in the embodiment of the present application, by connecting the fixed resistance device, the first fixed capacitance device and the switch unit in series, in addition to achieving the technical effect of better suppressing the voltage stress of the power transistor, it can also effectively reduce the impact on the first fixed capacitance device and the switch unit and the gate of the target power transistor, further improving the performance and stability of the power converter.

[0144] In some embodiments, reference Fig.11 The deceleration module 120 also includes a first fixed resistance device and a second fixed resistance device; the first fixed resistance device and the switch unit connected in series are connected in parallel with the second fixed resistance device; the first fixed resistance device or the switch unit is connected to the first fixed capacitor device; the second fixed resistance device is connected to the first fixed capacitor device.

[0145] In actual implementation, Figure 6 On the basis of the basic structure shown, the deceleration module 120 may be further provided with a structure of multiple fixed resistance devices. Fig.11 The first fixed resistor device and the second fixed resistor device are resistor R1 and resistor R2 respectively. The first fixed resistor device and the second fixed resistor device can be any fixed resistor with a fixed resistance. The specific parameters and types of the first fixed resistor device and the second fixed resistor device are not limited in the embodiment of the present application.

[0146] In some embodiments, the first fixed resistor device and the second fixed resistor device may be connected in parallel and then connected to the first fixed capacitor device. The switch unit may be arranged in the branch where the first fixed resistor device is located (eg Fig.11 as shown) or on the branch where the second fixed resistance device is located.

[0147] When the speed of driving the target power transistor needs to be increased, the control module 110 may control the switch unit (eg Fig.11 The switch K1 in the switch is closed, and the switch unit is switched from the open state to the closed state, so that the first fixed capacitor (eg Fig.11 The resistance of the resistor in series with the capacitor C1 in the circuit 120 increases, the impedance of the deceleration module 120 decreases, and the total impedance of the driving circuit 130 and the deceleration module 120 decreases, thereby reducing the speed of driving the target power transistor.

[0148] for Fig.11 In the structure shown, the switch K1 is closed, the resistor R1 is actually connected to the entire circuit, the impedance of the deceleration module 120 is reduced, and the driving circuit 130 enters a low driving rate mode.

[0149] When the speed of driving the target power transistor needs to be increased, the control module 110 may control the switch unit (eg Fig.11 The switch K1 in the switch is turned off, and the switch unit is switched from the closed state to the open state, so that the first fixed capacitor (eg Fig.11 The resistance of the resistor in series with the capacitor C1 in the circuit 10 is reduced, the impedance of the deceleration module 120 is increased, and the total impedance of the driving circuit 130 and the deceleration module 120 is increased, thereby increasing the speed of driving the target power transistor.

[0150] for Fig.11 In the structure shown, the switch K1 is disconnected, the resistor R1 is not actually connected to the entire circuit, the impedance of the deceleration module 120 increases, and the driving circuit 130 enters a high driving rate mode.

[0151] In some embodiments, the resistance of the first fixed resistance device or the second fixed resistance device on the branch where the switch unit is provided may be 0. For example, Fig.11 The resistor R1 in the circuit can be a 0Ω resistor, which can also be called an R1 short-circuit configuration.

[0152] According to the device for suppressing the voltage stress of a power transistor provided in an embodiment of the present application, by connecting a first fixed resistance device and a switch unit in series with a second fixed resistance device in parallel, the first fixed resistance device or the switch unit is connected to the first fixed capacitance device, and the second fixed resistance device is connected to the first fixed capacitance device, it is possible to change the total impedance of the drive circuit and the deceleration module through the deceleration module, thereby reducing the rate of change of the gate voltage of the target power transistor, thereby suppressing the voltage stress of the target power transistor, and achieving a better effect of suppressing the voltage stress of the power transistor. It can reduce or even eliminate the performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor, and can improve the performance and stability of the power converter.

[0153] In some embodiments, reference Fig.12 The deceleration module 120 also includes a first fixed resistance device and a second fixed resistance device; the first fixed resistance device is connected to the first fixed capacitance device through a switch unit; the first fixed resistance device is also connected to the first fixed capacitance device through a second fixed resistance device; the switch unit is connected in parallel with the second fixed resistance device.

[0154] In actual implementation, Figure 6 On the basis of the basic structure shown, the deceleration module 120 may be further provided with a structure of multiple fixed resistance devices. Fig.12 The first fixed resistance device and the second fixed resistance device are resistor R1 and resistor R2 respectively.

[0155] Fig.11 and Fig.12 The difference is that Fig.12 The first fixed resistor device and the second fixed resistor device are connected in series, and the switch unit is connected in parallel with the first fixed resistor device or the second fixed resistor device.

[0156] When the speed of driving the target power transistor needs to be increased, the control module 110 may control the switch unit (eg Fig.12 The switch K1 in the switch is turned off, and the switch unit is switched from the closed state to the open state, so that the first fixed capacitor (eg Fig.12The resistance of the resistor in series with the capacitor C1 in the circuit 120 increases, the impedance of the deceleration module 120 decreases, and the total impedance of the driving circuit 130 and the deceleration module 120 decreases, thereby reducing the speed of driving the target power transistor.

[0157] for Fig.12 In the structure shown, the switch K1 is closed, the resistor R2 is short-circuited, the impedance of the deceleration module 120 is reduced, and the driving circuit 130 enters a low driving rate mode.

[0158] When the speed of driving the target power transistor needs to be increased, the control module 110 may control the switch unit (eg Fig.12 The switch K1 in the switch is closed, and the switch unit is switched from the open state to the closed state, so that the first fixed capacitor (eg Fig.12 The resistance of the resistor in series with the capacitor C1 in the circuit 10 is reduced, the impedance of the deceleration module 120 is increased, and the total impedance of the driving circuit 130 and the deceleration module 120 is increased, thereby increasing the speed of driving the target power transistor.

[0159] for Fig.12 In the structure shown, the switch K1 is disconnected, the resistor R2 is actually connected to the entire circuit, the impedance of the deceleration module 120 increases, and the driving circuit 130 enters a high driving rate mode.

[0160] In some embodiments, the resistance of the first fixed resistance device or the second fixed resistance device not connected in parallel with the switch unit may be 0. For example, Fig.12 The resistor R1 in the circuit can be a 0Ω resistor, which can also be called an R1 short-circuit configuration.

[0161] According to the device for suppressing the voltage stress of a power transistor provided in an embodiment of the present application, a first fixed resistance device is connected to a first fixed capacitance device through a switch unit, and the first fixed resistance device is also connected to the first fixed capacitance device through a second fixed resistance device. The switch unit is connected in parallel with the second fixed resistance device, and the total impedance of the driving circuit and the deceleration module can be changed through a deceleration module, thereby reducing the rate of change of the gate voltage of the target power transistor, thereby suppressing the voltage stress of the target power transistor, and suppressing the voltage stress of the power transistor. The effect of suppressing the voltage stress of the power transistor is better, and the performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor can be reduced or even eliminated, and the performance and stability of the power converter can be improved.

[0162] In some embodiments, reference Fig.13 The deceleration module 120 also includes a fixed resistance device and a second fixed capacitance device; the second fixed capacitance device and the switch unit connected in series are connected in parallel with the first fixed capacitance device; the first fixed capacitance device is connected to the fixed resistance device; the second fixed capacitance device or the switch unit is connected to the fixed resistance device.

[0163] In actual implementation, Figure 6 Based on the basic structure shown, fixed resistance devices (such as Fig.13 The resistor R1 in the embodiment) and the second fixed capacitor device (eg Fig.13 Capacitor C2 in the circuit).

[0164] In some embodiments, the second fixed capacitor device may be a fixed capacitor with a fixed capacitance value. The specific parameters and type of the second fixed capacitor device are not limited in the embodiments of the present application.

[0165] The first fixed capacitor is connected in series with the fixed resistor, and the second fixed capacitor is connected in series with the switch unit and then connected in parallel with the first fixed capacitor.

[0166] When the speed of driving the target power transistor needs to be increased, the control module 110 may control the switch unit (eg Fig.13 The switch K1 in the circuit is closed, the switch unit is switched from the open state to the closed state, the second fixed capacitor is actually connected to the circuit, the capacitance of the front end of the gate of the target power transistor increases, the impedance of the deceleration module 120 decreases, the total impedance of the drive circuit 130 and the deceleration module 120 decreases, and the drive circuit 130 enters a low drive rate mode, thereby reducing the rate of driving the target power transistor.

[0167] for Fig.13 In the structure shown, the switch K1 is closed, the capacitor C2 is actually connected to the entire circuit, the impedance of the deceleration module 120 is reduced, and the driving circuit 130 enters a low driving rate mode.

[0168] When the speed of driving the target power transistor needs to be increased, the control module 110 may control the switch unit (eg Fig.13 The switch K1 in the circuit is turned off, the switch unit is switched from the closed state to the open state, the second fixed capacitor is cut out of the circuit, the capacitance of the front end of the gate of the target power transistor is reduced, the impedance of the deceleration module 120 is increased, the total impedance of the drive circuit 130 and the deceleration module 120 is increased, and the drive circuit 130 enters the high drive rate mode, thereby increasing the rate of driving the target power transistor.

[0169] for Fig.13 In the structure shown, the switch K1 is disconnected, the capacitor C2 is short-circuited, the impedance of the deceleration module 120 increases, and the driving circuit 130 enters a high driving rate mode.

[0170] In some embodiments, the resistance of the first fixed resistor device may be 0. For example, Fig.13 The resistor R1 in the circuit can be a 0Ω resistor, which can also be called an R1 short-circuit configuration.

[0171] According to the device for suppressing the voltage stress of a power transistor provided in an embodiment of the present application, by connecting a second fixed capacitor device and a switch unit in series in parallel with the first fixed capacitor device, the first fixed capacitor device is connected to a fixed resistance device, and the second fixed capacitor device or the switch unit is connected to a fixed resistance device, it is possible to change the total impedance of the drive circuit and the deceleration module through the deceleration module, thereby reducing the rate of change of the gate voltage of the target power transistor, suppressing the voltage stress of the target power transistor, and achieving a better effect of suppressing the voltage stress of the power transistor. It can reduce or even eliminate the performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor, and can improve the performance and stability of the power converter.

[0172] In some embodiments, reference Fig.14 The deceleration module 120 also includes a second fixed capacitor; the second fixed capacitor is connected in parallel with the switch unit.

[0173] In actual implementation, Fig.10 On the basis of the basic structure shown, a second fixed capacitor device (eg Fig.14 Capacitor C2 in the circuit).

[0174] The first fixed capacitor, the fixed resistor and the second fixed capacitor are connected in series, and the switch unit is connected in parallel with the second fixed capacitor. The switch unit and the second fixed capacitor connected in parallel can be arranged at any position in the deceleration unit 120 .

[0175] When the speed of driving the target power transistor needs to be increased, the control module 110 may control the switch unit (eg Fig.14 The switch K1 in the circuit is closed, the switch unit is switched from the open state to the closed state, the second fixed capacitor is cut out of the circuit, the capacitance of the front end of the gate of the target power transistor increases, the impedance of the deceleration module 120 decreases, the total impedance of the drive circuit 130 and the deceleration module 120 decreases, and the drive circuit 130 enters a low drive rate mode, thereby reducing the rate of driving the target power transistor.

[0176] for Fig.14 In the structure shown, the switch K1 is closed, the capacitor C2 is short-circuited, the impedance of the deceleration module 120 is reduced, and the driving circuit 130 enters a low driving rate mode.

[0177] When the speed of driving the target power transistor needs to be increased, the control module 110 may control the switch unit (eg Fig.14The switch K1 in the circuit is turned off, the switch unit is switched from the closed state to the open state, the second fixed capacitor is actually connected to the circuit, the capacitance of the front end of the gate of the target power transistor is reduced, the impedance of the deceleration module 120 is increased, the total impedance of the drive circuit 130 and the deceleration module 120 is increased, and the drive circuit 130 enters the high drive rate mode, thereby increasing the rate of driving the target power transistor.

[0178] for Fig.14 In the structure shown, the switch K1 is disconnected, the capacitor C2 is actually connected to the entire circuit, the impedance of the deceleration module 120 increases, and the driving circuit 130 enters a high driving rate mode.

[0179] In some embodiments, the resistance of the first fixed resistor device may be 0. For example, Fig.14 The resistor R1 in the circuit can be a 0Ω resistor, which can also be called an R1 short-circuit configuration.

[0180] According to the device for suppressing the voltage stress of the power transistor provided in the embodiment of the present application, by connecting the second fixed capacitor device in parallel with the switching unit, it is possible to change the total impedance of the driving circuit and the deceleration module through the deceleration module, thereby reducing the change rate of the gate voltage of the target power transistor, thereby suppressing the voltage stress of the target power transistor, and achieving a better effect of suppressing the voltage stress of the power transistor. It can reduce or even eliminate the performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor, and can improve the performance and stability of the power converter.

[0181] In some embodiments, reference Fig.15 The deceleration module 120 also includes a fixed resistance device; the fixed resistance device is connected in series with the variable capacitance device.

[0182] In actual implementation, Figure 7 On the basis of the above, a fixed resistance device can also be provided in the deceleration module 120, and the fixed resistance device is connected in series with the variable capacitance device and the switch unit. The fixed resistance device can function as a current limiting resistor.

[0183] In some embodiments, the fixed resistance device may be a fixed resistor with a fixed resistance value, for example Fig.15 The resistor R1 in the embodiment of the present application is not limited to the specific parameters and types of the fixed resistor device.

[0184] According to the device for suppressing the voltage stress of the power transistor provided in the embodiment of the present application, by connecting a fixed resistance device in series with a variable capacitance device, in addition to achieving a better technical effect of suppressing the voltage stress of the power transistor, it can also effectively reduce the impact on the first fixed capacitance device and the switching unit and the gate of the target power transistor, further improving the performance and stability of the power converter.

[0185] In some embodiments, reference Fig.16 and Fig.17 The deceleration module 120 further includes a fixed capacitor and a fixed resistor; the fixed capacitor, the fixed resistor and the variable capacitor are connected in series; or, the fixed capacitor and the variable capacitor are connected in parallel and connected in series with the fixed resistor.

[0186] In actual implementation, Figure 7 On the basis of Fig.16 and Fig.17 The capacitor C2 in the figure) and the fixed resistor device (such as Fig.16 and Fig.17 The fixed resistance device and the variable capacitance device are connected in series, and the fixed capacitance device and the variable capacitance device are connected in series or in parallel.

[0187] In the case where the speed of driving the target power transistor needs to be reduced, the control module 110 may control the variable capacitance device (eg Fig.16 and Fig.17 The capacitance C1 in the variable capacitor increases the capacitance of the variable capacitor element, the total impedance of the driving circuit 130 and the deceleration module 120 decreases, and the driving circuit 130 enters a low driving rate mode, thereby reducing the rate of driving the target power transistor.

[0188] When the speed of driving the target power transistor needs to be increased, the control module 110 may control the variable capacitance device (eg Fig.16 and Fig.17 The capacitance C1 in the variable capacitor decreases, the total impedance of the driving circuit 130 and the deceleration module 120 increases, and the driving circuit 130 enters a high driving rate mode, thereby increasing the rate of driving the target power transistor.

[0189] In some embodiments, the resistance of the fixed resistor device can be 0. For example, Fig.16 and Fig.17 The resistor R1 in the circuit can be a 0Ω resistor, which can also be called an R1 short-circuit configuration.

[0190] According to the device for suppressing the voltage stress of a power transistor provided in an embodiment of the present application, the deceleration module includes a fixed capacitor device, a fixed resistor device and a variable capacitor device, and the total impedance of the driving circuit and the deceleration module can be changed through the deceleration module, thereby reducing the change rate of the gate voltage of the target power transistor, thereby suppressing the voltage stress of the target power transistor, and the effect of suppressing the voltage stress of the power transistor is better. The performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor can be reduced or even eliminated, and the performance and stability of the power converter can be improved.

[0191] In some embodiments, reference Figure 8 and Fig. 9 The variable resistance device includes a variable resistance element and a fixed resistance element; the variable resistance element and the fixed resistance element are connected in series or in parallel.

[0192] In actual implementation, the variable resistor device may include fixed resistor elements (eg Figure 8 and Fig. 9 The resistor R1 in the figure) and the variable resistor element (e.g. Figure 8 and Fig. 9 The resistor R3 in the circuit).

[0193] The control module 110 is specifically configured to adjust the resistance value of the variable resistance element when the speed of driving the target power transistor needs to be changed.

[0194] In actual implementation, the control module 110 may change the total impedance of the driving circuit 130 and the deceleration module 120 by adjusting the resistance value of the variable resistance element, thereby changing the speed of driving the target power transistor.

[0195] When the speed of driving the target power transistor needs to be reduced, the control module 110 may control the variable resistance element (eg Figure 8 and Fig. 9 The resistance R3 in the variable resistor element is reduced, the resistance of the entire variable resistor device is reduced, the total impedance of the drive circuit 130 and the deceleration module 120 is reduced, and the drive circuit 130 enters a low drive rate mode, thereby reducing the rate of driving the target power transistor.

[0196] When the speed of driving the target power transistor needs to be increased, the control module 110 may control the variable resistance element (eg Figure 8 and Fig. 9 The resistance R3 in the variable resistor increases the resistance of the variable resistor device, the resistance of the entire variable resistor device increases, the total impedance of the drive circuit 130 and the deceleration module 120 increases, and the drive circuit 130 enters a high drive rate mode, thereby increasing the rate of driving the target power transistor.

[0197] In some embodiments, the resistance of the fixed resistor element may be 0. For example, Figure 8 and Fig. 9 The resistor R1 in the circuit can be a 0Ω resistor, which can also be called an R1 short-circuit configuration.

[0198] According to the device for suppressing the voltage stress of a power transistor provided in the embodiment of the present application, by connecting a variable resistance element and a fixed resistance element in series or in parallel and then in series with a fixed capacitance element, the total impedance of the drive circuit and the deceleration module can be changed through the deceleration module, thereby reducing the rate of change of the gate voltage of the target power transistor, thereby suppressing the voltage stress of the target power transistor, and achieving a better effect of suppressing the voltage stress of the power transistor. The performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor can be reduced or even eliminated, and the performance and stability of the power converter can be improved.

[0199] The present application also provides a method for suppressing voltage stress of a power transistor. Fig.18 , the method includes: step 1810 and step 1820.

[0200] In actual implementation, the implementation of the method needs to be based on the fact that a deceleration module 120 is disposed between the gate of the target power transistor and the driving circuit 130 of the target power transistor, and the deceleration module 120 is connected in parallel with the target power transistor.

[0201] Step 1810: Determine whether a speed of driving the target power transistor needs to be changed based on the expected voltage stress of the target power transistor.

[0202] In actual implementation, the voltage stress of the target power transistor can be obtained according to the DC bus voltage. The specific method for obtaining the voltage stress of the target power transistor according to the DC bus voltage is not limited in the embodiment of the present application.

[0203] In some embodiments, the acquired target power transistor expected voltage stress may be compared with a preset reference threshold value. Based on the comparison result, it may be determined whether the driving circuit 130 operates in a low driving rate mode or a high driving rate mode.

[0204] In some embodiments, when the expected voltage stress of the target power transistor is greater than a preset reference threshold, it can be determined that the drive circuit 130 operates in a low drive rate mode; when the expected voltage stress of the target power transistor is less than a preset reference threshold, it can be determined that the drive circuit 130 operates in a high drive rate mode. The specific value of the reference threshold is not limited in the embodiments of the present application.

[0205] Step 1820 : When the speed of driving the target power transistor needs to be changed, control the deceleration module 120 so that the total impedance of the driving circuit 130 and the deceleration module 120 changes to change the speed of driving the target power transistor.

[0206] In actual implementation, when the speed of driving the target power transistor needs to be changed, the deceleration module 120 may be controlled to change the total impedance of the driving circuit 130 and the deceleration module 120 , thereby changing the speed of driving the target power transistor.

[0207] Combine the following Fig.19 The principle of the method for suppressing voltage stress of a power transistor provided in an embodiment of the present application is described. Fig.19 The operation waveform of a power transistor taking IGBT as an example in high and low driving speed modes is shown. The solid line represents the waveform in the high driving speed mode (the deceleration module 120 is not activated, that is, the total impedance of the driving circuit 130 and the deceleration module 120 increases), and the dot-dash line represents the waveform in the low driving speed mode (the deceleration module 120 is activated, that is, the total impedance of the driving circuit 130 and the deceleration module 120 decreases). The gate voltage Vge, collector-emitter voltage Vce and collector current i of the power transistor can be measured. c Make detailed observations.

[0208] Shutdown process analysis:

[0209] During the turn-off process of the power transistor, it can be observed that the gate voltage Vge first experiences the Miller platform. In the later stage of the Miller platform, Vge decreases slightly, and Vce begins to rise. When Vce reaches the bus voltage, the collector current i c The gate voltage Vge controls the collector current i c The rate of decrease of Vce causes a voltage spike.

[0210] Rate Impact Analysis:

[0211] By comparing the waveforms in the two modes, it can be found that in the low drive rate mode, the gate voltage Vge is c The rate of change during the falling period is slower, resulting in a decrease in the current change rate di / dt, which in turn reduces the peak value Vce_MAX of Vce. The above phenomenon can verify the effectiveness of the embodiment of the present application in reducing voltage spikes. Reducing voltage spikes can indicate that the voltage stress of the power transistor is suppressed.

[0212] According to the method for suppressing the voltage stress of a power transistor provided in an embodiment of the present application, when it is necessary to change the rate of driving the target power transistor, the deceleration module disposed between the gate of the target power transistor and the driving circuit of the power transistor and connected in parallel with the target power transistor is controlled to change the total impedance of the driving circuit and the deceleration module, thereby reducing the rate of change of the gate voltage of the target power transistor, thereby suppressing the voltage stress of the target power transistor, and suppressing the voltage stress of the power transistor. The effect of suppressing the voltage stress of the power transistor is better, and the performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor can be reduced or even eliminated, and the performance and stability of the power converter can be improved. In addition, the device for suppressing the voltage stress of the power transistor provided in the embodiment of the present application has a wider control dimension compared with the related art.

[0213] In some embodiments, when the rate of driving the target power transistor needs to be changed, the deceleration module 120 is controlled, including: when the rate of driving the target power transistor needs to be reduced, the deceleration module 120 is controlled so that the total impedance of the driving circuit 130 and the deceleration module 120 is reduced.

[0214] In actual implementation, when it is necessary to reduce the rate of driving the target power transistor, the deceleration module 120 can be controlled to actually connect to the circuit or the impedance of the deceleration module 120 can be reduced so that the total impedance of the driving circuit 130 and the deceleration module 120 is reduced, thereby reducing the rate of change of the gate voltage of the target power transistor.

[0215] According to the method for suppressing the voltage stress of a power transistor provided in an embodiment of the present application, by controlling a deceleration module disposed between the gate of the target power transistor and the driving circuit of the power transistor and connected in parallel with the target power transistor when it is necessary to reduce the rate of driving the target power transistor, the total impedance of the driving circuit and the deceleration module is reduced, thereby reducing the rate of change of the gate voltage of the target power transistor, thereby suppressing the voltage stress of the target power transistor. The effect of suppressing the voltage stress of the power transistor is better, and the performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor can be reduced or even eliminated, thereby improving the performance and stability of the power converter.

[0216] In some embodiments, when the rate of driving the target power transistor needs to be changed, the deceleration module 120 is controlled, including: when the rate of driving the target power transistor needs to be increased, the deceleration module 120 is controlled so that the total impedance of the driving circuit 130 and the deceleration module 120 increases.

[0217] In actual implementation, in order to increase the rate of reducing the driving speed of the target power transistor, the deceleration module 120 can be controlled to be cut out of the circuit function or the impedance of the deceleration module 120 can be increased so that the total impedance of the driving circuit 130 and the deceleration module 120 is increased, thereby increasing the rate of change of the gate voltage of the target power transistor.

[0218] According to the method for suppressing the voltage stress of a power transistor provided in an embodiment of the present application, by controlling a deceleration module disposed between the gate of the target power transistor and the driving circuit of the power transistor and connected in parallel with the target power transistor when the rate of driving the target power transistor needs to be increased, the total impedance of the driving circuit and the deceleration module is increased, thereby increasing the rate of change of the gate voltage of the target power transistor, thereby suppressing the voltage stress of the target power transistor, and achieving a better effect of suppressing the voltage stress of the power transistor. The performance and stability degradation of the power converter caused by suppressing the voltage stress of the target power transistor can be reduced or even eliminated, and the performance and stability of the power converter can be improved.

[0219] In some embodiments, after determining whether a rate of driving the target power transistor needs to be changed based on the expected voltage stress of the target power transistor and before controlling the deceleration module 120 , the method further includes increasing a dead time of the target power transistor.

[0220] In some embodiments, after controlling the deceleration module 120 , the method further includes: reducing a dead time of the target power transistor.

[0221] In actual implementation, two drive rate modes can be distinguished: low drive rate mode and high drive rate mode, and different dead time requirements are set for each mode. Compared with the high drive rate mode, since the switching action time of the power transistor is prolonged in the low drive rate mode, a longer dead time is required to ensure the stability of the circuit.

[0222] In order to ensure smooth transition between different drive rate modes and maintain circuit stability, the following switching control logic can be implemented, such as Fig. 20 shown.

[0223] In some embodiments, when the driving circuit 130 is currently in the high driving rate mode, the dead time of the target power transistor can be increased first, and then the deceleration unit 120 is activated. After a preset delay, the driving circuit 130 can smoothly transition to the low driving rate mode.

[0224] In some embodiments, when the driving circuit 130 is currently operating in a low driving rate mode, the deceleration unit 120 can be removed (ie, not activated) first, and after a delay, the dead time of the target power transistor is reduced, thereby switching the driving circuit 130 to a high driving rate mode.

[0225] The carefully designed control logic described above ensures that the circuit remains stable and responsive when switching between different drive rate modes, and avoids any instability that may be caused by fast switching.

[0226] In some embodiments, for the case where the switch device included in the deceleration unit 120 has unidirectional conductivity, Fig.21 and Fig.23 shown.

[0227] for Fig.21 When the switch K1 direction is shown, when switching from the high drive rate mode to the low drive rate mode, the dead time can be extended first, and then the deceleration unit 120 is activated during the off time period of the driving circuit 130. When switching from the low drive rate mode to the high drive rate mode, the deceleration unit 120 can be switched out first, and then the dead time can be shortened. The switching logic can be as follows: Fig. 22 shown.

[0228] The reason for waiting until the drive circuit 130 is turned off before the deceleration unit 120 is put into operation is that Fig.21 In the direction of switch K1 shown, when C1 is not activated, its voltage is the turn-off voltage of the gate drive. The activation of the deceleration unit 120 during the turn-off period will not affect the stability of the drive gate voltage.

[0229] for Fig.23 As shown in the switch K1 direction, when switching from high drive rate mode to low drive rate mode, the dead time can be extended first, and then the deceleration unit 120 is activated. When switching from low drive rate mode to high drive rate mode, the deceleration unit 120 can be switched out during the on time period of the driving circuit 130, and then the dead time can be shortened. The switching logic is as follows: Fig.24 shown.

[0230] The reason for switching out the deceleration unit after the driving circuit 130 is that Fig.23 In the direction of switch K1 shown, when C1 is not activated, its voltage is the turn-on voltage of the gate drive. Switching off the deceleration unit during the turn-on period will not affect the stability of the drive gate voltage.

[0231] According to the method for suppressing power transistor voltage stress provided by the embodiment of the present application, by clarifying the control method of control parameters such as dead time when switching each drive rate mode, it is helpful to smoothly transition each drive rate mode. In addition, in the control logic of switching different drive rate modes, the dead time control is coordinated with the circuit state switching, and the stability is higher.

[0232] An embodiment of the present application also provides a power converter, comprising: any of the aforementioned devices for suppressing voltage stress of power transistors, a drive circuit 130 and a power conversion circuit 140; the power conversion circuit 140 includes at least one pair of target power transistors.

[0233] The present application embodiment also provides a control module 110. Fig.25 As shown, the control module 110 may include: a determination subunit 2510 and a control subunit 2520 .

[0234] The determination subunit 2510 may be configured to determine whether a speed of driving the target power transistor needs to be changed based on an expected voltage stress of the target power transistor.

[0235] The control subunit 2520 may be configured to output a control signal to control the deceleration module 120 when the speed of driving the target power transistor needs to be changed.

[0236] In some embodiments, Fig.26 As shown, an embodiment of the present application also provides an electronic device 2600, including a processor 2601, a memory 2602, and a computer program stored in the memory 2602 and executable on the processor 2601. When the program is executed by the processor 2601, each process of the above-mentioned method embodiment for suppressing power transistor voltage stress is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be described here.

[0237] It should be noted that the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.

[0238] An embodiment of the present application also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the various processes of the above-mentioned method embodiment for suppressing power transistor voltage stress are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0239] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory ROM, a random access memory RAM, a magnetic disk or an optical disk.

[0240] An embodiment of the present application also provides a computer program product, including a computer program, which implements the above-mentioned method of suppressing power transistor voltage stress when executed by a processor.

[0241] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory ROM, a random access memory RAM, a magnetic disk or an optical disk.

[0242] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned method embodiment for suppressing power transistor voltage stress, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0243] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0244] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0245] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, a disk, or an optical disk), and includes a number of instructions for a terminal (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0246] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

[0247] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0248] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A device for suppressing voltage stress of a power transistor, characterized in that: include: Control module and deceleration module; The deceleration module is arranged between the gate of the target power transistor and the driving circuit of the power transistor; The deceleration module is connected in parallel with the target power transistor; The control module is used to determine whether a rate of driving the target power transistor needs to be changed based on an expected voltage stress of the target power transistor; In the case that the speed of driving the target power transistor needs to be changed, the deceleration module is controlled so that the total impedance of the driving circuit and the deceleration module changes to change the speed of driving the target power transistor.

2. The device for suppressing voltage stress of a power transistor according to claim 1, characterized in that: The control module comprises: A control unit, configured to determine whether a rate of driving the target power transistor needs to be changed based on an expected voltage stress of the target power transistor; and output a control signal if the rate of driving the target power transistor needs to be changed; The soft switching unit is used to buffer the control signal and then input it into the deceleration module to control the deceleration module so that the total impedance of the driving circuit and the deceleration module changes to change the rate of driving the target power transistor.

3. The device for suppressing voltage stress of a power transistor according to claim 1 or 2, characterized in that: The deceleration module comprises: a first fixed capacitor device and a switch unit; The control module is specifically used to control the switch unit to switch between on and off states when the speed of driving the target power transistor needs to be changed.

4. The device for suppressing voltage stress of a power transistor according to claim 1 or 2, characterized in that: The deceleration module includes a variable capacitor device; The control module is specifically configured to adjust the capacitance value of the variable capacitance device when the speed of driving the target power transistor needs to be changed.

5. The device for suppressing voltage stress of a power transistor according to claim 1 or 2, characterized in that: The deceleration module includes a fixed capacitor and a variable resistor; the fixed capacitor and the variable resistor are connected in series; The control module is specifically used to adjust the resistance value of the variable resistance device when the speed of driving the target power transistor needs to be changed.

6. The device for suppressing voltage stress of a power transistor according to claim 3, characterized in that: The deceleration module further includes a fixed resistance device; the fixed resistance device, the first fixed capacitance device and the switch unit are connected in series.

7. The device for suppressing voltage stress of a power transistor according to claim 3, characterized in that: The deceleration module further includes a first fixed resistance device and a second fixed resistance device; The first fixed resistance device and the switch unit are connected in parallel and connected in series with the second fixed resistance device; The first fixed resistance device or the switch unit is connected to the first fixed capacitance device; the second fixed resistance device is connected to the first fixed capacitance device.

8. The device for suppressing voltage stress of a power transistor according to claim 3, characterized in that: The deceleration module further includes a first fixed resistance device and a second fixed resistance device; The first fixed resistance device is connected to the first fixed capacitance device through the switch unit; the first fixed resistance device is also connected to the first fixed capacitance device through the second fixed resistance device; the switch unit is connected in parallel with the second fixed resistance device.

9. The device for suppressing voltage stress of a power transistor according to claim 3, characterized in that: The deceleration module further includes a fixed resistance component and a second fixed capacitance component; The second fixed capacitor and the switch unit are connected in parallel and in series with the first fixed capacitor; The first fixed capacitor is connected to the fixed resistor; the second fixed capacitor or the switch unit is connected to the fixed resistor.

10. The device for suppressing voltage stress of a power transistor according to claim 6, characterized in that: The deceleration module further includes a second fixed capacitor; the second fixed capacitor is connected in parallel with the switch unit.

11. The device for suppressing voltage stress of a power transistor according to claim 4, characterized in that: The deceleration module further includes a fixed resistance device; the fixed resistance device is connected in series with the variable capacitance device.

12. The device for suppressing voltage stress of a power transistor according to claim 4, characterized in that: The deceleration module further includes a fixed capacitor component and a fixed resistor component; The fixed capacitor, the fixed resistor and the variable capacitor are connected in series; or the fixed capacitor and the variable capacitor connected in parallel are connected in series with the fixed resistor.

13. The device for suppressing voltage stress of a power transistor according to claim 5, characterized in that: The variable resistance device comprises a variable resistance element and a fixed resistance element; the variable resistance element is connected in series or in parallel with the fixed resistance element; The control module is specifically used to adjust the resistance value of the variable resistance element when the speed of driving the target power transistor needs to be changed.

14. A method for suppressing voltage stress of a power transistor, characterized in that: A deceleration module is provided between the gate of the target power transistor and the driving circuit of the target power transistor; The deceleration module is connected in parallel with the target power transistor; the method comprises: Based on the expected voltage stress of the target power transistor, determining whether a rate of driving the target power transistor needs to be changed; In the case that the speed of driving the target power transistor needs to be changed, the deceleration module is controlled so that the total impedance of the driving circuit and the deceleration module changes to change the speed of driving the target power transistor.

15. The method for suppressing voltage stress of a power transistor according to claim 14, characterized in that: When the speed of driving the target power transistor needs to be changed, controlling the deceleration module comprises: In the case where the speed of driving the target power transistor needs to be reduced, the deceleration module is controlled so that the total impedance of the driving circuit and the deceleration module is reduced.

16. The method for suppressing voltage stress of a power transistor according to claim 14, characterized in that: When the speed of driving the target power transistor needs to be changed, controlling the deceleration module comprises: In the case where the speed of driving the target power transistor needs to be increased, the deceleration module is controlled so that the total impedance of the driving circuit and the deceleration module increases.

17. The method for suppressing voltage stress of a power transistor according to claim 15, characterized in that: After determining whether a rate of driving the target power transistor needs to be changed based on the expected voltage stress of the target power transistor and before controlling the deceleration module, the method further includes: The dead time of the target power transistor is increased.

18. The method for suppressing voltage stress of a power transistor according to claim 16, characterized in that: After controlling the deceleration module, the method further includes: The dead time of the target power transistor is reduced.

19. A power converter, characterized in that: include: A device for suppressing voltage stress of a power transistor, a driving circuit and a power conversion circuit as described in any one of claims 1 to 13; the power conversion circuit comprises at least one pair of target power transistors.

Images