Novel higher harmonic multi-resonant gate driver topology for SiC mosfet

Abstract

The invention belongs to the technical field of drive circuit improvement, and particularly relates to a novel higher harmonic multi-resonant gate driver topology for SiC mosfet, and the circuit comprises an input end interface Vin, drive circuit power supplies Vcc and Vee, bias circuits (R1-R2, D1-D4 and Q1-Q4), resistance-capacitance delay networks (R3, R4, R5, C1 and C2), resonant circuits (Lf, Lr, Ls, Cs and Cf), diode clamping circuits (D1 and D3) and gate drive parts (Rg, Ciss and S1). The grid source voltage is clamped to two unequal voltage levels through the novel higher harmonic multi-resonant grid driving topology, and the overall power consumption of the grid driver is effectively reduced.

Description

Technical Field

[0001] The invention belongs to the technical field of drive circuit improvement, and in particular relates to a novel high-order harmonic multi-resonance gate driver topology for SiC mosfet. Background Art

[0002] As the third generation of power semiconductor devices, SiC mosfet has the advantages of high temperature resistance, high voltage resistance, fast switching speed, and low switching loss. There are more and more research and applications on SiC mosfet. Replacing SiC IGBT with SiC mosfet can reduce switching loss and increase switching frequency, thereby improving the power density of the entire system of power electronic equipment. The driving circuit is very critical for the application of switching devices. Since the characteristics of SiC mosfet are different from those of commonly used silicon-based devices, it is necessary to study the driving circuit of SiC mosfet, including the very important short-circuit protection function. In addition, oscillation problems are prone to occur during fast switching, which is very important for the safe application of SiC mosfet and needs to be studied and analyzed.

[0003] Compared with silicon (Si) materials, silicon carbide (SiC) materials have the characteristics of large bandgap, high critical breakdown electric field strength, fast saturation drift speed and high thermal conductivity. SiC-based materials can achieve higher withstand voltage and higher operating junction temperature than Si-based materials; the characteristics of high electron mobility also enable them to have higher switching speeds; SiC-based devices have lower on-resistance and high-temperature stability. Therefore, SiC-based devices are widely used in high-frequency and high-temperature environments, which is beneficial to reducing their switching losses, shortening dead time, and increasing switching frequency. The increase in switching frequency can correspondingly reduce the volume of passive components, which is beneficial to increasing the conversion rate power density. The disadvantage is that it often causes electromagnetic interference (EMI) problems. In short, once the converter adopts SiC-based devices, the performance will be greatly improved.

[0004] Under the influence of high switching speed characteristics and the non-negligible parasitic parameters contained in the device, the crosstalk problem of SiC mosfet in the half-bridge module under the traditional driving mode is very serious. Most crosstalk suppression circuits often sacrifice the corresponding switching delay, increase switching loss and increase the complexity of the control process, and cannot balance the relationship well. High switching rate will bring transient voltage and current spikes, high-frequency oscillation, electromagnetic interference and other problems, while increasing the switching loss of the device, and even damage the device in severe cases. In summary, the study of new SiC mosfet is conducive to reducing the loss of power devices in the switching process and improving energy utilization efficiency. Summary of the invention

[0005] In view of the problems existing in the above-mentioned prior art, the present invention provides a novel high-harmonic multi-resonant gate driver topology for SiC mosfet. The multi-harmonic resonant network unique to the drive circuit topology can be used as a filter for the square wave fundamental frequency, third harmonic and fifth harmonic components of the input signal.

[0006] In order to achieve the above object, the present invention provides a novel high-harmonic multi-resonant gate driver topology for SiC mosfet, including an input terminal interface V in , drive circuit power supply V cc and V ee , bias circuit (R1-R2, D1-D4, Q1-Q4), RC delay network (R3, R4, R5, C1, C2), resonant circuit (L f , L r , L s , C s , C f ), diode clamp circuit (D1, D3), gate drive part (R g , C iss , S1);

[0007] Input signal V in After being isolated by the optocoupler, its secondary side is connected to the driving input terminal of the bias circuit, the primary side of the optocoupler is connected to the input signal source, and the secondary provides an isolated control signal;

[0008] V cc V is the positive bias power supply, providing a positive drive voltage, connected to the resistor R1 in the bias circuit, supplying power to the upper drive part, and providing a shutdown voltage for the positive bias part; ee It is a negative bias power supply, connected to the resistor R2 in the bias circuit, supplies power to the lower driving part, and provides a shutdown voltage for the negative bias part;

[0009] The anode of diode D2 is connected in series with resistor R1, and the cathode of diode D2 is connected in series with the collector of switch tube Q2, which together provide a path for positive drive; the anode of diode D4 is connected in series with resistor R2, and the cathode of diode D4 is connected in series with the collector of switch tube Q4, which together provide a path for negative drive; the bases of switch tubes Q2 and Q4 are connected and connected to the node between RC delay network C1 and R3; the emitters of switch tubes Q2 and Q4 are connected and connected to the gate resistor R of the gate drive circuit. g ;

[0010] The cathode of diode D1 is connected in series with the collector of switch tube Q1, which together provide a path for positive drive; the cathode of diode D3 is connected in series with the collector of switch tube Q3, which together provide a path for negative drive; the cathode of diode D1 is connected in series with the anode of diode D3, the bases of switch tubes Q1 and Q3 are connected, and connected to the node between RC delay network C2 and R5; the emitters of switch tubes Q1 and Q2 are connected, and connected to the gate resistor R of the gate drive circuit. g ;

[0011] R3 is connected in series with C1, R4, C2 and R5 are connected in series, and the two branches are connected in parallel to form a resistor-capacitor delay network. R3 and R4 are connected to the secondary output of the optocoupler. The resistor-capacitor network is connected between the bias circuit and the gate drive to ensure that the signal is smoothly transmitted to the main power device.

[0012] L r With L s Series, C s With C f Series, L r A single branch is formed, and three branches are connected in parallel to form a resonant circuit. One end of the resonant circuit is connected to the secondary output of the optocoupler, and the other end is connected to the cathode of the bias circuit diode D1 and the midpoint of the anode of the diode D3, which is used to suppress high-frequency oscillations and spikes during switching;

[0013] Gate resistance R g Connect to the gate of SiC mosfet device S1, SiC input capacitor C iss Connected in parallel to the gate and source of S1, the source of S1 is directly grounded and the drain can be connected to the main circuit load. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 is a topological diagram of a driving circuit of the present invention;

[0015] Figure 2 It is a working waveform diagram of the driving circuit of the present invention;

[0016] Figure 3 It is a simplified diagram of the equivalent driving circuit of the present invention. DETAILED DESCRIPTION

[0017] The present invention will be further described below in conjunction with the accompanying drawings.

[0018] like Figure 1 As shown, a new high-harmonic multi-resonant gate driver topology for SiC MOSFETs includes an input interface V in , drive circuit power supply V cc and V ee , bias circuit (R1-R2, D1-D4, Q1-Q4), RC delay network (R3, R4, R5, C1, C2), resonant circuit (Lf , L r , L s , C s , C f ), diode clamp circuit (D1, D3), gate drive part (R g , C iss , S1);

[0019] Input signal V in After being isolated by the optocoupler, its secondary side is connected to the driving input terminal of the bias circuit, the primary side of the optocoupler is connected to the input signal source, and the secondary provides an isolated control signal;

[0020] V cc V is the positive bias power supply, providing a positive drive voltage, connected to the resistor R1 in the bias circuit, supplying power to the upper drive part, and providing a shutdown voltage for the positive bias part; ee It is a negative bias power supply, connected to the resistor R2 in the bias circuit, supplies power to the lower driving part, and provides a shutdown voltage for the negative bias part;

[0021] The anode of diode D2 is connected in series with resistor R1, and the cathode of diode D2 is connected in series with the collector of switch tube Q2, which together provide a path for positive drive; the anode of diode D4 is connected in series with resistor R2, and the cathode of diode D4 is connected in series with the collector of switch tube Q4, which together provide a path for negative drive; the bases of switch tubes Q2 and Q4 are connected and connected to the node between RC delay network C1 and R3; the emitters of switch tubes Q2 and Q4 are connected and connected to the gate resistor R of the gate drive circuit. g ;

[0022] The cathode of diode D1 is connected in series with the collector of switch tube Q1, which together provide a path for positive drive; the cathode of diode D3 is connected in series with the collector of switch tube Q3, which together provide a path for negative drive; the cathode of diode D1 is connected in series with the anode of diode D3, the bases of switch tubes Q1 and Q3 are connected, and connected to the node between RC delay network C2 and R5; the emitters of switch tubes Q1 and Q2 are connected, and connected to the gate resistor R of the gate drive circuit. g ;

[0023] R3 is connected in series with C1, R4, C2 and R5 are connected in series, and the two branches are connected in parallel to form a resistor-capacitor delay network. R3 and R4 are connected to the secondary output of the optocoupler. The resistor-capacitor network is connected between the bias circuit and the gate drive to ensure that the signal is smoothly transmitted to the main power device.

[0024] L r With L s Series, C s With C f Series, L rA single branch is formed, and three branches are connected in parallel to form a resonant circuit. One end of the resonant circuit is connected to the secondary output of the optocoupler, and the other end is connected to the cathode of the bias circuit diode D1 and the midpoint of the anode of the diode D3, which is used to suppress high-frequency oscillations and spikes during switching;

[0025] Gate resistance R g Connect to the gate of SiC mosfet device S1, SiC input capacitor C iss Connected in parallel to the gate and source of S1, the source of S1 is directly grounded and the drain can be connected to the main circuit load.

[0026] The present invention provides a novel high-order harmonic multi-resonant gate driver topology for SiC MOSFET, wherein the operating waveform of one switching cycle is as follows: Figure 2 As shown, in each switching cycle, the gate drive circuit has four processes.

[0027] Process 1: At time t1, the turn-on transition is initiated by switching Q1. This causes the resonant network and C iss Energy transfer between them becomes possible. The voltage at Ciss starts to transition from -5V to 15V. All other switches remain OFF during this stage.

[0028] Process 2: At time t2, switch Q2 is turned on, V gs Clamp to the required 15V.

[0029] Process 3: Switch Q3 turns on and starts the turn-off phase of the mosfet. Energy is transferred from C iss Transfer to the resonant network, C iss The charge in it begins to decrease.

[0030] Process 4: Losses associated with circuit parasitic elements V gs drops to greater than -5V. Switch Q4 is turned on at t4 to compensate for the voltage loss, V gs is clamped to the required -5V.

[0031] By analyzing the working principle of the resonant gate drive circuit, the proposed new resonant gate drive circuit topology can be simplified, such as Figure 3 As shown, the input terminal of the simplified circuit model inputs a square wave signal containing only the fundamental wave, the third harmonic and the fifth harmonic.

[0032] According to the equivalent circuit, the input impedance Z when the output is short-circuited can be calculated mr :

[0033]

[0034] In the formula, ω s =2πf s , f s is the fundamental frequency of the input signal, Lr , L s , C s , L f and C f is the resonant element of the multi-frequency resonant network. The input impedance expression can be further derived from formula (1):

[0035]

[0036] Based on the derived new resonant gate drive circuit input impedance expression, reasonable resonant inductance and capacitance values ​​are selected to reduce energy loss. iss After the value, L r It can be calculated by formula (3):

[0037]

[0038] L s and L f It can be calculated by formula (4) (5):

[0039]

[0040] C s and C f This is the initial design parameter, and the appropriate value can be selected based on the internal capacity of the equipment and the budget.

[0041] Ignore the switching loss and only consider the conduction loss of the resonant circuit. g The total conduction loss of the fundamental wave, third harmonic and fifth harmonic P Rg It can be expressed as formula (6):

[0042]

[0043] Among them, V i It can be calculated by formula (7):

[0044]

[0045] The same calculation method as above, the conduction loss P of SiC devices Q1, Q2, Q3 and Q4 is Cb It can be expressed as formula (8):

[0046]

[0047] In the formula, R on is the device on-resistance, i c is the circulating current. Therefore, the total loss P of the new high-harmonic multi-resonant gate driver is gate It can be expressed as formula (9):

[0048] P gate=P Rg +P Cb (9)

[0049] The effectiveness of the proposed new high-harmonic multi-resonant gate driver design method for SiC MOSFETs can be verified by analyzing the circuit losses.

Claims

1. A novel high-harmonic multi-resonant gate driver topology for SiC mosfets, characterized in that: Including input interface V in , drive circuit power supply V cc and V ee , bias circuit (R1-R2, D1-D4, Q1-Q4), RC delay network (R3, R4, R5, C1, C2), resonant circuit (L f , L r , L s , C s , C f ), diode clamp circuit (D1, D3), gate drive part (R g , C iss , S1); Input signal V in After being isolated by the optocoupler, its secondary side is connected to the driving input terminal of the bias circuit, the primary side of the optocoupler is connected to the input signal source, and the secondary provides an isolated control signal; V cc V is the positive bias power supply, providing a positive drive voltage, connected to the resistor R1 in the bias circuit, supplying power to the upper drive part, and providing a shutdown voltage for the positive bias part; ee It is a negative bias power supply, connected to the resistor R2 in the bias circuit, supplies power to the lower driving part, and provides a shutdown voltage for the negative bias part; The anode of diode D2 is connected in series with resistor R1, and the cathode of diode D2 is connected in series with the collector of switch tube Q2, which together provide a path for positive drive; the anode of diode D4 is connected in series with resistor R2, and the cathode of diode D4 is connected in series with the collector of switch tube Q4, which together provide a path for negative drive; the bases of switch tubes Q2 and Q4 are connected and connected to the node between RC delay network C1 and R3; the emitters of switch tubes Q2 and Q4 are connected and connected to the gate resistor R of the gate drive circuit. g ; The cathode of diode D1 is connected in series with the collector of switch tube Q1, which together provide a path for forward drive; The cathode of diode D3 is connected in series with the collector of switch tube Q3, which together provide a path for negative drive; the cathode of diode D1 is connected in series with the anode of diode D3, the bases of switch tubes Q1 and Q3 are connected, and connected to the node between RC delay network C2 and R5; the emitters of switch tubes Q1 and Q2 are connected, and connected to the gate resistor R of the gate drive circuit. g ; R3 is connected in series with C1, R4, C2 and R5 are connected in series, and the two branches are connected in parallel to form a resistor-capacitor delay network. R3 and R4 are connected to the secondary output of the optocoupler. The resistor-capacitor network is connected between the bias circuit and the gate drive to ensure that the signal is smoothly transmitted to the main power device. L r With L s Series, C s With C f Series, L r A single branch is formed, and three branches are connected in parallel to form a resonant circuit. One end of the resonant circuit is connected to the secondary output of the optocoupler, and the other end is connected to the cathode of the bias circuit diode D1 and the midpoint of the anode of the diode D3, which is used to suppress high-frequency oscillations and spikes during switching; Gate resistance R g Connect to the gate of SiC mosfet device S1, SiC input capacitor C iss Connected in parallel to the gate and source of S1, the source of S1 is directly grounded and the drain can be connected to the main circuit load.

2. A novel high-harmonic multi-resonant gate driver topology for SiC mosfet according to claim 1, characterized in that: The branch diodes D1-D4 are all fast recovery diodes or Schottky diodes.

3. A novel high-harmonic multi-resonant gate driver topology for SiC mosfet according to claim 1, characterized in that: The power switch tubes are all MOS tubes or IGBT tubes.

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