Subtraction state maximum likelihood sequence detection device and method

Abstract

The invention relates to the technical field of communication, in particular to a subtraction state maximum likelihood sequence detection device and method.The device comprises a first forward equalizer, a second forward equalizer, a decision device and a subtraction state maximum likelihood sequence detector, the output end of the first forward equalizer is connected with the input end of the subtraction state maximum likelihood sequence detector, and the output end of the second forward equalizer is connected with the input end of the decision device; the output end of the second forward equalizer is connected with the decision device, and the output end of the decision device is connected with the input end of the subtractive state maximum likelihood sequence detector; the first forward equalizer is used for carrying out equalization processing on output signals of the analog-to-digital converter and equalizing intersymbol interference except for h1, and the second forward equalizer is used for equalizing h1; and the reduced state maximum likelihood sequence detector is used for reducing the state of the n-level modulator PAMn at each moment into three states according to the judgment result of the judgment device, and carrying out maximum likelihood sequence detection. According to the invention, the processing complexity can be reduced, and the MLSD performance can be ensured at the same time.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a state-reduced maximum likelihood sequence detection method and device. Background Art

[0002] As the serdes (serializer-to-serializer) rate continues to increase, modulation applications such as PAM4 and PAM8 are becoming more and more widespread. In these PAMn (n is 4 / 8 / 16, etc.) applications, MLSD (maximum likelihood sequence detector) is a key module, which has a high implementation complexity, resulting in large area and power consumption. In these applications, the complexity of MLSD mainly comes from the number of state branches. Full-state MLSD has the best performance but the highest complexity, so some scholars have proposed reduced-state MLSD.

[0003] However, although some improved reduced-state MLSDs have reduced complexity, their performance has also declined significantly. For example, decision feedback equalizers (DFEs) are usually used in reduced-state MLSD application circuits, and DFEs can cause bit error transmission, affecting the performance of subsequent FEC (forward error correction codes). Summary of the invention

[0004] In view of this, the present invention provides a reduced-state maximum likelihood sequence detection device and method, which can reduce the area and power consumption of MLSD while ensuring the performance of MLSD.

[0005] In order to achieve the aforementioned object, the present invention provides the following technical solutions: A state-reduced maximum likelihood sequence detection device comprises a first forward equalizer, a second forward equalizer, a decision device and a state-reduced maximum likelihood sequence detector, wherein the output end of the first forward equalizer is connected to the input end of the state-reduced maximum likelihood sequence detector, the output end of the second forward equalizer is connected to the decision device, and the output end of the decision device is connected to the input end of the state-reduced maximum likelihood sequence detector; The first forward equalizer is used to perform equalization processing on the output signal of the analog-to-digital converter to equalize the inter-symbol interference outside the first coefficient, and the second forward equalizer is used to equalize the first coefficient; The reduced state maximum likelihood sequence detector is used to reduce the state of the n-level modulator PAMn at each moment to three states according to the decision result of the decider, and perform maximum likelihood sequence detection.

[0006] In a more optimized scheme, a channel estimator is also included, and the output end of the first forward equalizer and the output end of the decision device are respectively connected to the input end of the channel estimator, and the output end of the channel estimator is connected to the input end of the reduced state maximum likelihood sequence detector, and the channel estimator is used to adaptively update the first coefficient.

[0007] The above scheme also includes a channel estimator for adaptively updating the first coefficient, so that the channel parameters change with the channel environment, thereby improving the effect. Moreover, using the decision result of the second FFE and the output of the first FFE, only the first coefficient and the second coefficient need to be calculated, so the channel parameters are calculated less and the complexity is low.

[0008] In one possible implementation, the channel estimator includes a filter composed of two multipliers, two adders and an adaptive module, the outputs of the two multipliers are connected to the input of one adder, the output of the adder is connected to the input of another adder, and the output of the other adder is connected to the input of the adaptive module; The decision result is multiplied by the second coefficient through a multiplier, and the decision result is delayed for a time and then multiplied by the first coefficient through another multiplier. The two multiplied results are added through an adder and then subtracted from the result output by the first forward equalizer to obtain an error signal. The error signal and the decision result are passed through an adaptive module to obtain an updated first coefficient.

[0009] After the adaptive module obtains the decision result and error signal at time k, it first calculates the values ​​of the first coefficient and the second coefficient at time k, h0(k)=h0(k-1)+u*err*d k ,h1(k)=h1(k-1)+u*err*d k-1 , h0(k) is the value of the second coefficient at time k, h0(k-1) is the value of the second coefficient at time k-1, u is the update factor, err is the error signal, d k is the decision result at time k, d k-1 is the decision result at time k-1, h1(k) is the value of the first coefficient at time k, and h1(k-1) is the value of the first coefficient at time k-1; then the first coefficient and the second coefficient in the filter are updated using the calculated first coefficient and the second coefficient.

[0010] In one possible implementation scheme, the reduced-state MLSD includes a state search module and a Viterbi decoding module. The output of the state search module is connected to the input of the Viterbi decoding module. The output of the state search module, the result of the output of the first forward equalizer, and the first coefficient are used together as the input of the Viterbi decoding module. The Viterbi decoding module outputs the detection result. The state search module reduces the state at each moment from n to 3 according to the decision result of the decider.

[0011] A state-reduced maximum likelihood sequence detection method comprises the following steps: Arranging a first forward equalizer to perform equalization processing on the output signal of the analog-to-digital converter to equalize the inter-symbol interference outside the first coefficient, and arranging a second forward equalizer to equalize the first coefficient; Making a decision on the result output by the second forward equalizer, and outputting the decision result; The state of the n-level modulator PAMn at each moment is reduced to three states according to the decision result, and maximum likelihood sequence detection is performed based on the result output by the first forward equalizer.

[0012] It also includes the steps of: adaptively updating the first coefficient according to the decision result and the result output by the first forward equalizer; The process of performing maximum likelihood sequence detection based on the result output by the first forward equalizer includes: performing maximum likelihood sequence detection based on the result output by the first forward equalizer and the updated first coefficient.

[0013] The process of adaptively updating the first coefficient according to the decision result and the result output by the first forward equalizer includes: Delaying the decision result by one time and multiplying the result by the first coefficient, multiplying the decision result by the second coefficient, and then accumulating the two multiplied results; Subtracting the accumulated result from the result output by the first forward equalizer to obtain an error signal; The first coefficient is adaptively updated according to the error signal and the decision result.

[0014] The process of adaptively updating the first coefficient according to the error signal and the decision result includes: First calculate the values ​​of the first coefficient and the second coefficient at time k, h0(k)=h0(k-1)+u*err*d k ,h1(k)=h1(k-1)+u*err*d k-1 , h0(k) is the value of the second coefficient at time k, h0(k-1) is the value of the second coefficient at time k-1, u is the update factor, err is the error signal, d k is the decision result at time k, d k-1 is the decision result at time k-1, h1(k) is the value of the first coefficient at time k, and h1(k-1) is the value of the first coefficient at time k-1; The first coefficient and the second coefficient are then updated using the calculated values ​​of the first coefficient and the second coefficient.

[0015] The reducing the state of the n-level modulator PAMn at each moment to three states according to the decision result includes: taking the decision result and its two adjacent states as the states of MLSD, so as to reduce the state from n to three.

[0016] The processing of performing maximum likelihood sequence detection based on the result output by the first forward equalizer comprises: Calculate branch metric BM: BM i,j =(yk -L(S k,j )-L(S k-1,i )*h1) 2 i∈{0 1 2}, j∈{0 1 2}, L(S k-1,i ) is the i-th possible decision result at time k-1, L(S k,j ) is the jth possible decision result at time k, and each j at time k corresponds to 3 i at time k-1, i=0,1,2; j=0,1,2; Calculate the path metric PM and select the surviving path: The cumulative BM corresponding to each i at time k-1 is PM, find the smallest path among the three i, and select this smallest path as the PM of each j at time k. , PM is calculated from kL to time k, L is the backtracking length, and finally 3 PMs at time k are obtained. The one with the smallest value among the 3 PMs is selected as the surviving path, which contains the states retained in the 3 states from kL to time k; Backtracking decoding: Backtrack according to the surviving path to find the state corresponding to the surviving path. The state is one of the three states at each moment. Complete the decoding and obtain the maximum likelihood sequence.

[0017] Compared with the prior art, the present invention utilizes two forward equalizers to perform equalization processing, and the second forward equalizer and the decision device to decide the signal, so that no error transmission occurs, thereby ensuring the MLSD performance; by reducing the state MLSD, the number of states is reduced from n to 3, thereby greatly reducing the complexity, so the present invention has the advantages of power consumption, area and performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The disclosure of the present invention will become more apparent with reference to the accompanying drawings. It should be understood that these drawings are only for illustrative purposes and are not intended to limit the scope of protection of the present invention. In the drawings: Figure 1 Schematic diagram of the structure of the state-reduced maximum likelihood sequence detection device in the embodiment.

[0019] Figure 2 Schematic diagram of the PAM4 signal after the second FFE equalization.

[0020] Figure 3 FIG. 4 is a schematic diagram of the structure of a channel estimator in an embodiment.

[0021] Figure 4 Flow chart of the adaptive algorithm in the embodiment.

[0022] Figure 5 Schematic diagram of the branch path of traditional PAM4.

[0023] Figure 6Schematic diagram of the branch path of PAM4 in this embodiment.

[0024] Figure 7 It is a schematic diagram of the composition of the subtractive state MLSD in the embodiment.

[0025] Figure 8 Flow chart of the state-reduced maximum likelihood sequence detection method in an embodiment. DETAILED DESCRIPTION

[0026] With reference to the accompanying drawings and specific embodiments, the structure, composition, characteristics and advantages of the vehicle-mounted high-speed transmitting circuit of the present invention, including the serializer / deserializer thereof and the use method thereof, will be explained below in an exemplary manner. However, all descriptions should not be used to form any limitations on the present invention.

[0027] See also Figure 1 In this embodiment, a state-reduced maximum likelihood sequence detection device is provided, including an analog-to-digital converter, a first forward equalizer, a second forward equalizer, a decision device, a channel estimator, and a state-reduced maximum likelihood sequence detector. To simplify the description, and based on the common description method in the industry, the analog-to-digital converter is described as ADC, the first forward equalizer is described as a first FFE, the second forward equalizer is described as a second FFE, and the state-reduced maximum likelihood sequence detector is described as a state-reduced MLSD.

[0028] See also Figure 1 The output end of the ADC is connected to the input end of the first FFE and the input end of the second FFE respectively, the output end of the first FFE is connected to the input end of the channel estimator and the input end of the subtraction state MLSD respectively, the output end of the second FFE is connected to the input end of the decision device, the output end of the decision device is connected to the input end of the channel estimator and the input end of the subtraction state MLSD respectively, and the output end of the channel estimator is connected to the input end of the subtraction state MLSD.

[0029] like Figure 1 As shown, r(t) is the input signal, and the signal at time k after passing through the ADC is x k .x k After the first FFE, it is y k , x k After the second FFE, it is s k ,s k After passing through the decision device, it is judged as d k The channel estimator uses x k and d k Get the updated channel parameter h1, h1 represents the first backward ISI (inter-symbol interference) value of the signal impulse response, h1, d k ,y k Enter the subtraction state MLSD to obtain the final output d of the system m .

[0030] The first FFE in this article is an FFE including multiple tap coefficients, and the second FFE is an FFE including a few tap coefficients, that is, the number of tap coefficients of the first FFE is greater than the number of tap coefficients of the second FFE.

[0031] The tap coefficients of the first FFE are sufficient to cover the ISI and reflection outside the first coefficient h1 as much as possible, and the first coefficient h1 is not equalized, that is, the coefficient corresponding to h1 is set to 0. After this first FFE, there is basically no ISI. The equalization principle expression of the first FFE is , is the FFE tap coefficient, N is the number of rear taps, M is the number of front taps, Indicates that the first backward tap is not included.

[0032] The tap coefficients of the second FFE do not need to be too many, just covering the ISI at the main position, equalizing h1. After the second FFE, the signal has a small amount of residual ISI. Although the residual ISI may cause the decision maker to make an error, this error can be solved by reducing the state MLSD. The equalization principle of the second FFE is expressed as: , is the FFE tap coefficient, B is the number of rear taps, and A is the number of front taps.

[0033] The function of the decision device is to convert the equalized signal with residual ISI and noise into a signal without ISI and noise. For example, the PAMn signal is converted into a d k is [0 1…n-1]. For example Figure 2 As shown, the points in the figure represent s k , is a series of PAM4 signals. Due to the influence of noise and ISI, the signal will fluctuate around the expected value {vp0, vp1, vp2, vp3}. The three dotted lines represent the decision level {vth0 vth1 vth2}, and the four solid lines represent d k {0 1 2 3},s k It will be judged as 3 only if it is greater than vth2, s k Greater than vth1 and less than vth2 is judged as 2, s k Greater than vth0 and less than vth1 is judged as 1, s k Less than vth0 is judged as 0. Due to the influence of noise, judgment errors may occur, but after the second FFE equalization, the error rate will not be very high.

[0034] See also Figure 3 The channel estimator consists of a filter consisting of two multipliers, two adders and an adaptive module, d k After a multiplier and h0, d kAfter being delayed by a time step by the delay module D, it becomes d k-1 After that, it is multiplied by h1 through another multiplier, and the two multiplication results are added through an adder to obtain y k’ , that is, dk is filtered by [h0 h1] to obtain y k’ ,y k’ =d k *h0 + d k-1 *h1.y k’ After another adder and y k After subtraction, the error signal err is obtained, that is, the filtered signal y k’ Subtract y k That is the error signal, err=y k’ -y k err and d k The channel parameters are obtained through the adaptive module.

[0035] The adaptive module executes the adaptive algorithm. The adaptive algorithm process is as follows: Figure 4 As shown. Get d at time k k After calculating the value of h1 and h0 at time k, h0(k)=h0(k-1)+u*err*d k ,h1(k)=h1(k-1)+u*err*d k-1 , use the calculated h1, h0 to update h1, h0 in the filter.

[0036] u is the update factor, and the adaptive algorithm will update the parameter value at every moment, that is, continuous adaptation. Affected by temperature and other factors, the channel parameters will change. In this embodiment, the adaptive algorithm can always update h1 to follow the changes in the channel, thereby ensuring the MLSD calculation performance. Moreover, using the judgment of the second FFE and the output of the first FFE, only the two channel parameters h0 and h1 need to be calculated, so the channel parameters are calculated less and the complexity is low.

[0037] MLSD is a method in which the calculation goal is to find a set of d={d0 d1 d2…dn} when Y={y0 y1…yn} is known, so that Pr{Y|d} is the maximum likelihood, where Pr represents the probability and d is the maximum likelihood sequence of the output. The maximum likelihood sequence method is a commonly used Viterbi decoding method.

[0038] See also Figure 7 The state-reduced MLSD includes a state search module and a Viterbi decoding module. The output of the state search module is connected to the input of the Viterbi decoding module. The output of the state search module is connected to the input of the Viterbi decoding module. k , h1 together serve as the input of the Viterbi decoding module, and the Viterbi decoding module outputs dm.

[0039] The state search module is used to reduce the number of MLSD states. To implement MLSD, we must first know the state at each moment. The number of states is the key to determining the complexity of MLSD. For PAMn, this method reduces the number of states at each moment from n to 3. For example, Figure 5 The traditional pam4 shown has 4 states, Figure 6 The state of this scheme is reduced to 3 states. The state selection of this method is combined with the decision device. If a bit error occurs after the decision, the correct signal is most likely to be an adjacent symbol, that is, d k and its two adjacent symbols as states. As shown in Tables 1 and 2 below, according to d k Get the other two states, the other two states are d k The adjacent symbol of d k If it is the outermost symbol, it is an adjacent symbol. k and db k For example, the decision result at time k is d k is 0. If a decision error occurs due to noise, the correct decision should be 1. The decision result d at time k k is 1. If a decision error occurs due to noise ISI, etc., the correct decision should be 0 or 2.

[0040] Table 1: PAM4 MLSD minus state corresponding state table <![CDATA[d k ]]> <![CDATA[da k ]]> <![CDATA[db k ]]> 0 1 1 1 0 2 2 1 3 3 1 1 Table 2: PAM8 MLSD minus state corresponding state table <![CDATA[d k ]]> <![CDATA[da k ]]> <![CDATA[db k ]]> 0 1 1 1 0 2 2 1 3 3 2 4 4 3 5 5 4 6 6 5 7 7 6 6 After getting the status, enter Viterbi decoding. Figure 8 As shown, Viterbi decoding first performs BM (branch metric) calculation, then PM (path metric) calculation and survivor path selection, and finally backtracking decoding.

[0041] The BM (branch metric) calculation process is as follows: k-1 time s k-1 There are 3 possibilities, ={0 1 2}, {S k-1,0 S k-1,1 S k-1,2} respectively represent {d k-1 da k-1 db k-1}. At the same time k, s k There are also 3 possibilities, S k-1,i ={0 1 2}, {S k,0 S k,1 S k,2} respectively represent {d k da k db kThere are 9 paths from time k-1 to time k, such as Figure 6 The 9 types of BM (branch metrics) are calculated as follows (1): BM i,j =(y k -L(S k,j )-L(S k-1,i )*h1) 2 i∈{0 1 2}, j∈{0 1 2} (1) L(S k-1,i ) is the k-1 moment s k-1 For the i-th possibility, for every j at time k, there are 3 i's at time k-1.

[0042] PM (path metric) calculation and surviving path selection. The cumulative BM corresponding to each i at time k-1 is PM. It is necessary to find the smallest path among the three i and select this smallest path as the PM of each j at time k. (2) PM is calculated from kL to time k, where L is the backtracking length. Finally, three PMs at time k are obtained, and the one with the smallest value among the three PMs is selected as the surviving path. The surviving path contains the states that are retained from the three states from kL to time k.

[0043] Backtracking decoding is to backtrack the surviving path and find the state corresponding to the surviving path. The state is {d k da k db k}, {d k da k db k} are temporarily stored, and the surviving path is selected from the stored {d k da k db k}, select one output, complete the decoding, and get the maximum likelihood sequence.

[0044] The BM required to calculate the traditional method PAMn is n^2, and the BM required to calculate the method is 9. In the application, n is greater than or equal to 4. This method greatly reduces the amount of calculation, bringing power consumption and area advantages. Some other improved methods reduce the BM to 4. The BM is significantly reduced, but there is a bit error transmission phenomenon, and some possible states will be omitted, resulting in a cost performance reduction. This method does not have the bit error transmission phenomenon, and reduces the state while ensuring the MLSD performance.

[0045] like Figure 8 As shown, based on the same inventive concept, this embodiment also provides a state-reduced maximum likelihood sequence detection method, including the following steps: Arranging a first forward equalizer to perform equalization processing on the output signal of the analog-to-digital converter to equalize the inter-symbol interference outside the first coefficient, and arranging a second forward equalizer to equalize the first coefficient; Making a decision on the result output by the second forward equalizer, and outputting the decision result; The state of the n-level modulator PAMn at each moment is reduced to three states according to the decision result, and maximum likelihood sequence detection is performed based on the result output by the first forward equalizer.

[0046] In a more optimized solution, the method may further include the step of adaptively updating the first coefficient according to the decision result and the result output by the first forward equalizer. In this case, maximum likelihood sequence detection is performed based on the result output by the first forward equalizer and the updated first coefficient.

[0047] The specific implementation methods of the above steps can be found in the above content and will not be repeated here.

[0048] The above-described embodiments are only specific implementations of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications, replacements and improvements within the technical scope disclosed by the present invention, and these modifications, replacements and improvements should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A state-reduced maximum likelihood sequence detection device, characterized in that: The invention comprises a first forward equalizer, a second forward equalizer, a decision device and a state-reduced maximum likelihood sequence detector, wherein the output end of the first forward equalizer is connected to the input end of the state-reduced maximum likelihood sequence detector, the output end of the second forward equalizer is connected to the decision device, and the output end of the decision device is connected to the input end of the state-reduced maximum likelihood sequence detector; The first forward equalizer is used to perform equalization processing on the output signal of the analog-to-digital converter to equalize the inter-symbol interference outside the first coefficient, and the second forward equalizer is used to equalize the first coefficient; The reduced state maximum likelihood sequence detector is used to reduce the state of the n-level modulator PAMn at each moment to three states according to the decision result of the decider, and perform maximum likelihood sequence detection.

2. The state-reduced maximum likelihood sequence detection device according to claim 1, characterized in that: It also includes a channel estimator, wherein the output end of the first forward equalizer and the output end of the decision device are respectively connected to the input end of the channel estimator, the output end of the channel estimator is connected to the input end of the reduced state maximum likelihood sequence detector, and the channel estimator is used to adaptively update the first coefficient.

3. The state-reduced maximum likelihood sequence detection device according to claim 2, characterized in that: The channel estimator comprises a filter composed of two multipliers, two adders and an adaptive module, the output ends of the two multipliers are connected to the input end of one adder, the output end of the adder is connected to the input end of another adder, and the output end of the other adder is connected to the input end of the adaptive module; The decision result is multiplied by the second coefficient through a multiplier, and the decision result is delayed for a time and then multiplied by the first coefficient through another multiplier. The two multiplied results are added through an adder and then subtracted from the result output by the first forward equalizer to obtain an error signal. The error signal and the decision result are passed through an adaptive module to obtain an updated first coefficient.

4. The state-reduced maximum likelihood sequence detection device according to claim 3, characterized in that: After the adaptive module obtains the decision result and error signal at time k, it first calculates the values ​​of the first coefficient and the second coefficient at time k, h0(k)=h0(k-1)+u*err*d k ,h1(k)=h1(k-1)+u*err*d k-1 , h0(k) is the value of the second coefficient at time k, h0(k-1) is the value of the second coefficient at time k-1, u is the update factor, err is the error signal, d k is the decision result at time k, d k-1 is the decision result at time k-1, h1(k) is the value of the first coefficient at time k, and h1(k-1) is the value of the first coefficient at time k-1; then the first coefficient and the second coefficient in the filter are updated using the calculated first coefficient and the second coefficient.

5. The state-reduced maximum likelihood sequence detection device according to claim 1, characterized in that: The reduced-state MLSD includes a state search module and a Viterbi decoding module. The output of the state search module is connected to the input of the Viterbi decoding module. The output of the state search module, the result of the first forward equalizer output, and the first coefficient are used together as the input of the Viterbi decoding module. The Viterbi decoding module outputs the detection result. The state search module reduces the state at each moment from n to 3 according to the decision result of the decider.

6. A state-reduced maximum likelihood sequence detection method, characterized in that: The following steps are involved: Arranging a first forward equalizer to perform equalization processing on the output signal of the analog-to-digital converter to equalize the inter-symbol interference outside the first coefficient, and arranging a second forward equalizer to equalize the first coefficient; Making a decision on the result output by the second forward equalizer, and outputting the decision result; The state of the n-level modulator PAMn at each moment is reduced to three states according to the decision result, and maximum likelihood sequence detection is performed based on the result output by the first forward equalizer.

7. The state-reduced maximum likelihood sequence detection method according to claim 6, characterized in that: It also includes the steps of: adaptively updating the first coefficient according to the decision result and the result output by the first forward equalizer; The process of performing maximum likelihood sequence detection based on the result output by the first forward equalizer includes: performing maximum likelihood sequence detection based on the result output by the first forward equalizer and the updated first coefficient.

8. The state-reduced maximum likelihood sequence detection method according to claim 7, characterized in that: The process of adaptively updating the first coefficient according to the decision result and the result output by the first forward equalizer includes: Delaying the decision result by one time and multiplying the result by the first coefficient, multiplying the decision result by the second coefficient, and then accumulating the two multiplied results; Subtracting the accumulated result from the result output by the first forward equalizer to obtain an error signal; The first coefficient is adaptively updated according to the error signal and the decision result.

9. The state-reduced maximum likelihood sequence detection method according to claim 7, characterized in that: The process of adaptively updating the first coefficient according to the error signal and the decision result includes: First calculate the values ​​of the first coefficient and the second coefficient at time k, h0(k)=h0(k-1)+u*err*d k ,h1(k)=h1(k-1)+u*err*d k-1 , h0(k) is the value of the second coefficient at time k, h0(k-1) is the value of the second coefficient at time k-1, u is the update factor, err is the error signal, d k is the decision result at time k, d k-1 is the decision result at time k-1, h1(k) is the value of the first coefficient at time k, and h1(k-1) is the value of the first coefficient at time k-1; The first coefficient and the second coefficient are then updated using the calculated values ​​of the first coefficient and the second coefficient.

10. The state-reduced maximum likelihood sequence detection method according to claim 9, characterized in that: The reducing the state of the n-level modulator PAMn at each moment to three states according to the decision result includes: taking the decision result and its two adjacent states as the states of MLSD, so as to reduce the state from n to three.

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