Direct digital radio frequency modulator
By designing a direct digital RF modulator including interpolation module, mode control module, fast digital IQ modulator and RF digital-to-analog converter, the problem of difficulty in on-chip integration and performance consistency in traditional technology is solved, and efficient signal modulation and stable performance are achieved.
Patent Information
- Application Number
- CN202411732006.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-28
- Publication Date
- 2025-04-11
AI Technical Summary
Traditional analog transmission links are difficult to integrate on-chip, and direct digital RF modulation requires complex logic encoding processing before digital-to-analog conversion of baseband signals, resulting in performance consistency problems.
A direct digital RF modulator is designed, including an interpolation module, a mode control module, a fast digital IQ modulator and a RF digital-to-analog converter. The modulator processes the I and Q baseband data in the digital domain, and synthesizes the data into high-speed data through the RF digital-to-analog converter, mixes it with the 50% duty cycle local oscillator clock, and dynamically adjusts the data sampling and converts the clock phase deviation.
It effectively solves the filtering and performance consistency problems in traditional analog and direct digital modulation, and improves the system's integration and signal modulation efficiency.
Smart Images
Figure CN119814516A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of integrated circuits, and in particular to a direct digital radio frequency modulator. Background Art
[0002] In wireless mobile communication systems, since the baseband signal frequency is low and cannot be directly transmitted over long distances, it needs to be converted to a higher frequency and transmitted through an antenna. The traditional analog transmission link uses digital-to-analog conversion, filtering, and then IQ modulation. The filtering circuit is difficult to integrate on-chip; and the traditional direct digital RF modulation requires complex logic encoding processing for each signal unit before the baseband signal digital-to-analog conversion. With the increase in the number of baseband signal bits and the complexity of decoding, the difficulty of digital-to-analog conversion switch layout design increases, and the number of current units increases dramatically, resulting in prominent performance consistency issues. Summary of the invention
[0003] The object of the present invention is to provide a direct digital radio frequency modulator to solve the problems in the background technology.
[0004] In order to solve the above technical problems, the present invention provides a direct digital radio frequency modulator, comprising:
[0005] Interpolation module, mode control module, fast digital IQ modulator, RF digital-to-analog converter;
[0006] The external input I and Q baseband data are connected to the input ports of the two interpolation modules respectively. The interpolation modules process the input signals in the digital domain first and output them to the fast digital IQ modulator under the control of the mode control module.
[0007] The fast digital IQ modulator performs modulation operation on the baseband data and the frequency division of the system frequency and outputs it to the RF digital-to-analog converter;
[0008] The RF DAC internally synthesizes the multiple low-speed data transmitted from the digital domain into high-speed data, mixes them with the 50% duty cycle local oscillator clock and adds them together. The data sampling and conversion clock phase deviations are dynamically adjusted through two digital delay-locked loops to ensure stable performance.
[0009] In one implementation, the interpolation module is an interpolation circuit with interpolation and filtering functions, which can be expanded into multiple parallel paths to process high-speed baseband signals.
[0010] In one implementation, the mode control module is used to control a multiple of an interpolation rate achieved by baseband data.
[0011] In one implementation, the radio frequency digital-to-analog converter is designed with a segmented current steering structure.
[0012] In one embodiment, the carrier frequency of the fast digital IQ modulator is a frequency that has a specific linear relationship with the system frequency.
[0013] In one embodiment, when the carrier frequency of the fast digital IQ modulator is four times the system frequency, the baseband signal is divided into four parallel data paths, and the four signals output from the I path after modulation are I 0 in , -Q 1 in , -I 2 in , Q 3 in ,I 4 in , -Q 5 in , -I 6 in , Q 7 in ...; the four-way signal of Q output is Q 0 in ,I 1 in , -Q 2 in , -I 3 in , Q 4 in ,I 5 in , -Q 6 in , -I 7 in 、…。
[0014] In one embodiment, when the carrier frequency of the fast digital IQ modulator is eight times the system frequency, the four-channel signal output after modulation is I 0 in , -Q 2 in , -I 4 in , Q 6 in , The four-way signal output of Q is Q 0 in , I 2 in , -Q 4 in , -I 6 in ,
[0015] The present invention provides a direct digital radio frequency modulator, which first processes the I and Q baseband data in the digital domain, and then inputs the data in parallel to the radio frequency digital-to-analog converter in four channels; inside the radio frequency digital-to-analog converter, the data is synthesized, mixed with the local oscillator clock with a duty cycle of 50% and added to generate a rotating four-point diamond constellation diagram. The radio frequency digital-to-analog converter adopts a 5+4+7 segmented current steering structure, and dynamically adjusts the data sampling and clock phase deviation through two digital delay phase-locked loops to ensure stable system performance. The present invention effectively solves the filtering and performance consistency problems in traditional analog and direct digital modulation, improves the system integration and signal modulation efficiency, and is an important improvement in modern wireless communication transmission link systems. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 This is a structural diagram of a direct digital RF modulator system.
[0017] Figure 2 It is a schematic diagram of the fast orthogonal modulation operation structure and output data under the condition that the carrier signal frequency is fs / 4.
[0018] Figure 3 The carrier signal frequency is f s Schematic diagram of fast orthogonal modulation operation structure and output data under / 8 conditions.
[0019] Figure 4 It is a schematic diagram of the modulation data and waveform of the direct digital RF modulator. DETAILED DESCRIPTION
[0020] The following is a further detailed description of a direct digital radio frequency modulator proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer according to the following description. It should be noted that the accompanying drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.
[0021] The present invention proposes a direct digital radio frequency modulator, which adopts fast digital IQ modulation technology and combines it with digital interpolation filtering. The I and Q baseband data are first processed in the digital domain, and four parallel inputs are input into the radio frequency digital-to-analog converter (RF DAC). After the high-speed data is synthesized inside the DAC, it is mixed and added with the 50% duty cycle local oscillator clock before transmission. The DAC adopts a segmented current steering structure design, and the data sampling and conversion clock phase deviation are dynamically adjusted through a digital delay phase-locked loop inside to ensure stable performance.
[0022] Figure 1This is a system structure diagram of the direct digital radio frequency modulator of the present invention, and its internal core functional modules include: an interpolation module, a mode control module, a fast digital IQ modulator, a radio frequency digital-to-analog converter and other auxiliary circuit system block diagrams.
[0023] Among them, the external input I and Q baseband data are respectively connected to the input ports of the two interpolation modules. The interpolation module first processes the input signal in the digital domain, and outputs it to the fast digital IQ modulator under the control of the mode control module; the fast digital IQ modulator modulates the baseband data and the four-frequency or eight-frequency division of the system frequency and outputs it to the RF digital-to-analog converter; the RF digital-to-analog converter synthesizes the four-way low-speed data transmitted from the digital domain into high-speed data, mixes it with the 50% duty cycle local oscillator clock, and adds it. The data sampling and conversion clock phase deviation are dynamically adjusted through two digital delay phase-locked loops to ensure stable performance. For specific explanation, some numerical values are specified in this embodiment, which are not limited to this in actual applications.
[0024] Figure 2 This is a schematic diagram of the fast orthogonal modulation process of the fast digital IQ modulator of the present invention under the condition of carrier signal frequency fs / 4. c Set to four times the system frequency, f s / 4, the output signal is f s / 4 carrier signal frequency plus the sine and cosine signals of the baseband signal. c = 2πf s / 4, the carrier cosine signal is:
[0025]
[0026] Discretize it, where t = n*T s , T s =1 / f s , then the discretized cosine carrier signal is cos(nπ / 2), the value of n is 0, 1, 2..., and the cosine and sine signals in one cycle are:
[0027]
[0028] A fast quadrature modulator is designed with a four-way parallel structure to convert the input baseband signal I in , Q in Divide into four parallel data, and assign the input data to I in sequence in0 ~I in3 , Q in0 ~Q in3 The input data are respectively Indicates that m is the data count, which takes values of 0, 1, 2, ..., and the sampling clock is one quarter of the original baseband signal sampling clock.
[0029] After modulation, the four-channel signal output of I is I 0 in , -Q 1 in , -I 2 in , Q 3 in ,I 4 in , -Q 5 in , -I 6 in , Q 7 in ...; the four-way signal of Q output is Q 0 in ,I 1 in , -Q 2 in , -I 3 in , Q 4 in ,I 5 in , -Q 6 in , -I 7 in 、…。
[0030] Figure 3 When the carrier signal frequency ω c When the system frequency is divided by eight, the fast quadrature modulation operation structure and output data diagram are shown. The output signal is f s / 8 carrier frequency plus the sine and cosine signals of the baseband signal, that is, ω c = 2πf s / 8, after the carrier signal is discretized, the carrier cosine signal should be: Discretize it, where t = n*Ts, Ts = 1 / f s , then the discretized cosine carrier signal is The value of n is 0, 1, 2, etc., and there are cosines in one period: 0, -1, 0, The same goes for sine: 1, 0, -1, When a four-way parallel structure is used, the first way of the cosine is 1, -1, and the second way is The third route is 0,0, and the fourth route is The first path of the sine is 0,0; the second path is The third route is 1, -1, and the fourth route is
[0031] Output signal I out , Q out The value within one clock cycle can be calculated using the following formula:
[0032]
[0033] Among them, the value of n is 0 to 7, and each carrier cycle corresponds to 8 data. The four-channel signal output of I channel after modulation is I 0 in , -Q 2 in , -I 4 in , Q 6 in , The four-way signal output of Q is Q 0 in , I 2 in , -Q 4 in , -I 6 in ,
[0034] Observing the composition of the output signal, we can find that multiple computing units can be shared in the hardware implementation. For details, see Figure 3 Only 12 adders (or subtractors) and 4 multipliers are needed, of which 10 adders are added with the constant 1, and their bit width only needs to be expanded by one bit; 4 multipliers are added with the constant 0.707, and the required operation units are relatively reduced. Compared with the conventional modulation method, the hardware resource consumption of the fast modulation circuit is at least reduced by the hardware consumption of a digital NCO.
[0035] The processed signal in the digital domain is transmitted to the RF DAC. Since the digital modulator outputs four parallel data channels, they are merged into one high-speed data channel inside the RF DAC. To ensure that all data is sampled by the DAC, the DAC data sampling clock is synchronized with the modulator system clock, both of which are f s . s Take / 4 modulation accuracy as an example, Figure 2 Four parallel outputs I out , Q outThe signal enters the RF DAC circuit of I and Q channels respectively. The DAC converts the clock as the RF local oscillator signal for modulation. The data mapping and local oscillator waveform diagram are shown in Figure 4 , the calculated orthogonal modulation constellation mapping relationship of the direct digital RF modulator is
[0036]
[0037] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.
Claims
1. A direct digital radio frequency modulator, characterized in that: include: Interpolation module, mode control module, fast digital IQ modulator, RF digital-to-analog converter; The external input I and Q baseband data are connected to the input ports of the two interpolation modules respectively. The interpolation modules process the input signals in the digital domain first and output them to the fast digital IQ modulator under the control of the mode control module. The fast digital IQ modulator performs modulation operation on the baseband data and the frequency division of the system frequency and outputs it to the RF digital-to-analog converter; The RF DAC internally synthesizes the multiple low-speed data transmitted from the digital domain into high-speed data, mixes them with the 50% duty cycle local oscillator clock and adds them together. The data sampling and conversion clock phase deviations are dynamically adjusted through two digital delay-locked loops to ensure stable performance.
2. The direct digital radio frequency modulator according to claim 1, characterized in that The interpolation module is an interpolation circuit with interpolation and filtering functions, and can be expanded into multiple parallel paths to process high-speed baseband signals.
3. The direct digital radio frequency modulator according to claim 1, characterized in that The mode control module is used to control the multiple of the interpolation rate achieved by the baseband data.
4. The direct digital radio frequency modulator according to claim 1, characterized in that The radio frequency digital-to-analog converter adopts a segmented current steering structure design.
5. The direct digital radio frequency modulator according to claim 1, characterized in that The carrier frequency of the fast digital IQ modulator is a frequency that has a specific linear relationship with the system frequency.
6. The direct digital radio frequency modulator according to claim 5, characterized in that When the carrier frequency of the fast digital IQ modulator is four times the system frequency, the baseband signal is divided into four parallel data paths, and the four signals output from the I path after modulation are I 0 in , -Q 1 in , -I 2 in , Q 3 in ,I 4 in , -Q 5 in , -I 6 in , Q 7 in ...; the four-way signal output of Q is Q 0 in ,I 1 in , -Q 2 in , -I 3 in , Q 4 in ,I 5 in , -Q 6 in , -I 7 in 、…。 7. The direct digital radio frequency modulator according to claim 5, characterized in that: When the carrier frequency of the fast digital IQ modulator is eight times the system frequency, the four-channel signals output by I channel after modulation are I 0 in , -Q 2 in , -I 4 in , Q 6 in , ...; the four-way signal output of Q is Q 0 in , I 2 in , -Q 4 in , -I 6 in , ….