Preparation method of ITO transparent conductive layer and LED chip

Abstract

The application discloses a preparation method of an ITO transparent conductive layer and an LED chip. The preparation method comprises the following steps: depositing a first ITO layer by using a magnetron sputtering and performing first annealing; performing first etching on the first ITO layer after the first annealing to obtain a patterned first ITO layer; depositing a second ITO layer on the patterned first ITO layer by using a magnetron sputtering and performing second annealing; performing second etching on the second ITO layer after the second annealing to obtain a patterned second ITO layer; wherein the sputtering power for depositing the first ITO layer is less than the sputtering power for depositing the second ITO layer; the annealing temperature of the first annealing is higher than the annealing temperature of the second annealing; and the time of the first etching is longer than the time of the second etching. By implementing the application, the ITO transparent conductive layer has higher transmittance while forming a good ohmic contact with an epitaxial structure.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a preparation method of ITO transparent conductive layer and LED chip. BACKGROUND

[0002] In the preparation of LED device, in order to improve the light efficiency, it is necessary to set the thin film material with good conductivity and high light transmission between the light emitting surface and the electrode. Indium tin oxide (ITO) has high conductivity, high visible light transmittance, good chemical stability, high adhesion, convenient pattern processing and other advantages, and is often used as a transparent conductive layer in semiconductor optoelectronic devices.

[0003] The existing ITO transparent conductive layer is generally composed of a first ITO layer and a second ITO layer. The first ITO layer forms a good ohmic contact with the epitaxial structure, and at the same time serves as a protective layer to prevent the high-power deposited second ITO layer from damaging the epitaxial structure. Finally, the ITO transparent conductive layer is annealed at high temperature to improve the transmittance and reduce the square resistance. However, the transmittance of the current ITO transparent conductive layer is relatively low, resulting in low brightness of the LED chip. SUMMARY

[0004] The technical problem to be solved by the present application is to provide a preparation method of ITO transparent conductive layer, which forms a good ohmic contact with the epitaxial structure while having higher transmittance.

[0005] The technical problem to be solved by the present application is to provide a preparation method of ITO transparent conductive layer, which forms a good ohmic contact with the epitaxial structure while having higher transmittance.

[0006] In order to solve the above problems, the present application discloses a preparation method of ITO transparent conductive layer, comprising the following steps:

[0007] A first ITO layer is deposited by magnetron sputtering and subjected to first annealing;

[0008] The first ITO layer after the first annealing is subjected to first etching to obtain a patterned first ITO layer;

[0009] A second ITO layer is deposited on the patterned first ITO layer by magnetron sputtering and subjected to second annealing;

[0010] The second ITO layer after the second annealing is subjected to second etching to obtain a patterned second ITO layer; the patterned second ITO layer covers the upper surface and the side surface of the patterned first ITO layer;

[0011] The sputtering power for depositing the first ITO layer is less than the sputtering power for depositing the second ITO layer; the annealing temperature of the first annealing is higher than the annealing temperature of the second annealing; and the time of the first etching is greater than the time of the second etching.

[0012] As an improvement of the above technical solution, the sum of the thicknesses of the first ITO layer and the second ITO layer is 40nm-300nm, and the thickness ratio of the first ITO layer to the second ITO layer is 1:(0.3-0.5).

[0013] As an improvement of the above technical solution, the first annealing comprises the following steps:

[0014] heating to 200-220℃ at a heating rate of 8-15℃ / s, and holding for 30-60s;

[0015] heating to 520-580℃ at a heating rate of 5-10℃ / s, and holding for 120-300s while introducing O2, and the flow rate of O2 is 0.8-1.5mL / min.

[0016] As an improvement of the above technical solution, the second annealing comprises the following steps:

[0017] heating to 320-380℃ at a heating rate of 5-10℃ / s, and holding for 120-300s while introducing O2, and the flow rate of O2 is 0.8-1.5mL / min.

[0018] As an improvement of the above technical solution, during the process of magnetron sputtering deposition of the first ITO layer, the flow rate of Ar is 50-100mL / min, the sputtering power is 80-200W, the sputtering pressure is 1-3mTorr, and the flow rate of O2 is 0.2-0.8mL / min.

[0019] As an improvement of the above technical solution, during the process of magnetron sputtering deposition of the second ITO layer, the flow rate of Ar is 50-100mL / min, the sputtering power is 300-500W, the sputtering pressure is 1-3mTorr, and the flow rate of O2 is 0.2-0.8mL / min.

[0020] As an improvement of the above technical solution, the first etching comprises the following steps:

[0021] disposing a first photoresist layer on the first ITO layer, and performing photolithography on the first photoresist layer to expose the region of the first ITO layer to be etched;

[0022] After the plasma cleaning treatment of the to-be-etched region, the first wet etching is performed; the etching liquid concentration of the first wet etching is 10 -6 mol / L-10 -4 mol / L, and the etching time is 20s-500s.

[0023] The remaining first photoresist layer on the first ITO layer is removed.

[0024] As an improvement of the above technical solution, the second etching comprises the following steps:

[0025] A second photoresist layer is arranged on the second ITO layer, and the second photoresist layer is subjected to photolithography to expose the to-be-etched region of the second ITO layer;

[0026] After the plasma cleaning treatment of the to-be-etched region, the second wet etching is performed; the etching liquid concentration of the second wet etching is 10 -6 mol / L-10 -4 mol / L, and the etching time is 20s-500s.

[0027] The remaining second photoresist layer on the second ITO layer is removed.

[0028] As an improvement of the above technical solution, the ratio of the wet etching time of the first etching to the wet etching time of the second etching is 1:(0.6-0.8).

[0029] Correspondingly, the application further discloses an LED chip comprising the ITO transparent conductive layer prepared by the preparation method.

[0030] The application has the following beneficial effects: the preparation method of the ITO transparent conductive layer provided by the application comprises depositing a first ITO layer and a second ITO layer, performing high-temperature annealing and etching on the first ITO layer, and performing low-temperature annealing and etching on the second ITO layer. By using different deposition processes, annealing processes and etching processes on the first ITO layer and the second ITO layer, the second ITO layer with high transmittance completely covers the first ITO layer, the ITO transparent conductive layer has good ohmic contact with the epitaxial structure and has higher transmittance, thereby improving the brightness of the LED chip. DETAILED DESCRIPTION

[0031] In order to make the object, technical solutions and advantages of the application clearer, the application is further described in detail below.

[0032] The application provides a preparation method of an ITO transparent conductive layer, comprising the following steps:

[0033] S1, depositing a first ITO layer by magnetron sputtering and performing first annealing;

[0034] S2, performing first etching on the first ITO layer after the first annealing to obtain a patterned first ITO layer;

[0035] S3, depositing a second ITO layer on the patterned first ITO layer by magnetron sputtering and performing second annealing;

[0036] S4, performing second etching on the second ITO layer after the second annealing to obtain a patterned second ITO layer; the patterned second ITO layer covers the upper surface and the side surface of the patterned first ITO layer.

[0037] The sputtering power for depositing the first ITO layer is less than the sputtering power for depositing the second ITO layer; the annealing temperature of the first annealing is higher than the annealing temperature of the second annealing; the time of the first etching is greater than the time of the second etching.

[0038] The preparation method of the ITO transparent conductive layer provided by the application comprises low-power magnetron sputtering deposition of a first ITO layer and high-power magnetron sputtering deposition of a second ITO layer, high-temperature annealing and etching of the first ITO layer, and low-temperature annealing and etching of the second ITO layer. The sputtering power of the first ITO layer is relatively low, a relatively dense film layer is formed, good ohmic contact with the epitaxial structure can be formed after high-temperature annealing, the low working voltage of the LED chip is maintained, the sputtering power of the second ITO layer is relatively high, and a high-transmittance relatively rough film layer is obtained by cooperating with low-temperature annealing. In addition, by using a specific etching process, the boundary of the second ITO layer is wider than the boundary of the first ITO layer, that is, the patterned second ITO layer completely covers the upper surface and the side surface of the patterned first ITO layer, so as to prevent the etching liquid of the etching process of the second ITO layer from penetrating into the first ITO layer and avoid defects such as notches, concaves and convexes that may occur at the boundary of the first ITO layer. By using different deposition processes, annealing processes and etching processes for the first ITO layer and the second ITO layer, the second ITO layer with high transmittance completely covers the first ITO layer, the ITO transparent conductive layer has good ohmic contact with the epitaxial structure and has higher transmittance, so as to improve the brightness of the LED chip.

[0039] In an embodiment, the sum of the thicknesses of the first ITO layer and the second ITO layer is 40 nm to 300 nm, and is exemplarily 50 nm, 100 nm, 150 nm, 200 nm or 250 nm, but is not limited thereto. The light transmittance is highly dependent on the thickness of the ITO transparent conductive layer, and within a certain range, the light transmittance decreases with the increase of the thickness of the ITO transparent conductive layer, especially in the near-infrared region, a large number of free electrons in the ITO transparent conductive layer interact with the incident light, resulting in polarization of the light, thereby significantly reducing the transmission spectrum, further affecting the dielectric constant, and finally adversely affecting the light transmittance. However, at the same time, the resistivity decreases with the increase of the thickness of the ITO transparent conductive layer, and the ITO transparent conductive layer with lower resistivity is more conducive to improving the efficiency of the solar cell. Through the preparation method of the ITO transparent conductive layer provided by the present application, the prepared ITO transparent conductive layer has a large thickness and good light transmittance at the same time.

[0040] In a preferred embodiment, the thickness ratio of the first ITO layer to the second ITO layer is 1:(0.3-0.5), and is exemplarily 1:0.32, 1:0.36, 1:0.4, 1:0.42 or 1:0.46, but is not limited thereto. If the thickness of the second ITO layer is too large, the light transmittance will be reduced; if the thickness of the second ITO layer is too small, it is difficult to effectively improve the light transmittance, and it will adversely affect the quality of the first ITO layer.

[0041] Specifically, the first ITO layer is deposited by low-power magnetron sputtering. In an embodiment, the flow rate of Ar is 50 mL / min to 100 mL / min, and is exemplarily 55 mL / min, 60 mL / min, 70 mL / min, 80 mL / min or 90 mL / min, but is not limited thereto; the sputtering power is 80 W to 200 W, and is exemplarily 90 W, 100 W, 120 W, 160 W or 180 W, but is not limited thereto; the sputtering pressure is 1 mTorr to 3 mTorr, and is exemplarily 1.25 mTorr, 1.5 mTorr, 2 mTorr, 2.25 mTorr or 2.5 mTorr, but is not limited thereto; the flow rate of O2 is 0.2 mL / min to 0.8 mL / min, and is exemplarily 0.3 mL / min, 0.4 mL / min, 0.5 mL / min, 0.6 mL / min or 0.7 mL / min, but is not limited thereto.

[0042] In a preferred embodiment, the first annealing includes the following steps:

[0043] S11, heating to 200°C to 220°C at a heating rate of 8°C / s to 15°C / s, and holding for 30 s to 60 s;

[0044] S12, temperature is raised to 520-580℃ at a temperature raising rate of 5-10℃ / s, and the temperature is kept for 120-300s while O2 is introduced at a flow rate of 0.8-1.5mL / min.

[0045] Specifically, the temperature is raised to 520-580℃, for example, 530℃, 540℃, 550℃, 560℃ or 570℃, but not limited to; the temperature keeping time at 520-580℃ is 120-300s, for example, 150s, 180s, 210s, 240s or 270s, but not limited to; the flow rate of O2 is 0.8-1.5mL / min, for example, 0.9mL / min, 1mL / min, 1.2mL / min, 1.3mL / min or 1.4mL / min, but not limited to. High temperature annealing is performed on the first ITO layer, and as the annealing temperature increases, the grain and porosity of the first ITO layer decrease obviously, the microstructure of the first ITO layer is densified, and the resistivity decreases. In addition, the first ITO layer is annealed by using a specific temperature raising procedure, which further improves the high temperature annealing quality of the first ITO layer, thereby further improving the crystallization quality of the first ITO layer, reducing the resistance and increasing the light transmittance.

[0046] Specifically, in one embodiment, the first etching includes the following steps:

[0047] S21, a first photoresist layer is arranged on the first ITO layer, and the first photoresist layer is subjected to photolithography to expose the area to be etched of the first ITO layer;

[0048] S22, after the area to be etched is subjected to plasma cleaning treatment, the first wet etching is performed; the etching solution concentration of the first wet etching is 10 -6 mol / L-10 -4 mol / L, and the etching time is 20-500s;

[0049] S23, the remaining first photoresist layer on the first ITO layer is removed.

[0050] Specifically, the second ITO layer is deposited by high-power magnetron sputtering. In an embodiment, the flow rate of Ar is 50 mL / min to 100 mL / min, and an example is 55 mL / min, 60 mL / min, 70 mL / min, 80 mL / min, or 90 mL / min, but is not limited thereto; the sputtering power is 300 W to 500 W, and an example is 320 W, 350 W, 400 W, 450 W, or 480 W, but is not limited thereto; the sputtering pressure is 1 mTorr to 3 mTorr, and an example is 1.25 mTorr, 1.5 mTorr, 2 mTorr, 2.25 mTorr, or 2.5 mTorr, but is not limited thereto; and the flow rate of O2 is 0.2 mL / min to 0.8 mL / min, and an example is 0.3 mL / min, 0.4 mL / min, 0.5 mL / min, 0.6 mL / min, or 0.7 mL / min, but is not limited thereto.

[0051] In a preferred embodiment, the second annealing includes the following steps:

[0052] S31, heating to 320°C to 380°C at a heating rate of 5°C / s to 10°C / s, and maintaining for 120 s to 300 s while introducing O2 at a flow rate of 0.8 mL / min to 1.5 mL / min.

[0053] Specifically, the heating is performed at a specific heating program to 320°C to 380°C, and an example is 330°C, 340°C, 350°C, 360°C, or 370°C, but is not limited thereto; the maintaining time at 320°C to 380°C is 120 s to 300 s, and an example is 150 s, 180 s, 210 s, 240 s, or 270 s, but is not limited thereto; and the flow rate of O2 introduced is 0.8 mL / min to 1.5 mL / min, and an example is 0.9 mL / min, 1 mL / min, 1.2 mL / min, 1.3 mL / min, or 1.4 mL / min, but is not limited thereto. The second ITO layer is annealed at a specific heating program, the crystal grains of the second ITO layer are small, and the gaps between the crystal grains are large, a large amount of visible light can pass through the sample, so that the thin film has a high visible light transmittance.

[0054] Specifically, in an embodiment, the second etching includes the following steps:

[0055] S41, disposing a second photoresist layer on the second ITO layer, and performing photolithography on the second photoresist layer to expose the to-be-etched region of the second ITO layer;

[0056] S42, after the to-be-etched region is subjected to plasma cleaning treatment, performing second wet etching; the etching liquid concentration of the second wet etching is 10 -60.1 mol / L~10 -4 0.1 mol / L, and the etching time is 20 s~500 s;

[0057] S43, removing the second photoresist layer remaining on the second ITO layer.

[0058] It can be understood that the process of performing photoetching on the first photoresist layer and the second photoresist layer includes processes such as yellow light uniform coating, exposure, and development. Preferably, the same photoetching plate is used for exposure of the first photoresist layer and the second photoresist layer in the present application, that is, the patterns made by the two photoetching processes are completely consistent, and the wet etching time of the first etching is controlled to be greater than the wet etching time of the second etching, so that the patterned second ITO layer is accurately overlaid on the patterned first ITO layer. In the prior art, after depositing two ITO layers, annealing and patterning are performed, that is, the two ITO layers are only subjected to one patterning process, and an ITO layer with completely consistent structure is obtained. However, the first ITO layer and the second ITO layer of the present application are subjected to different annealing processes, respectively. Therefore, in order to further ensure the quality of the first ITO layer, the present application performs patterning on the first ITO layer and the second ITO layer, respectively. In a preferred embodiment, the ratio of the wet etching time of the first etching to the wet etching time of the second etching is 1:(0.6~0.8), and exemplary values include 1:0.62, 1:0.64, 1:0.7, 1:0.72, or 1:0.74, but are not limited thereto. By controlling the ratio of the wet etching time of the first etching to the wet etching time of the second etching, high-quality complete coating of the second ITO layer on the first ITO layer is achieved, thereby ensuring the quality of the first ITO layer.

[0059] Correspondingly, the present application also provides an LED chip comprising the ITO transparent conductive layer prepared by the above preparation method. Specifically, in an embodiment, the LED chip comprises a substrate and an epitaxial structure, a current blocking layer, an ITO transparent conductive layer, a passivation layer, and an electrode deposited on the substrate. The substrate can be a sapphire substrate, a Si substrate, or a SiC substrate, but is not limited thereto. The epitaxial structure includes but is not limited to a first semiconductor layer, an MQW layer, and a second semiconductor layer stacked on the substrate in sequence, wherein the first semiconductor layer can be an N-type GaN layer, an N-type AlGaN layer, or an N-type GaAs layer, but is not limited thereto; the MQW layer can be an InGaN / GaN layer, an InGaN / AlGaN layer, or an AlGaN / AlGaN layer, but is not limited thereto; and the second semiconductor layer can be a P-type GaN layer, a P-type AlGaN layer, or a P-type GaAs layer, but is not limited thereto. The electrode includes a first electrode and a second electrode, the first electrode is electrically connected to the first semiconductor layer through the passivation layer, and the second electrode is electrically connected to the second ITO layer through the passivation layer.

[0060] The present application will be further described in the following specific embodiments:

[0061] Embodiment 1

[0062] The embodiment provides a preparation method of an ITO transparent conductive layer, comprising the following steps:

[0063] S1, depositing a first ITO layer by magnetron sputtering and performing first annealing.

[0064] The thickness of the first ITO layer is 60 nm.

[0065] During the process of depositing the first ITO layer by magnetron sputtering, the flow rate of Ar is 80 mL / min, the sputtering power is 160 W, the sputtering air pressure is 1.5 mTorr, and the flow rate of O2 is 0.5 mL / min.

[0066] The first annealing comprises the following steps:

[0067] S11, increasing the temperature to 550 DEG C at a temperature increasing rate of 4 DEG C / s, keeping warm for 180 s, and introducing O2 at a flow rate of 1 mL / min.

[0068] S2, performing first etching on the first ITO layer after the first annealing to obtain a patterned first ITO layer.

[0069] The first etching comprises the following steps:

[0070] S21, disposing a first photoresist layer on the first ITO layer, performing photoetching on the first photoresist layer, and exposing the etching area of the first ITO layer;

[0071] S22, after the etching area is subjected to plasma cleaning treatment, performing first wet etching; the etching solution concentration of the first wet etching is 10 -5 mol / L, and the etching time is 300 s;

[0072] S23, removing the remaining first photoresist layer on the first ITO layer.

[0073] S3, depositing a second ITO layer on the patterned first ITO layer by magnetron sputtering and performing second annealing.

[0074] The thickness of the second ITO layer is 60 nm.

[0075] During the process of depositing the second ITO layer by magnetron sputtering, the flow rate of Ar is 80 mL / min, the sputtering power is 400 W, the sputtering air pressure is 1.5 mTorr, and the flow rate of O2 is 0.5 mL / min.

[0076] The second annealing comprises the following steps:

[0077] S31, temperature rising to 350℃ at a temperature rising rate of 4℃ / s, and keeping for 180s, while O2 is inputted, and the flow rate of O2 is 1mL / min.

[0078] S4, performing second etching on the second ITO layer after the second annealing, to obtain a patterned second ITO layer; the patterned second ITO layer coats the upper surface and the side surface of the patterned first ITO layer.

[0079] The second etching includes the following steps:

[0080] S41, disposing a second photoresist layer on the second ITO layer, and performing photoetching on the second photoresist layer to expose the etching area of the second ITO layer;

[0081] S42, after the etching area is subjected to plasma cleaning treatment, performing second wet etching; the etching liquid concentration of the second wet etching is 10 -5 mol / L, and the etching time is 240s;

[0082] S43, removing the remaining second photoresist layer on the second ITO layer.

[0083] Embodiment 2

[0084] The embodiment provides a preparation method of an ITO transparent conductive layer, which is different from the embodiment 1 in that the thickness of the first ITO layer is 80nm, and the thickness of the second ITO layer is 30nm.

[0085] The rest is the same as the embodiment 1.

[0086] Embodiment 3

[0087] The embodiment provides a preparation method of an ITO transparent conductive layer, which is different from the embodiment 2 in that the first annealing includes the following steps:

[0088] S11, temperature rising to 210℃ at a temperature rising rate of 12℃ / s, and keeping for 40s;

[0089] S12, temperature rising to 580℃ at a temperature rising rate of 7℃ / s, and keeping for 180s, while O2 is inputted, and the flow rate of O2 is 1mL / min.

[0090] The rest is the same as the embodiment 2.

[0091] Embodiment 4

[0092] The embodiment provides a preparation method of an ITO transparent conductive layer, which is different from the embodiment 3 in that the second annealing includes the following steps:

[0093] S31, temperature rising to 350℃ at a temperature rising rate of 6℃ / s, keeping for 180s, while O2 is inputted, the flow rate of O2 is 1mL / min.

[0094] Comparative Example 1

[0095] The present comparative example provides a preparation method of ITO transparent conductive layer, comprising the following steps:

[0096] S1, depositing a first ITO layer by magnetron sputtering.

[0097] S2, depositing a second ITO layer on the first ITO layer by magnetron sputtering.

[0098] S3, annealing the ITO transparent conductive layer, temperature rising to 550℃ at a temperature rising rate of 4℃ / s, keeping for 180s, while O2 is inputted, the flow rate of O2 is 1mL / min.

[0099] S4, etching the annealed ITO transparent conductive layer to obtain a patterned ITO transparent conductive layer.

[0100] The rest are the same as Example 1.

[0101] Performance detection:

[0102] The ITO transparent conductive layers prepared in Example 1-Example 4 and Comparative Example 1 are applied to LED chips, and the transmittance and sheet resistance under different wavelengths are detected, and the specific results are shown in the following table:

[0103]

[0104] The above is the preferred embodiment of the application. It should be noted that those skilled in the art can make some improvements and refinements without departing from the principles of the application. These improvements and refinements are also considered within the scope of protection of the application.

Claims

1. A method for producing an ITO transparent conductive layer, characterized by, The method comprises the following steps: depositing a first ITO layer by magnetron sputtering and performing first annealing; performing first etching on the first ITO layer after the first annealing to obtain a patterned first ITO layer; depositing a second ITO layer on the patterned first ITO layer by magnetron sputtering and performing second annealing; performing second etching on the second ITO layer after the second annealing to obtain a patterned second ITO layer, wherein the patterned second ITO layer covers the upper surface and the side surface of the patterned first ITO layer; wherein the sputtering power for depositing the first ITO layer is less than the sputtering power for depositing the second ITO layer; the annealing temperature of the first annealing is higher than the annealing temperature of the second annealing; and the etching time of the first etching is greater than the etching time of the second etching.

2. The method of claim 1, wherein the ITO transparent conductive layer is prepared by sputtering. The sum of the thicknesses of the first ITO layer and the second ITO layer is 40-300 nm, and the thickness ratio of the first ITO layer to the second ITO layer is 1:(0.3-0.5).

3. The method of claim 1, wherein the ITO transparent conductive layer is prepared by sputtering. The first annealing comprises the following steps: ramping up at a ramping rate of 8-15 ℃ / s to 200-220 ℃ and maintaining for 30-60 s; ramping up at a ramping rate of 5-10 ℃ / s to 520-580 ℃ and maintaining for 120-300 s while introducing O2 at a flow rate of 0.8-1.5 mL / min.

4. The method of claim 1, wherein the ITO transparent conductive layer is prepared by sputtering. The second annealing comprises the following steps: ramping up at a ramping rate of 5-10 ℃ / s to 320-380 ℃ and maintaining for 120-300 s while introducing O2 at a flow rate of 0.8-1.5 mL / min.

5. The method of claim 1, wherein the ITO transparent conductive layer is prepared by sputtering. In the process of depositing the first ITO layer by magnetron sputtering, the flow rate of Ar is 50-100 mL / min, the sputtering power is 80-200 W, the sputtering pressure is 1-3 mTorr, and the flow rate of O2 is 0.2-0.8 mL / min.

6. The method of claim 1, wherein the ITO transparent conductive layer is prepared by sputtering. In the process of depositing the second ITO layer by magnetron sputtering, the flow rate of Ar is 50-100 mL / min, the sputtering power is 300-500 W, the sputtering pressure is 1-3 mTorr, and the flow rate of O2 is 0.2-0.8 mL / min.

7. The method of claim 1, wherein the ITO transparent conductive layer is prepared by sputtering. The first etching comprises the following steps: disposing a first photoresist layer on the first ITO layer, performing photolithography on the first photoresist layer to expose the region to be etched of the first ITO layer; and After the plasma cleaning treatment of the region to be etched, a first wet etching is performed; the etching liquid concentration of the first wet etching is 10 -6 mol / L-10 -4 mol / L, and the etching time is 20s-500s. removing the remaining first photoresist layer on the first ITO layer.

8. The method of claim 1, wherein the ITO transparent conductive layer is prepared by sputtering. The second etching comprises the following steps: disposing a second photoresist layer on the second ITO layer, performing photolithography on the second photoresist layer to expose the region to be etched of the second ITO layer; and After the plasma cleaning treatment of the region to be etched, a second wet etching is performed; the etching liquid concentration of the second wet etching is 10 -6 mol / L-10 -4 mol / L, and the etching time is 20s-500s. removing the remaining second photoresist layer on the second ITO layer.

9. The method of claim 1, wherein the ITO transparent conductive layer is prepared by sputtering a target of ITO on a substrate. The ratio of the wet etching time of the first etching to the wet etching time of the second etching is 1:(0.6-0.8).

10. An LED chip, characterized by An ITO transparent conductive layer prepared by the method according to any one of claims 1-9.

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